/* Generated automatically by the program `genoutput'
   from the machine description file `md'.  */

#define IN_TARGET_CODE 1
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "backend.h"
#include "predict.h"
#include "tree.h"
#include "rtl.h"
#include "flags.h"
#include "alias.h"
#include "varasm.h"
#include "stor-layout.h"
#include "calls.h"
#include "insn-config.h"
#include "expmed.h"
#include "dojump.h"
#include "explow.h"
#include "memmodel.h"
#include "emit-rtl.h"
#include "stmt.h"
#include "expr.h"
#include "insn-codes.h"
#include "tm_p.h"
#include "regs.h"
#include "conditions.h"
#include "insn-attr.h"

#include "recog.h"

#include "diagnostic-core.h"
#include "output.h"
#include "target.h"
#include "tm-constrs.h"

static const char * const output_1[] = {
  "adcs%?\t%0, %0, %2",
  "adcs%?\t%0, %1, %2",
};

static const char * const output_2[] = {
  "adcs%?\t%0, %1, %2",
  "sbcs%?\t%0, %1, #%B2",
};

static const char * const output_4[] = {
  "adcs%?\t%0, %0, %2",
  "adcs%?\t%0, %1, %2",
};

static const char * const output_5[] = {
  "adcs%?\t%0, %1, %2",
  "sbcs%?\t%0, %1, #%B2",
};

static const char * const output_7[] = {
  "add%?\t%0, %0, %2",
  "add%?\t%0, %1, %2",
  "add%?\t%0, %1, %2",
  "add%?\t%0, %1, %2",
  "add%?\t%0, %1, %2",
  "add%?\t%0, %1, %2",
  "add%?\t%0, %2, %1",
  "add%?\t%0, %1, %2",
  "addw%?\t%0, %1, %2",
  "addw%?\t%0, %1, %2",
  "sub%?\t%0, %1, #%n2",
  "sub%?\t%0, %1, #%n2",
  "sub%?\t%0, %1, #%n2",
  "subw%?\t%0, %1, #%n2",
  "subw%?\t%0, %1, #%n2",
  "#",
};

static const char * const output_11[] = {
  "adds%?\t%0, %1, %2",
  "adds%?\t%0, %0, %2",
  "subs%?\t%0, %1, #%n2",
  "subs%?\t%0, %0, #%n2",
  "adds%?\t%0, %1, %2",
  "subs%?\t%0, %1, #%n2",
};

static const char * const output_12[] = {
  "cmp%?\t%0, #%n1",
  "cmn%?\t%0, %1",
  "cmp%?\t%0, #%n1",
};

static const char * const output_13[] = {
  "adds%?\t%0, %1, %2",
  "subs%?\t%0, %1, #%n2",
  "adds%?\t%0, %1, %2",
};

static const char * const output_14[] = {
  "cmn%?\t%0, %1",
  "cmp%?\t%0, #%n1",
  "cmn%?\t%0, %1",
};

static const char *
output_16 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1165 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  /* For 0 and INT_MIN it is essential that we use subs, as adds will result
     in different condition codes (like cmn rather than like cmp), so that
     alternative comes first.  Both alternatives can match for any 0x??000000
     where except for 0 and INT_MIN it doesn't matter what we choose, and also
     for -1 and 1 with TARGET_THUMB2, in that case prefer instruction with #1
     as it is shorter.  */
  if (which_alternative == 0 && operands[3] != const1_rtx)
    return "subs%?\t%0, %1, #%n3";
  else
    return "adds%?\t%0, %1, %3";
}
}

static const char * const output_17[] = {
  "adds%?\t%0, %1, %2",
  "adds%?\t%0, %0, %2",
  "subs%?\t%0, %1, #%n2",
  "subs%?\t%0, %0, #%n2",
  "adds%?\t%0, %1, %2",
  "subs%?\t%0, %1, #%n2",
};

static const char * const output_18[] = {
  "adds%?\t%0, %1, %2",
  "adds%?\t%0, %0, %2",
  "subs%?\t%0, %1, #%n2",
  "subs%?\t%0, %0, #%n2",
  "adds%?\t%0, %1, %2",
  "subs%?\t%0, %1, #%n2",
};

static const char * const output_19[] = {
  "cmn%?\t%0, %1",
  "cmp%?\t%0, #%n1",
  "cmn%?\t%0, %1",
  "cmp%?\t%0, #%n1",
};

static const char * const output_20[] = {
  "cmn%?\t%0, %1",
  "cmp%?\t%0, #%n1",
  "cmn%?\t%0, %1",
  "cmp%?\t%0, #%n1",
};

static const char * const output_21[] = {
  "adc%?\t%0, %1, %2",
  "adc%?\t%0, %1, %2",
  "sbc%?\t%0, %1, #%B2",
};

static const char * const output_23[] = {
  "adc%?\t%0, %1, %2",
  "adc%?\t%0, %1, %2",
  "sbc%?\t%0, %1, #%B2",
};

static const char * const output_29[] = {
  "sbc%?\t%0, %1, %2",
  "rsc%?\t%0, %2, %1",
  "sbc%?\t%0, %2, %2, lsl #1",
};

static const char * const output_31[] = {
  "sbc%?\t%0, %2, %1",
  "rsc%?\t%0, %1, %2",
};

static const char * const output_35[] = {
  "sbcs\t%0, %1, %2",
  "adcs\t%0, %1, #%B2",
};

static const char * const output_36[] = {
  "sbcs\t%0, %1, %2",
  "adcs\t%0, %1, #%B2",
};

static const char * const output_45[] = {
  "sub%?\t%0, %1, %2",
  "sub%?\t%0, %2",
  "sub%?\t%0, %1, %2",
  "rsb%?\t%0, %2, %1",
  "rsb%?\t%0, %2, %1",
  "sub%?\t%0, %1, %2",
  "sub%?\t%0, %1, %2",
  "sub%?\t%0, %1, %2",
  "#",
};

static const char * const output_46[] = {
  "subs%?\t%0, %1, %2",
  "subs%?\t%0, %1, %2",
  "rsbs%?\t%0, %2, %1",
};

static const char * const output_47[] = {
  "subs%?\t%0, %1, %2",
  "subs%?\t%0, %1, %2",
  "rsbs%?\t%0, %2, %1",
};

static const char * const output_53[] = {
  "sbcs%?\t%0, %1, %2",
  "adcs%?\t%0, %1, #%B2",
};

static const char * const output_55[] = {
  "sbcs%?\t%0, %1, %2",
  "adcs%?\t%0, %1, #%B2",
};

static const char * const output_90[] = {
  "and%?\t%0, %1, %2",
  "and%?\t%0, %1, %2",
  "bic%?\t%0, %1, #%B2",
  "and%?\t%0, %1, %2",
  "#",
};

static const char * const output_91[] = {
  "ands%?\t%0, %1, %2",
  "bics%?\t%0, %1, #%B2",
  "ands%?\t%0, %1, %2",
};

static const char * const output_92[] = {
  "tst%?\t%0, %1",
  "bics%?\t%2, %0, #%B1",
  "tst%?\t%0, %1",
};

static const char *
output_93 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  operands[1] = GEN_INT (((1 << INTVAL (operands[1])) - 1)
			 << INTVAL (operands[2]));
  output_asm_insn ("tst%?\t%0, %1", operands);
  return "";
  
}

static const char * const output_106[] = {
  "orr%?\t%0, %1, %2",
  "orr%?\t%0, %1, %2",
  "orn%?\t%0, %1, #%B2",
  "orr%?\t%0, %1, %2",
  "#",
};

static const char * const output_109[] = {
  "eor%?\t%0, %1, %2",
  "eor%?\t%0, %1, %2",
  "eor%?\t%0, %1, %2",
  "#",
};

static const char *
output_120 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4125 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  operands[3] = gen_rtx_fmt_ee (minmax_code (operands[3]), SImode,
				operands[1], operands[2]);
  output_asm_insn ("cmp\t%1, %2", operands);
  if (TARGET_THUMB2)
    output_asm_insn ("ite\t%d3", operands);
  output_asm_insn ("str%d3\t%1, %0", operands);
  output_asm_insn ("str%D3\t%2, %0", operands);
  return "";
  
}

static const char *
output_121 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4154 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    enum rtx_code code = GET_CODE (operands[4]);
    bool need_else;

    if (which_alternative != 0 || operands[3] != const0_rtx
        || (code != PLUS && code != IOR && code != XOR))
      need_else = true;
    else
      need_else = false;

    operands[5] = gen_rtx_fmt_ee (minmax_code (operands[5]), SImode,
				  operands[2], operands[3]);
    output_asm_insn ("cmp\t%2, %3", operands);
    if (TARGET_THUMB2)
      {
	if (need_else)
	  output_asm_insn ("ite\t%d5", operands);
	else
	  output_asm_insn ("it\t%d5", operands);
      }
    output_asm_insn ("%i4%d5\t%0, %1, %2", operands);
    if (need_else)
      output_asm_insn ("%i4%D5\t%0, %1, %3", operands);
    return "";
  }
}

static const char *
output_129 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4376 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  int mask;
  bool signed_sat;
  if (!arm_sat_operator_match (operands[1], operands[2],
                               &mask, &signed_sat))
    gcc_unreachable ();

  operands[1] = GEN_INT (mask);
  if (signed_sat)
    return "ssat%?\t%0, %1, %3";
  else
    return "usat%?\t%0, %1, %3";
}
}

static const char *
output_130 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4376 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  int mask;
  bool signed_sat;
  if (!arm_sat_operator_match (operands[1], operands[2],
                               &mask, &signed_sat))
    gcc_unreachable ();

  operands[1] = GEN_INT (mask);
  if (signed_sat)
    return "ssat%?\t%0, %1, %3";
  else
    return "usat%?\t%0, %1, %3";
}
}

static const char *
output_131 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4376 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  int mask;
  bool signed_sat;
  if (!arm_sat_operator_match (operands[2], operands[1],
                               &mask, &signed_sat))
    gcc_unreachable ();

  operands[1] = GEN_INT (mask);
  if (signed_sat)
    return "ssat%?\t%0, %1, %3";
  else
    return "usat%?\t%0, %1, %3";
}
}

static const char *
output_132 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4376 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  int mask;
  bool signed_sat;
  if (!arm_sat_operator_match (operands[2], operands[1],
                               &mask, &signed_sat))
    gcc_unreachable ();

  operands[1] = GEN_INT (mask);
  if (signed_sat)
    return "ssat%?\t%0, %1, %3";
  else
    return "usat%?\t%0, %1, %3";
}
}

static const char *
output_133 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4402 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  int mask;
  bool signed_sat;
  if (!arm_sat_operator_match (operands[1], operands[2],
                               &mask, &signed_sat))
    gcc_unreachable ();

  operands[1] = GEN_INT (mask);
  if (signed_sat)
    return "ssat%?\t%0, %1, %4%S3";
  else
    return "usat%?\t%0, %1, %4%S3";
}
}

static const char *
output_134 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4402 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  int mask;
  bool signed_sat;
  if (!arm_sat_operator_match (operands[2], operands[1],
                               &mask, &signed_sat))
    gcc_unreachable ();

  operands[1] = GEN_INT (mask);
  if (signed_sat)
    return "ssat%?\t%0, %1, %4%S3";
  else
    return "usat%?\t%0, %1, %4%S3";
}
}

static const char *
output_147 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4651 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
 return arm_output_shift(operands, 0);
}

static const char *
output_148 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
 return arm_output_shift(operands, 1);
}

static const char *
output_149 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4683 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
 return arm_output_shift(operands, 1);
}

static const char *
output_153 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4903 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  return output_move_double (operands, true, NULL);
  
}

static const char * const output_154[] = {
  "ldr\t%0, %1\t@ unaligned",
  "ldr%?\t%0, %1\t@ unaligned",
  "ldr%?\t%0, %1\t@ unaligned",
};

static const char * const output_156[] = {
  "ldrh\t%0, %1\t@ unaligned",
  "ldrh%?\t%0, %1\t@ unaligned",
  "ldrh%?\t%0, %1\t@ unaligned",
};

static const char *
output_157 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4959 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  return output_move_double (operands, true, NULL);
  
}

static const char * const output_158[] = {
  "str\t%1, %0\t@ unaligned",
  "str%?\t%1, %0\t@ unaligned",
  "str%?\t%1, %0\t@ unaligned",
};

static const char * const output_159[] = {
  "strh\t%1, %0\t@ unaligned",
  "strh%?\t%1, %0\t@ unaligned",
  "strh%?\t%1, %0\t@ unaligned",
};

static const char * const output_162[] = {
  "sdiv%?\t%0, %1, %2",
  "sdiv\t%0, %1, %2",
};

static const char * const output_163[] = {
  "udiv%?\t%0, %1, %2",
  "udiv\t%0, %1, %2",
};

static const char * const output_165[] = {
  "negs\t%0, %1",
  "rsbs\t%0, %1, #0",
};

static const char * const output_166[] = {
  "rsc\t%0, %1, #0",
  "sbc\t%0, %1, %1, lsl #1",
};

static const char * const output_172[] = {
  "#",
  "ldrh%?\t%0, %1",
};

static const char * const output_173[] = {
  "uxth%?\t%0, %1",
  "ldrh%?\t%0, %1",
};

static const char * const output_175[] = {
  "#",
  "ldrb%?\t%0, %1\t%@ zero_extendqisi2",
};

static const char * const output_176[] = {
  "uxtb%?\t%0, %1",
  "ldrb%?\t%0, %1\t%@ zero_extendqisi2",
};

static const char * const output_179[] = {
  "#",
  "ldrsh%?\t%0, %1",
};

static const char * const output_180[] = {
  "sxth%?\t%0, %1",
  "ldrsh%?\t%0, %1",
};

static const char * const output_183[] = {
  "#",
  "ldrsb%?\t%0, %1",
};

static const char * const output_184[] = {
  "sxtb%?\t%0, %1",
  "ldrsb%?\t%0, %1",
};

static const char *
output_251 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 6248 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  switch (which_alternative)
    {
    case 0:
    case 1:
    case 2:
      return "#";
    case 3:
      /* Cannot load it directly, split to load it via MOV / MOVT.  */
      if (!MEM_P (operands[1]) && arm_disable_literal_pool)
	return "#";
      /* Fall through.  */
    default:
      return output_move_double (operands, true, NULL);
    }
  
}

static const char * const output_252[] = {
  "movt%?\t%0, #:upper16:%c2",
  "movt\t%0, #:upper16:%c2",
};

static const char * const output_253[] = {
  "mov%?\t%0, %1",
  "mov%?\t%0, %1",
  "mvn%?\t%0, #%B1",
  "movw%?\t%0, %1",
  "ldr%?\t%0, %1",
  "str%?\t%1, %0",
};

static const char *
output_257 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 6637 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  (*targetm.asm_out.internal_label) (asm_out_file, "LPIC",
				     INTVAL (operands[2]));
  return "add\t%0, %|pc";
  
}

static const char *
output_258 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 6653 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

    (*targetm.asm_out.internal_label) (asm_out_file, "LPIC",
				       INTVAL (operands[2]));
    return "add%?\t%0, %|pc, %1";
  
}

static const char *
output_259 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 6669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

    (*targetm.asm_out.internal_label) (asm_out_file, "LPIC",
				       INTVAL (operands[2]));
    return "ldr%?\t%0, [%|pc, %1]\t\t@ tls_load_dot_plus_eight";
  
}

static const char * const output_260[] = {
  "cmp%?\t%0, #0",
  "cmp%?\t%0, #0",
  "subs%?\t%0, %1, #0",
  "subs%?\t%0, %1, #0",
  "subs%?\t%0, %1, #0",
};

static const char * const output_261[] = {
  "mov%?\t%0, %1\t%@ movhi",
  "mvn%?\t%0, #%B1\t%@ movhi",
  "movw%?\t%0, %L1\t%@ movhi",
  "strh%?\t%1, %0\t%@ movhi",
  "ldrh%?\t%0, %1\t%@ movhi",
};

static const char * const output_262[] = {
  "mov%?\t%0, %1\t%@ movhi",
  "mov%?\t%0, %1\t%@ movhi",
  "mvn%?\t%0, #%B1\t%@ movhi",
};

static const char * const output_263[] = {
  "mov%?\t%0, %1",
  "mov%?\t%0, %1",
  "mov%?\t%0, %1",
  "mov%?\t%0, %1",
  "mvn%?\t%0, #%B1",
  "ldrb%?\t%0, %1",
  "strb%?\t%1, %0",
  "ldrb%?\t%0, %1",
  "strb%?\t%1, %0",
};

static const char *
output_264 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7305 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  switch (which_alternative)
    {
    case 0:	/* ARM register from memory */
      return "ldrh%?\t%0, %1\t%@ __fp16";
    case 1:	/* memory from ARM register */
      return "strh%?\t%1, %0\t%@ __fp16";
    case 2:	/* ARM register from ARM register */
      return "mov%?\t%0, %1\t%@ __fp16";
    case 3:	/* ARM register from constant */
      {
	long bits;
	rtx ops[4];

	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
			       HFmode);
	ops[0] = operands[0];
	ops[1] = GEN_INT (bits);
	ops[2] = GEN_INT (bits & 0xff00);
	ops[3] = GEN_INT (bits & 0x00ff);

	if (arm_arch_thumb2)
	  output_asm_insn ("movw%?\t%0, %1", ops);
	else
	  output_asm_insn ("mov%?\t%0, %2\n\torr%?\t%0, %0, %3", ops);
	return "";
       }
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_265 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7305 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  switch (which_alternative)
    {
    case 0:	/* ARM register from memory */
      return "ldrh%?\t%0, %1\t%@ __bf16";
    case 1:	/* memory from ARM register */
      return "strh%?\t%1, %0\t%@ __bf16";
    case 2:	/* ARM register from ARM register */
      return "mov%?\t%0, %1\t%@ __bf16";
    case 3:	/* ARM register from constant */
      {
	long bits;
	rtx ops[4];

	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
			       BFmode);
	ops[0] = operands[0];
	ops[1] = GEN_INT (bits);
	ops[2] = GEN_INT (bits & 0xff00);
	ops[3] = GEN_INT (bits & 0x00ff);

	if (arm_arch_thumb2)
	  output_asm_insn ("movw%?\t%0, %1", ops);
	else
	  output_asm_insn ("mov%?\t%0, %2\n\torr%?\t%0, %0, %3", ops);
	return "";
       }
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_266 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7403 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  switch (which_alternative)
    {
    case 0: return "mov%?\t%0, %1";
    case 1:
      /* Cannot load it directly, split to load it via MOV / MOVT.  */
      if (!MEM_P (operands[1]) && arm_disable_literal_pool)
	return "#";
      return "ldr%?\t%0, %1\t%@ float";
    case 2: return "str%?\t%1, %0\t%@ float";
    default: gcc_unreachable ();
    }
}
}

static const char *
output_267 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7527 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  switch (which_alternative)
    {
    case 0:
    case 1:
    case 2:
      return "#";
    case 3:
      /* Cannot load it directly, split to load it via MOV / MOVT.  */
      if (!MEM_P (operands[1]) && arm_disable_literal_pool)
	return "#";
      /* Fall through.  */
    default:
      return output_move_double (operands, true, NULL);
    }
  
}

static const char * const output_268[] = {
  "cmp%?\t%0, %1",
  "cmp%?\t%0, %1",
  "cmp%?\t%0, %1",
  "cmp%?\t%0, %1",
  "cmn%?\t%0, #%n1",
};

static const char *
output_273 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7872 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
    if (arm_ccfsm_state == 1 || arm_ccfsm_state == 2)
    {
      arm_ccfsm_state += 2;
      return "";
    }
    switch (get_attr_length (insn))
      {
	case 2: /* Thumb2 16-bit b{cond}.  */
	case 4: /* Thumb2 32-bit b{cond} or A32 b{cond}.  */
	  return "b%d1\t%l0";
	  break;

	/* Thumb2 b{cond} out of range.  Use 16-bit b{cond} and
	   unconditional branch b.  */
	default: return arm_gen_far_branch (operands, 0, "Lbcond", "b%D1\t");
      }
  }
}

static const char *
output_274 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7925 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
    if (arm_ccfsm_state == 1 || arm_ccfsm_state == 2)
    {
      arm_ccfsm_state += 2;
      return "";
    }
    switch (get_attr_length (insn))
      {
	case 2: /* Thumb2 16-bit b{cond}.  */
	case 4: /* Thumb2 32-bit b{cond} or A32 b{cond}.  */
	  return "b%D1\t%l0";
	  break;

	/* Thumb2 b{cond} out of range.  Use 16-bit b{cond} and
	   unconditional branch b.  */
	default: return arm_gen_far_branch (operands, 0, "Lbcond", "b%d1\t");
      }
  }
}

static const char *
output_279 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8341 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    enum arm_cond_code code = maybe_get_arm_condition_code (operands[1]);
    switch (code)
      {
      case ARM_GE:
      case ARM_GT:
      case ARM_EQ:
      case ARM_VS:
        return "vsel%d1.f32\t%0, %3, %4";
      case ARM_LT:
      case ARM_LE:
      case ARM_NE:
      case ARM_VC:
        return "vsel%D1.f32\t%0, %4, %3";
      default:
        gcc_unreachable ();
      }
    return "";
  }
}

static const char *
output_280 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8341 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    enum arm_cond_code code = maybe_get_arm_condition_code (operands[1]);
    switch (code)
      {
      case ARM_GE:
      case ARM_GT:
      case ARM_EQ:
      case ARM_VS:
        return "vsel%d1.f64\t%P0, %P3, %P4";
      case ARM_LT:
      case ARM_LE:
      case ARM_NE:
      case ARM_VC:
        return "vsel%D1.f64\t%P0, %P4, %P3";
      default:
        gcc_unreachable ();
      }
    return "";
  }
}

static const char *
output_281 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8372 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    enum arm_cond_code code = maybe_get_arm_condition_code (operands[1]);
    switch (code)
      {
      case ARM_GE:
      case ARM_GT:
      case ARM_EQ:
      case ARM_VS:
	return "vsel%d1.f16\t%0, %3, %4";
      case ARM_LT:
      case ARM_LE:
      case ARM_NE:
      case ARM_VC:
	return "vsel%D1.f16\t%0, %4, %3";
      default:
	gcc_unreachable ();
      }
    return "";
  }
}

static const char * const output_282[] = {
  "mov%D3\t%0, %2",
  "mvn%D3\t%0, #%B2",
  "mov%d3\t%0, %1",
  "mvn%d3\t%0, #%B1",
  "#",
  "#",
  "#",
  "#",
};

static const char * const output_283[] = {
  "mov%D3\t%0, %2",
  "mov%d3\t%0, %1",
};

static const char *
output_284 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8489 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    if (arm_ccfsm_state == 1 || arm_ccfsm_state == 2)
      {
        arm_ccfsm_state += 2;
        return "";
      }
    return "b%?\t%l0";
  }
  
}

static const char * const output_285[] = {
  "mov\t%0, %1",
  "ldr\t%0, %1",
};

static const char *
output_287 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8622 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  return output_call (operands);
  
}

static const char *
output_289 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8735 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  return output_call (&operands[1]);
  
}

static const char *
output_290 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8754 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
   rtx op = operands[0];

   /* Switch mode now when possible.  */
   if (SYMBOL_REF_DECL (op) && !TREE_PUBLIC (SYMBOL_REF_DECL (op))
	&& arm_arch5t && arm_change_mode_p (SYMBOL_REF_DECL (op)))
      return NEED_PLT_RELOC ? "blx%?\t%a0(PLT)" : "blx%?\t(%a0)";

    return NEED_PLT_RELOC ? "bl%?\t%a0(PLT)" : "bl%?\t%a0";
  }
}

static const char *
output_291 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8778 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
   rtx op = operands[1];

   /* Switch mode now when possible.  */
   if (SYMBOL_REF_DECL (op) && !TREE_PUBLIC (SYMBOL_REF_DECL (op))
	&& arm_arch5t && arm_change_mode_p (SYMBOL_REF_DECL (op)))
      return NEED_PLT_RELOC ? "blx%?\t%a1(PLT)" : "blx%?\t(%a1)";

    return NEED_PLT_RELOC ? "bl%?\t%a1(PLT)" : "bl%?\t%a1";
  }
}

static const char *
output_292 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8864 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  if (which_alternative == 1)
    return NEED_PLT_RELOC ? "b%?\t%a0(PLT)" : "b%?\t%a0";
  else
    {
      if (arm_arch5t || arm_arch4t)
	return "bx%?\t%0\t%@ indirect register sibling call";
      else
	return "mov%?\t%|pc, %0\t%@ indirect register sibling call";
    }
  
}

static const char *
output_293 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  if (which_alternative == 1)
   return NEED_PLT_RELOC ? "b%?\t%a1(PLT)" : "b%?\t%a1";
  else
    {
      if (arm_arch5t || arm_arch4t)
	return "bx%?\t%1";
      else
	return "mov%?\t%|pc, %1\t@ indirect sibling call ";
    }
  
}

static const char *
output_294 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8920 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    if (arm_ccfsm_state == 2)
      {
        arm_ccfsm_state += 2;
        return "";
      }
    return output_return_instruction (const_true_rtx, true, false, false);
  }
}

static const char *
output_295 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8941 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    if (arm_ccfsm_state == 2)
      {
        arm_ccfsm_state += 2;
        return "";
      }
    return output_return_instruction (operands[0], true, false,
				      false);
  }
}

static const char *
output_296 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8941 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    if (arm_ccfsm_state == 2)
      {
        arm_ccfsm_state += 2;
        return "";
      }
    return output_return_instruction (operands[0], true, false,
				      true);
  }
}

static const char *
output_297 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8963 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    if (arm_ccfsm_state == 2)
      {
        arm_ccfsm_state += 2;
        return "";
      }
    return output_return_instruction (operands[0], true, true,
				      false);
  }
}

static const char *
output_298 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8963 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    if (arm_ccfsm_state == 2)
      {
        arm_ccfsm_state += 2;
        return "";
      }
    return output_return_instruction (operands[0], true, true,
				      true);
  }
}

static const char *
output_299 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    if (arm_ccfsm_state == 2)
      {
        arm_ccfsm_state += 2;
        return "";
      }
    return output_return_instruction (const_true_rtx, true, false, true);
  }
}

static const char *
output_303 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9171 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  return output_probe_stack_range (operands[0], operands[2]);
}
}

static const char * const output_305[] = {
  "ldr\t%1, [%1]\n\tstr\t%1, %0\n\tmovs\t%1, #0",
  "ldr\t%1, [%1]\n\tstr\t%1, %0\n\tmov\t%1, #0",
};

static const char *
output_310 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9492 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

    if (flag_pic)
      return "cmp\t%0, %1\n\taddls\t%|pc, %|pc, %0, asl #2\n\tb\t%l3";
    return   "cmp\t%0, %1\n\tldrls\t%|pc, [%|pc, %0, asl #2]\n\tb\t%l3";
  
}

static const char *
output_314 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9557 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  if (TARGET_ARM)
    return ".inst\t0xe7f000f0";
  else
    return ".inst\t0xdeff";
  
}

static const char * const output_331[] = {
  "orr%d1\t%0, %3, #1",
  "#",
};

static const char *
output_333 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9969 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

    if (GET_CODE (operands[3]) == NE)
      {
        if (which_alternative != 1)
	  output_asm_insn ("mov%D4\t%0, %2", operands);
        if (which_alternative != 0)
	  output_asm_insn ("mov%d4\t%0, %1", operands);
        return "";
      }
    if (which_alternative != 0)
      output_asm_insn ("mov%D4\t%0, %1", operands);
    if (which_alternative != 1)
      output_asm_insn ("mov%d4\t%0, %2", operands);
    return "";
  
}

static const char *
output_334 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10005 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

    if (GET_CODE (operands[4]) == LT && operands[3] == const0_rtx)
      return "%i5\t%0, %1, %2, lsr #31";

    output_asm_insn ("cmp\t%2, %3", operands);
    if (GET_CODE (operands[5]) == AND)
      output_asm_insn ("mov%D4\t%0, #0", operands);
    else if (GET_CODE (operands[5]) == MINUS)
      output_asm_insn ("rsb%D4\t%0, %1, #0", operands);
    else if (which_alternative != 0)
      output_asm_insn ("mov%D4\t%0, %1", operands);
    return "%i5%d4\t%0, %1, #1";
  
}

static const char *
output_335 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10031 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

    output_asm_insn ("cmp\t%2, %3", operands);
    if (which_alternative != 0)
      output_asm_insn ("mov%D4\t%0, %1", operands);
    return "sub%d4\t%0, %1, #1";
  
}

static const char *
output_336 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    static const char * const cmp1[NUM_OF_COND_CMP][2] =
    {
      {"cmp%d5\t%0, %1",
       "cmp%d4\t%2, %3"},
      {"cmn%d5\t%0, #%n1",
       "cmp%d4\t%2, %3"},
      {"cmp%d5\t%0, %1",
       "cmn%d4\t%2, #%n3"},
      {"cmn%d5\t%0, #%n1",
       "cmn%d4\t%2, #%n3"}
    };
    static const char * const cmp2[NUM_OF_COND_CMP][2] =
    {
      {"cmp\t%2, %3",
       "cmp\t%0, %1"},
      {"cmp\t%2, %3",
       "cmn\t%0, #%n1"},
      {"cmn\t%2, #%n3",
       "cmp\t%0, %1"},
      {"cmn\t%2, #%n3",
       "cmn\t%0, #%n1"}
    };
    static const char * const ite[2] =
    {
      "it\t%d5",
      "it\t%d4"
    };
    static const int cmp_idx[9] = {CMP_CMP, CMP_CMP, CMP_CMN,
                                   CMP_CMP, CMN_CMP, CMP_CMP,
                                   CMN_CMP, CMP_CMN, CMN_CMN};
    int swap =
      comparison_dominates_p (GET_CODE (operands[5]), GET_CODE (operands[4]));

    output_asm_insn (cmp2[cmp_idx[which_alternative]][swap], operands);
    if (TARGET_THUMB2) {
      output_asm_insn (ite[swap], operands);
    }
    output_asm_insn (cmp1[cmp_idx[which_alternative]][swap], operands);
    return "";
  }
}

static const char *
output_337 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10142 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    static const char * const cmp1[NUM_OF_COND_CMP][2] =
    {
      {"cmp\t%0, %1",
       "cmp\t%2, %3"},
      {"cmn\t%0, #%n1",
       "cmp\t%2, %3"},
      {"cmp\t%0, %1",
       "cmn\t%2, #%n3"},
      {"cmn\t%0, #%n1",
       "cmn\t%2, #%n3"}
    };
    static const char * const cmp2[NUM_OF_COND_CMP][2] =
    {
      {"cmp%d4\t%2, %3",
       "cmp%D5\t%0, %1"},
      {"cmp%d4\t%2, %3",
       "cmn%D5\t%0, #%n1"},
      {"cmn%d4\t%2, #%n3",
       "cmp%D5\t%0, %1"},
      {"cmn%d4\t%2, #%n3",
       "cmn%D5\t%0, #%n1"}
    };
    static const char * const ite[2] =
    {
      "it\t%d4",
      "it\t%D5"
    };
    static const int cmp_idx[9] = {CMP_CMP, CMP_CMP, CMP_CMN,
                                   CMP_CMP, CMN_CMP, CMP_CMP,
                                   CMN_CMP, CMP_CMN, CMN_CMN};
    int swap =
      comparison_dominates_p (GET_CODE (operands[5]),
			      reverse_condition (GET_CODE (operands[4])));

    output_asm_insn (cmp1[cmp_idx[which_alternative]][swap], operands);
    if (TARGET_THUMB2) {
      output_asm_insn (ite[swap], operands);
    }
    output_asm_insn (cmp2[cmp_idx[which_alternative]][swap], operands);
    return "";
  }
}

static const char *
output_338 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10225 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    static const char *const cmp1[NUM_OF_COND_CMP][2] =
    {
      {"cmp%d5\t%0, %1",
       "cmp%d4\t%2, %3"},
      {"cmn%d5\t%0, #%n1",
       "cmp%d4\t%2, %3"},
      {"cmp%d5\t%0, %1",
       "cmn%d4\t%2, #%n3"},
      {"cmn%d5\t%0, #%n1",
       "cmn%d4\t%2, #%n3"}
    };
    static const char *const cmp2[NUM_OF_COND_CMP][2] =
    {
      {"cmp\t%2, %3",
       "cmp\t%0, %1"},
      {"cmp\t%2, %3",
       "cmn\t%0, #%n1"},
      {"cmn\t%2, #%n3",
       "cmp\t%0, %1"},
      {"cmn\t%2, #%n3",
       "cmn\t%0, #%n1"}
    };
    static const char *const ite[2] =
    {
      "it\t%d5",
      "it\t%d4"
    };
    static const int cmp_idx[] = {CMP_CMP, CMP_CMP, CMP_CMN,
                                  CMP_CMP, CMN_CMP, CMP_CMP,
                                  CMP_CMP, CMN_CMP, CMP_CMN,
				  CMN_CMN};
    int swap =
      comparison_dominates_p (GET_CODE (operands[5]), GET_CODE (operands[4]));

    output_asm_insn (cmp2[cmp_idx[which_alternative]][swap], operands);
    if (TARGET_THUMB2) {
      output_asm_insn (ite[swap], operands);
    }
    output_asm_insn (cmp1[cmp_idx[which_alternative]][swap], operands);
    return "";
  }
}

static const char *
output_339 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10310 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    static const char *const cmp1[NUM_OF_COND_CMP][2] =
    {
      {"cmp\t%0, %1",
       "cmp\t%2, %3"},
      {"cmn\t%0, #%n1",
       "cmp\t%2, %3"},
      {"cmp\t%0, %1",
       "cmn\t%2, #%n3"},
      {"cmn\t%0, #%n1",
       "cmn\t%2, #%n3"}
    };
    static const char *const cmp2[NUM_OF_COND_CMP][2] =
    {
      {"cmp%D4\t%2, %3",
       "cmp%D5\t%0, %1"},
      {"cmp%D4\t%2, %3",
       "cmn%D5\t%0, #%n1"},
      {"cmn%D4\t%2, #%n3",
       "cmp%D5\t%0, %1"},
      {"cmn%D4\t%2, #%n3",
       "cmn%D5\t%0, #%n1"}
    };
    static const char *const ite[2] =
    {
      "it\t%D4",
      "it\t%D5"
    };
    static const int cmp_idx[] = {CMP_CMP, CMP_CMP, CMP_CMN,
                                  CMP_CMP, CMN_CMP, CMP_CMP,
				  CMP_CMP, CMN_CMP, CMP_CMN,
				  CMN_CMN};
    int swap =
      comparison_dominates_p (GET_CODE (operands[5]), GET_CODE (operands[4]));

    output_asm_insn (cmp1[cmp_idx[which_alternative]][swap], operands);
    if (TARGET_THUMB2) {
      output_asm_insn (ite[swap], operands);
    }
    output_asm_insn (cmp2[cmp_idx[which_alternative]][swap], operands);
    return "";
  }
  
}

static const char *
output_347 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10702 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  if (GET_CODE (operands[5]) == LT
      && (operands[4] == const0_rtx))
    {
      if (which_alternative != 1 && REG_P (operands[1]))
	{
	  if (operands[2] == const0_rtx)
	    return "and\t%0, %1, %3, asr #31";
	  return "ands\t%0, %1, %3, asr #32\n\tmovcc\t%0, %2";
	}
      else if (which_alternative != 0 && REG_P (operands[2]))
	{
	  if (operands[1] == const0_rtx)
	    return "bic\t%0, %2, %3, asr #31";
	  return "bics\t%0, %2, %3, asr #32\n\tmovcs\t%0, %1";
	}
      /* The only case that falls through to here is when both ops 1 & 2
	 are constants.  */
    }

  if (GET_CODE (operands[5]) == GE
      && (operands[4] == const0_rtx))
    {
      if (which_alternative != 1 && REG_P (operands[1]))
	{
	  if (operands[2] == const0_rtx)
	    return "bic\t%0, %1, %3, asr #31";
	  return "bics\t%0, %1, %3, asr #32\n\tmovcs\t%0, %2";
	}
      else if (which_alternative != 0 && REG_P (operands[2]))
	{
	  if (operands[1] == const0_rtx)
	    return "and\t%0, %2, %3, asr #31";
	  return "ands\t%0, %2, %3, asr #32\n\tmovcc\t%0, %1";
	}
      /* The only case that falls through to here is when both ops 1 & 2
	 are constants.  */
    }
  if (CONST_INT_P (operands[4])
      && !const_ok_for_arm (INTVAL (operands[4])))
    output_asm_insn ("cmn\t%3, #%n4", operands);
  else
    output_asm_insn ("cmp\t%3, %4", operands);
  if (which_alternative != 0)
    output_asm_insn ("mov%d5\t%0, %1", operands);
  if (which_alternative != 1)
    output_asm_insn ("mov%D5\t%0, %2", operands);
  return "";
  
}

static const char * const output_349[] = {
  "add%d4\t%0, %2, %3",
  "sub%d4\t%0, %2, #%n3",
  "add%d4\t%0, %2, %3\n\tmov%D4\t%0, %1",
  "sub%d4\t%0, %2, #%n3\n\tmov%D4\t%0, %1",
};

static const char * const output_351[] = {
  "add%D4\t%0, %2, %3",
  "sub%D4\t%0, %2, #%n3",
  "add%D4\t%0, %2, %3\n\tmov%d4\t%0, %1",
  "sub%D4\t%0, %2, #%n3\n\tmov%d4\t%0, %1",
};

static const char *
output_354 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10891 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  /* If we have an operation where (op x 0) is the identity operation and
     the conditional operator is LT or GE and we are comparing against zero and
     everything is in registers then we can do this in two instructions.  */
  if (operands[3] == const0_rtx
      && GET_CODE (operands[7]) != AND
      && REG_P (operands[5])
      && REG_P (operands[1])
      && REGNO (operands[1]) == REGNO (operands[4])
      && REGNO (operands[4]) != REGNO (operands[0]))
    {
      if (GET_CODE (operands[6]) == LT)
	return "and\t%0, %5, %2, asr #31\n\t%I7\t%0, %4, %0";
      else if (GET_CODE (operands[6]) == GE)
	return "bic\t%0, %5, %2, asr #31\n\t%I7\t%0, %4, %0";
    }
  if (CONST_INT_P (operands[3])
      && !const_ok_for_arm (INTVAL (operands[3])))
    output_asm_insn ("cmn\t%2, #%n3", operands);
  else
    output_asm_insn ("cmp\t%2, %3", operands);
  output_asm_insn ("%I7%d6\t%0, %4, %5", operands);
  if (which_alternative != 0)
    return "mov%D6\t%0, %1";
  return "";
  
}

static const char * const output_355[] = {
  "%I5%d4\t%0, %2, %3",
  "%I5%d4\t%0, %2, %3\n\tmov%D4\t%0, %1",
};

static const char *
output_356 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10956 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  /* If we have an operation where (op x 0) is the identity operation and
     the conditional operator is LT or GE and we are comparing against zero and
     everything is in registers then we can do this in two instructions */
  if (operands[5] == const0_rtx
      && GET_CODE (operands[7]) != AND
      && REG_P (operands[3])
      && REG_P (operands[1])
      && REGNO (operands[1]) == REGNO (operands[2])
      && REGNO (operands[2]) != REGNO (operands[0]))
    {
      if (GET_CODE (operands[6]) == GE)
	return "and\t%0, %3, %4, asr #31\n\t%I7\t%0, %2, %0";
      else if (GET_CODE (operands[6]) == LT)
	return "bic\t%0, %3, %4, asr #31\n\t%I7\t%0, %2, %0";
    }

  if (CONST_INT_P (operands[5])
      && !const_ok_for_arm (INTVAL (operands[5])))
    output_asm_insn ("cmn\t%4, #%n5", operands);
  else
    output_asm_insn ("cmp\t%4, %5", operands);

  if (which_alternative != 0)
    output_asm_insn ("mov%d6\t%0, %1", operands);
  return "%I7%D6\t%0, %2, %3";
  
}

static const char * const output_357[] = {
  "%I5%D4\t%0, %2, %3",
  "%I5%D4\t%0, %2, %3\n\tmov%d4\t%0, %1",
};

static const char * const output_359[] = {
  "mvn%D4\t%0, %2",
  "mov%d4\t%0, %1\n\tmvn%D4\t%0, %2",
  "mvn%d4\t%0, #%B1\n\tmvn%D4\t%0, %2",
};

static const char * const output_361[] = {
  "mvn%d4\t%0, %2",
  "mov%D4\t%0, %1\n\tmvn%d4\t%0, %2",
  "mvn%D4\t%0, #%B1\n\tmvn%d4\t%0, %2",
};

static const char * const output_363[] = {
  "mov%d5\t%0, %2%S4",
  "mov%D5\t%0, %1\n\tmov%d5\t%0, %2%S4",
  "mvn%D5\t%0, #%B1\n\tmov%d5\t%0, %2%S4",
};

static const char * const output_365[] = {
  "mov%D5\t%0, %2%S4",
  "mov%d5\t%0, %1\n\tmov%D5\t%0, %2%S4",
  "mvn%d5\t%0, #%B1\n\tmov%D5\t%0, %2%S4",
};

static const char *
output_376 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    rtx ldm[3];
    rtx arith[4];
    rtx base_reg;
    HOST_WIDE_INT val1 = 0, val2 = 0;

    if (REGNO (operands[0]) > REGNO (operands[4]))
      {
	ldm[1] = operands[4];
	ldm[2] = operands[0];
      }
    else
      {
	ldm[1] = operands[0];
	ldm[2] = operands[4];
      }

    base_reg = XEXP (operands[2], 0);

    if (!REG_P (base_reg))
      {
	val1 = INTVAL (XEXP (base_reg, 1));
	base_reg = XEXP (base_reg, 0);
      }

    if (!REG_P (XEXP (operands[3], 0)))
      val2 = INTVAL (XEXP (XEXP (operands[3], 0), 1));

    arith[0] = operands[0];
    arith[3] = operands[1];

    if (val1 < val2)
      {
	arith[1] = ldm[1];
	arith[2] = ldm[2];
      }
    else
      {
	arith[1] = ldm[2];
	arith[2] = ldm[1];
      }

    ldm[0] = base_reg;
    if (val1 !=0 && val2 != 0)
      {
	rtx ops[3];

	if (val1 == 4 || val2 == 4)
	  /* Other val must be 8, since we know they are adjacent and neither
	     is zero.  */
	  output_asm_insn ("ldmib%?\t%0, {%1, %2}", ldm);
	else if (const_ok_for_arm (val1) || const_ok_for_arm (-val1))
	  {
	    ldm[0] = ops[0] = operands[4];
	    ops[1] = base_reg;
	    ops[2] = GEN_INT (val1);
	    output_add_immediate (ops);
	    if (val1 < val2)
	      output_asm_insn ("ldmia%?\t%0, {%1, %2}", ldm);
	    else
	      output_asm_insn ("ldmda%?\t%0, {%1, %2}", ldm);
	  }
	else
	  {
	    /* Offset is out of range for a single add, so use two ldr.  */
	    ops[0] = ldm[1];
	    ops[1] = base_reg;
	    ops[2] = GEN_INT (val1);
	    output_asm_insn ("ldr%?\t%0, [%1, %2]", ops);
	    ops[0] = ldm[2];
	    ops[2] = GEN_INT (val2);
	    output_asm_insn ("ldr%?\t%0, [%1, %2]", ops);
	  }
      }
    else if (val1 != 0)
      {
	if (val1 < val2)
	  output_asm_insn ("ldmda%?\t%0, {%1, %2}", ldm);
	else
	  output_asm_insn ("ldmia%?\t%0, {%1, %2}", ldm);
      }
    else
      {
	if (val1 < val2)
	  output_asm_insn ("ldmia%?\t%0, {%1, %2}", ldm);
	else
	  output_asm_insn ("ldmda%?\t%0, {%1, %2}", ldm);
      }
    output_asm_insn ("%I3%?\t%0, %1, %2", arith);
    return "";
  }
}

static const char * const output_377[] = {
  "mvn%D4\t%0, %2",
  "mov%d4\t%0, %1\n\tmvn%D4\t%0, %2",
};

static const char *
output_378 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11734 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

    operands[2] = GEN_INT (1 << INTVAL (operands[2]));
    output_asm_insn ("ands\t%0, %1, %2", operands);
    return "mvnne\t%0, #0";
  
}

static const char *
output_379 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

    operands[2] = GEN_INT (1 << INTVAL (operands[2]));
    output_asm_insn ("tst\t%1, %2", operands);
    output_asm_insn ("mvneq\t%0, #0", operands);
    return "movne\t%0, #0";
  
}

static const char *
output_380 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    int num_saves = XVECLEN (operands[2], 0);
     
    /* For the StrongARM at least it is faster to
       use STR to store only a single register.
       In Thumb mode always use push, and the assembler will pick
       something appropriate.  */
    if (num_saves == 1 && TARGET_ARM)
      output_asm_insn ("str%?\t%1, [%m0, #-4]!", operands);
    else
      {
	int i;
	char pattern[100];

	if (TARGET_32BIT)
	    strcpy (pattern, "push%?\t{%1");
	else
	    strcpy (pattern, "push\t{%1");

	for (i = 1; i < num_saves; i++)
	  {
	    strcat (pattern, ", %|");
	    strcat (pattern,
		    reg_names[REGNO (XEXP (XVECEXP (operands[2], 0, i), 0))]);
	  }

	strcat (pattern, "}");
	output_asm_insn (pattern, operands);
      }

    return "";
  }
}

static const char *
output_382 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11835 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    arm_output_multireg_pop (operands, /*return_pc=*/false,
                                       /*cond=*/const_true_rtx,
                                       /*reverse=*/false,
                                       /*update=*/true);
    return "";
  }
  
}

static const char *
output_383 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11868 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    arm_output_multireg_pop (operands, /*return_pc=*/true,
                                       /*cond=*/const_true_rtx,
                                       /*reverse=*/false,
                                       /*update=*/true);
    return "";
  }
  
}

static const char *
output_384 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11891 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    arm_output_multireg_pop (operands, /*return_pc=*/true,
                                       /*cond=*/const_true_rtx,
                                       /*reverse=*/false,
                                       /*update=*/false);
    return "";
  }
  
}

static const char *
output_386 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11926 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    int num_regs = XVECLEN (operands[0], 0);
    char pattern[100];
    rtx op_list[2];
    strcpy (pattern, "vldm\t");
    strcat (pattern, reg_names[REGNO (SET_DEST (XVECEXP (operands[0], 0, 0)))]);
    strcat (pattern, "!, {");
    op_list[0] = XEXP (XVECEXP (operands[0], 0, 1), 0);
    strcat (pattern, "%P0");
    if ((num_regs - 1) > 1)
      {
        strcat (pattern, "-%P1");
        op_list [1] = XEXP (XVECEXP (operands[0], 0, num_regs - 1), 0);
      }

    strcat (pattern, "}");
    output_asm_insn (pattern, op_list);
    return "";
  }
  
}

static const char *
output_387 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11957 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  assemble_align (32);
  return "";
  
}

static const char *
output_388 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11967 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  assemble_align (64);
  return "";
  
}

static const char *
output_389 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11977 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  making_const_table = FALSE;
  return "";
  
}

static const char *
output_390 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11987 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  making_const_table = TRUE;
  assemble_integer (operands[0], 1, BITS_PER_WORD, 1);
  assemble_zeros (3);
  return "";
  
}

static const char *
output_391 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12000 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    rtx x = operands[0];
    making_const_table = TRUE;
    switch (GET_MODE_CLASS (GET_MODE (x)))
      {
      case MODE_FLOAT:
	arm_emit_fp16_const (x);
	break;
      default:
	assemble_integer (operands[0], 2, BITS_PER_WORD, 1);
	assemble_zeros (2);
	break;
      }
    return "";
  }
}

static const char *
output_392 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12023 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    rtx x = operands[0];
    making_const_table = TRUE;
    scalar_float_mode float_mode;
    if (is_a <scalar_float_mode> (GET_MODE (x), &float_mode))
      assemble_real (*CONST_DOUBLE_REAL_VALUE (x), float_mode, BITS_PER_WORD);
    else
      {
	/* XXX: Sometimes gcc does something really dumb and ends up with
	   a HIGH in a constant pool entry, usually because it's trying to
	   load into a VFP register.  We know this will always be used in
	   combination with a LO_SUM which ignores the high bits, so just
	   strip off the HIGH.  */
	if (GET_CODE (x) == HIGH)
	  x = XEXP (x, 0);
        assemble_integer (x, 4, BITS_PER_WORD, 1);
	mark_symbol_refs_as_used (x);
      }
    return "";
  }
}

static const char *
output_393 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12051 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    making_const_table = TRUE;
    scalar_float_mode float_mode;
    if (is_a <scalar_float_mode> (GET_MODE (operands[0]), &float_mode))
      assemble_real (*CONST_DOUBLE_REAL_VALUE (operands[0]),
		     float_mode, BITS_PER_WORD);
    else
      assemble_integer (operands[0], 8, BITS_PER_WORD, 1);
    return "";
  }
}

static const char *
output_394 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12069 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    making_const_table = TRUE;
    scalar_float_mode float_mode;
    if (is_a <scalar_float_mode> (GET_MODE (operands[0]), &float_mode))
      assemble_real (*CONST_DOUBLE_REAL_VALUE (operands[0]),
		     float_mode, BITS_PER_WORD);
    else
      assemble_integer (operands[0], 16, BITS_PER_WORD, 1);
    return "";
  }
}

static const char *
output_405 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12238 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
    targetm.asm_out.internal_label (asm_out_file, "LPIC",
				    INTVAL (operands[1]));
    return "bl\t%c0(tlscall)";
  }
}

static const char * const output_406[] = {
  "movt%?\t%0, %L1",
  "movt\t%0, %L1",
};

static const char * const output_407[] = {
  "rev\t%0, %1",
  "rev%?\t%0, %1",
  "rev%?\t%0, %1",
};

static const char * const output_408[] = {
  "revsh\t%0, %1",
  "revsh%?\t%0, %1",
  "revsh%?\t%0, %1",
};

static const char * const output_409[] = {
  "rev16\t%0, %1",
  "rev16%?\t%0, %1",
  "rev16%?\t%0, %1",
};

static const char *
output_424 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 166 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldrdstrd.md"
{
    rtx op[2];
    op[0] = gen_rtx_REG (DImode, REGNO (operands[0]));
    op[1] = adjust_address (operands[2], DImode, 0);
    return output_move_double (op, true, NULL);
  }
}

static const char *
output_425 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 186 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldrdstrd.md"
{
    rtx op[2];
    op[0] = adjust_address (operands[2], DImode, 0);
    op[1] = gen_rtx_REG (DImode, REGNO (operands[0]));
    return output_move_double (op, true, NULL);
  }
}

static const char *
output_483 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12634 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    arm_output_multireg_pop (operands, /*return_pc=*/false,
                                       /*cond=*/const_true_rtx,
                                       /*reverse=*/false,
                                       /*update=*/false);
    return "";
  }
  
}

static const char *
output_484 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12746 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[0], 0, 16);
  arm_const_bounds (operands[1], 0, 16);
  arm_const_bounds (operands[2], 0, (1 << 5));
  arm_const_bounds (operands[3], 0, (1 << 5));
  arm_const_bounds (operands[4], 0, (1 << 5));
  arm_const_bounds (operands[5], 0, 8);
  return "cdp\tp%c0, %1, CR%c2, CR%c3, CR%c4, %5";
}
}

static const char *
output_485 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12746 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[0], 0, 16);
  arm_const_bounds (operands[1], 0, 16);
  arm_const_bounds (operands[2], 0, (1 << 5));
  arm_const_bounds (operands[3], 0, (1 << 5));
  arm_const_bounds (operands[4], 0, (1 << 5));
  arm_const_bounds (operands[5], 0, 8);
  return "cdp2\tp%c0, %1, CR%c2, CR%c3, CR%c4, %5";
}
}

static const char *
output_486 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12763 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[0], 0, 16);
  arm_const_bounds (operands[1], 0, (1 << 5));
  return "ldc\tp%c0, CR%c1, %2";
}
}

static const char *
output_487 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12763 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[0], 0, 16);
  arm_const_bounds (operands[1], 0, (1 << 5));
  return "ldc2\tp%c0, CR%c1, %2";
}
}

static const char *
output_488 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12763 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[0], 0, 16);
  arm_const_bounds (operands[1], 0, (1 << 5));
  return "ldcl\tp%c0, CR%c1, %2";
}
}

static const char *
output_489 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12763 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[0], 0, 16);
  arm_const_bounds (operands[1], 0, (1 << 5));
  return "ldc2l\tp%c0, CR%c1, %2";
}
}

static const char *
output_490 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12776 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[0], 0, 16);
  arm_const_bounds (operands[1], 0, (1 << 5));
  return "stc\tp%c0, CR%c1, %2";
}
}

static const char *
output_491 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12776 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[0], 0, 16);
  arm_const_bounds (operands[1], 0, (1 << 5));
  return "stc2\tp%c0, CR%c1, %2";
}
}

static const char *
output_492 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12776 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[0], 0, 16);
  arm_const_bounds (operands[1], 0, (1 << 5));
  return "stcl\tp%c0, CR%c1, %2";
}
}

static const char *
output_493 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12776 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[0], 0, 16);
  arm_const_bounds (operands[1], 0, (1 << 5));
  return "stc2l\tp%c0, CR%c1, %2";
}
}

static const char *
output_494 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12805 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[0], 0, 16);
  arm_const_bounds (operands[1], 0, 8);
  arm_const_bounds (operands[3], 0, (1 << 5));
  arm_const_bounds (operands[4], 0, (1 << 5));
  arm_const_bounds (operands[5], 0, 8);
  return "mcr\tp%c0, %1, %2, CR%c3, CR%c4, %5";
}
}

static const char *
output_495 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12805 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[0], 0, 16);
  arm_const_bounds (operands[1], 0, 8);
  arm_const_bounds (operands[3], 0, (1 << 5));
  arm_const_bounds (operands[4], 0, (1 << 5));
  arm_const_bounds (operands[5], 0, 8);
  return "mcr2\tp%c0, %1, %2, CR%c3, CR%c4, %5";
}
}

static const char *
output_496 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12824 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[1], 0, 16);
  arm_const_bounds (operands[2], 0, 8);
  arm_const_bounds (operands[3], 0, (1 << 5));
  arm_const_bounds (operands[4], 0, (1 << 5));
  arm_const_bounds (operands[5], 0, 8);
  return "mrc\tp%c1, %2, %0, CR%c3, CR%c4, %5";
}
}

static const char *
output_497 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12824 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[1], 0, 16);
  arm_const_bounds (operands[2], 0, 8);
  arm_const_bounds (operands[3], 0, (1 << 5));
  arm_const_bounds (operands[4], 0, (1 << 5));
  arm_const_bounds (operands[5], 0, 8);
  return "mrc2\tp%c1, %2, %0, CR%c3, CR%c4, %5";
}
}

static const char *
output_498 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12842 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[0], 0, 16);
  arm_const_bounds (operands[1], 0, 8);
  arm_const_bounds (operands[3], 0, (1 << 5));
  return "mcrr\tp%c0, %1, %Q2, %R2, CR%c3";
}
}

static const char *
output_499 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12842 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[0], 0, 16);
  arm_const_bounds (operands[1], 0, 8);
  arm_const_bounds (operands[3], 0, (1 << 5));
  return "mcrr2\tp%c0, %1, %Q2, %R2, CR%c3";
}
}

static const char *
output_500 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12857 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[1], 0, 16);
  arm_const_bounds (operands[2], 0, 8);
  arm_const_bounds (operands[3], 0, (1 << 5));
  return "mrrc\tp%c1, %2, %Q0, %R0, CR%c3";
}
}

static const char *
output_501 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12857 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  arm_const_bounds (operands[1], 0, 16);
  arm_const_bounds (operands[2], 0, 8);
  arm_const_bounds (operands[3], 0, (1 << 5));
  return "mrrc2\tp%c1, %2, %Q0, %R0, CR%c3";
}
}

static const char *
output_503 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vshl.s%#8\t%P0, %P1, %P2";
    case 1:
       return neon_output_shift_immediate ("vshl", 'i', &operands[2], V8QImode, VALID_NEON_QREG_MODE (V8QImode), true);
      default: gcc_unreachable ();
    }
}

static const char *
output_504 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vshl.u%#8\t%P0, %P1, %P2";
    case 1:
       return neon_output_shift_immediate ("vshl", 'i', &operands[2], V8QImode, VALID_NEON_QREG_MODE (V8QImode), true);
      default: gcc_unreachable ();
    }
}

static const char *
output_505 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vshl.s%#8\t%q0, %q1, %q2";
    case 1:
       return neon_output_shift_immediate ("vshl", 'i', &operands[2], V16QImode, VALID_NEON_QREG_MODE (V16QImode), true);
      default: gcc_unreachable ();
    }
}

static const char *
output_506 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vshl.u%#8\t%q0, %q1, %q2";
    case 1:
       return neon_output_shift_immediate ("vshl", 'i', &operands[2], V16QImode, VALID_NEON_QREG_MODE (V16QImode), true);
      default: gcc_unreachable ();
    }
}

static const char *
output_507 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vshl.s%#16\t%P0, %P1, %P2";
    case 1:
       return neon_output_shift_immediate ("vshl", 'i', &operands[2], V4HImode, VALID_NEON_QREG_MODE (V4HImode), true);
      default: gcc_unreachable ();
    }
}

static const char *
output_508 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vshl.u%#16\t%P0, %P1, %P2";
    case 1:
       return neon_output_shift_immediate ("vshl", 'i', &operands[2], V4HImode, VALID_NEON_QREG_MODE (V4HImode), true);
      default: gcc_unreachable ();
    }
}

static const char *
output_509 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vshl.s%#16\t%q0, %q1, %q2";
    case 1:
       return neon_output_shift_immediate ("vshl", 'i', &operands[2], V8HImode, VALID_NEON_QREG_MODE (V8HImode), true);
      default: gcc_unreachable ();
    }
}

static const char *
output_510 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vshl.u%#16\t%q0, %q1, %q2";
    case 1:
       return neon_output_shift_immediate ("vshl", 'i', &operands[2], V8HImode, VALID_NEON_QREG_MODE (V8HImode), true);
      default: gcc_unreachable ();
    }
}

static const char *
output_511 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vshl.s%#32\t%P0, %P1, %P2";
    case 1:
       return neon_output_shift_immediate ("vshl", 'i', &operands[2], V2SImode, VALID_NEON_QREG_MODE (V2SImode), true);
      default: gcc_unreachable ();
    }
}

static const char *
output_512 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vshl.u%#32\t%P0, %P1, %P2";
    case 1:
       return neon_output_shift_immediate ("vshl", 'i', &operands[2], V2SImode, VALID_NEON_QREG_MODE (V2SImode), true);
      default: gcc_unreachable ();
    }
}

static const char *
output_513 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vshl.s%#32\t%q0, %q1, %q2";
    case 1:
       return neon_output_shift_immediate ("vshl", 'i', &operands[2], V4SImode, VALID_NEON_QREG_MODE (V4SImode), true);
      default: gcc_unreachable ();
    }
}

static const char *
output_514 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vshl.u%#32\t%q0, %q1, %q2";
    case 1:
       return neon_output_shift_immediate ("vshl", 'i', &operands[2], V4SImode, VALID_NEON_QREG_MODE (V4SImode), true);
      default: gcc_unreachable ();
    }
}

static const char *
output_522 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 106 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
    case 1:
    case 2:
      return "#";
    case 3: case 4:
      return output_move_double (operands, true, NULL);
    case 5:
      return "wmov%?\t%0,%1";
    case 6:
      return "tmcrr%?\t%0,%Q1,%R1";
    case 7:
      return "tmrrc%?\t%Q0,%R0,%1";
    case 8:
      return "wldrd%?\t%0,%1";
    case 9:
      return "wstrd%?\t%1,%0";
    case 10:
      return "fmdrr%?\t%P0, %Q1, %R1\t%@ int";
    case 11:
      return "fmrrd%?\t%Q0, %R0, %P1\t%@ int";
    case 12:
      if (TARGET_VFP_SINGLE)
	return "fcpys%?\t%0, %1\t%@ int\n\tfcpys%?\t%p0, %p1\t%@ int";
      else
	return "fcpyd%?\t%P0, %P1\t%@ int";
    case 13: case 14:
      return output_move_vfp (operands);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_523 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 161 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

   switch (which_alternative)
     {
     case 0: return "mov\t%0, %1";
     case 1: return "mov\t%0, %1";
     case 2: return "mvn\t%0, #%B1";
     case 3: return "movw\t%0, %1";
     case 4: return "ldr\t%0, %1";
     case 5: return "str\t%1, %0";
     case 6: return "tmcr\t%0, %1";
     case 7: return "tmrc\t%0, %1";
     case 8: return arm_output_load_gr (operands);
     case 9: return "wstrw\t%1, %0";
     case 10:return "fmsr\t%0, %1";
     case 11:return "fmrs\t%0, %1";
     case 12:return "fcpys\t%0, %1\t%@ int";
     case 13: case 14:
       return output_move_vfp (operands);
     default:
       gcc_unreachable ();
     }
}

static const char *
output_524 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 211 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

   switch (which_alternative)
   {
   case 0: return "mov%?\t%0, %1";
   case 1: return "mvn%?\t%0, #%B1";
   case 2: return "ldr%?\t%0, %1";
   case 3: return "str%?\t%1, %0";
   case 4: return "tmcr%?\t%0, %1";
   default: return "tmrc%?\t%0, %1";
  }
}

static const char *
output_525 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 230 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

   switch (which_alternative)
   {
   case 0: return "wmov%?\t%0, %1";
   case 1: return "wstrd%?\t%1, %0";
   case 2: return "wldrd%?\t%0, %1";
   case 3: return "tmrrc%?\t%Q0, %R0, %1";
   case 4: return "tmcrr%?\t%0, %Q1, %R1";
   case 5: return "#";
   default: return output_move_double (operands, true, NULL);
   }
}

static const char *
output_526 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 230 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

   switch (which_alternative)
   {
   case 0: return "wmov%?\t%0, %1";
   case 1: return "wstrd%?\t%1, %0";
   case 2: return "wldrd%?\t%0, %1";
   case 3: return "tmrrc%?\t%Q0, %R0, %1";
   case 4: return "tmcrr%?\t%0, %Q1, %R1";
   case 5: return "#";
   default: return output_move_double (operands, true, NULL);
   }
}

static const char *
output_527 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 230 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

   switch (which_alternative)
   {
   case 0: return "wmov%?\t%0, %1";
   case 1: return "wstrd%?\t%1, %0";
   case 2: return "wldrd%?\t%0, %1";
   case 3: return "tmrrc%?\t%Q0, %R0, %1";
   case 4: return "tmcrr%?\t%0, %Q1, %R1";
   case 5: return "#";
   default: return output_move_double (operands, true, NULL);
   }
}

static const char *
output_570 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 677 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

   {
     return arm_output_iwmmxt_tinsr (operands);
   }
   
}

static const char *
output_571 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 694 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

   {
     return arm_output_iwmmxt_tinsr (operands);
   }
   
}

static const char *
output_572 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 711 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

   {
     return arm_output_iwmmxt_tinsr (operands);
   }
   
}

static const char *
output_624 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1278 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wrorhg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wrorh", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_625 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1278 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wrorwg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wrorw", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_626 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1278 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wrordg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wrord", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_627 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsrahg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrah", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_628 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsrawg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsraw", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_629 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsradg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrad", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_630 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1320 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsrlhg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrlh", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_631 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1320 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsrlwg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrlw", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_632 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1320 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsrldg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrld", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_633 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1341 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsllhg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsllh", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_634 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1341 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsllwg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsllw", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_635 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1341 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wslldg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wslld", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_636 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wrorh%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wrorh", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_637 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wrorw%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wrorw", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_638 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wrord%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wrord", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_639 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsrah%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrah", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_640 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsraw%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsraw", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_641 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsrad%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrad", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_642 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1404 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsrlh%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrlh", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_643 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1404 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsrlw%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrlw", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_644 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1404 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsrld%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrld", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_645 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1425 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsllh%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsllh", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_646 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1425 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsllw%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsllw", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_647 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1425 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wslld%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wslld", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_738 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 33 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      return "mvn%?\t%0, #%B1\t%@ movhi";
    case 2:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 3:
      return "strh%?\t%1, %0\t%@ movhi";
    case 4:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 5:
    case 6:
      return "vmov%?\t%0, %1\t%@ int";
    case 7:
      return "vmov%?.f32\t%0, %1\t%@ int";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_739 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 84 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov%?\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t@ movhi";
    case 10:
      return "vmrs%?\t %0, P0\t@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_740 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 84 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov%?\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t@ movhi";
    case 10:
      return "vmrs%?\t %0, P0\t@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_741 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 84 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov%?\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t@ movhi";
    case 10:
      return "vmrs%?\t %0, P0\t@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_742 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 84 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov%?\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t@ movhi";
    case 10:
      return "vmrs%?\t %0, P0\t@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_743 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 138 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      return "mvn%?\t%0, #%B1\t%@ movhi";
    case 2:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 3:
      return "strh%?\t%1, %0\t%@ movhi";
    case 4:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 5:
    case 6:
      return "vmov.f16\t%0, %1\t%@ int";
    case 7:
      return "vmov%?.f32\t%0, %1\t%@ int";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_744 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 188 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov.f16\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t%@ movhi";
    case 10:
      return "vmrs%?\t%0, P0\t%@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_745 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 188 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov.f16\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t%@ movhi";
    case 10:
      return "vmrs%?\t%0, P0\t%@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_746 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 188 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov.f16\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t%@ movhi";
    case 10:
      return "vmrs%?\t%0, P0\t%@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_747 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 188 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov.f16\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t%@ movhi";
    case 10:
      return "vmrs%?\t%0, P0\t%@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_748 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 241 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  switch (which_alternative)
    {
    case 0: case 1:
      return "mov%?\t%0, %1";
    case 2:
      return "mvn%?\t%0, #%B1";
    case 3:
      return "movw%?\t%0, %1";
    case 4:
      return "ldr%?\t%0, %1";
    case 5:
      return "str%?\t%1, %0";
    case 6:
      return "vmov%?\t%0, %1\t%@ int";
    case 7:
      return "vmov%?\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9: case 10:
      return output_move_vfp (operands);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_749 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 286 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  switch (which_alternative)
    {
    case 0:
    case 1:
    case 2:
      return "mov%?\t%0, %1";
    case 3:
      return "mvn%?\t%0, #%B1";
    case 4:
      return "movw%?\t%0, %1";
    case 5:
    case 6:
      /* Cannot load it directly, split to load it via MOV / MOVT.  */
      if (!MEM_P (operands[1]) && arm_disable_literal_pool)
	return "#";
      return "ldr%?\t%0, %1";
    case 7:
    case 8:
      return "str%?\t%1, %0";
    case 9:
      return "vmov%?\t%0, %1\t%@ int";
    case 10:
      return "vmov%?\t%0, %1\t%@ int";
    case 11:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 12: case 13:
      return output_move_vfp (operands);
    case 14:
      return "vmsr\t P0, %1";
    case 15:
      return "vmrs\t %0, P0";
    case 16:
      return "mcr\tp10, 7, %1, cr1, cr0, 0\t @SET_FPSCR";
    case 17:
      return "mrc\tp10, 7, %0, cr1, cr0, 0\t @GET_FPSCR";
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_750 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 349 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  switch (which_alternative)
    {
    case 0: 
    case 1:
    case 2:
    case 3:
      return "#";
    case 4:
    case 5:
      /* Cannot load it directly, split to load it via MOV / MOVT.  */
      if (!MEM_P (operands[1]) && arm_disable_literal_pool)
	return "#";
      /* Fall through.  */
    case 6:
      return output_move_double (operands, true, NULL);
    case 7:
      return "vmov%?\t%P0, %Q1, %R1\t%@ int";
    case 8:
      return "vmov%?\t%Q0, %R0, %P1\t%@ int";
    case 9:
      if (TARGET_VFP_SINGLE || TARGET_HAVE_MVE)
	return "vmov%?.f32\t%0, %1\t%@ int\n\tvmov%?.f32\t%p0, %p1\t%@ int";
      else
	return "vmov%?.f64\t%P0, %P1\t%@ int";
    case 10: case 11:
      return output_move_vfp (operands);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_751 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0: /* ARM register from memory.  */
      return "ldrh%?\t%0, %1\t%@ __fp16";
    case 1: /* Memory from ARM register.  */
      return "strh%?\t%1, %0\t%@ __fp16";
    case 2: /* S register from S register.  */
      return "vmov\t%0, %1\t%@ __fp16";
    case 3: /* ARM register from ARM register.  */
      return "mov%?\t%0, %1\t%@ __fp16";
    case 4: /* S register from ARM register.  */
    case 5: /* ARM register from S register.  */
    case 6: /* S register from immediate.  */
      return "vmov.f16\t%0, %1\t%@ __fp16";
    case 7: /* S register from memory.  */
      if (TARGET_HAVE_MVE)
	return "vldr.16\t%0, %1";
      else
	return "vld1.16\t{%z0}, %A1";
    case 8: /* Memory from S register.  */
      if (TARGET_HAVE_MVE)
	return "vstr.16\t%1, %0";
      else
	return "vst1.16\t{%z1}, %A0";
    case 9: /* ARM register from constant.  */
      {
	long bits;
	rtx ops[4];

	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
			       HFmode);
	ops[0] = operands[0];
	ops[1] = GEN_INT (bits);
	ops[2] = GEN_INT (bits & 0xff00);
	ops[3] = GEN_INT (bits & 0x00ff);

	if (arm_arch_thumb2)
	  output_asm_insn ("movw\t%0, %1", ops);
	else
	  output_asm_insn ("mov\t%0, %2\n\torr\t%0, %0, %3", ops);
	return "";
       }
    default:
      gcc_unreachable ();
    }
 }
}

static const char *
output_752 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0: /* ARM register from memory.  */
      return "ldrh%?\t%0, %1\t%@ __bf16";
    case 1: /* Memory from ARM register.  */
      return "strh%?\t%1, %0\t%@ __bf16";
    case 2: /* S register from S register.  */
      return "vmov\t%0, %1\t%@ __bf16";
    case 3: /* ARM register from ARM register.  */
      return "mov%?\t%0, %1\t%@ __bf16";
    case 4: /* S register from ARM register.  */
    case 5: /* ARM register from S register.  */
    case 6: /* S register from immediate.  */
      return "vmov.f16\t%0, %1\t%@ __bf16";
    case 7: /* S register from memory.  */
      if (TARGET_HAVE_MVE)
	return "vldr.16\t%0, %1";
      else
	return "vld1.16\t{%z0}, %A1";
    case 8: /* Memory from S register.  */
      if (TARGET_HAVE_MVE)
	return "vstr.16\t%1, %0";
      else
	return "vst1.16\t{%z1}, %A0";
    case 9: /* ARM register from constant.  */
      {
	long bits;
	rtx ops[4];

	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
			       BFmode);
	ops[0] = operands[0];
	ops[1] = GEN_INT (bits);
	ops[2] = GEN_INT (bits & 0xff00);
	ops[3] = GEN_INT (bits & 0x00ff);

	if (arm_arch_thumb2)
	  output_asm_insn ("movw\t%0, %1", ops);
	else
	  output_asm_insn ("mov\t%0, %2\n\torr\t%0, %0, %3", ops);
	return "";
       }
    default:
      gcc_unreachable ();
    }
 }
}

static const char *
output_753 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 493 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  switch (which_alternative)
    {
    case 0:     /* S register from memory */
      return "vld1.16\t{%z0}, %A1";
    case 1:     /* memory from S register */
      return "vst1.16\t{%z1}, %A0";
    case 2:     /* ARM register from memory */
      return "ldrh\t%0, %1\t%@ __fp16";
    case 3:     /* memory from ARM register */
      return "strh\t%1, %0\t%@ __fp16";
    case 4:	/* S register from S register */
      return "vmov.f32\t%0, %1";
    case 5:	/* ARM register from ARM register */
      return "mov\t%0, %1\t%@ __fp16";
    case 6:	/* S register from ARM register */
      return "vmov\t%0, %1";
    case 7:	/* ARM register from S register */
      return "vmov\t%0, %1";
    case 8:	/* ARM register from constant */
      {
	long bits;
	rtx ops[4];

	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
			       HFmode);
	ops[0] = operands[0];
	ops[1] = GEN_INT (bits);
	ops[2] = GEN_INT (bits & 0xff00);
	ops[3] = GEN_INT (bits & 0x00ff);

	if (arm_arch_thumb2)
	  output_asm_insn ("movw\t%0, %1", ops);
	else
	  output_asm_insn ("mov\t%0, %2\n\torr\t%0, %0, %3", ops);
	return "";
       }
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_754 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 493 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  switch (which_alternative)
    {
    case 0:     /* S register from memory */
      return "vld1.16\t{%z0}, %A1";
    case 1:     /* memory from S register */
      return "vst1.16\t{%z1}, %A0";
    case 2:     /* ARM register from memory */
      return "ldrh\t%0, %1\t%@ __bf16";
    case 3:     /* memory from ARM register */
      return "strh\t%1, %0\t%@ __bf16";
    case 4:	/* S register from S register */
      return "vmov.f32\t%0, %1";
    case 5:	/* ARM register from ARM register */
      return "mov\t%0, %1\t%@ __bf16";
    case 6:	/* S register from ARM register */
      return "vmov\t%0, %1";
    case 7:	/* ARM register from S register */
      return "vmov\t%0, %1";
    case 8:	/* ARM register from constant */
      {
	long bits;
	rtx ops[4];

	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
			       BFmode);
	ops[0] = operands[0];
	ops[1] = GEN_INT (bits);
	ops[2] = GEN_INT (bits & 0xff00);
	ops[3] = GEN_INT (bits & 0x00ff);

	if (arm_arch_thumb2)
	  output_asm_insn ("movw\t%0, %1", ops);
	else
	  output_asm_insn ("mov\t%0, %2\n\torr\t%0, %0, %3", ops);
	return "";
       }
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_755 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 550 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  switch (which_alternative)
    {
    case 0:     /* ARM register from memory */
      return "ldrh\t%0, %1\t%@ __fp16";
    case 1:     /* memory from ARM register */
      return "strh\t%1, %0\t%@ __fp16";
    case 2:	/* S register from S register */
      return "vmov.f32\t%0, %1";
    case 3:	/* ARM register from ARM register */
      return "mov\t%0, %1\t%@ __fp16";
    case 4:	/* S register from ARM register */
      return "vmov\t%0, %1";
    case 5:	/* ARM register from S register */
      return "vmov\t%0, %1";
    case 6:	/* ARM register from constant */
      {
	long bits;
	rtx ops[4];

	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
			       HFmode);
	ops[0] = operands[0];
	ops[1] = GEN_INT (bits);
	ops[2] = GEN_INT (bits & 0xff00);
	ops[3] = GEN_INT (bits & 0x00ff);

	if (arm_arch_thumb2)
	  output_asm_insn ("movw\t%0, %1", ops);
	else
	  output_asm_insn ("mov\t%0, %2\n\torr\t%0, %0, %3", ops);
	return "";
       }
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_756 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 550 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  switch (which_alternative)
    {
    case 0:     /* ARM register from memory */
      return "ldrh\t%0, %1\t%@ __bf16";
    case 1:     /* memory from ARM register */
      return "strh\t%1, %0\t%@ __bf16";
    case 2:	/* S register from S register */
      return "vmov.f32\t%0, %1";
    case 3:	/* ARM register from ARM register */
      return "mov\t%0, %1\t%@ __bf16";
    case 4:	/* S register from ARM register */
      return "vmov\t%0, %1";
    case 5:	/* ARM register from S register */
      return "vmov\t%0, %1";
    case 6:	/* ARM register from constant */
      {
	long bits;
	rtx ops[4];

	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
			       BFmode);
	ops[0] = operands[0];
	ops[1] = GEN_INT (bits);
	ops[2] = GEN_INT (bits & 0xff00);
	ops[3] = GEN_INT (bits & 0x00ff);

	if (arm_arch_thumb2)
	  output_asm_insn ("movw\t%0, %1", ops);
	else
	  output_asm_insn ("mov\t%0, %2\n\torr\t%0, %0, %3", ops);
	return "";
       }
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_757 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 603 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  switch (which_alternative)
    {
    case 0:
      return "vmov%?\t%0, %1";
    case 1:
      return "vmov%?\t%0, %1";
    case 2:
      return "vmov%?.f32\t%0, %1";
    case 3: case 4:
      return output_move_vfp (operands);
    case 5:
      return "ldr%?\t%0, %1\t%@ float";
    case 6:
      return "str%?\t%1, %0\t%@ float";
    case 7:
      return "vmov%?.f32\t%0, %1";
    case 8:
      return "mov%?\t%0, %1\t%@ float";
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_758 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  switch (which_alternative)
    {
    case 0:
      return "vmov%?\t%0, %1";
    case 1:
      return "vmov%?\t%0, %1";
    case 2:
      return "vmov%?.f32\t%0, %1";
    case 3: case 4:
      return output_move_vfp (operands);
    case 5:
      return "ldr%?\t%0, %1\t%@ float";
    case 6:
      return "str%?\t%1, %0\t%@ float";
    case 7:
      return "vmov%?.f32\t%0, %1";
    case 8:
      return "mov%?\t%0, %1\t%@ float";
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_759 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 677 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  {
    switch (which_alternative)
      {
      case 0:
	return "vmov%?\t%P0, %Q1, %R1";
      case 1:
	return "vmov%?\t%Q0, %R0, %P1";
      case 2:
	gcc_assert (TARGET_VFP_DOUBLE);
        return "vmov%?.f64\t%P0, %1";
      case 3:
	gcc_assert (TARGET_VFP_DOUBLE);
	return "vmov.i64\t%P0, #0\t%@ float";
      case 4: case 5:
	return output_move_vfp (operands);
      case 6: case 7:
	return output_move_double (operands, true, NULL);
      case 8:
	if (TARGET_VFP_SINGLE)
	  return "vmov%?.f32\t%0, %1\n\tvmov%?.f32\t%p0, %p1";
	else
	  return "vmov%?.f64\t%P0, %P1";
      case 9:
        return "#";
      default:
	gcc_unreachable ();
      }
    }
  
}

static const char *
output_760 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 728 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  {
    switch (which_alternative)
      {
      case 0:
	return "vmov%?\t%P0, %Q1, %R1";
      case 1:
	return "vmov%?\t%Q0, %R0, %P1";
      case 2:
	gcc_assert (TARGET_VFP_DOUBLE);
	return "vmov%?.f64\t%P0, %1";
      case 3:
	gcc_assert (TARGET_VFP_DOUBLE);
	return "vmov.i64\t%P0, #0\t%@ float";
      case 4: case 5:
	return output_move_vfp (operands);
      case 6: case 7: case 9:
	return output_move_double (operands, true, NULL);
      case 8:
	if (TARGET_VFP_SINGLE)
	  return "vmov%?.f32\t%0, %1\n\tvmov%?.f32\t%p0, %p1";
	else
	  return "vmov%?.f64\t%P0, %P1";
      default:
	abort ();
      }
    }
  
}

static const char * const output_761[] = {
  "vmov%D3.f32\t%0, %2",
  "vmov%d3.f32\t%0, %1",
  "vmov%D3.f32\t%0, %2\n\tvmov%d3.f32\t%0, %1",
  "vmov%D3\t%0, %2",
  "vmov%d3\t%0, %1",
  "vmov%D3\t%0, %2\n\tvmov%d3\t%0, %1",
  "vmov%D3\t%0, %2",
  "vmov%d3\t%0, %1",
  "vmov%D3\t%0, %2\n\tvmov%d3\t%0, %1",
};

static const char * const output_762[] = {
  "it\t%D3\n\tvmov%D3.f32\t%0, %2",
  "it\t%d3\n\tvmov%d3.f32\t%0, %1",
  "ite\t%D3\n\tvmov%D3.f32\t%0, %2\n\tvmov%d3.f32\t%0, %1",
  "it\t%D3\n\tvmov%D3\t%0, %2",
  "it\t%d3\n\tvmov%d3\t%0, %1",
  "ite\t%D3\n\tvmov%D3\t%0, %2\n\tvmov%d3\t%0, %1",
  "it\t%D3\n\tvmov%D3\t%0, %2",
  "it\t%d3\n\tvmov%d3\t%0, %1",
  "ite\t%D3\n\tvmov%D3\t%0, %2\n\tvmov%d3\t%0, %1",
};

static const char * const output_763[] = {
  "vmov%D3.f64\t%P0, %P2",
  "vmov%d3.f64\t%P0, %P1",
  "vmov%D3.f64\t%P0, %P2\n\tvmov%d3.f64\t%P0, %P1",
  "vmov%D3\t%P0, %Q2, %R2",
  "vmov%d3\t%P0, %Q1, %R1",
  "vmov%D3\t%P0, %Q2, %R2\n\tvmov%d3\t%P0, %Q1, %R1",
  "vmov%D3\t%Q0, %R0, %P2",
  "vmov%d3\t%Q0, %R0, %P1",
  "vmov%D3\t%Q0, %R0, %P2\n\tvmov%d3\t%Q0, %R0, %P1",
};

static const char * const output_764[] = {
  "it\t%D3\n\tvmov%D3.f64\t%P0, %P2",
  "it\t%d3\n\tvmov%d3.f64\t%P0, %P1",
  "ite\t%D3\n\tvmov%D3.f64\t%P0, %P2\n\tvmov%d3.f64\t%P0, %P1",
  "it\t%D3\n\tvmov%D3\t%P0, %Q2, %R2",
  "it\t%d3\n\tvmov%d3\t%P0, %Q1, %R1",
  "ite\t%D3\n\tvmov%D3\t%P0, %Q2, %R2\n\tvmov%d3\t%P0, %Q1, %R1",
  "it\t%D3\n\tvmov%D3\t%Q0, %R0, %P2",
  "it\t%d3\n\tvmov%d3\t%Q0, %R0, %P1",
  "ite\t%D3\n\tvmov%D3\t%Q0, %R0, %P2\n\tvmov%d3\t%Q0, %R0, %P1",
};

static const char * const output_767[] = {
  "vneg%?.f32\t%0, %1",
  "eor%?\t%0, %1, #-2147483648",
};

static const char * const output_768[] = {
  "vneg%?.f64\t%P0, %P1",
  "#",
  "#",
};

static const char *
output_839 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
    static char buf[32];
    int fp_sysreg_enum = INTVAL (operands[1]);

    gcc_assert (IN_RANGE (fp_sysreg_enum, 0, NB_FP_SYSREGS - 1));

    snprintf (buf, sizeof (buf), "vstr%%?\t%s, [%%0, #-4]!",
	      fp_sysreg_names[fp_sysreg_enum]);
    return buf;
  }
}

static const char *
output_840 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1667 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
    static char buf[32];
    int fp_sysreg_enum = INTVAL (operands[1]);

    gcc_assert (IN_RANGE (fp_sysreg_enum, 0, NB_FP_SYSREGS - 1));

    snprintf (buf, sizeof (buf), "vldr%%?\t%s, [%%0], #4",
	      fp_sysreg_names[fp_sysreg_enum]);
    return buf;
  }
}

static const char *
output_841 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1689 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
    int num_regs = XVECLEN (operands[0], 0);
    char pattern[30];
    rtx reg;

    strcpy (pattern, "vscclrm%?\t{%|");
    if (num_regs > 1)
      {
	reg = XEXP (XVECEXP (operands[0], 0, 1), 0);
	strcat (pattern, reg_names[REGNO (reg)]);
	if (num_regs > 2)
	  {
	    strcat (pattern, "-%|");
	    reg = XEXP (XVECEXP (operands[0], 0, num_regs - 1), 0);
	    strcat (pattern, reg_names[REGNO (reg)]);
	  }
	strcat (pattern, ", ");
      }

    strcat (pattern, "VPR}");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char * const output_843[] = {
  "vscclrm\t{vpr}\n\tvlldm\t%0",
  "vlldm\t%0",
};

static const char * const output_848[] = {
  "vcmp%?.f32\t%0, %1",
  "vcmp%?.f32\t%0, #0",
};

static const char * const output_849[] = {
  "vcmpe%?.f32\t%0, %1",
  "vcmpe%?.f32\t%0, #0",
};

static const char * const output_850[] = {
  "vcmp%?.f64\t%P0, %P1",
  "vcmp%?.f64\t%P0, #0",
};

static const char * const output_851[] = {
  "vcmpe%?.f64\t%P0, %P1",
  "vcmpe%?.f64\t%P0, #0",
};

static const char * const output_854[] = {
  "vmov%?.f32\t%0, %1\n\tvcvt%?.f64.u32\t%P0, %P0, %v2",
  "vmov%?.f32\t%0, %1\n\tvcvt%?.f64.u32\t%P0, %P0, %v2",
  "vmov%?.f64\t%P0, %1, %1\n\tvcvt%?.f64.u32\t%P0, %P0, %v2",
};

static const char * const output_855[] = {
  "vmov%?.f32\t%0, %1\n\tvcvt%?.f64.s32\t%P0, %P0, %v2",
  "vmov%?.f32\t%0, %1\n\tvcvt%?.f64.s32\t%P0, %P0, %v2",
  "vmov%?.f64\t%P0, %1, %1\n\tvcvt%?.f64.s32\t%P0, %P0, %v2",
};

static const char *
output_861 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1942 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  arm_const_bounds (operands[2], 1, 33);
  return "vcvt.f16.s32\t%0, %0, %2\n\tvmov.f32\t%3, %0";
}
}

static const char *
output_862 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1942 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  arm_const_bounds (operands[2], 1, 33);
  return "vcvt.f16.u32\t%0, %0, %2\n\tvmov.f32\t%3, %0";
}
}

static const char *
output_863 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1983 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  arm_const_bounds (operands[2], 1, 33);
  return "vmov.f32\t%0, %1\n\tvcvt.s%#32.f16\t%0, %0, %2";
}
}

static const char *
output_864 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1983 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  arm_const_bounds (operands[2], 1, 33);
  return "vmov.f32\t%0, %1\n\tvcvt.u%#32.f16\t%0, %0, %2";
}
}

static const char *
output_873 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2027 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
 return vfp_output_vstmd (operands);
}

static const char *
output_925 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 67 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

   static const char * const asms[] =
   {
     "adds\t%0, %0, %2",
     "subs\t%0, %0, #%n2",
     "adds\t%0, %1, %2",
     "add\t%0, %0, %2",
     "add\t%0, %0, %2",
     "add\t%0, %1, %2",
     "add\t%0, %1, %2",
     "#",
     "#",
     "#"
   };
   if ((which_alternative == 2 || which_alternative == 6)
       && CONST_INT_P (operands[2])
       && INTVAL (operands[2]) < 0)
     return (which_alternative == 2) ? "subs\t%0, %1, #%n2" : "sub\t%0, %1, #%n2";
   return asms[which_alternative];
  
}

static const char * const output_928[] = {
  "movs\t%0, %1\n\tmuls\t%0, %2",
  "mov\t%0, %1\n\tmuls\t%0, %2",
  "muls\t%0, %2",
};

static const char * const output_929[] = {
  "muls\t%0, %2",
  "muls\t%0, %1",
  "muls\t%0, %1",
};

static const char *
output_943 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 373 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"
{
  rtx mem;

  if (which_alternative == 0 && arm_arch6)
    return "uxth\t%0, %1";
  if (which_alternative == 0)
    return "#";

  mem = XEXP (operands[1], 0);

  if (GET_CODE (mem) == CONST)
    mem = XEXP (mem, 0);

  if (GET_CODE (mem) == PLUS)
    {
      rtx a = XEXP (mem, 0);

      /* This can happen due to bugs in reload.  */
      if (REG_P (a) && REGNO (a) == SP_REGNUM)
        {
          rtx ops[2];
          ops[0] = operands[0];
          ops[1] = a;

          output_asm_insn ("mov\t%0, %1", ops);

          XEXP (mem, 0) = operands[0];
       }
    }

  return "ldrh\t%0, %1";
}
}

static const char * const output_944[] = {
  "#",
  "ldrb\t%0, %1",
};

static const char * const output_945[] = {
  "uxtb\t%0, %1",
  "ldrb\t%0, %1",
};

static const char *
output_946 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 447 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

  {
    rtx ops[4];
    rtx mem;

    if (which_alternative == 0 && !arm_arch6)
      return "#";
    if (which_alternative == 0)
      return "sxth\t%0, %1";

    mem = XEXP (operands[1], 0);

    /* This code used to try to use 'V', and fix the address only if it was
       offsettable, but this fails for e.g. REG+48 because 48 is outside the
       range of QImode offsets, and offsettable_address_p does a QImode
       address check.  */

    if (GET_CODE (mem) == CONST)
      mem = XEXP (mem, 0);

    if (GET_CODE (mem) == LABEL_REF)
      return "ldr\t%0, %1";

    if (GET_CODE (mem) == PLUS)
      {
        rtx a = XEXP (mem, 0);
        rtx b = XEXP (mem, 1);

        if (GET_CODE (a) == LABEL_REF
	    && CONST_INT_P (b))
          return "ldr\t%0, %1";

        if (REG_P (b))
          return "ldrsh\t%0, %1";

        ops[1] = a;
        ops[2] = b;
      }
    else
      {
        ops[1] = mem;
        ops[2] = const0_rtx;
      }

    gcc_assert (REG_P (ops[1]));

    ops[0] = operands[0];
    if (reg_mentioned_p (operands[2], ops[1]))
      ops[3] = ops[0];
    else
      ops[3] = operands[2];
    output_asm_insn ("movs\t%3, %2\n\tldrsh\t%0, [%1, %3]", ops);
    return "";
  }
}

static const char *
output_947 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 584 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"
{
  rtx addr;

  if (which_alternative == 0 && arm_arch6)
    return "sxtb\t%0, %1";
  if (which_alternative == 0)
    return "#";

  addr = XEXP (operands[1], 0);
  if (GET_CODE (addr) == PLUS
      && REG_P (XEXP (addr, 0)) && REG_P (XEXP (addr, 1)))
    return "ldrsb\t%0, %1";

  return "#";
}
}

static const char *
output_948 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

  {
  switch (which_alternative)
    {
    default:
    case 0:
      if (REGNO (operands[1]) == REGNO (operands[0]) + 1)
	return "add\t%0,  %1,  #0\n\tadd\t%H0, %H1, #0";
      return   "add\t%H0, %H1, #0\n\tadd\t%0,  %1,  #0";
    case 1:
      return "movs\t%Q0, %1\n\tmovs\t%R0, #0";
    case 2:
      operands[1] = GEN_INT (- INTVAL (operands[1]));
      return "movs\t%Q0, %1\n\trsbs\t%Q0, %Q0, #0\n\tasrs\t%R0, %Q0, #31";
    case 3:
      gcc_assert (TARGET_HAVE_MOVT);
      return "movw\t%Q0, %L1\n\tmovs\tR0, #0";
    case 4:
      return "ldmia\t%1, {%0, %H0}";
    case 5:
      return "stmia\t%0, {%1, %H1}";
    case 6:
      return thumb_load_double_from_address (operands);
    case 7:
      operands[2] = gen_rtx_MEM (SImode,
			     plus_constant (Pmode, XEXP (operands[0], 0), 4));
      output_asm_insn ("str\t%1, %0\n\tstr\t%H1, %2", operands);
      return "";
    case 8:
      if (REGNO (operands[1]) == REGNO (operands[0]) + 1)
	return "mov\t%0, %1\n\tmov\t%H0, %H1";
      return "mov\t%H0, %H1\n\tmov\t%0, %1";
    }
  }
}

static const char *
output_949 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 664 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"
{
  switch (which_alternative)
    {
      default:
      case 0: return "movs\t%0, %1";
      case 1: return "movs\t%0, %1";
      case 2: return "movw\t%0, %1";
      case 3: return "#";
      case 4: return "#";
      case 5: return "ldmia\t%1, {%0}";
      case 6: return "stmia\t%0, {%1}";
      case 7:
      /* pure-code alternative: build the constant byte by byte,
	 instead of loading it from a constant pool.  */
	if (arm_valid_symbolic_address_p (operands[1]))
	  {
	    output_asm_insn ("movs\t%0, #:upper8_15:%1", operands);
	    output_asm_insn ("lsls\t%0, #8", operands);
	    output_asm_insn ("adds\t%0, #:upper0_7:%1", operands);
	    output_asm_insn ("lsls\t%0, #8", operands);
	    output_asm_insn ("adds\t%0, #:lower8_15:%1", operands);
	    output_asm_insn ("lsls\t%0, #8", operands);
	    output_asm_insn ("adds\t%0, #:lower0_7:%1", operands);
	    return "";
	  }
	else if (GET_CODE (operands[1]) == CONST_INT)
	  {
	    thumb1_gen_const_int_print (operands[0], INTVAL (operands[1]));
	    return "";
	  }

	gcc_unreachable ();

      case 8: return "ldr\t%0, %1";
      case 9: return "str\t%1, %0";
      case 10: return "mov\t%0, %1";
    }
}
}

static const char *
output_950 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 805 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

  switch (which_alternative)
    {
    case 0: return "adds	%0, %1, #0";
    case 2: return "strh	%1, %0";
    case 3: return "mov	%0, %1";
    case 4: return "mov	%0, %1";
    case 5: return "movs	%0, %1";
    case 6: gcc_assert (TARGET_HAVE_MOVT);
	    return "movw	%0, %L1";
    default: gcc_unreachable ();
    case 1:
      /* The stack pointer can end up being taken as an index register.
          Catch this case here and deal with it.  */
      if (GET_CODE (XEXP (operands[1], 0)) == PLUS
	  && REG_P (XEXP (XEXP (operands[1], 0), 0))
	  && REGNO    (XEXP (XEXP (operands[1], 0), 0)) == SP_REGNUM)
        {
	  rtx ops[2];
          ops[0] = operands[0];
          ops[1] = XEXP (XEXP (operands[1], 0), 0);

          output_asm_insn ("mov	%0, %1", ops);

          XEXP (XEXP (operands[1], 0), 0) = operands[0];

	}
      return "ldrh	%0, %1";
    }
}

static const char * const output_951[] = {
  "adds\t%0, %1, #0",
  "ldrb\t%0, %1",
  "strb\t%1, %0",
  "mov\t%0, %1",
  "mov\t%0, %1",
  "movs\t%0, %1",
};

static const char *
output_952 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 880 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

  switch (which_alternative)
    {
    case 0:
      return "movs\t%0, %1";
    case 1:
      {
	rtx addr;
	gcc_assert (MEM_P (operands[1]));
	addr = XEXP (operands[1], 0);
	if (GET_CODE (addr) == LABEL_REF
	    || (GET_CODE (addr) == CONST
		&& GET_CODE (XEXP (addr, 0)) == PLUS
		&& GET_CODE (XEXP (XEXP (addr, 0), 0)) == LABEL_REF
		&& CONST_INT_P (XEXP (XEXP (addr, 0), 1))))
	  {
	    /* Constant pool entry.  */
	    return "ldr\t%0, %1";
	  }
	return "ldrh\t%0, %1";
      }
    case 2:
    {
      int bits;
      int high;
      rtx ops[3];

      bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
			     HFmode);
      ops[0] = operands[0];
      high = (bits >> 8) & 0xff;
      ops[1] = GEN_INT (high);
      ops[2] = GEN_INT (bits & 0xff);
      if (high != 0)
	output_asm_insn ("movs\t%0, %1\n\tlsls\t%0, #8\n\tadds\t%0, %2", ops);
      else
	output_asm_insn ("movs\t%0, %2", ops);

      return "";
    }
    case 3: return "strh\t%1, %0";
    default: return "mov\t%0, %1";
    }
  
}

static const char * const output_953[] = {
  "adds\t%0, %1, #0",
  "ldmia\t%1, {%0}",
  "stmia\t%0, {%1}",
  "ldr\t%0, %1",
  "str\t%1, %0",
  "mov\t%0, %1",
  "mov\t%0, %1",
};

static const char *
output_954 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 960 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

  switch (which_alternative)
    {
    default:
    case 0:
      if (REGNO (operands[1]) == REGNO (operands[0]) + 1)
	return "adds\t%0, %1, #0\n\tadds\t%H0, %H1, #0";
      return "adds\t%H0, %H1, #0\n\tadds\t%0, %1, #0";
    case 1:
      return "ldmia\t%1, {%0, %H0}";
    case 2:
      return "stmia\t%0, {%1, %H1}";
    case 3:
      return thumb_load_double_from_address (operands);
    case 4:
      operands[2] = gen_rtx_MEM (SImode,
				 plus_constant (Pmode,
						XEXP (operands[0], 0), 4));
      output_asm_insn ("str\t%1, %0\n\tstr\t%H1, %2", operands);
      return "";
    case 5:
      if (REGNO (operands[1]) == REGNO (operands[0]) + 1)
	return "mov\t%0, %1\n\tmov\t%H0, %H1";
      return "mov\t%H0, %H1\n\tmov\t%0, %1";
    }
  
}

static const char *
output_955 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1009 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"
 return thumb_output_move_mem_multiple (3, operands);
}

static const char *
output_956 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1028 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"
 return thumb_output_move_mem_multiple (2, operands);
}

static const char *
output_957 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1073 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"
{
  if (get_attr_length (insn) == 2)
    {
      if (GET_CODE (operands[0]) == EQ)
	return "cbz\t%1, %l2";
      else
	return "cbnz\t%1, %l2";
    }
  else
    {
      rtx t = cfun->machine->thumb1_cc_insn;
      if (t != NULL_RTX)
	{
	  if (!rtx_equal_p (cfun->machine->thumb1_cc_op0, operands[1])
	      || !rtx_equal_p (cfun->machine->thumb1_cc_op1, operands[2]))
	    t = NULL_RTX;
	  if (cfun->machine->thumb1_cc_mode == CC_NZmode)
	    {
	      if (!nz_comparison_operator (operands[0], VOIDmode))
		t = NULL_RTX;
	    }
	  else if (cfun->machine->thumb1_cc_mode != CCmode)
	    t = NULL_RTX;
	}
      if (t == NULL_RTX)
	{
	  output_asm_insn ("cmp\t%1, #0", operands);
	  cfun->machine->thumb1_cc_insn = insn;
	  cfun->machine->thumb1_cc_op0 = operands[1];
	  cfun->machine->thumb1_cc_op1 = operands[2];
	  cfun->machine->thumb1_cc_mode = CCmode;
	}
      else
	/* Ensure we emit the right type of condition code on the jump.  */
	XEXP (operands[0], 0) = gen_rtx_REG (cfun->machine->thumb1_cc_mode,
					     CC_REGNUM);

      switch (get_attr_length (insn))
	{
	case 4:  return "b%d0\t%l2";
	case 6:  return "b%D0\t.LCB%=;b\t%l2\t%@long jump\n.LCB%=:";
	case 8:  return "b%D0\t.LCB%=;bl\t%l2\t%@far jump\n.LCB%=:";
	default: gcc_unreachable ();
	}
    }
}
}

static const char *
output_958 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1156 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"
{
  rtx t = cfun->machine->thumb1_cc_insn;
  if (t != NULL_RTX)
    {
      if (!rtx_equal_p (cfun->machine->thumb1_cc_op0, operands[1])
	  || !rtx_equal_p (cfun->machine->thumb1_cc_op1, operands[2]))
	t = NULL_RTX;
      if (cfun->machine->thumb1_cc_mode == CC_NZmode)
	{
	  if (!nz_comparison_operator (operands[0], VOIDmode))
	    t = NULL_RTX;
	}
      else if (cfun->machine->thumb1_cc_mode != CCmode)
	t = NULL_RTX;
    }
  if (t == NULL_RTX)
    {
      output_asm_insn ("cmp\t%1, %2", operands);
      cfun->machine->thumb1_cc_insn = insn;
      cfun->machine->thumb1_cc_op0 = operands[1];
      cfun->machine->thumb1_cc_op1 = operands[2];
      cfun->machine->thumb1_cc_mode = CCmode;
    }
  else
    /* Ensure we emit the right type of condition code on the jump.  */
    XEXP (operands[0], 0) = gen_rtx_REG (cfun->machine->thumb1_cc_mode,
					 CC_REGNUM);

  switch (get_attr_length (insn))
    {
    case 4:  return "b%d0\t%l3";
    case 6:  return "b%D0\t.LCB%=\n\tb\t%l3\t%@long jump\n.LCB%=:";
    default: return "b%D0\t.LCB%=\n\tbl\t%l3\t%@far jump\n.LCB%=:";
    }
}
}

static const char *
output_959 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1236 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

  output_asm_insn ("adds\t%0, %1, #%n2", operands);

  switch (get_attr_length (insn))
    {
    case 4:  return "b%d4\t%l3";
    case 6:  return "b%D4\t.LCB%=\n\tb\t%l3\t%@long jump\n.LCB%=:";
    default: return "b%D4\t.LCB%=\n\tbl\t%l3\t%@far jump\n.LCB%=:";
    }
  
}

static const char *
output_960 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1273 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

  output_asm_insn ("cmn\t%1, %2", operands);
  switch (get_attr_length (insn))
    {
    case 4:  return "b%d0\t%l3";
    case 6:  return "b%D0\t.LCB%=\n\tb\t%l3\t%@long jump\n.LCB%=:";
    default: return "b%D0\t.LCB%=\n\tbl\t%l3\t%@far jump\n.LCB%=:";
    }
  
}

static const char *
output_961 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1312 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

  {
  rtx op[3];
  op[0] = operands[4];
  op[1] = operands[1];
  op[2] = GEN_INT (32 - 1 - INTVAL (operands[2]));

  output_asm_insn ("lsls\t%0, %1, %2", op);
  switch (get_attr_length (insn))
    {
    case 4:  return "b%d0\t%l3";
    case 6:  return "b%D0\t.LCB%=\n\tb\t%l3\t%@long jump\n.LCB%=:";
    default: return "b%D0\t.LCB%=\n\tbl\t%l3\t%@far jump\n.LCB%=:";
    }
  }
}

static const char *
output_962 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1357 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

  {
  rtx op[3];
  op[0] = operands[4];
  op[1] = operands[1];
  op[2] = GEN_INT (32 - INTVAL (operands[2]));

  output_asm_insn ("lsls\t%0, %1, %2", op);
  switch (get_attr_length (insn))
    {
    case 4:  return "b%d0\t%l3";
    case 6:  return "b%D0\t.LCB%=\n\tb\t%l3\t%@long jump\n.LCB%=:";
    default: return "b%D0\t.LCB%=\n\tbl\t%l3\t%@far jump\n.LCB%=:";
    }
  }
}

static const char *
output_963 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1400 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

  {
  output_asm_insn ("tst\t%0, %1", operands);
  switch (get_attr_length (insn))
    {
    case 4:  return "b%d3\t%l2";
    case 6:  return "b%D3\t.LCB%=\n\tb\t%l2\t%@long jump\n.LCB%=:";
    default: return "b%D3\t.LCB%=\n\tbl\t%l2\t%@far jump\n.LCB%=:";
    }
  }
}

static const char *
output_964 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

   {
     rtx cond[2];
     cond[0] = gen_rtx_fmt_ee ((GET_CODE (operands[3]) == NE
				? GEU : LTU),
			       VOIDmode, operands[2], const1_rtx);
     cond[1] = operands[4];

     if (which_alternative == 0)
       output_asm_insn ("subs\t%0, %2, #1", operands);
     else if (which_alternative == 1)
       {
	 /* We must provide an alternative for a hi reg because reload
	    cannot handle output reloads on a jump instruction, but we
	    can't subtract into that.  Fortunately a mov from lo to hi
	    does not clobber the condition codes.  */
	 output_asm_insn ("subs\t%1, %2, #1", operands);
	 output_asm_insn ("mov\t%0, %1", operands);
       }
     else
       {
	 /* Similarly, but the target is memory.  */
	 output_asm_insn ("subs\t%1, %2, #1", operands);
	 output_asm_insn ("str\t%1, %0", operands);
       }

     switch (get_attr_length (insn) - (which_alternative ? 2 : 0))
       {
	 case 4:
	   output_asm_insn ("b%d0\t%l1", cond);
	   return "";
	 case 6:
	   output_asm_insn ("b%D0\t.LCB%=", cond);
	   return "b\t%l4\t%@long jump\n.LCB%=:";
	 default:
	   output_asm_insn ("b%D0\t.LCB%=", cond);
	   return "bl\t%l4\t%@far jump\n.LCB%=:";
       }
   }
  
}

static const char *
output_965 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1551 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

   {
     rtx cond[3];

     cond[0] = (which_alternative < 2) ? operands[0] : operands[1];
     cond[1] = operands[2];
     cond[2] = operands[3];

     if (CONST_INT_P (cond[2]) && INTVAL (cond[2]) < 0)
       output_asm_insn ("subs\t%0, %1, #%n2", cond);
     else
       output_asm_insn ("adds\t%0, %1, %2", cond);

     if (which_alternative >= 2
	 && which_alternative < 4)
       output_asm_insn ("mov\t%0, %1", operands);
     else if (which_alternative >= 4)
       output_asm_insn ("str\t%1, %0", operands);

     switch (get_attr_length (insn) - ((which_alternative >= 2) ? 2 : 0))
       {
	 case 4:
	   return "b%d4\t%l5";
	 case 6:
	   return "b%D4\t.LCB%=\n\tb\t%l5\t%@long jump\n.LCB%=:";
	 default:
	   return "b%D4\t.LCB%=\n\tbl\t%l5\t%@far jump\n.LCB%=:";
       }
   }
  
}

static const char *
output_966 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1630 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

   {
     switch (which_alternative)
       {
       case 0:
	 output_asm_insn ("cmp\t%1, #%n2", operands);
	 break;
       case 1:
	 output_asm_insn ("cmn\t%1, %2", operands);
	 break;
       case 2:
	 if (INTVAL (operands[2]) < 0)
	   output_asm_insn ("subs\t%0, %1, %2", operands);
	 else
	   output_asm_insn ("adds\t%0, %1, %2", operands);
	 break;
       case 3:
	 if (INTVAL (operands[2]) < 0)
	   output_asm_insn ("subs\t%0, %0, %2", operands);
	 else
	   output_asm_insn ("adds\t%0, %0, %2", operands);
	 break;
       }

     switch (get_attr_length (insn))
       {
	 case 4:
	   return "b%d3\t%l4";
	 case 6:
	   return "b%D3\t.LCB%=\n\tb\t%l4\t%@long jump\n.LCB%=:";
	 default:
	   return "b%D3\t.LCB%=\n\tbl\t%l4\t%@far jump\n.LCB%=:";
       }
   }
  
}

static const char * const output_968[] = {
  "rsbs\t%0, %1, #0\n\tadcs\t%0, %0, %1",
  "rsbs\t%2, %1, #0\n\tadcs\t%0, %1, %2",
};

static const char *
output_973 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1782 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

  if (get_attr_length (insn) == 2)
    return "b\t%l0";
  return "bl\t%l0\t%@ far jump";
  
}

static const char *
output_976 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1830 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

  {
    if (!TARGET_CALLER_INTERWORKING)
      return thumb_call_via_reg (operands[0]);
    else if (operands[1] == const0_rtx)
      return "bl\t%__interwork_call_via_%0";
    else if (frame_pointer_needed)
      return "bl\t%__interwork_r7_call_via_%0";
    else
      return "bl\t%__interwork_r11_call_via_%0";
  }
}

static const char *
output_979 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1877 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

  {
    if (!TARGET_CALLER_INTERWORKING)
      return thumb_call_via_reg (operands[1]);
    else if (operands[2] == const0_rtx)
      return "bl\t%__interwork_call_via_%1";
    else if (frame_pointer_needed)
      return "bl\t%__interwork_r7_call_via_%1";
    else
      return "bl\t%__interwork_r11_call_via_%1";
  }
}

static const char *
output_982 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1945 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"
 return thumb1_output_casesi(operands);
}

static const char *
output_984 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1965 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"
 return thumb1_output_interwork ();
}

static const char *
output_985 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1973 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md"

    return thumb1_unexpanded_epilogue ();
  
}

static const char *
output_997 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 241 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"
{
  switch (which_alternative)
    {
    case 0:
    case 1:
    case 2:
      return "mov%?\t%0, %1";
    case 3: return "mvn%?\t%0, #%B1";
    case 4: return "movw%?\t%0, %1";
    case 5:
      /* Cannot load it directly, split to load it via MOV / MOVT.  */
      if (!MEM_P (operands[1]) && arm_disable_literal_pool)
	return "#";
      return "ldr%?\t%0, %1";
    case 6: return "str%?\t%1, %0";
    default: gcc_unreachable ();
    }
}
}

static const char *
output_998 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"

  (*targetm.asm_out.internal_label) (asm_out_file, "LPIC",
			     INTVAL (operands[3]));
  return "add\t%2, %|pc\n\tldr%?\t%0, [%2]";
  
}

static const char * const output_999[] = {
  "mov%?\t%0, %1\t%@ movhi",
  "mov%?\t%0, %1\t%@ movhi",
  "mov%?\t%0, %1\t%@ movhi",
  "movw%?\t%0, %L1\t%@ movhi",
  "strh%?\t%1, %0\t%@ movhi",
  "ldrh%?\t%0, %1\t%@ movhi",
};

static const char * const output_1006[] = {
  "it\t%D3\n\tmov%D3\t%0, %2",
  "it\t%d3\n\tmov%d3\t%0, %1",
  "it\t%D3\n\tmov%D3\t%0, %2",
  "it\t%D3\n\tmvn%D3\t%0, #%B2",
  "it\t%d3\n\tmov%d3\t%0, %1",
  "it\t%d3\n\tmvn%d3\t%0, #%B1",
  "#",
  "#",
  "#",
  "#",
  "#",
  "#",
};

static const char * const output_1007[] = {
  "it\t%D3\n\tmov%D3\t%0, %2",
  "it\t%d3\n\tmov%d3\t%0, %1",
};

static const char * const output_1016[] = {
  "it\t%d1\n\torr%d1\t%0, %3, #1",
  "#",
};

static const char *
output_1018 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 707 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"

    if (GET_CODE (operands[3]) == NE)
      {
        if (which_alternative != 1)
	  output_asm_insn ("it\t%D4\n\tmov%D4\t%0, %2", operands);
        if (which_alternative != 0)
	  output_asm_insn ("it\t%d4\n\tmov%d4\t%0, %1", operands);
        return "";
      }
    switch (which_alternative)
      {
      case 0:
	output_asm_insn ("it\t%d4", operands);
	break;
      case 1:
	output_asm_insn ("it\t%D4", operands);
	break;
      case 2:
	if (arm_restrict_it)
	  output_asm_insn ("it\t%D4", operands);
	else
	  output_asm_insn ("ite\t%D4", operands);
	break;
      default:
	abort();
      }
    if (which_alternative != 0)
      {
        output_asm_insn ("mov%D4\t%0, %1", operands);
        if (arm_restrict_it && which_alternative == 2)
          output_asm_insn ("it\t%d4", operands);
      }
    if (which_alternative != 1)
      output_asm_insn ("mov%d4\t%0, %2", operands);
    return "";
  
}

static const char *
output_1019 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"

    if (GET_CODE (operands[4]) == LT && operands[3] == const0_rtx)
      return "%i5\t%0, %1, %2, lsr #31";

    output_asm_insn ("cmp\t%2, %3", operands);

    if (GET_CODE (operands[5]) == PLUS && TARGET_COND_ARITH)
      return "cinc\t%0, %1, %d4";

    if (GET_CODE (operands[5]) == AND)
      {
	output_asm_insn ("ite\t%D4", operands);
	output_asm_insn ("mov%D4\t%0, #0", operands);
      }
    else if (GET_CODE (operands[5]) == MINUS)
      {
	output_asm_insn ("ite\t%D4", operands);
	output_asm_insn ("rsb%D4\t%0, %1, #0", operands);
      }
    else if (which_alternative != 0)
      {
	output_asm_insn ("ite\t%D4", operands);
	output_asm_insn ("mov%D4\t%0, %1", operands);
      }
    else
      output_asm_insn ("it\t%d4", operands);
    return "%i5%d4\t%0, %1, #1";
  
}

static const char *
output_1021 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 869 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"

    output_asm_insn ("cmp\t%2, %3", operands);
    if (which_alternative != 0)
      {
	if (arm_restrict_it)
	  {
	    output_asm_insn ("mov\t%0, %1", operands);
	    output_asm_insn ("it\t%d4", operands);
	  }
	else
	{
	  output_asm_insn ("ite\t%D4", operands);
	  output_asm_insn ("mov%D4\t%0, %1", operands);
	}
      }
    else
      output_asm_insn ("it\t%d4", operands);
    return "sub%d4\t%0, %1, #1";
  
}

static const char * const output_1023[] = {
  "csinv\t%0, %3, %2, %D1",
  "csinv\t%0, zr, %2, %D1",
};

static const char * const output_1024[] = {
  "csinc\t%0, %3, %2, %D1",
  "csinc\t%0, zr, %2, %D1",
};

static const char * const output_1025[] = {
  "csneg\t%0, %3, %2, %D1",
  "csneg\t%0, zr, %2, %D1",
};

static const char *
output_1026 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1013 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"

  if (GET_CODE (operands[5]) == LT
      && (operands[4] == const0_rtx))
    {
      if (which_alternative != 1 && REG_P (operands[1]))
	{
	  if (operands[2] == const0_rtx)
	    return "and\t%0, %1, %3, asr #31";
	  return "ands\t%0, %1, %3, asr #32\n\tit\tcc\n\tmovcc\t%0, %2";
	}
      else if (which_alternative != 0 && REG_P (operands[2]))
	{
	  if (operands[1] == const0_rtx)
	    return "bic\t%0, %2, %3, asr #31";
	  return "bics\t%0, %2, %3, asr #32\n\tit\tcs\n\tmovcs\t%0, %1";
	}
      /* The only case that falls through to here is when both ops 1 & 2
	 are constants.  */
    }

  if (GET_CODE (operands[5]) == GE
      && (operands[4] == const0_rtx))
    {
      if (which_alternative != 1 && REG_P (operands[1]))
	{
	  if (operands[2] == const0_rtx)
	    return "bic\t%0, %1, %3, asr #31";
	  return "bics\t%0, %1, %3, asr #32\n\tit\tcs\n\tmovcs\t%0, %2";
	}
      else if (which_alternative != 0 && REG_P (operands[2]))
	{
	  if (operands[1] == const0_rtx)
	    return "and\t%0, %2, %3, asr #31";
	  return "ands\t%0, %2, %3, asr #32\n\tit\tcc\n\tmovcc\t%0, %1";
	}
      /* The only case that falls through to here is when both ops 1 & 2
	 are constants.  */
    }
  if (CONST_INT_P (operands[4])
      && !const_ok_for_arm (INTVAL (operands[4])))
    output_asm_insn ("cmn\t%3, #%n4", operands);
  else
    output_asm_insn ("cmp\t%3, %4", operands);
  switch (which_alternative)
    {
    case 0:
      output_asm_insn ("it\t%D5", operands);
      break;
    case 1:
      output_asm_insn ("it\t%d5", operands);
      break;
    case 2:
      if (arm_restrict_it)
        {
          output_asm_insn ("mov\t%0, %1", operands);
          output_asm_insn ("it\t%D5", operands);
        }
      else
        output_asm_insn ("ite\t%d5", operands);
      break;
    default:
      abort();
    }
  if (which_alternative != 0 && !(arm_restrict_it && which_alternative == 2))
    output_asm_insn ("mov%d5\t%0, %1", operands);
  if (which_alternative != 1)
    output_asm_insn ("mov%D5\t%0, %2", operands);
  return "";
  
}

static const char * const output_1027[] = {
  "sxtb%?\t%0, %1",
  "ldrsb%?\t%0, %1",
};

static const char * const output_1028[] = {
  "uxth%?\t%0, %1",
  "ldrh%?\t%0, %1",
};

static const char * const output_1029[] = {
  "uxtb%?\t%0, %1",
  "ldrb%?\t%0, %1\t%@ zero_extendqisi2",
};

static const char *
output_1030 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1162 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"
 return thumb2_output_casesi(operands);
}

static const char *
output_1031 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1202 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"
 return thumb2_output_casesi(operands);
}

static const char *
output_1032 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1211 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"
 return output_return_instruction (const_true_rtx, true, false, true);
}

static const char *
output_1033 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"
 return output_return_instruction (const_true_rtx, true, false, true);
}

static const char *
output_1036 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1274 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"
 return arm_output_shift(operands, 2);
}

static const char *
output_1040 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1302 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"

    HOST_WIDE_INT val;

    if (CONST_INT_P (operands[2]))
      val = INTVAL(operands[2]);
    else
      val = 0;

    /* We prefer eg. subs rn, rn, #1 over adds rn, rn, #0xffffffff.  */
    if (val < 0 && const_ok_for_arm(ARM_SIGN_EXTEND (-val)))
      return "sub%!\t%0, %1, #%n2";
    else
      return "add%!\t%0, %1, %2";
  
}

static const char *
output_1042 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1372 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"

    HOST_WIDE_INT val;

    if (CONST_INT_P (operands[2]))
      val = INTVAL (operands[2]);
    else
      val = 0;

    if (val < 0 && const_ok_for_arm (ARM_SIGN_EXTEND (-val)))
      return "subs\t%0, %1, #%n2";
    else
      return "adds\t%0, %1, %2";
  
}

static const char *
output_1043 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1404 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"

    HOST_WIDE_INT val;

    if (CONST_INT_P (operands[1]))
      val = INTVAL (operands[1]);
    else
      val = 0;

    if (val < 0 && const_ok_for_arm (ARM_SIGN_EXTEND (-val)))
      return "cmp\t%0, #%n1";
    else
      return "cmn\t%0, %1";
  
}

static const char *
output_1047 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"

  if (get_attr_length (insn) == 2)
    return "cbz\t%0, %l1";
  else
    return "cmp\t%0, #0\n\tbeq\t%l1";
  
}

static const char *
output_1048 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1492 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"

  if (get_attr_length (insn) == 2)
    return "cbnz\t%0, %l1";
  else
    return "cmp\t%0, #0\n\tbne\t%l1";
  
}

static const char *
output_1054 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"
{
    char pattern[100];
    int i, num_saves = XVECLEN (operands[0], 0);

    strcpy (pattern, "clrm%?\t{");
    for (i = 0; i < num_saves; i++)
      {
	if (GET_CODE (XVECEXP (operands[0], 0, i)) == UNSPEC_VOLATILE)
	  {
	    strcat (pattern, "APSR");
	    ++i;
	  }
	else
	  strcat (pattern,
		  reg_names[REGNO (XEXP (XVECEXP (operands[0], 0, i), 0))]);
	if (i < num_saves - 1)
	  strcat (pattern, ", %|");
      }
    strcat (pattern, "}");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1058 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1738 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"
{
    if (get_attr_length (insn) == 4)
      return "le\t%|lr, %l0";
    else
      return "subs\t%|lr, #1;bne\t%l0";
  }
}

static const char *
output_1060 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 31 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"

  return output_move_neon (operands);
  
}

static const char *
output_1061 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 44 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (which_alternative == 2 || which_alternative == 3)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V8QImode,
        &operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
        return "vmov.f32\t%P0, %1  @ v8qi";
      else
        sprintf (templ, "vmov.i%d\t%%P0, %%x1  @ v8qi", width);

      return templ;
    }

  switch (which_alternative)
    {
    case 0: return "vmov\t%P0, %P1  @ v8qi";
    case 1: case 4: return output_move_neon (operands);
    case 2: case 3: gcc_unreachable ();
    case 5: return "vmov\t%Q0, %R0, %P1  @ v8qi";
    case 6: return "vmov\t%P0, %Q1, %R1  @ v8qi";
    case 9: return "#";
    default: return output_move_double (operands, true, NULL);
    }
}
}

static const char *
output_1062 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 44 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (which_alternative == 2 || which_alternative == 3)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V4HImode,
        &operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
        return "vmov.f32\t%P0, %1  @ v4hi";
      else
        sprintf (templ, "vmov.i%d\t%%P0, %%x1  @ v4hi", width);

      return templ;
    }

  switch (which_alternative)
    {
    case 0: return "vmov\t%P0, %P1  @ v4hi";
    case 1: case 4: return output_move_neon (operands);
    case 2: case 3: gcc_unreachable ();
    case 5: return "vmov\t%Q0, %R0, %P1  @ v4hi";
    case 6: return "vmov\t%P0, %Q1, %R1  @ v4hi";
    case 9: return "#";
    default: return output_move_double (operands, true, NULL);
    }
}
}

static const char *
output_1063 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 44 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (which_alternative == 2 || which_alternative == 3)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V4HFmode,
        &operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
        return "vmov.f32\t%P0, %1  @ v4hf";
      else
        sprintf (templ, "vmov.i%d\t%%P0, %%x1  @ v4hf", width);

      return templ;
    }

  switch (which_alternative)
    {
    case 0: return "vmov\t%P0, %P1  @ v4hf";
    case 1: case 4: return output_move_neon (operands);
    case 2: case 3: gcc_unreachable ();
    case 5: return "vmov\t%Q0, %R0, %P1  @ v4hf";
    case 6: return "vmov\t%P0, %Q1, %R1  @ v4hf";
    case 9: return "#";
    default: return output_move_double (operands, true, NULL);
    }
}
}

static const char *
output_1064 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 44 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (which_alternative == 2 || which_alternative == 3)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V4BFmode,
        &operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
        return "vmov.f32\t%P0, %1  @ v4bf";
      else
        sprintf (templ, "vmov.i%d\t%%P0, %%x1  @ v4bf", width);

      return templ;
    }

  switch (which_alternative)
    {
    case 0: return "vmov\t%P0, %P1  @ v4bf";
    case 1: case 4: return output_move_neon (operands);
    case 2: case 3: gcc_unreachable ();
    case 5: return "vmov\t%Q0, %R0, %P1  @ v4bf";
    case 6: return "vmov\t%P0, %Q1, %R1  @ v4bf";
    case 9: return "#";
    default: return output_move_double (operands, true, NULL);
    }
}
}

static const char *
output_1065 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 44 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (which_alternative == 2 || which_alternative == 3)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V2SImode,
        &operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
        return "vmov.f32\t%P0, %1  @ v2si";
      else
        sprintf (templ, "vmov.i%d\t%%P0, %%x1  @ v2si", width);

      return templ;
    }

  switch (which_alternative)
    {
    case 0: return "vmov\t%P0, %P1  @ v2si";
    case 1: case 4: return output_move_neon (operands);
    case 2: case 3: gcc_unreachable ();
    case 5: return "vmov\t%Q0, %R0, %P1  @ v2si";
    case 6: return "vmov\t%P0, %Q1, %R1  @ v2si";
    case 9: return "#";
    default: return output_move_double (operands, true, NULL);
    }
}
}

static const char *
output_1066 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 44 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (which_alternative == 2 || which_alternative == 3)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V2SFmode,
        &operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
        return "vmov.f32\t%P0, %1  @ v2sf";
      else
        sprintf (templ, "vmov.i%d\t%%P0, %%x1  @ v2sf", width);

      return templ;
    }

  switch (which_alternative)
    {
    case 0: return "vmov\t%P0, %P1  @ v2sf";
    case 1: case 4: return output_move_neon (operands);
    case 2: case 3: gcc_unreachable ();
    case 5: return "vmov\t%Q0, %R0, %P1  @ v2sf";
    case 6: return "vmov\t%P0, %Q1, %R1  @ v2sf";
    case 9: return "#";
    default: return output_move_double (operands, true, NULL);
    }
}
}

static const char *
output_1067 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 44 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (which_alternative == 2 || which_alternative == 3)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], DImode,
        &operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
        return "vmov.f32\t%P0, %1  @ di";
      else
        sprintf (templ, "vmov.i%d\t%%P0, %%x1  @ di", width);

      return templ;
    }

  switch (which_alternative)
    {
    case 0: return "vmov\t%P0, %P1  @ di";
    case 1: case 4: return output_move_neon (operands);
    case 2: case 3: gcc_unreachable ();
    case 5: return "vmov\t%Q0, %R0, %P1  @ di";
    case 6: return "vmov\t%P0, %Q1, %R1  @ di";
    case 9: return "#";
    default: return output_move_double (operands, true, NULL);
    }
}
}

static const char *
output_1068 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 91 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (which_alternative == 2 || which_alternative == 3)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V16QImode,
        &operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
        return "vmov.f32\t%q0, %1  @ v16qi";
      else
        sprintf (templ, "vmov.i%d\t%%q0, %%1  @ v16qi", width);

      return templ;
    }

  switch (which_alternative)
    {
    case 0: return "vmov\t%q0, %q1  @ v16qi";
    case 1: case 4: return output_move_neon (operands);
    case 2: case 3: gcc_unreachable ();
    case 5: return "vmov\t%Q0, %R0, %e1  @ v16qi\n\tvmov\t%J0, %K0, %f1";
    case 6: return "vmov\t%e0, %Q1, %R1  @ v16qi\n\tvmov\t%f0, %J1, %K1";
    default: return output_move_quad (operands);
    }
}
}

static const char *
output_1069 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 91 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (which_alternative == 2 || which_alternative == 3)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V8HImode,
        &operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
        return "vmov.f32\t%q0, %1  @ v8hi";
      else
        sprintf (templ, "vmov.i%d\t%%q0, %%1  @ v8hi", width);

      return templ;
    }

  switch (which_alternative)
    {
    case 0: return "vmov\t%q0, %q1  @ v8hi";
    case 1: case 4: return output_move_neon (operands);
    case 2: case 3: gcc_unreachable ();
    case 5: return "vmov\t%Q0, %R0, %e1  @ v8hi\n\tvmov\t%J0, %K0, %f1";
    case 6: return "vmov\t%e0, %Q1, %R1  @ v8hi\n\tvmov\t%f0, %J1, %K1";
    default: return output_move_quad (operands);
    }
}
}

static const char *
output_1070 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 91 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (which_alternative == 2 || which_alternative == 3)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V8HFmode,
        &operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
        return "vmov.f32\t%q0, %1  @ v8hf";
      else
        sprintf (templ, "vmov.i%d\t%%q0, %%1  @ v8hf", width);

      return templ;
    }

  switch (which_alternative)
    {
    case 0: return "vmov\t%q0, %q1  @ v8hf";
    case 1: case 4: return output_move_neon (operands);
    case 2: case 3: gcc_unreachable ();
    case 5: return "vmov\t%Q0, %R0, %e1  @ v8hf\n\tvmov\t%J0, %K0, %f1";
    case 6: return "vmov\t%e0, %Q1, %R1  @ v8hf\n\tvmov\t%f0, %J1, %K1";
    default: return output_move_quad (operands);
    }
}
}

static const char *
output_1071 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 91 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (which_alternative == 2 || which_alternative == 3)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V8BFmode,
        &operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
        return "vmov.f32\t%q0, %1  @ v8bf";
      else
        sprintf (templ, "vmov.i%d\t%%q0, %%1  @ v8bf", width);

      return templ;
    }

  switch (which_alternative)
    {
    case 0: return "vmov\t%q0, %q1  @ v8bf";
    case 1: case 4: return output_move_neon (operands);
    case 2: case 3: gcc_unreachable ();
    case 5: return "vmov\t%Q0, %R0, %e1  @ v8bf\n\tvmov\t%J0, %K0, %f1";
    case 6: return "vmov\t%e0, %Q1, %R1  @ v8bf\n\tvmov\t%f0, %J1, %K1";
    default: return output_move_quad (operands);
    }
}
}

static const char *
output_1072 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 91 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (which_alternative == 2 || which_alternative == 3)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V4SImode,
        &operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
        return "vmov.f32\t%q0, %1  @ v4si";
      else
        sprintf (templ, "vmov.i%d\t%%q0, %%1  @ v4si", width);

      return templ;
    }

  switch (which_alternative)
    {
    case 0: return "vmov\t%q0, %q1  @ v4si";
    case 1: case 4: return output_move_neon (operands);
    case 2: case 3: gcc_unreachable ();
    case 5: return "vmov\t%Q0, %R0, %e1  @ v4si\n\tvmov\t%J0, %K0, %f1";
    case 6: return "vmov\t%e0, %Q1, %R1  @ v4si\n\tvmov\t%f0, %J1, %K1";
    default: return output_move_quad (operands);
    }
}
}

static const char *
output_1073 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 91 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (which_alternative == 2 || which_alternative == 3)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V4SFmode,
        &operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
        return "vmov.f32\t%q0, %1  @ v4sf";
      else
        sprintf (templ, "vmov.i%d\t%%q0, %%1  @ v4sf", width);

      return templ;
    }

  switch (which_alternative)
    {
    case 0: return "vmov\t%q0, %q1  @ v4sf";
    case 1: case 4: return output_move_neon (operands);
    case 2: case 3: gcc_unreachable ();
    case 5: return "vmov\t%Q0, %R0, %e1  @ v4sf\n\tvmov\t%J0, %K0, %f1";
    case 6: return "vmov\t%e0, %Q1, %R1  @ v4sf\n\tvmov\t%f0, %J1, %K1";
    default: return output_move_quad (operands);
    }
}
}

static const char *
output_1074 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 91 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (which_alternative == 2 || which_alternative == 3)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V2DImode,
        &operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
        return "vmov.f32\t%q0, %1  @ v2di";
      else
        sprintf (templ, "vmov.i%d\t%%q0, %%1  @ v2di", width);

      return templ;
    }

  switch (which_alternative)
    {
    case 0: return "vmov\t%q0, %q1  @ v2di";
    case 1: case 4: return output_move_neon (operands);
    case 2: case 3: gcc_unreachable ();
    case 5: return "vmov\t%Q0, %R0, %e1  @ v2di\n\tvmov\t%J0, %K0, %f1";
    case 6: return "vmov\t%e0, %Q1, %R1  @ v2di\n\tvmov\t%f0, %J1, %K1";
    default: return output_move_quad (operands);
    }
}
}

static const char *
output_1075 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 91 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (which_alternative == 2 || which_alternative == 3)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], TImode,
        &operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
        return "vmov.f32\t%q0, %1  @ ti";
      else
        sprintf (templ, "vmov.i%d\t%%q0, %%1  @ ti", width);

      return templ;
    }

  switch (which_alternative)
    {
    case 0: return "vmov\t%q0, %q1  @ ti";
    case 1: case 4: return output_move_neon (operands);
    case 2: case 3: gcc_unreachable ();
    case 5: return "vmov\t%Q0, %R0, %e1  @ ti\n\tvmov\t%J0, %K0, %f1";
    case 6: return "vmov\t%e0, %Q1, %R1  @ ti\n\tvmov\t%f0, %J1, %K1";
    default: return output_move_quad (operands);
    }
}
}

static const char *
output_1076 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 187 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "#";
    case 1: case 2: return output_move_neon (operands);
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1077 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 187 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "#";
    case 1: case 2: return output_move_neon (operands);
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1078 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 187 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "#";
    case 1: case 2: return output_move_neon (operands);
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1079 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 187 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "#";
    case 1: case 2: return output_move_neon (operands);
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1108 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 325 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int elt = ffs ((int) INTVAL (operands[2])) - 1;
  if (BYTES_BIG_ENDIAN)
    elt = GET_MODE_NUNITS (V8QImode) - 1 - elt;
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vld1.8\t{%P0[%c2]}, %A1";
  else
    return "vmov.8\t%P0[%c2], %1";
}
}

static const char *
output_1109 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 325 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int elt = ffs ((int) INTVAL (operands[2])) - 1;
  if (BYTES_BIG_ENDIAN)
    elt = GET_MODE_NUNITS (V4HImode) - 1 - elt;
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vld1.16\t{%P0[%c2]}, %A1";
  else
    return "vmov.16\t%P0[%c2], %1";
}
}

static const char *
output_1110 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 325 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int elt = ffs ((int) INTVAL (operands[2])) - 1;
  if (BYTES_BIG_ENDIAN)
    elt = GET_MODE_NUNITS (V4HFmode) - 1 - elt;
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vld1.16\t{%P0[%c2]}, %A1";
  else
    return "vmov.16\t%P0[%c2], %1";
}
}

static const char *
output_1111 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 325 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int elt = ffs ((int) INTVAL (operands[2])) - 1;
  if (BYTES_BIG_ENDIAN)
    elt = GET_MODE_NUNITS (V4BFmode) - 1 - elt;
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vld1.16\t{%P0[%c2]}, %A1";
  else
    return "vmov.16\t%P0[%c2], %1";
}
}

static const char *
output_1112 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 325 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int elt = ffs ((int) INTVAL (operands[2])) - 1;
  if (BYTES_BIG_ENDIAN)
    elt = GET_MODE_NUNITS (V2SImode) - 1 - elt;
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vld1.32\t{%P0[%c2]}, %A1";
  else
    return "vmov.32\t%P0[%c2], %1";
}
}

static const char *
output_1113 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 325 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int elt = ffs ((int) INTVAL (operands[2])) - 1;
  if (BYTES_BIG_ENDIAN)
    elt = GET_MODE_NUNITS (V2SFmode) - 1 - elt;
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vld1.32\t{%P0[%c2]}, %A1";
  else
    return "vmov.32\t%P0[%c2], %1";
}
}

static const char *
output_1114 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT elem = ffs ((int) INTVAL (operands[2])) - 1;
  int half_elts = GET_MODE_NUNITS (V16QImode) / 2;
  int elt = elem % half_elts;
  int hi = (elem / half_elts) * 2;
  int regno = REGNO (operands[0]);

  if (BYTES_BIG_ENDIAN)
    elt = half_elts - 1 - elt;

  operands[0] = gen_rtx_REG (V8QImode, regno + hi);
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vld1.8\t{%P0[%c2]}, %A1";
  else
    return "vmov.8\t%P0[%c2], %1";
}
}

static const char *
output_1115 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT elem = ffs ((int) INTVAL (operands[2])) - 1;
  int half_elts = GET_MODE_NUNITS (V8HImode) / 2;
  int elt = elem % half_elts;
  int hi = (elem / half_elts) * 2;
  int regno = REGNO (operands[0]);

  if (BYTES_BIG_ENDIAN)
    elt = half_elts - 1 - elt;

  operands[0] = gen_rtx_REG (V4HImode, regno + hi);
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vld1.16\t{%P0[%c2]}, %A1";
  else
    return "vmov.16\t%P0[%c2], %1";
}
}

static const char *
output_1116 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT elem = ffs ((int) INTVAL (operands[2])) - 1;
  int half_elts = GET_MODE_NUNITS (V8HFmode) / 2;
  int elt = elem % half_elts;
  int hi = (elem / half_elts) * 2;
  int regno = REGNO (operands[0]);

  if (BYTES_BIG_ENDIAN)
    elt = half_elts - 1 - elt;

  operands[0] = gen_rtx_REG (V4HFmode, regno + hi);
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vld1.16\t{%P0[%c2]}, %A1";
  else
    return "vmov.16\t%P0[%c2], %1";
}
}

static const char *
output_1117 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT elem = ffs ((int) INTVAL (operands[2])) - 1;
  int half_elts = GET_MODE_NUNITS (V4SImode) / 2;
  int elt = elem % half_elts;
  int hi = (elem / half_elts) * 2;
  int regno = REGNO (operands[0]);

  if (BYTES_BIG_ENDIAN)
    elt = half_elts - 1 - elt;

  operands[0] = gen_rtx_REG (V2SImode, regno + hi);
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vld1.32\t{%P0[%c2]}, %A1";
  else
    return "vmov.32\t%P0[%c2], %1";
}
}

static const char *
output_1118 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT elem = ffs ((int) INTVAL (operands[2])) - 1;
  int half_elts = GET_MODE_NUNITS (V4SFmode) / 2;
  int elt = elem % half_elts;
  int hi = (elem / half_elts) * 2;
  int regno = REGNO (operands[0]);

  if (BYTES_BIG_ENDIAN)
    elt = half_elts - 1 - elt;

  operands[0] = gen_rtx_REG (V2SFmode, regno + hi);
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vld1.32\t{%P0[%c2]}, %A1";
  else
    return "vmov.32\t%P0[%c2], %1";
}
}

static const char *
output_1119 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 375 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT elem = ffs ((int) INTVAL (operands[2])) - 1;
  int regno = REGNO (operands[0]) + 2 * elem;

  operands[0] = gen_rtx_REG (DImode, regno);

  if (which_alternative == 0)
    return "vld1.64\t%P0, %A1";
  else
    return "vmov\t%P0, %Q1, %R1";
}
}

static const char *
output_1120 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V8QImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }

  if (which_alternative == 0)
    return "vst1.8\t{%P1[%c2]}, %A0";
  else
    return "vmov.u8\t%0, %P1[%c2]";
}
}

static const char *
output_1121 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V4HImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }

  if (which_alternative == 0)
    return "vst1.16\t{%P1[%c2]}, %A0";
  else
    return "vmov.u16\t%0, %P1[%c2]";
}
}

static const char *
output_1122 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V4HFmode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }

  if (which_alternative == 0)
    return "vst1.16\t{%P1[%c2]}, %A0";
  else
    return "vmov.u16\t%0, %P1[%c2]";
}
}

static const char *
output_1123 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V4BFmode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }

  if (which_alternative == 0)
    return "vst1.16\t{%P1[%c2]}, %A0";
  else
    return "vmov.u16\t%0, %P1[%c2]";
}
}

static const char *
output_1124 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V2SImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }

  if (which_alternative == 0)
    return "vst1.32\t{%P1[%c2]}, %A0";
  else
    return "vmov.32\t%0, %P1[%c2]";
}
}

static const char *
output_1125 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V2SFmode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }

  if (which_alternative == 0)
    return "vst1.32\t{%P1[%c2]}, %A0";
  else
    return "vmov.32\t%0, %P1[%c2]";
}
}

static const char *
output_1126 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 420 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int half_elts = GET_MODE_NUNITS (V16QImode) / 2;
  int elt = INTVAL (operands[2]) % half_elts;
  int hi = (INTVAL (operands[2]) / half_elts) * 2;
  int regno = REGNO (operands[1]);

  if (BYTES_BIG_ENDIAN)
    elt = half_elts - 1 - elt;

  operands[1] = gen_rtx_REG (V8QImode, regno + hi);
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vst1.8\t{%P1[%c2]}, %A0";
  else
    return "vmov.u8\t%0, %P1[%c2]";
}
}

static const char *
output_1127 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 420 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int half_elts = GET_MODE_NUNITS (V8HImode) / 2;
  int elt = INTVAL (operands[2]) % half_elts;
  int hi = (INTVAL (operands[2]) / half_elts) * 2;
  int regno = REGNO (operands[1]);

  if (BYTES_BIG_ENDIAN)
    elt = half_elts - 1 - elt;

  operands[1] = gen_rtx_REG (V4HImode, regno + hi);
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vst1.16\t{%P1[%c2]}, %A0";
  else
    return "vmov.u16\t%0, %P1[%c2]";
}
}

static const char *
output_1128 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 420 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int half_elts = GET_MODE_NUNITS (V8HFmode) / 2;
  int elt = INTVAL (operands[2]) % half_elts;
  int hi = (INTVAL (operands[2]) / half_elts) * 2;
  int regno = REGNO (operands[1]);

  if (BYTES_BIG_ENDIAN)
    elt = half_elts - 1 - elt;

  operands[1] = gen_rtx_REG (V4HFmode, regno + hi);
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vst1.16\t{%P1[%c2]}, %A0";
  else
    return "vmov.u16\t%0, %P1[%c2]";
}
}

static const char *
output_1129 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 420 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int half_elts = GET_MODE_NUNITS (V4SImode) / 2;
  int elt = INTVAL (operands[2]) % half_elts;
  int hi = (INTVAL (operands[2]) / half_elts) * 2;
  int regno = REGNO (operands[1]);

  if (BYTES_BIG_ENDIAN)
    elt = half_elts - 1 - elt;

  operands[1] = gen_rtx_REG (V2SImode, regno + hi);
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vst1.32\t{%P1[%c2]}, %A0";
  else
    return "vmov.32\t%0, %P1[%c2]";
}
}

static const char *
output_1130 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 420 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int half_elts = GET_MODE_NUNITS (V4SFmode) / 2;
  int elt = INTVAL (operands[2]) % half_elts;
  int hi = (INTVAL (operands[2]) / half_elts) * 2;
  int regno = REGNO (operands[1]);

  if (BYTES_BIG_ENDIAN)
    elt = half_elts - 1 - elt;

  operands[1] = gen_rtx_REG (V2SFmode, regno + hi);
  operands[2] = GEN_INT (elt);

  if (which_alternative == 0)
    return "vst1.32\t{%P1[%c2]}, %A0";
  else
    return "vmov.32\t%0, %P1[%c2]";
}
}

static const char *
output_1131 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 448 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]) + 2 * INTVAL (operands[2]);

  operands[1] = gen_rtx_REG (DImode, regno);

  if (which_alternative == 0)
    return "vst1.64\t{%P1}, %A0  @ v2di";
  else
    return "vmov\t%Q0, %R0, %P1  @ v2di";
}
}

static const char *
output_1216 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 664 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vorr\t%P0, %P1, %P2";
    case 1: return neon_output_logic_immediate ("vorr", &operands[2],
		     V8QImode, 0, VALID_NEON_QREG_MODE (V8QImode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1217 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 664 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vorr\t%q0, %q1, %q2";
    case 1: return neon_output_logic_immediate ("vorr", &operands[2],
		     V16QImode, 0, VALID_NEON_QREG_MODE (V16QImode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1218 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 664 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vorr\t%P0, %P1, %P2";
    case 1: return neon_output_logic_immediate ("vorr", &operands[2],
		     V4HImode, 0, VALID_NEON_QREG_MODE (V4HImode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1219 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 664 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vorr\t%q0, %q1, %q2";
    case 1: return neon_output_logic_immediate ("vorr", &operands[2],
		     V8HImode, 0, VALID_NEON_QREG_MODE (V8HImode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1220 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 664 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vorr\t%P0, %P1, %P2";
    case 1: return neon_output_logic_immediate ("vorr", &operands[2],
		     V2SImode, 0, VALID_NEON_QREG_MODE (V2SImode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1221 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 664 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vorr\t%q0, %q1, %q2";
    case 1: return neon_output_logic_immediate ("vorr", &operands[2],
		     V4SImode, 0, VALID_NEON_QREG_MODE (V4SImode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1222 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 664 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vorr\t%P0, %P1, %P2";
    case 1: return neon_output_logic_immediate ("vorr", &operands[2],
		     V4HFmode, 0, VALID_NEON_QREG_MODE (V4HFmode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1223 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 664 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vorr\t%q0, %q1, %q2";
    case 1: return neon_output_logic_immediate ("vorr", &operands[2],
		     V8HFmode, 0, VALID_NEON_QREG_MODE (V8HFmode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1224 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 664 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vorr\t%P0, %P1, %P2";
    case 1: return neon_output_logic_immediate ("vorr", &operands[2],
		     V2SFmode, 0, VALID_NEON_QREG_MODE (V2SFmode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1225 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 664 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vorr\t%q0, %q1, %q2";
    case 1: return neon_output_logic_immediate ("vorr", &operands[2],
		     V4SFmode, 0, VALID_NEON_QREG_MODE (V4SFmode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1226 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 664 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vorr\t%q0, %q1, %q2";
    case 1: return neon_output_logic_immediate ("vorr", &operands[2],
		     V2DImode, 0, VALID_NEON_QREG_MODE (V2DImode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1227 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 686 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vand\t%P0, %P1, %P2";
    case 1: return neon_output_logic_immediate ("vand", &operands[2],
    		     V8QImode, 1, VALID_NEON_QREG_MODE (V8QImode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1228 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 686 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vand\t%q0, %q1, %q2";
    case 1: return neon_output_logic_immediate ("vand", &operands[2],
    		     V16QImode, 1, VALID_NEON_QREG_MODE (V16QImode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1229 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 686 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vand\t%P0, %P1, %P2";
    case 1: return neon_output_logic_immediate ("vand", &operands[2],
    		     V4HImode, 1, VALID_NEON_QREG_MODE (V4HImode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1230 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 686 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vand\t%q0, %q1, %q2";
    case 1: return neon_output_logic_immediate ("vand", &operands[2],
    		     V8HImode, 1, VALID_NEON_QREG_MODE (V8HImode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1231 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 686 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vand\t%P0, %P1, %P2";
    case 1: return neon_output_logic_immediate ("vand", &operands[2],
    		     V2SImode, 1, VALID_NEON_QREG_MODE (V2SImode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1232 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 686 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vand\t%q0, %q1, %q2";
    case 1: return neon_output_logic_immediate ("vand", &operands[2],
    		     V4SImode, 1, VALID_NEON_QREG_MODE (V4SImode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1233 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 686 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vand\t%P0, %P1, %P2";
    case 1: return neon_output_logic_immediate ("vand", &operands[2],
    		     V4HFmode, 1, VALID_NEON_QREG_MODE (V4HFmode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1234 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 686 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vand\t%q0, %q1, %q2";
    case 1: return neon_output_logic_immediate ("vand", &operands[2],
    		     V8HFmode, 1, VALID_NEON_QREG_MODE (V8HFmode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1235 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 686 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vand\t%P0, %P1, %P2";
    case 1: return neon_output_logic_immediate ("vand", &operands[2],
    		     V2SFmode, 1, VALID_NEON_QREG_MODE (V2SFmode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1236 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 686 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vand\t%q0, %q1, %q2";
    case 1: return neon_output_logic_immediate ("vand", &operands[2],
    		     V4SFmode, 1, VALID_NEON_QREG_MODE (V4SFmode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1237 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 686 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  switch (which_alternative)
    {
    case 0: return "vand\t%q0, %q1, %q2";
    case 1: return neon_output_logic_immediate ("vand", &operands[2],
    		     V2DImode, 1, VALID_NEON_QREG_MODE (V2DImode));
    default: gcc_unreachable ();
    }
}
}

static const char *
output_1344 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 844 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    return neon_output_shift_immediate ("vshr", 's', &operands[2],
					V8QImode, VALID_NEON_QREG_MODE (V8QImode),
					false);
  }
}

static const char *
output_1345 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 844 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    return neon_output_shift_immediate ("vshr", 's', &operands[2],
					V16QImode, VALID_NEON_QREG_MODE (V16QImode),
					false);
  }
}

static const char *
output_1346 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 844 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    return neon_output_shift_immediate ("vshr", 's', &operands[2],
					V4HImode, VALID_NEON_QREG_MODE (V4HImode),
					false);
  }
}

static const char *
output_1347 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 844 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    return neon_output_shift_immediate ("vshr", 's', &operands[2],
					V8HImode, VALID_NEON_QREG_MODE (V8HImode),
					false);
  }
}

static const char *
output_1348 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 844 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    return neon_output_shift_immediate ("vshr", 's', &operands[2],
					V2SImode, VALID_NEON_QREG_MODE (V2SImode),
					false);
  }
}

static const char *
output_1349 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 844 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    return neon_output_shift_immediate ("vshr", 's', &operands[2],
					V4SImode, VALID_NEON_QREG_MODE (V4SImode),
					false);
  }
}

static const char *
output_1350 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 857 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    return neon_output_shift_immediate ("vshr", 'u', &operands[2],
					V8QImode, VALID_NEON_QREG_MODE (V8QImode),
					false);
  }
}

static const char *
output_1351 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 857 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    return neon_output_shift_immediate ("vshr", 'u', &operands[2],
					V16QImode, VALID_NEON_QREG_MODE (V16QImode),
					false);
  }
}

static const char *
output_1352 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 857 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    return neon_output_shift_immediate ("vshr", 'u', &operands[2],
					V4HImode, VALID_NEON_QREG_MODE (V4HImode),
					false);
  }
}

static const char *
output_1353 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 857 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    return neon_output_shift_immediate ("vshr", 'u', &operands[2],
					V8HImode, VALID_NEON_QREG_MODE (V8HImode),
					false);
  }
}

static const char *
output_1354 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 857 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    return neon_output_shift_immediate ("vshr", 'u', &operands[2],
					V2SImode, VALID_NEON_QREG_MODE (V2SImode),
					false);
  }
}

static const char *
output_1355 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 857 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    return neon_output_shift_immediate ("vshr", 'u', &operands[2],
					V4SImode, VALID_NEON_QREG_MODE (V4SImode),
					false);
  }
}

static const char * const output_1370[] = {
  "vld1.32\t{%P0[0]}, %A1",
  "vmov.32\t%P0[0], %1",
};

static const char *
output_1371 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 951 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return BYTES_BIG_ENDIAN ?  "vaddw.s8\t%q0, %q3, %f1" :
    "vaddw.s8\t%q0, %q3, %e1";
}
}

static const char *
output_1372 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 951 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return BYTES_BIG_ENDIAN ?  "vaddw.s16\t%q0, %q3, %f1" :
    "vaddw.s16\t%q0, %q3, %e1";
}
}

static const char *
output_1373 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 951 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return BYTES_BIG_ENDIAN ?  "vaddw.s32\t%q0, %q3, %f1" :
    "vaddw.s32\t%q0, %q3, %e1";
}
}

static const char *
output_1374 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 966 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return BYTES_BIG_ENDIAN ?  "vaddw.s8\t%q0, %q3, %e1" :
    "vaddw.s8\t%q0, %q3, %f1";
}
}

static const char *
output_1375 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 966 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return BYTES_BIG_ENDIAN ?  "vaddw.s16\t%q0, %q3, %e1" :
    "vaddw.s16\t%q0, %q3, %f1";
}
}

static const char *
output_1376 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 966 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return BYTES_BIG_ENDIAN ?  "vaddw.s32\t%q0, %q3, %e1" :
    "vaddw.s32\t%q0, %q3, %f1";
}
}

static const char *
output_1380 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1021 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return BYTES_BIG_ENDIAN ?  "vaddw.u8\t%q0, %q3, %f1" :
    "vaddw.u8\t%q0, %q3, %e1";
}
}

static const char *
output_1381 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1021 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return BYTES_BIG_ENDIAN ?  "vaddw.u16\t%q0, %q3, %f1" :
    "vaddw.u16\t%q0, %q3, %e1";
}
}

static const char *
output_1382 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1021 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return BYTES_BIG_ENDIAN ?  "vaddw.u32\t%q0, %q3, %f1" :
    "vaddw.u32\t%q0, %q3, %e1";
}
}

static const char *
output_1383 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1036 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
 return BYTES_BIG_ENDIAN ?  "vaddw.u8\t%q0, %q3, %e1" :
    "vaddw.u8\t%q0, %q3, %f1";
}
}

static const char *
output_1384 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1036 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
 return BYTES_BIG_ENDIAN ?  "vaddw.u16\t%q0, %q3, %e1" :
    "vaddw.u16\t%q0, %q3, %f1";
}
}

static const char *
output_1385 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1036 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
 return BYTES_BIG_ENDIAN ?  "vaddw.u32\t%q0, %q3, %e1" :
    "vaddw.u32\t%q0, %q3, %f1";
}
}

static const char *
output_1517 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1765 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[5]));
    if (lane > GET_MODE_NUNITS (V2HFmode) - 1)
      {
	operands[5] = GEN_INT (lane - GET_MODE_NUNITS (V2HFmode));
	return "vfmal.f16\t%P0, %2, %p3[%c5]";
      }
    else
      {
	operands[5] = GEN_INT (lane);
	return "vfmal.f16\t%P0, %2, %3[%c5]";
      }
  }
}

static const char *
output_1518 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1765 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[5]));
    if (lane > GET_MODE_NUNITS (V4HFmode) - 1)
      {
	operands[5] = GEN_INT (lane - GET_MODE_NUNITS (V4HFmode));
	return "vfmal.f16\t%q0, %e2, %f3[%c5]";
      }
    else
      {
	operands[5] = GEN_INT (lane);
	return "vfmal.f16\t%q0, %e2, %e3[%c5]";
      }
  }
}

static const char *
output_1519 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1821 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
   int lane = NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[5]));
   int elts_per_reg = GET_MODE_NUNITS (V2HFmode);
   int new_lane = lane % elts_per_reg;
   int regdiff = lane / elts_per_reg;
   operands[5] = GEN_INT (new_lane);
   /* We re-create operands[2] and operands[3] in the halved VFMLSEL modes
      because we want the print_operand code to print the appropriate
      S or D register prefix.  */
   operands[3] = gen_rtx_REG (V2HFmode, REGNO (operands[3]) + regdiff);
   operands[2] = gen_rtx_REG (V2HFmode, REGNO (operands[2]));
   return "vfmal.f16\t%P0, %2, %3[%c5]";
 }
}

static const char *
output_1520 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1821 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
   int lane = NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[5]));
   int elts_per_reg = GET_MODE_NUNITS (V4HFmode);
   int new_lane = lane % elts_per_reg;
   int regdiff = lane / elts_per_reg;
   operands[5] = GEN_INT (new_lane);
   /* We re-create operands[2] and operands[3] in the halved VFMLSEL modes
      because we want the print_operand code to print the appropriate
      S or D register prefix.  */
   operands[3] = gen_rtx_REG (V4HFmode, REGNO (operands[3]) + regdiff);
   operands[2] = gen_rtx_REG (V4HFmode, REGNO (operands[2]));
   return "vfmal.f16\t%q0, %P2, %P3[%c5]";
 }
}

static const char *
output_1521 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1858 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
   int lane = NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[5]));
   int elts_per_reg = GET_MODE_NUNITS (V2HFmode);
   int new_lane = lane % elts_per_reg;
   int regdiff = lane / elts_per_reg;
   operands[5] = GEN_INT (new_lane);
   /* We re-create operands[3] in the halved VFMLSEL mode
      because we've calculated the correct half-width subreg to extract
      the lane from and we want to print *that* subreg instead.  */
   operands[3] = gen_rtx_REG (V2HFmode, REGNO (operands[3]) + regdiff);
   return "vfmal.f16\t%P0, %p2, %3[%c5]";
 }
}

static const char *
output_1522 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1858 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
   int lane = NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[5]));
   int elts_per_reg = GET_MODE_NUNITS (V4HFmode);
   int new_lane = lane % elts_per_reg;
   int regdiff = lane / elts_per_reg;
   operands[5] = GEN_INT (new_lane);
   /* We re-create operands[3] in the halved VFMLSEL mode
      because we've calculated the correct half-width subreg to extract
      the lane from and we want to print *that* subreg instead.  */
   operands[3] = gen_rtx_REG (V4HFmode, REGNO (operands[3]) + regdiff);
   return "vfmal.f16\t%q0, %f2, %P3[%c5]";
 }
}

static const char *
output_1523 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1887 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[5]));
    if (lane > GET_MODE_NUNITS (V2HFmode) - 1)
      {
	operands[5] = GEN_INT (lane - GET_MODE_NUNITS (V2HFmode));
	return "vfmal.f16\t%P0, %p2, %p3[%c5]";
      }
    else
      {
	operands[5] = GEN_INT (lane);
	return "vfmal.f16\t%P0, %p2, %3[%c5]";
      }
  }
}

static const char *
output_1524 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1887 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[5]));
    if (lane > GET_MODE_NUNITS (V4HFmode) - 1)
      {
	operands[5] = GEN_INT (lane - GET_MODE_NUNITS (V4HFmode));
	return "vfmal.f16\t%q0, %f2, %f3[%c5]";
      }
    else
      {
	operands[5] = GEN_INT (lane);
	return "vfmal.f16\t%q0, %f2, %e3[%c5]";
      }
  }
}

static const char *
output_1525 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1918 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[5]));
    if (lane > GET_MODE_NUNITS (V2HFmode) - 1)
      {
	operands[5] = GEN_INT (lane - GET_MODE_NUNITS (V2HFmode));
	return "vfmsl.f16\t%P0, %2, %p3[%c5]";
      }
    else
      {
	operands[5] = GEN_INT (lane);
	return "vfmsl.f16\t%P0, %2, %3[%c5]";
      }
  }
}

static const char *
output_1526 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1918 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[5]));
    if (lane > GET_MODE_NUNITS (V4HFmode) - 1)
      {
	operands[5] = GEN_INT (lane - GET_MODE_NUNITS (V4HFmode));
	return "vfmsl.f16\t%q0, %e2, %f3[%c5]";
      }
    else
      {
	operands[5] = GEN_INT (lane);
	return "vfmsl.f16\t%q0, %e2, %e3[%c5]";
      }
  }
}

static const char *
output_1527 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1956 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
   int lane = NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[5]));
   int elts_per_reg = GET_MODE_NUNITS (V2HFmode);
   int new_lane = lane % elts_per_reg;
   int regdiff = lane / elts_per_reg;
   operands[5] = GEN_INT (new_lane);
   /* We re-create operands[2] and operands[3] in the halved VFMLSEL modes
      because we want the print_operand code to print the appropriate
      S or D register prefix.  */
   operands[3] = gen_rtx_REG (V2HFmode, REGNO (operands[3]) + regdiff);
   operands[2] = gen_rtx_REG (V2HFmode, REGNO (operands[2]));
   return "vfmsl.f16\t%P0, %2, %3[%c5]";
 }
}

static const char *
output_1528 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1956 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
   int lane = NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[5]));
   int elts_per_reg = GET_MODE_NUNITS (V4HFmode);
   int new_lane = lane % elts_per_reg;
   int regdiff = lane / elts_per_reg;
   operands[5] = GEN_INT (new_lane);
   /* We re-create operands[2] and operands[3] in the halved VFMLSEL modes
      because we want the print_operand code to print the appropriate
      S or D register prefix.  */
   operands[3] = gen_rtx_REG (V4HFmode, REGNO (operands[3]) + regdiff);
   operands[2] = gen_rtx_REG (V4HFmode, REGNO (operands[2]));
   return "vfmsl.f16\t%q0, %P2, %P3[%c5]";
 }
}

static const char *
output_1529 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1994 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
   int lane = NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[5]));
   int elts_per_reg = GET_MODE_NUNITS (V2HFmode);
   int new_lane = lane % elts_per_reg;
   int regdiff = lane / elts_per_reg;
   operands[5] = GEN_INT (new_lane);
   /* We re-create operands[3] in the halved VFMLSEL mode
      because we've calculated the correct half-width subreg to extract
      the lane from and we want to print *that* subreg instead.  */
   operands[3] = gen_rtx_REG (V2HFmode, REGNO (operands[3]) + regdiff);
   return "vfmsl.f16\t%P0, %p2, %3[%c5]";
 }
}

static const char *
output_1530 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1994 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
   int lane = NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[5]));
   int elts_per_reg = GET_MODE_NUNITS (V4HFmode);
   int new_lane = lane % elts_per_reg;
   int regdiff = lane / elts_per_reg;
   operands[5] = GEN_INT (new_lane);
   /* We re-create operands[3] in the halved VFMLSEL mode
      because we've calculated the correct half-width subreg to extract
      the lane from and we want to print *that* subreg instead.  */
   operands[3] = gen_rtx_REG (V4HFmode, REGNO (operands[3]) + regdiff);
   return "vfmsl.f16\t%q0, %f2, %P3[%c5]";
 }
}

static const char *
output_1531 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2024 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[5]));
    if (lane > GET_MODE_NUNITS (V2HFmode) - 1)
      {
	operands[5] = GEN_INT (lane - GET_MODE_NUNITS (V2HFmode));
	return "vfmsl.f16\t%P0, %p2, %p3[%c5]";
      }
    else
      {
	operands[5] = GEN_INT (lane);
	return "vfmsl.f16\t%P0, %p2, %3[%c5]";
      }
  }
}

static const char *
output_1532 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2024 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = NEON_ENDIAN_LANE_N (V8HFmode, INTVAL (operands[5]));
    if (lane > GET_MODE_NUNITS (V4HFmode) - 1)
      {
	operands[5] = GEN_INT (lane - GET_MODE_NUNITS (V4HFmode));
	return "vfmsl.f16\t%q0, %f2, %f3[%c5]";
      }
    else
      {
	operands[5] = GEN_INT (lane);
	return "vfmsl.f16\t%q0, %f2, %e3[%c5]";
      }
  }
}

static const char *
output_1640 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vceq.%s%%#8\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V8QImode) == MODE_VECTOR_FLOAT
                         ? "f" : "i",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1641 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcgt.%s%%#8\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V8QImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1642 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcge.%s%%#8\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V8QImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1643 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcle.%s%%#8\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V8QImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1644 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vclt.%s%%#8\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V8QImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1645 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vceq.%s%%#8\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V16QImode) == MODE_VECTOR_FLOAT
                         ? "f" : "i",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1646 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcgt.%s%%#8\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V16QImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1647 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcge.%s%%#8\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V16QImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1648 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcle.%s%%#8\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V16QImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1649 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vclt.%s%%#8\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V16QImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1650 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vceq.%s%%#16\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V4HImode) == MODE_VECTOR_FLOAT
                         ? "f" : "i",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1651 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcgt.%s%%#16\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V4HImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1652 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcge.%s%%#16\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V4HImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1653 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcle.%s%%#16\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V4HImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1654 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vclt.%s%%#16\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V4HImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1655 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vceq.%s%%#16\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V8HImode) == MODE_VECTOR_FLOAT
                         ? "f" : "i",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1656 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcgt.%s%%#16\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V8HImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1657 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcge.%s%%#16\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V8HImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1658 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcle.%s%%#16\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V8HImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1659 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vclt.%s%%#16\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V8HImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1660 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vceq.%s%%#32\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V2SImode) == MODE_VECTOR_FLOAT
                         ? "f" : "i",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1661 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcgt.%s%%#32\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V2SImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1662 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcge.%s%%#32\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V2SImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1663 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcle.%s%%#32\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V2SImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1664 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vclt.%s%%#32\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V2SImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1665 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vceq.%s%%#32\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V4SImode) == MODE_VECTOR_FLOAT
                         ? "f" : "i",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1666 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcgt.%s%%#32\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V4SImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1667 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcge.%s%%#32\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V4SImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1668 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcle.%s%%#32\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V4SImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1669 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vclt.%s%%#32\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V4SImode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1670 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vceq.%s%%#32\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V2SFmode) == MODE_VECTOR_FLOAT
                         ? "f" : "i",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1671 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcgt.%s%%#32\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V2SFmode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1672 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcge.%s%%#32\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V2SFmode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1673 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcle.%s%%#32\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V2SFmode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1674 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vclt.%s%%#32\t%%P0,"
                      " %%P1, %s",
                       GET_MODE_CLASS (V2SFmode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1675 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vceq.%s%%#32\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V4SFmode) == MODE_VECTOR_FLOAT
                         ? "f" : "i",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1676 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcgt.%s%%#32\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V4SFmode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1677 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcge.%s%%#32\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V4SFmode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1678 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcle.%s%%#32\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V4SFmode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1679 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2304 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vclt.%s%%#32\t%%q0,"
                      " %%q1, %s",
                       GET_MODE_CLASS (V4SFmode) == MODE_VECTOR_FLOAT
                         ? "f" : "s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_1680 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2328 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vceq.f%%#32\t%%P0,"
                       " %%P1, %s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
}
}

static const char *
output_1681 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2328 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcgt.f%%#32\t%%P0,"
                       " %%P1, %s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
}
}

static const char *
output_1682 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2328 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcge.f%%#32\t%%P0,"
                       " %%P1, %s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
}
}

static const char *
output_1683 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2328 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vclt.f%%#32\t%%P0,"
                       " %%P1, %s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
}
}

static const char *
output_1684 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2328 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcle.f%%#32\t%%P0,"
                       " %%P1, %s",
                       which_alternative == 0
                         ? "%P2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
}
}

static const char *
output_1685 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2328 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vceq.f%%#32\t%%q0,"
                       " %%q1, %s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
}
}

static const char *
output_1686 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2328 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcgt.f%%#32\t%%q0,"
                       " %%q1, %s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
}
}

static const char *
output_1687 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2328 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcge.f%%#32\t%%q0,"
                       " %%q1, %s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
}
}

static const char *
output_1688 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2328 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vclt.f%%#32\t%%q0,"
                       " %%q1, %s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
}
}

static const char *
output_1689 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2328 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    char pattern[100];
    sprintf (pattern, "vcle.f%%#32\t%%q0,"
                       " %%q1, %s",
                       which_alternative == 0
                         ? "%q2" : "#0");
    output_asm_insn (pattern, operands);
    return "";
}
}

static const char *
output_1690 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vceq.%s%%#16\t%%q0,"
	   " %%q1, %s",
	   GET_MODE_CLASS (V8HFmode) == MODE_VECTOR_FLOAT
	   ? "f" : "i",
	   which_alternative == 0
	   ? "%q2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1691 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vcgt.%s%%#16\t%%q0,"
	   " %%q1, %s",
	   GET_MODE_CLASS (V8HFmode) == MODE_VECTOR_FLOAT
	   ? "f" : "s",
	   which_alternative == 0
	   ? "%q2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1692 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vcge.%s%%#16\t%%q0,"
	   " %%q1, %s",
	   GET_MODE_CLASS (V8HFmode) == MODE_VECTOR_FLOAT
	   ? "f" : "s",
	   which_alternative == 0
	   ? "%q2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1693 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vcle.%s%%#16\t%%q0,"
	   " %%q1, %s",
	   GET_MODE_CLASS (V8HFmode) == MODE_VECTOR_FLOAT
	   ? "f" : "s",
	   which_alternative == 0
	   ? "%q2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1694 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vclt.%s%%#16\t%%q0,"
	   " %%q1, %s",
	   GET_MODE_CLASS (V8HFmode) == MODE_VECTOR_FLOAT
	   ? "f" : "s",
	   which_alternative == 0
	   ? "%q2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1695 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vceq.%s%%#16\t%%P0,"
	   " %%P1, %s",
	   GET_MODE_CLASS (V4HFmode) == MODE_VECTOR_FLOAT
	   ? "f" : "i",
	   which_alternative == 0
	   ? "%P2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1696 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vcgt.%s%%#16\t%%P0,"
	   " %%P1, %s",
	   GET_MODE_CLASS (V4HFmode) == MODE_VECTOR_FLOAT
	   ? "f" : "s",
	   which_alternative == 0
	   ? "%P2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1697 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vcge.%s%%#16\t%%P0,"
	   " %%P1, %s",
	   GET_MODE_CLASS (V4HFmode) == MODE_VECTOR_FLOAT
	   ? "f" : "s",
	   which_alternative == 0
	   ? "%P2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1698 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vcle.%s%%#16\t%%P0,"
	   " %%P1, %s",
	   GET_MODE_CLASS (V4HFmode) == MODE_VECTOR_FLOAT
	   ? "f" : "s",
	   which_alternative == 0
	   ? "%P2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1699 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vclt.%s%%#16\t%%P0,"
	   " %%P1, %s",
	   GET_MODE_CLASS (V4HFmode) == MODE_VECTOR_FLOAT
	   ? "f" : "s",
	   which_alternative == 0
	   ? "%P2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1700 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vceq.f%%#16\t%%q0,"
	   " %%q1, %s",
	   which_alternative == 0
	   ? "%q2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1701 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vcgt.f%%#16\t%%q0,"
	   " %%q1, %s",
	   which_alternative == 0
	   ? "%q2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1702 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vcge.f%%#16\t%%q0,"
	   " %%q1, %s",
	   which_alternative == 0
	   ? "%q2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1703 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vclt.f%%#16\t%%q0,"
	   " %%q1, %s",
	   which_alternative == 0
	   ? "%q2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1704 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vcle.f%%#16\t%%q0,"
	   " %%q1, %s",
	   which_alternative == 0
	   ? "%q2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1705 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vceq.f%%#16\t%%P0,"
	   " %%P1, %s",
	   which_alternative == 0
	   ? "%P2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1706 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vcgt.f%%#16\t%%P0,"
	   " %%P1, %s",
	   which_alternative == 0
	   ? "%P2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1707 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vcge.f%%#16\t%%P0,"
	   " %%P1, %s",
	   which_alternative == 0
	   ? "%P2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1708 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vclt.f%%#16\t%%P0,"
	   " %%P1, %s",
	   which_alternative == 0
	   ? "%P2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1709 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  char pattern[100];
  sprintf (pattern, "vcle.f%%#16\t%%P0,"
	   " %%P1, %s",
	   which_alternative == 0
	   ? "%P2" : "#0");
  output_asm_insn (pattern, operands);
  return "";
}
}

static const char *
output_1929 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%P0, %P2, d%c3[%c4], #0";
  }
}

static const char *
output_1930 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%P0, %P2, d%c3[%c4], #90";
  }
}

static const char *
output_1931 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%P0, %P2, d%c3[%c4], #180";
  }
}

static const char *
output_1932 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%P0, %P2, d%c3[%c4], #270";
  }
}

static const char *
output_1933 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%q0, %q2, d%c3[%c4], #0";
  }
}

static const char *
output_1934 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%q0, %q2, d%c3[%c4], #90";
  }
}

static const char *
output_1935 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%q0, %q2, d%c3[%c4], #180";
  }
}

static const char *
output_1936 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%q0, %q2, d%c3[%c4], #270";
  }
}

static const char *
output_1937 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%P0, %P2, d%c3[%c4], #0";
  }
}

static const char *
output_1938 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%P0, %P2, d%c3[%c4], #90";
  }
}

static const char *
output_1939 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%P0, %P2, d%c3[%c4], #180";
  }
}

static const char *
output_1940 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%P0, %P2, d%c3[%c4], #270";
  }
}

static const char *
output_1941 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%q0, %q2, d%c3[%c4], #0";
  }
}

static const char *
output_1942 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%q0, %q2, d%c3[%c4], #90";
  }
}

static const char *
output_1943 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%q0, %q2, d%c3[%c4], #180";
  }
}

static const char *
output_1944 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2851 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%q0, %q2, d%c3[%c4], #270";
  }
}

static const char *
output_1945 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2866 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%P0, %P2, d%c3[%c4], #0";
  }
}

static const char *
output_1946 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2866 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%P0, %P2, d%c3[%c4], #90";
  }
}

static const char *
output_1947 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2866 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%P0, %P2, d%c3[%c4], #180";
  }
}

static const char *
output_1948 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2866 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%P0, %P2, d%c3[%c4], #270";
  }
}

static const char *
output_1949 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2866 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%P0, %P2, d%c3[%c4], #0";
  }
}

static const char *
output_1950 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2866 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%P0, %P2, d%c3[%c4], #90";
  }
}

static const char *
output_1951 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2866 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%P0, %P2, d%c3[%c4], #180";
  }
}

static const char *
output_1952 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2866 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%P0, %P2, d%c3[%c4], #270";
  }
}

static const char *
output_1953 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2881 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%q0, %q2, d%c3[%c4], #0";
  }
}

static const char *
output_1954 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2881 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%q0, %q2, d%c3[%c4], #90";
  }
}

static const char *
output_1955 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2881 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%q0, %q2, d%c3[%c4], #180";
  }
}

static const char *
output_1956 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2881 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f16\t%q0, %q2, d%c3[%c4], #270";
  }
}

static const char *
output_1957 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2881 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%q0, %q2, d%c3[%c4], #0";
  }
}

static const char *
output_1958 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2881 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%q0, %q2, d%c3[%c4], #90";
  }
}

static const char *
output_1959 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2881 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%q0, %q2, d%c3[%c4], #180";
  }
}

static const char *
output_1960 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2881 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    operands = neon_vcmla_lane_prepare_operands (operands);
    return "vcmla.f32\t%q0, %q2, d%c3[%c4], #270";
  }
}

static const char *
output_1971 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2991 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = INTVAL (operands[4]);
    if (lane > GET_MODE_NUNITS (V2SImode) - 1)
      {
	operands[4] = GEN_INT (lane - GET_MODE_NUNITS (V2SImode));
	return "vsdot.s8\t%P0, %P2, %f3[%c4]";
      }
    else
      {
	operands[4] = GEN_INT (lane);
	return "vsdot.s8\t%P0, %P2, %e3[%c4]";
      }
  }
}

static const char *
output_1972 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2991 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = INTVAL (operands[4]);
    if (lane > GET_MODE_NUNITS (V2SImode) - 1)
      {
	operands[4] = GEN_INT (lane - GET_MODE_NUNITS (V2SImode));
	return "vudot.u8\t%P0, %P2, %f3[%c4]";
      }
    else
      {
	operands[4] = GEN_INT (lane);
	return "vudot.u8\t%P0, %P2, %e3[%c4]";
      }
  }
}

static const char *
output_1973 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2991 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = INTVAL (operands[4]);
    if (lane > GET_MODE_NUNITS (V2SImode) - 1)
      {
	operands[4] = GEN_INT (lane - GET_MODE_NUNITS (V2SImode));
	return "vsdot.s8\t%q0, %q2, %f3[%c4]";
      }
    else
      {
	operands[4] = GEN_INT (lane);
	return "vsdot.s8\t%q0, %q2, %e3[%c4]";
      }
  }
}

static const char *
output_1974 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 2991 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = INTVAL (operands[4]);
    if (lane > GET_MODE_NUNITS (V2SImode) - 1)
      {
	operands[4] = GEN_INT (lane - GET_MODE_NUNITS (V2SImode));
	return "vudot.u8\t%q0, %q2, %f3[%c4]";
      }
    else
      {
	operands[4] = GEN_INT (lane);
	return "vudot.u8\t%q0, %q2, %e3[%c4]";
      }
  }
}

static const char *
output_1979 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3034 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = INTVAL (operands[4]);
    if (lane > GET_MODE_NUNITS (V2SImode) - 1)
      {
	operands[4] = GEN_INT (lane - GET_MODE_NUNITS (V2SImode));
	return "vusdot.s8\t%P0, %P2, %f3[%c4]";
      }
    else
      {
	operands[4] = GEN_INT (lane);
	return "vusdot.s8\t%P0, %P2, %e3[%c4]";
      }
  }
}

static const char *
output_1980 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3034 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = INTVAL (operands[4]);
    if (lane > GET_MODE_NUNITS (V2SImode) - 1)
      {
	operands[4] = GEN_INT (lane - GET_MODE_NUNITS (V2SImode));
	return "vsudot.u8\t%P0, %P2, %f3[%c4]";
      }
    else
      {
	operands[4] = GEN_INT (lane);
	return "vsudot.u8\t%P0, %P2, %e3[%c4]";
      }
  }
}

static const char *
output_1981 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3034 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = INTVAL (operands[4]);
    if (lane > GET_MODE_NUNITS (V2SImode) - 1)
      {
	operands[4] = GEN_INT (lane - GET_MODE_NUNITS (V2SImode));
	return "vusdot.s8\t%q0, %q2, %f3[%c4]";
      }
    else
      {
	operands[4] = GEN_INT (lane);
	return "vusdot.s8\t%q0, %q2, %e3[%c4]";
      }
  }
}

static const char *
output_1982 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3034 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = INTVAL (operands[4]);
    if (lane > GET_MODE_NUNITS (V2SImode) - 1)
      {
	operands[4] = GEN_INT (lane - GET_MODE_NUNITS (V2SImode));
	return "vsudot.u8\t%q0, %q2, %f3[%c4]";
      }
    else
      {
	operands[4] = GEN_INT (lane);
	return "vsudot.u8\t%q0, %q2, %e3[%c4]";
      }
  }
}

static const char *
output_2013 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3170 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V8QImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.s8\t%0, %P1[%c2]";
}
}

static const char *
output_2014 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3170 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V4HImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.s16\t%0, %P1[%c2]";
}
}

static const char *
output_2015 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3170 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V2SImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.s32\t%0, %P1[%c2]";
}
}

static const char *
output_2016 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3170 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V2SFmode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.s32\t%0, %P1[%c2]";
}
}

static const char *
output_2017 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3189 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V8QImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.u8\t%0, %P1[%c2]";
}
}

static const char *
output_2018 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3189 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V4HImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.u16\t%0, %P1[%c2]";
}
}

static const char *
output_2019 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3189 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V2SImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.u32\t%0, %P1[%c2]";
}
}

static const char *
output_2020 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3189 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V2SFmode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.u32\t%0, %P1[%c2]";
}
}

static const char *
output_2021 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3208 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[3];
  int regno = REGNO (operands[1]);
  unsigned int halfelts = GET_MODE_NUNITS (V16QImode) / 2;
  unsigned int elt = INTVAL (operands[2]);
  unsigned int elt_adj = elt % halfelts;

  if (BYTES_BIG_ENDIAN)
    elt_adj = halfelts - 1 - elt_adj;

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V8QImode, regno + 2 * (elt / halfelts));
  ops[2] = GEN_INT (elt_adj);
  output_asm_insn ("vmov.s8\t%0, %P1[%c2]", ops);

  return "";
}
}

static const char *
output_2022 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3208 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[3];
  int regno = REGNO (operands[1]);
  unsigned int halfelts = GET_MODE_NUNITS (V8HImode) / 2;
  unsigned int elt = INTVAL (operands[2]);
  unsigned int elt_adj = elt % halfelts;

  if (BYTES_BIG_ENDIAN)
    elt_adj = halfelts - 1 - elt_adj;

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V4HImode, regno + 2 * (elt / halfelts));
  ops[2] = GEN_INT (elt_adj);
  output_asm_insn ("vmov.s16\t%0, %P1[%c2]", ops);

  return "";
}
}

static const char *
output_2023 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3208 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[3];
  int regno = REGNO (operands[1]);
  unsigned int halfelts = GET_MODE_NUNITS (V8HFmode) / 2;
  unsigned int elt = INTVAL (operands[2]);
  unsigned int elt_adj = elt % halfelts;

  if (BYTES_BIG_ENDIAN)
    elt_adj = halfelts - 1 - elt_adj;

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V4HFmode, regno + 2 * (elt / halfelts));
  ops[2] = GEN_INT (elt_adj);
  output_asm_insn ("vmov.s16\t%0, %P1[%c2]", ops);

  return "";
}
}

static const char *
output_2024 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3208 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[3];
  int regno = REGNO (operands[1]);
  unsigned int halfelts = GET_MODE_NUNITS (V4SImode) / 2;
  unsigned int elt = INTVAL (operands[2]);
  unsigned int elt_adj = elt % halfelts;

  if (BYTES_BIG_ENDIAN)
    elt_adj = halfelts - 1 - elt_adj;

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V2SImode, regno + 2 * (elt / halfelts));
  ops[2] = GEN_INT (elt_adj);
  output_asm_insn ("vmov.s32\t%0, %P1[%c2]", ops);

  return "";
}
}

static const char *
output_2025 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3208 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[3];
  int regno = REGNO (operands[1]);
  unsigned int halfelts = GET_MODE_NUNITS (V4SFmode) / 2;
  unsigned int elt = INTVAL (operands[2]);
  unsigned int elt_adj = elt % halfelts;

  if (BYTES_BIG_ENDIAN)
    elt_adj = halfelts - 1 - elt_adj;

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V2SFmode, regno + 2 * (elt / halfelts));
  ops[2] = GEN_INT (elt_adj);
  output_asm_insn ("vmov.s32\t%0, %P1[%c2]", ops);

  return "";
}
}

static const char *
output_2026 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3235 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[3];
  int regno = REGNO (operands[1]);
  unsigned int halfelts = GET_MODE_NUNITS (V16QImode) / 2;
  unsigned int elt = INTVAL (operands[2]);
  unsigned int elt_adj = elt % halfelts;

  if (BYTES_BIG_ENDIAN)
    elt_adj = halfelts - 1 - elt_adj;

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V8QImode, regno + 2 * (elt / halfelts));
  ops[2] = GEN_INT (elt_adj);
  output_asm_insn ("vmov.u8\t%0, %P1[%c2]", ops);

  return "";
}
}

static const char *
output_2027 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3235 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[3];
  int regno = REGNO (operands[1]);
  unsigned int halfelts = GET_MODE_NUNITS (V8HImode) / 2;
  unsigned int elt = INTVAL (operands[2]);
  unsigned int elt_adj = elt % halfelts;

  if (BYTES_BIG_ENDIAN)
    elt_adj = halfelts - 1 - elt_adj;

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V4HImode, regno + 2 * (elt / halfelts));
  ops[2] = GEN_INT (elt_adj);
  output_asm_insn ("vmov.u16\t%0, %P1[%c2]", ops);

  return "";
}
}

static const char *
output_2028 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3235 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[3];
  int regno = REGNO (operands[1]);
  unsigned int halfelts = GET_MODE_NUNITS (V8HFmode) / 2;
  unsigned int elt = INTVAL (operands[2]);
  unsigned int elt_adj = elt % halfelts;

  if (BYTES_BIG_ENDIAN)
    elt_adj = halfelts - 1 - elt_adj;

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V4HFmode, regno + 2 * (elt / halfelts));
  ops[2] = GEN_INT (elt_adj);
  output_asm_insn ("vmov.u16\t%0, %P1[%c2]", ops);

  return "";
}
}

static const char *
output_2029 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3235 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[3];
  int regno = REGNO (operands[1]);
  unsigned int halfelts = GET_MODE_NUNITS (V4SImode) / 2;
  unsigned int elt = INTVAL (operands[2]);
  unsigned int elt_adj = elt % halfelts;

  if (BYTES_BIG_ENDIAN)
    elt_adj = halfelts - 1 - elt_adj;

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V2SImode, regno + 2 * (elt / halfelts));
  ops[2] = GEN_INT (elt_adj);
  output_asm_insn ("vmov.u32\t%0, %P1[%c2]", ops);

  return "";
}
}

static const char *
output_2030 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3235 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[3];
  int regno = REGNO (operands[1]);
  unsigned int halfelts = GET_MODE_NUNITS (V4SFmode) / 2;
  unsigned int elt = INTVAL (operands[2]);
  unsigned int elt_adj = elt % halfelts;

  if (BYTES_BIG_ENDIAN)
    elt_adj = halfelts - 1 - elt_adj;

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V2SFmode, regno + 2 * (elt / halfelts));
  ops[2] = GEN_INT (elt_adj);
  output_asm_insn ("vmov.u32\t%0, %P1[%c2]", ops);

  return "";
}
}

static const char * const output_2039[] = {
  "vdup.32\t%P0, %1",
  "vdup.32\t%P0, %y1",
};

static const char * const output_2040[] = {
  "vdup.32\t%P0, %1",
  "vdup.32\t%P0, %y1",
};

static const char * const output_2041[] = {
  "vdup.32\t%q0, %1",
  "vdup.32\t%q0, %y1",
};

static const char * const output_2042[] = {
  "vdup.32\t%q0, %1",
  "vdup.32\t%q0, %y1",
};

static const char * const output_2043[] = {
  "vmov\t%e0, %Q1, %R1\n\tvmov\t%f0, %Q1, %R1",
  "vmov\t%e0, %P1\n\tvmov\t%f0, %P1",
};

static const char *
output_2044 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3476 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V8QImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  if (true)
    return "vdup.8\t%P0, %P1[%c2]";
  else
    return "vdup.8\t%q0, %P1[%c2]";
}
}

static const char *
output_2045 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3476 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V8QImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  if (false)
    return "vdup.8\t%P0, %P1[%c2]";
  else
    return "vdup.8\t%q0, %P1[%c2]";
}
}

static const char *
output_2046 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3476 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V4HImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  if (true)
    return "vdup.16\t%P0, %P1[%c2]";
  else
    return "vdup.16\t%q0, %P1[%c2]";
}
}

static const char *
output_2047 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3476 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V4HImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  if (false)
    return "vdup.16\t%P0, %P1[%c2]";
  else
    return "vdup.16\t%q0, %P1[%c2]";
}
}

static const char *
output_2048 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3476 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V2SImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  if (true)
    return "vdup.32\t%P0, %P1[%c2]";
  else
    return "vdup.32\t%q0, %P1[%c2]";
}
}

static const char *
output_2049 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3476 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V2SImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  if (false)
    return "vdup.32\t%P0, %P1[%c2]";
  else
    return "vdup.32\t%q0, %P1[%c2]";
}
}

static const char *
output_2050 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3476 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V2SFmode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  if (true)
    return "vdup.32\t%P0, %P1[%c2]";
  else
    return "vdup.32\t%q0, %P1[%c2]";
}
}

static const char *
output_2051 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3476 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V2SFmode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  if (false)
    return "vdup.32\t%P0, %P1[%c2]";
  else
    return "vdup.32\t%q0, %P1[%c2]";
}
}

static const char *
output_2052 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V4HFmode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  if (false)
    return "vdup.16\t%P0, %P1[%c2]";
  else
    return "vdup.16\t%q0, %P1[%c2]";
}
}

static const char *
output_2053 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V4HFmode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  if (true)
    return "vdup.16\t%P0, %P1[%c2]";
  else
    return "vdup.16\t%q0, %P1[%c2]";
}
}

static const char *
output_2054 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V4BFmode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  if (true)
    return "vdup.16\t%P0, %P1[%c2]";
  else
    return "vdup.16\t%q0, %P1[%c2]";
}
}

static const char *
output_2055 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V4BFmode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  if (false)
    return "vdup.16\t%P0, %P1[%c2]";
  else
    return "vdup.16\t%q0, %P1[%c2]";
}
}

static const char *
output_2103 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3725 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, 33);
  return "vcvt.s%#32.f32\t%P0, %P1, %2";
}
}

static const char *
output_2104 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3725 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, 33);
  return "vcvt.u%#32.f32\t%P0, %P1, %2";
}
}

static const char *
output_2105 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3725 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, 33);
  return "vcvt.s%#32.f32\t%q0, %q1, %2";
}
}

static const char *
output_2106 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3725 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, 33);
  return "vcvt.u%#32.f32\t%q0, %q1, %2";
}
}

static const char *
output_2107 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3739 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, 17);
  return "vcvt.s%#16.f16\t%q0, %q1, %2";
}
}

static const char *
output_2108 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3739 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, 17);
  return "vcvt.u%#16.f16\t%q0, %q1, %2";
}
}

static const char *
output_2109 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3739 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, 17);
  return "vcvt.s%#16.f16\t%P0, %P1, %2";
}
}

static const char *
output_2110 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3739 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, 17);
  return "vcvt.u%#16.f16\t%P0, %P1, %2";
}
}

static const char *
output_2111 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, 33);
  return "vcvt.f32.s%#32\t%P0, %P1, %2";
}
}

static const char *
output_2112 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, 33);
  return "vcvt.f32.u%#32\t%P0, %P1, %2";
}
}

static const char *
output_2113 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, 33);
  return "vcvt.f32.s%#32\t%q0, %q1, %2";
}
}

static const char *
output_2114 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, 33);
  return "vcvt.f32.u%#32\t%q0, %q1, %2";
}
}

static const char *
output_2115 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3766 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, 17);
  return "vcvt.f16.s%#16\t%P0, %P1, %2";
}
}

static const char *
output_2116 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3766 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, 17);
  return "vcvt.f16.u%#16\t%P0, %P1, %2";
}
}

static const char *
output_2117 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3766 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, 17);
  return "vcvt.f16.s%#16\t%q0, %q1, %2";
}
}

static const char *
output_2118 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3766 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, 17);
  return "vcvt.f16.u%#16\t%q0, %q1, %2";
}
}

static const char *
output_2153 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3828 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmul.i16\t%P0, %P1, %P2[%c3]";
}
}

static const char *
output_2154 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3828 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmul.i32\t%P0, %P1, %P2[%c3]";
}
}

static const char *
output_2155 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3828 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmul.f32\t%P0, %P1, %P2[%c3]";
}
}

static const char *
output_2156 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3845 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmul.i16\t%q0, %q1, %P2[%c3]";
}
}

static const char *
output_2157 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3845 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmul.i32\t%q0, %q1, %P2[%c3]";
}
}

static const char *
output_2158 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3845 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmul.f32\t%q0, %q1, %P2[%c3]";
}
}

static const char *
output_2161 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3874 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmull.s%#16\t%q0, %P1, %P2[%c3]";
}
}

static const char *
output_2162 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3874 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmull.u%#16\t%q0, %P1, %P2[%c3]";
}
}

static const char *
output_2163 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3874 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmull.s%#32\t%q0, %P1, %P2[%c3]";
}
}

static const char *
output_2164 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3874 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmull.u%#32\t%q0, %P1, %P2[%c3]";
}
}

static const char *
output_2165 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3888 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vqdmull.s16\t%q0, %P1, %P2[%c3]";
}
}

static const char *
output_2166 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3888 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vqdmull.s32\t%q0, %P1, %P2[%c3]";
}
}

static const char *
output_2167 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3902 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vqdmulh.s16\t%q0, %q1, %P2[%c3]";
}
}

static const char *
output_2168 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3902 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vqrdmulh.s16\t%q0, %q1, %P2[%c3]";
}
}

static const char *
output_2169 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3902 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vqdmulh.s32\t%q0, %q1, %P2[%c3]";
}
}

static const char *
output_2170 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3902 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vqrdmulh.s32\t%q0, %q1, %P2[%c3]";
}
}

static const char *
output_2171 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3916 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vqdmulh.s16\t%P0, %P1, %P2[%c3]";
}
}

static const char *
output_2172 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3916 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vqrdmulh.s16\t%P0, %P1, %P2[%c3]";
}
}

static const char *
output_2173 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3916 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vqdmulh.s32\t%P0, %P1, %P2[%c3]";
}
}

static const char *
output_2174 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3916 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vqrdmulh.s32\t%P0, %P1, %P2[%c3]";
}
}

static const char *
output_2175 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3932 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return
   "vqrdmlah.s16\t%q0, %q2, %P3[%c4]";
}
}

static const char *
output_2176 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3932 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return
   "vqrdmlsh.s16\t%q0, %q2, %P3[%c4]";
}
}

static const char *
output_2177 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3932 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return
   "vqrdmlah.s32\t%q0, %q2, %P3[%c4]";
}
}

static const char *
output_2178 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3932 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return
   "vqrdmlsh.s32\t%q0, %q2, %P3[%c4]";
}
}

static const char *
output_2179 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3948 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return
   "vqrdmlah.s16\t%P0, %P2, %P3[%c4]";
}
}

static const char *
output_2180 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3948 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return
   "vqrdmlsh.s16\t%P0, %P2, %P3[%c4]";
}
}

static const char *
output_2181 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3948 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return
   "vqrdmlah.s32\t%P0, %P2, %P3[%c4]";
}
}

static const char *
output_2182 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3948 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return
   "vqrdmlsh.s32\t%P0, %P2, %P3[%c4]";
}
}

static const char *
output_2183 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3964 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmla.i16\t%P0, %P2, %P3[%c4]";
}
}

static const char *
output_2184 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3964 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmla.i32\t%P0, %P2, %P3[%c4]";
}
}

static const char *
output_2185 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3964 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmla.f32\t%P0, %P2, %P3[%c4]";
}
}

static const char *
output_2186 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3982 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmla.i16\t%q0, %q2, %P3[%c4]";
}
}

static const char *
output_2187 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3982 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmla.i32\t%q0, %q2, %P3[%c4]";
}
}

static const char *
output_2188 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3982 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmla.f32\t%q0, %q2, %P3[%c4]";
}
}

static const char *
output_2189 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4000 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmlal.s%#16\t%q0, %P2, %P3[%c4]";
}
}

static const char *
output_2190 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4000 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmlal.u%#16\t%q0, %P2, %P3[%c4]";
}
}

static const char *
output_2191 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4000 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmlal.s%#32\t%q0, %P2, %P3[%c4]";
}
}

static const char *
output_2192 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4000 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmlal.u%#32\t%q0, %P2, %P3[%c4]";
}
}

static const char *
output_2193 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4015 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vqdmlal.s16\t%q0, %P2, %P3[%c4]";
}
}

static const char *
output_2194 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4015 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vqdmlal.s32\t%q0, %P2, %P3[%c4]";
}
}

static const char *
output_2195 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmls.i16\t%P0, %P2, %P3[%c4]";
}
}

static const char *
output_2196 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmls.i32\t%P0, %P2, %P3[%c4]";
}
}

static const char *
output_2197 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmls.f32\t%P0, %P2, %P3[%c4]";
}
}

static const char *
output_2198 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4048 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmls.i16\t%q0, %q2, %P3[%c4]";
}
}

static const char *
output_2199 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4048 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmls.i32\t%q0, %q2, %P3[%c4]";
}
}

static const char *
output_2200 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4048 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmls.f32\t%q0, %q2, %P3[%c4]";
}
}

static const char *
output_2201 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4066 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmlsl.s%#16\t%q0, %P2, %P3[%c4]";
}
}

static const char *
output_2202 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4066 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmlsl.u%#16\t%q0, %P2, %P3[%c4]";
}
}

static const char *
output_2203 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4066 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmlsl.s%#32\t%q0, %P2, %P3[%c4]";
}
}

static const char *
output_2204 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4066 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vmlsl.u%#32\t%q0, %P2, %P3[%c4]";
}
}

static const char *
output_2205 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4081 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vqdmlsl.s16\t%q0, %P2, %P3[%c4]";
}
}

static const char *
output_2206 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4081 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vqdmlsl.s32\t%q0, %P2, %P3[%c4]";
}
}

static const char *
output_2207 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, GET_MODE_NUNITS (V8QImode));
  return "vext.8\t%P0, %P1, %P2, %3";
}
}

static const char *
output_2208 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, GET_MODE_NUNITS (V16QImode));
  return "vext.8\t%q0, %q1, %q2, %3";
}
}

static const char *
output_2209 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, GET_MODE_NUNITS (V4HImode));
  return "vext.16\t%P0, %P1, %P2, %3";
}
}

static const char *
output_2210 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, GET_MODE_NUNITS (V8HImode));
  return "vext.16\t%q0, %q1, %q2, %3";
}
}

static const char *
output_2211 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, GET_MODE_NUNITS (V2SImode));
  return "vext.32\t%P0, %P1, %P2, %3";
}
}

static const char *
output_2212 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, GET_MODE_NUNITS (V4SImode));
  return "vext.32\t%q0, %q1, %q2, %3";
}
}

static const char *
output_2213 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, GET_MODE_NUNITS (V4HFmode));
  return "vext.16\t%P0, %P1, %P2, %3";
}
}

static const char *
output_2214 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, GET_MODE_NUNITS (V8HFmode));
  return "vext.16\t%q0, %q1, %q2, %3";
}
}

static const char *
output_2215 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, GET_MODE_NUNITS (V4BFmode));
  return "vext.16\t%P0, %P1, %P2, %3";
}
}

static const char *
output_2216 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, GET_MODE_NUNITS (V8BFmode));
  return "vext.16\t%q0, %q1, %q2, %3";
}
}

static const char *
output_2217 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, GET_MODE_NUNITS (V2SFmode));
  return "vext.32\t%P0, %P1, %P2, %3";
}
}

static const char *
output_2218 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, GET_MODE_NUNITS (V4SFmode));
  return "vext.32\t%q0, %q1, %q2, %3";
}
}

static const char *
output_2219 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, GET_MODE_NUNITS (DImode));
  return "vext.64\t%P0, %P1, %P2, %3";
}
}

static const char *
output_2220 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, GET_MODE_NUNITS (V2DImode));
  return "vext.64\t%q0, %q1, %q2, %3";
}
}

static const char * const output_2238[] = {
  "vbsl\t%P0, %P2, %P3",
  "vbit\t%P0, %P2, %P1",
  "vbif\t%P0, %P3, %P1",
};

static const char * const output_2239[] = {
  "vbsl\t%q0, %q2, %q3",
  "vbit\t%q0, %q2, %q1",
  "vbif\t%q0, %q3, %q1",
};

static const char * const output_2240[] = {
  "vbsl\t%P0, %P2, %P3",
  "vbit\t%P0, %P2, %P1",
  "vbif\t%P0, %P3, %P1",
};

static const char * const output_2241[] = {
  "vbsl\t%q0, %q2, %q3",
  "vbit\t%q0, %q2, %q1",
  "vbif\t%q0, %q3, %q1",
};

static const char * const output_2242[] = {
  "vbsl\t%P0, %P2, %P3",
  "vbit\t%P0, %P2, %P1",
  "vbif\t%P0, %P3, %P1",
};

static const char * const output_2243[] = {
  "vbsl\t%q0, %q2, %q3",
  "vbit\t%q0, %q2, %q1",
  "vbif\t%q0, %q3, %q1",
};

static const char * const output_2244[] = {
  "vbsl\t%P0, %P2, %P3",
  "vbit\t%P0, %P2, %P1",
  "vbif\t%P0, %P3, %P1",
};

static const char * const output_2245[] = {
  "vbsl\t%q0, %q2, %q3",
  "vbit\t%q0, %q2, %q1",
  "vbif\t%q0, %q3, %q1",
};

static const char * const output_2246[] = {
  "vbsl\t%P0, %P2, %P3",
  "vbit\t%P0, %P2, %P1",
  "vbif\t%P0, %P3, %P1",
};

static const char * const output_2247[] = {
  "vbsl\t%q0, %q2, %q3",
  "vbit\t%q0, %q2, %q1",
  "vbif\t%q0, %q3, %q1",
};

static const char * const output_2248[] = {
  "vbsl\t%P0, %P2, %P3",
  "vbit\t%P0, %P2, %P1",
  "vbif\t%P0, %P3, %P1",
};

static const char * const output_2249[] = {
  "vbsl\t%q0, %q2, %q3",
  "vbit\t%q0, %q2, %q1",
  "vbif\t%q0, %q3, %q1",
};

static const char * const output_2250[] = {
  "vbsl\t%P0, %P2, %P3",
  "vbit\t%P0, %P2, %P1",
  "vbif\t%P0, %P3, %P1",
};

static const char * const output_2251[] = {
  "vbsl\t%q0, %q2, %q3",
  "vbit\t%q0, %q2, %q1",
  "vbif\t%q0, %q3, %q1",
};

static const char *
output_2316 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8QImode) + 1);
  return "vshr.s%#8\t%P0, %P1, %2";
}
}

static const char *
output_2317 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8QImode) + 1);
  return "vshr.u%#8\t%P0, %P1, %2";
}
}

static const char *
output_2318 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8QImode) + 1);
  return "vrshr.s%#8\t%P0, %P1, %2";
}
}

static const char *
output_2319 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8QImode) + 1);
  return "vrshr.u%#8\t%P0, %P1, %2";
}
}

static const char *
output_2320 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V16QImode) + 1);
  return "vshr.s%#8\t%q0, %q1, %2";
}
}

static const char *
output_2321 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V16QImode) + 1);
  return "vshr.u%#8\t%q0, %q1, %2";
}
}

static const char *
output_2322 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V16QImode) + 1);
  return "vrshr.s%#8\t%q0, %q1, %2";
}
}

static const char *
output_2323 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V16QImode) + 1);
  return "vrshr.u%#8\t%q0, %q1, %2";
}
}

static const char *
output_2324 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4HImode) + 1);
  return "vshr.s%#16\t%P0, %P1, %2";
}
}

static const char *
output_2325 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4HImode) + 1);
  return "vshr.u%#16\t%P0, %P1, %2";
}
}

static const char *
output_2326 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4HImode) + 1);
  return "vrshr.s%#16\t%P0, %P1, %2";
}
}

static const char *
output_2327 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4HImode) + 1);
  return "vrshr.u%#16\t%P0, %P1, %2";
}
}

static const char *
output_2328 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8HImode) + 1);
  return "vshr.s%#16\t%q0, %q1, %2";
}
}

static const char *
output_2329 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8HImode) + 1);
  return "vshr.u%#16\t%q0, %q1, %2";
}
}

static const char *
output_2330 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8HImode) + 1);
  return "vrshr.s%#16\t%q0, %q1, %2";
}
}

static const char *
output_2331 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8HImode) + 1);
  return "vrshr.u%#16\t%q0, %q1, %2";
}
}

static const char *
output_2332 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2SImode) + 1);
  return "vshr.s%#32\t%P0, %P1, %2";
}
}

static const char *
output_2333 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2SImode) + 1);
  return "vshr.u%#32\t%P0, %P1, %2";
}
}

static const char *
output_2334 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2SImode) + 1);
  return "vrshr.s%#32\t%P0, %P1, %2";
}
}

static const char *
output_2335 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2SImode) + 1);
  return "vrshr.u%#32\t%P0, %P1, %2";
}
}

static const char *
output_2336 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4SImode) + 1);
  return "vshr.s%#32\t%q0, %q1, %2";
}
}

static const char *
output_2337 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4SImode) + 1);
  return "vshr.u%#32\t%q0, %q1, %2";
}
}

static const char *
output_2338 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4SImode) + 1);
  return "vrshr.s%#32\t%q0, %q1, %2";
}
}

static const char *
output_2339 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4SImode) + 1);
  return "vrshr.u%#32\t%q0, %q1, %2";
}
}

static const char *
output_2340 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (DImode) + 1);
  return "vshr.s%#64\t%P0, %P1, %2";
}
}

static const char *
output_2341 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (DImode) + 1);
  return "vshr.u%#64\t%P0, %P1, %2";
}
}

static const char *
output_2342 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (DImode) + 1);
  return "vrshr.s%#64\t%P0, %P1, %2";
}
}

static const char *
output_2343 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (DImode) + 1);
  return "vrshr.u%#64\t%P0, %P1, %2";
}
}

static const char *
output_2344 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2DImode) + 1);
  return "vshr.s%#64\t%q0, %q1, %2";
}
}

static const char *
output_2345 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2DImode) + 1);
  return "vshr.u%#64\t%q0, %q1, %2";
}
}

static const char *
output_2346 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2DImode) + 1);
  return "vrshr.s%#64\t%q0, %q1, %2";
}
}

static const char *
output_2347 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4468 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2DImode) + 1);
  return "vrshr.u%#64\t%q0, %q1, %2";
}
}

static const char *
output_2348 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4482 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8HImode) / 2 + 1);
  return "vshrn.i16\t%P0, %q1, %2";
}
}

static const char *
output_2349 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4482 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8HImode) / 2 + 1);
  return "vrshrn.i16\t%P0, %q1, %2";
}
}

static const char *
output_2350 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4482 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4SImode) / 2 + 1);
  return "vshrn.i32\t%P0, %q1, %2";
}
}

static const char *
output_2351 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4482 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4SImode) / 2 + 1);
  return "vrshrn.i32\t%P0, %q1, %2";
}
}

static const char *
output_2352 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4482 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2DImode) / 2 + 1);
  return "vshrn.i64\t%P0, %q1, %2";
}
}

static const char *
output_2353 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4482 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2DImode) / 2 + 1);
  return "vrshrn.i64\t%P0, %q1, %2";
}
}

static const char *
output_2354 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8HImode) / 2 + 1);
  return "vqshrn.s%#16\t%P0, %q1, %2";
}
}

static const char *
output_2355 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8HImode) / 2 + 1);
  return "vqshrn.u%#16\t%P0, %q1, %2";
}
}

static const char *
output_2356 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8HImode) / 2 + 1);
  return "vqrshrn.s%#16\t%P0, %q1, %2";
}
}

static const char *
output_2357 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8HImode) / 2 + 1);
  return "vqrshrn.u%#16\t%P0, %q1, %2";
}
}

static const char *
output_2358 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4SImode) / 2 + 1);
  return "vqshrn.s%#32\t%P0, %q1, %2";
}
}

static const char *
output_2359 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4SImode) / 2 + 1);
  return "vqshrn.u%#32\t%P0, %q1, %2";
}
}

static const char *
output_2360 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4SImode) / 2 + 1);
  return "vqrshrn.s%#32\t%P0, %q1, %2";
}
}

static const char *
output_2361 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4SImode) / 2 + 1);
  return "vqrshrn.u%#32\t%P0, %q1, %2";
}
}

static const char *
output_2362 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2DImode) / 2 + 1);
  return "vqshrn.s%#64\t%P0, %q1, %2";
}
}

static const char *
output_2363 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2DImode) / 2 + 1);
  return "vqshrn.u%#64\t%P0, %q1, %2";
}
}

static const char *
output_2364 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2DImode) / 2 + 1);
  return "vqrshrn.s%#64\t%P0, %q1, %2";
}
}

static const char *
output_2365 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2DImode) / 2 + 1);
  return "vqrshrn.u%#64\t%P0, %q1, %2";
}
}

static const char *
output_2366 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4510 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8HImode) / 2 + 1);
  return "vqshrun.s16\t%P0, %q1, %2";
}
}

static const char *
output_2367 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4510 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V8HImode) / 2 + 1);
  return "vqrshrun.s16\t%P0, %q1, %2";
}
}

static const char *
output_2368 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4510 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4SImode) / 2 + 1);
  return "vqshrun.s32\t%P0, %q1, %2";
}
}

static const char *
output_2369 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4510 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V4SImode) / 2 + 1);
  return "vqrshrun.s32\t%P0, %q1, %2";
}
}

static const char *
output_2370 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4510 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2DImode) / 2 + 1);
  return "vqshrun.s64\t%P0, %q1, %2";
}
}

static const char *
output_2371 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4510 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 1, neon_element_bits (V2DImode) / 2 + 1);
  return "vqrshrun.s64\t%P0, %q1, %2";
}
}

static const char *
output_2372 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V8QImode));
  return "vshl.i8\t%P0, %P1, %2";
}
}

static const char *
output_2373 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V16QImode));
  return "vshl.i8\t%q0, %q1, %2";
}
}

static const char *
output_2374 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V4HImode));
  return "vshl.i16\t%P0, %P1, %2";
}
}

static const char *
output_2375 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V8HImode));
  return "vshl.i16\t%q0, %q1, %2";
}
}

static const char *
output_2376 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V2SImode));
  return "vshl.i32\t%P0, %P1, %2";
}
}

static const char *
output_2377 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V4SImode));
  return "vshl.i32\t%q0, %q1, %2";
}
}

static const char *
output_2378 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (DImode));
  return "vshl.i64\t%P0, %P1, %2";
}
}

static const char *
output_2379 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V2DImode));
  return "vshl.i64\t%q0, %q1, %2";
}
}

static const char *
output_2380 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V8QImode));
  return "vqshl.s%#8\t%P0, %P1, %2";
}
}

static const char *
output_2381 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V8QImode));
  return "vqshl.u%#8\t%P0, %P1, %2";
}
}

static const char *
output_2382 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V16QImode));
  return "vqshl.s%#8\t%q0, %q1, %2";
}
}

static const char *
output_2383 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V16QImode));
  return "vqshl.u%#8\t%q0, %q1, %2";
}
}

static const char *
output_2384 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V4HImode));
  return "vqshl.s%#16\t%P0, %P1, %2";
}
}

static const char *
output_2385 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V4HImode));
  return "vqshl.u%#16\t%P0, %P1, %2";
}
}

static const char *
output_2386 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V8HImode));
  return "vqshl.s%#16\t%q0, %q1, %2";
}
}

static const char *
output_2387 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V8HImode));
  return "vqshl.u%#16\t%q0, %q1, %2";
}
}

static const char *
output_2388 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V2SImode));
  return "vqshl.s%#32\t%P0, %P1, %2";
}
}

static const char *
output_2389 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V2SImode));
  return "vqshl.u%#32\t%P0, %P1, %2";
}
}

static const char *
output_2390 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V4SImode));
  return "vqshl.s%#32\t%q0, %q1, %2";
}
}

static const char *
output_2391 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V4SImode));
  return "vqshl.u%#32\t%q0, %q1, %2";
}
}

static const char *
output_2392 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (DImode));
  return "vqshl.s%#64\t%P0, %P1, %2";
}
}

static const char *
output_2393 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (DImode));
  return "vqshl.u%#64\t%P0, %P1, %2";
}
}

static const char *
output_2394 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V2DImode));
  return "vqshl.s%#64\t%q0, %q1, %2";
}
}

static const char *
output_2395 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V2DImode));
  return "vqshl.u%#64\t%q0, %q1, %2";
}
}

static const char *
output_2396 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4549 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V8QImode));
  return "vqshlu.s8\t%P0, %P1, %2";
}
}

static const char *
output_2397 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4549 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V16QImode));
  return "vqshlu.s8\t%q0, %q1, %2";
}
}

static const char *
output_2398 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4549 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V4HImode));
  return "vqshlu.s16\t%P0, %P1, %2";
}
}

static const char *
output_2399 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4549 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V8HImode));
  return "vqshlu.s16\t%q0, %q1, %2";
}
}

static const char *
output_2400 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4549 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V2SImode));
  return "vqshlu.s32\t%P0, %P1, %2";
}
}

static const char *
output_2401 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4549 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V4SImode));
  return "vqshlu.s32\t%q0, %q1, %2";
}
}

static const char *
output_2402 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4549 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (DImode));
  return "vqshlu.s64\t%P0, %P1, %2";
}
}

static const char *
output_2403 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4549 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[2], 0, neon_element_bits (V2DImode));
  return "vqshlu.s64\t%q0, %q1, %2";
}
}

static const char *
output_2404 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4562 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  /* The boundaries are: 0 < imm <= size.  */
  arm_const_bounds (operands[2], 0, neon_element_bits (V8QImode) + 1);
  return "vshll.s%#8\t%q0, %P1, %2";
}
}

static const char *
output_2405 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4562 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  /* The boundaries are: 0 < imm <= size.  */
  arm_const_bounds (operands[2], 0, neon_element_bits (V8QImode) + 1);
  return "vshll.u%#8\t%q0, %P1, %2";
}
}

static const char *
output_2406 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4562 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  /* The boundaries are: 0 < imm <= size.  */
  arm_const_bounds (operands[2], 0, neon_element_bits (V4HImode) + 1);
  return "vshll.s%#16\t%q0, %P1, %2";
}
}

static const char *
output_2407 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4562 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  /* The boundaries are: 0 < imm <= size.  */
  arm_const_bounds (operands[2], 0, neon_element_bits (V4HImode) + 1);
  return "vshll.u%#16\t%q0, %P1, %2";
}
}

static const char *
output_2408 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4562 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  /* The boundaries are: 0 < imm <= size.  */
  arm_const_bounds (operands[2], 0, neon_element_bits (V2SImode) + 1);
  return "vshll.s%#32\t%q0, %P1, %2";
}
}

static const char *
output_2409 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4562 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  /* The boundaries are: 0 < imm <= size.  */
  arm_const_bounds (operands[2], 0, neon_element_bits (V2SImode) + 1);
  return "vshll.u%#32\t%q0, %P1, %2";
}
}

static const char *
output_2410 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V8QImode) + 1);
  return "vsra.s%#8\t%P0, %P2, %3";
}
}

static const char *
output_2411 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V8QImode) + 1);
  return "vsra.u%#8\t%P0, %P2, %3";
}
}

static const char *
output_2412 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V8QImode) + 1);
  return "vrsra.s%#8\t%P0, %P2, %3";
}
}

static const char *
output_2413 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V8QImode) + 1);
  return "vrsra.u%#8\t%P0, %P2, %3";
}
}

static const char *
output_2414 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V16QImode) + 1);
  return "vsra.s%#8\t%q0, %q2, %3";
}
}

static const char *
output_2415 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V16QImode) + 1);
  return "vsra.u%#8\t%q0, %q2, %3";
}
}

static const char *
output_2416 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V16QImode) + 1);
  return "vrsra.s%#8\t%q0, %q2, %3";
}
}

static const char *
output_2417 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V16QImode) + 1);
  return "vrsra.u%#8\t%q0, %q2, %3";
}
}

static const char *
output_2418 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V4HImode) + 1);
  return "vsra.s%#16\t%P0, %P2, %3";
}
}

static const char *
output_2419 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V4HImode) + 1);
  return "vsra.u%#16\t%P0, %P2, %3";
}
}

static const char *
output_2420 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V4HImode) + 1);
  return "vrsra.s%#16\t%P0, %P2, %3";
}
}

static const char *
output_2421 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V4HImode) + 1);
  return "vrsra.u%#16\t%P0, %P2, %3";
}
}

static const char *
output_2422 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V8HImode) + 1);
  return "vsra.s%#16\t%q0, %q2, %3";
}
}

static const char *
output_2423 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V8HImode) + 1);
  return "vsra.u%#16\t%q0, %q2, %3";
}
}

static const char *
output_2424 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V8HImode) + 1);
  return "vrsra.s%#16\t%q0, %q2, %3";
}
}

static const char *
output_2425 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V8HImode) + 1);
  return "vrsra.u%#16\t%q0, %q2, %3";
}
}

static const char *
output_2426 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V2SImode) + 1);
  return "vsra.s%#32\t%P0, %P2, %3";
}
}

static const char *
output_2427 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V2SImode) + 1);
  return "vsra.u%#32\t%P0, %P2, %3";
}
}

static const char *
output_2428 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V2SImode) + 1);
  return "vrsra.s%#32\t%P0, %P2, %3";
}
}

static const char *
output_2429 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V2SImode) + 1);
  return "vrsra.u%#32\t%P0, %P2, %3";
}
}

static const char *
output_2430 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V4SImode) + 1);
  return "vsra.s%#32\t%q0, %q2, %3";
}
}

static const char *
output_2431 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V4SImode) + 1);
  return "vsra.u%#32\t%q0, %q2, %3";
}
}

static const char *
output_2432 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V4SImode) + 1);
  return "vrsra.s%#32\t%q0, %q2, %3";
}
}

static const char *
output_2433 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V4SImode) + 1);
  return "vrsra.u%#32\t%q0, %q2, %3";
}
}

static const char *
output_2434 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (DImode) + 1);
  return "vsra.s%#64\t%P0, %P2, %3";
}
}

static const char *
output_2435 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (DImode) + 1);
  return "vsra.u%#64\t%P0, %P2, %3";
}
}

static const char *
output_2436 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (DImode) + 1);
  return "vrsra.s%#64\t%P0, %P2, %3";
}
}

static const char *
output_2437 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (DImode) + 1);
  return "vrsra.u%#64\t%P0, %P2, %3";
}
}

static const char *
output_2438 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V2DImode) + 1);
  return "vsra.s%#64\t%q0, %q2, %3";
}
}

static const char *
output_2439 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V2DImode) + 1);
  return "vsra.u%#64\t%q0, %q2, %3";
}
}

static const char *
output_2440 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V2DImode) + 1);
  return "vrsra.s%#64\t%q0, %q2, %3";
}
}

static const char *
output_2441 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V2DImode) + 1);
  return "vrsra.u%#64\t%q0, %q2, %3";
}
}

static const char *
output_2442 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4592 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V8QImode) + 1);
  return "vsri.8\t%P0, %P2, %3";
}
}

static const char *
output_2443 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4592 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V16QImode) + 1);
  return "vsri.8\t%q0, %q2, %3";
}
}

static const char *
output_2444 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4592 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V4HImode) + 1);
  return "vsri.16\t%P0, %P2, %3";
}
}

static const char *
output_2445 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4592 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V8HImode) + 1);
  return "vsri.16\t%q0, %q2, %3";
}
}

static const char *
output_2446 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4592 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V2SImode) + 1);
  return "vsri.32\t%P0, %P2, %3";
}
}

static const char *
output_2447 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4592 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V4SImode) + 1);
  return "vsri.32\t%q0, %q2, %3";
}
}

static const char *
output_2448 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4592 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (DImode) + 1);
  return "vsri.64\t%P0, %P2, %3";
}
}

static const char *
output_2449 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4592 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 1, neon_element_bits (V2DImode) + 1);
  return "vsri.64\t%q0, %q2, %3";
}
}

static const char *
output_2450 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4606 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, neon_element_bits (V8QImode));
  return "vsli.8\t%P0, %P2, %3";
}
}

static const char *
output_2451 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4606 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, neon_element_bits (V16QImode));
  return "vsli.8\t%q0, %q2, %3";
}
}

static const char *
output_2452 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4606 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, neon_element_bits (V4HImode));
  return "vsli.16\t%P0, %P2, %3";
}
}

static const char *
output_2453 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4606 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, neon_element_bits (V8HImode));
  return "vsli.16\t%q0, %q2, %3";
}
}

static const char *
output_2454 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4606 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, neon_element_bits (V2SImode));
  return "vsli.32\t%P0, %P2, %3";
}
}

static const char *
output_2455 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4606 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, neon_element_bits (V4SImode));
  return "vsli.32\t%q0, %q2, %3";
}
}

static const char *
output_2456 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4606 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, neon_element_bits (DImode));
  return "vsli.64\t%P0, %P2, %3";
}
}

static const char *
output_2457 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4606 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  arm_const_bounds (operands[3], 0, neon_element_bits (V2DImode));
  return "vsli.64\t%q0, %q2, %3";
}
}

static const char *
output_2459 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4629 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[4];
  int tabbase = REGNO (operands[1]);

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V8QImode, tabbase);
  ops[2] = gen_rtx_REG (V8QImode, tabbase + 2);
  ops[3] = operands[2];
  output_asm_insn ("vtbl.8\t%P0, {%P1, %P2}, %P3", ops);

  return "";
}
}

static const char *
output_2460 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4650 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[5];
  int tabbase = REGNO (operands[1]);

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V8QImode, tabbase);
  ops[2] = gen_rtx_REG (V8QImode, tabbase + 2);
  ops[3] = gen_rtx_REG (V8QImode, tabbase + 4);
  ops[4] = operands[2];
  output_asm_insn ("vtbl.8\t%P0, {%P1, %P2, %P3}, %P4", ops);

  return "";
}
}

static const char *
output_2461 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4672 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[6];
  int tabbase = REGNO (operands[1]);

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V8QImode, tabbase);
  ops[2] = gen_rtx_REG (V8QImode, tabbase + 2);
  ops[3] = gen_rtx_REG (V8QImode, tabbase + 4);
  ops[4] = gen_rtx_REG (V8QImode, tabbase + 6);
  ops[5] = operands[2];
  output_asm_insn ("vtbl.8\t%P0, {%P1, %P2, %P3, %P4}, %P5", ops);

  return "";
}
}

static const char *
output_2466 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4790 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[4];
  int tabbase = REGNO (operands[2]);

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V8QImode, tabbase);
  ops[2] = gen_rtx_REG (V8QImode, tabbase + 2);
  ops[3] = operands[3];
  output_asm_insn ("vtbx.8\t%P0, {%P1, %P2}, %P3", ops);

  return "";
}
}

static const char *
output_2467 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4812 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[5];
  int tabbase = REGNO (operands[2]);

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V8QImode, tabbase);
  ops[2] = gen_rtx_REG (V8QImode, tabbase + 2);
  ops[3] = gen_rtx_REG (V8QImode, tabbase + 4);
  ops[4] = operands[3];
  output_asm_insn ("vtbx.8\t%P0, {%P1, %P2, %P3}, %P4", ops);

  return "";
}
}

static const char *
output_2468 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4835 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  rtx ops[6];
  int tabbase = REGNO (operands[2]);

  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (V8QImode, tabbase);
  ops[2] = gen_rtx_REG (V8QImode, tabbase + 2);
  ops[3] = gen_rtx_REG (V8QImode, tabbase + 4);
  ops[4] = gen_rtx_REG (V8QImode, tabbase + 6);
  ops[5] = operands[3];
  output_asm_insn ("vtbx.8\t%P0, {%P1, %P2, %P3, %P4}, %P5", ops);

  return "";
}
}

static const char *
output_2513 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4955 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8QImode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8QImode);
  operands[3] = GEN_INT (lane);
  if (max == 1)
    return "vld1.8\t%P0, %A1";
  else
    return "vld1.8\t{%P0[%c3]}, %A1";
}
}

static const char *
output_2514 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4955 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4HImode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4HImode);
  operands[3] = GEN_INT (lane);
  if (max == 1)
    return "vld1.16\t%P0, %A1";
  else
    return "vld1.16\t{%P0[%c3]}, %A1";
}
}

static const char *
output_2515 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4955 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4HFmode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4HFmode);
  operands[3] = GEN_INT (lane);
  if (max == 1)
    return "vld1.16\t%P0, %A1";
  else
    return "vld1.16\t{%P0[%c3]}, %A1";
}
}

static const char *
output_2516 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4955 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4BFmode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4BFmode);
  operands[3] = GEN_INT (lane);
  if (max == 1)
    return "vld1.16\t%P0, %A1";
  else
    return "vld1.16\t{%P0[%c3]}, %A1";
}
}

static const char *
output_2517 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4955 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2SImode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V2SImode);
  operands[3] = GEN_INT (lane);
  if (max == 1)
    return "vld1.32\t%P0, %A1";
  else
    return "vld1.32\t{%P0[%c3]}, %A1";
}
}

static const char *
output_2518 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4955 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2SFmode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V2SFmode);
  operands[3] = GEN_INT (lane);
  if (max == 1)
    return "vld1.32\t%P0, %A1";
  else
    return "vld1.32\t{%P0[%c3]}, %A1";
}
}

static const char *
output_2519 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4955 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(DImode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (DImode);
  operands[3] = GEN_INT (lane);
  if (max == 1)
    return "vld1.64\t%P0, %A1";
  else
    return "vld1.64\t{%P0[%c3]}, %A1";
}
}

static const char *
output_2520 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4976 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V16QImode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V16QImode);
  operands[3] = GEN_INT (lane);
  int regno = REGNO (operands[0]);
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
      operands[3] = GEN_INT (lane);
    }
  operands[0] = gen_rtx_REG (V8QImode, regno);
  if (max == 2)
    return "vld1.8\t%P0, %A1";
  else
    return "vld1.8\t{%P0[%c3]}, %A1";
}
}

static const char *
output_2521 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4976 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HImode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HImode);
  operands[3] = GEN_INT (lane);
  int regno = REGNO (operands[0]);
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
      operands[3] = GEN_INT (lane);
    }
  operands[0] = gen_rtx_REG (V4HImode, regno);
  if (max == 2)
    return "vld1.16\t%P0, %A1";
  else
    return "vld1.16\t{%P0[%c3]}, %A1";
}
}

static const char *
output_2522 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4976 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HFmode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HFmode);
  operands[3] = GEN_INT (lane);
  int regno = REGNO (operands[0]);
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
      operands[3] = GEN_INT (lane);
    }
  operands[0] = gen_rtx_REG (V4HFmode, regno);
  if (max == 2)
    return "vld1.16\t%P0, %A1";
  else
    return "vld1.16\t{%P0[%c3]}, %A1";
}
}

static const char *
output_2523 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4976 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8BFmode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8BFmode);
  operands[3] = GEN_INT (lane);
  int regno = REGNO (operands[0]);
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
      operands[3] = GEN_INT (lane);
    }
  operands[0] = gen_rtx_REG (V4BFmode, regno);
  if (max == 2)
    return "vld1.16\t%P0, %A1";
  else
    return "vld1.16\t{%P0[%c3]}, %A1";
}
}

static const char *
output_2524 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4976 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SImode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SImode);
  operands[3] = GEN_INT (lane);
  int regno = REGNO (operands[0]);
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
      operands[3] = GEN_INT (lane);
    }
  operands[0] = gen_rtx_REG (V2SImode, regno);
  if (max == 2)
    return "vld1.32\t%P0, %A1";
  else
    return "vld1.32\t{%P0[%c3]}, %A1";
}
}

static const char *
output_2525 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4976 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SFmode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SFmode);
  operands[3] = GEN_INT (lane);
  int regno = REGNO (operands[0]);
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
      operands[3] = GEN_INT (lane);
    }
  operands[0] = gen_rtx_REG (V2SFmode, regno);
  if (max == 2)
    return "vld1.32\t%P0, %A1";
  else
    return "vld1.32\t{%P0[%c3]}, %A1";
}
}

static const char *
output_2526 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4976 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2DImode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V2DImode);
  operands[3] = GEN_INT (lane);
  int regno = REGNO (operands[0]);
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
      operands[3] = GEN_INT (lane);
    }
  operands[0] = gen_rtx_REG (DImode, regno);
  if (max == 2)
    return "vld1.64\t%P0, %A1";
  else
    return "vld1.64\t{%P0[%c3]}, %A1";
}
}

static const char *
output_2533 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5017 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vld1.8\t{%e0[], %f0[]}, %A1";
}
}

static const char *
output_2534 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5017 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vld1.16\t{%e0[], %f0[]}, %A1";
}
}

static const char *
output_2535 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5017 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vld1.16\t{%e0[], %f0[]}, %A1";
}
}

static const char *
output_2536 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5017 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vld1.32\t{%e0[], %f0[]}, %A1";
}
}

static const char *
output_2537 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5017 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vld1.32\t{%e0[], %f0[]}, %A1";
}
}

static const char *
output_2553 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5063 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8QImode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8QImode);
  operands[2] = GEN_INT (lane);
  if (max == 1)
    return "vst1.8\t{%P1}, %A0";
  else
    return "vst1.8\t{%P1[%c2]}, %A0";
}
}

static const char *
output_2554 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5063 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4HImode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4HImode);
  operands[2] = GEN_INT (lane);
  if (max == 1)
    return "vst1.16\t{%P1}, %A0";
  else
    return "vst1.16\t{%P1[%c2]}, %A0";
}
}

static const char *
output_2555 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5063 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4HFmode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4HFmode);
  operands[2] = GEN_INT (lane);
  if (max == 1)
    return "vst1.16\t{%P1}, %A0";
  else
    return "vst1.16\t{%P1[%c2]}, %A0";
}
}

static const char *
output_2556 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5063 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4BFmode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4BFmode);
  operands[2] = GEN_INT (lane);
  if (max == 1)
    return "vst1.16\t{%P1}, %A0";
  else
    return "vst1.16\t{%P1[%c2]}, %A0";
}
}

static const char *
output_2557 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5063 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2SImode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V2SImode);
  operands[2] = GEN_INT (lane);
  if (max == 1)
    return "vst1.32\t{%P1}, %A0";
  else
    return "vst1.32\t{%P1[%c2]}, %A0";
}
}

static const char *
output_2558 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5063 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2SFmode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V2SFmode);
  operands[2] = GEN_INT (lane);
  if (max == 1)
    return "vst1.32\t{%P1}, %A0";
  else
    return "vst1.32\t{%P1[%c2]}, %A0";
}
}

static const char *
output_2559 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5063 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(DImode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (DImode);
  operands[2] = GEN_INT (lane);
  if (max == 1)
    return "vst1.64\t{%P1}, %A0";
  else
    return "vst1.64\t{%P1[%c2]}, %A0";
}
}

static const char *
output_2560 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5084 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V16QImode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V16QImode);
  int regno = REGNO (operands[1]);
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  operands[2] = GEN_INT (lane);
  operands[1] = gen_rtx_REG (V8QImode, regno);
  if (max == 2)
    return "vst1.8\t{%P1}, %A0";
  else
    return "vst1.8\t{%P1[%c2]}, %A0";
}
}

static const char *
output_2561 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5084 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HImode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HImode);
  int regno = REGNO (operands[1]);
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  operands[2] = GEN_INT (lane);
  operands[1] = gen_rtx_REG (V4HImode, regno);
  if (max == 2)
    return "vst1.16\t{%P1}, %A0";
  else
    return "vst1.16\t{%P1[%c2]}, %A0";
}
}

static const char *
output_2562 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5084 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HFmode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HFmode);
  int regno = REGNO (operands[1]);
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  operands[2] = GEN_INT (lane);
  operands[1] = gen_rtx_REG (V4HFmode, regno);
  if (max == 2)
    return "vst1.16\t{%P1}, %A0";
  else
    return "vst1.16\t{%P1[%c2]}, %A0";
}
}

static const char *
output_2563 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5084 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8BFmode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8BFmode);
  int regno = REGNO (operands[1]);
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  operands[2] = GEN_INT (lane);
  operands[1] = gen_rtx_REG (V4BFmode, regno);
  if (max == 2)
    return "vst1.16\t{%P1}, %A0";
  else
    return "vst1.16\t{%P1[%c2]}, %A0";
}
}

static const char *
output_2564 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5084 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SImode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SImode);
  int regno = REGNO (operands[1]);
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  operands[2] = GEN_INT (lane);
  operands[1] = gen_rtx_REG (V2SImode, regno);
  if (max == 2)
    return "vst1.32\t{%P1}, %A0";
  else
    return "vst1.32\t{%P1[%c2]}, %A0";
}
}

static const char *
output_2565 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5084 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SFmode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SFmode);
  int regno = REGNO (operands[1]);
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  operands[2] = GEN_INT (lane);
  operands[1] = gen_rtx_REG (V2SFmode, regno);
  if (max == 2)
    return "vst1.32\t{%P1}, %A0";
  else
    return "vst1.32\t{%P1[%c2]}, %A0";
}
}

static const char *
output_2566 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5084 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2DImode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V2DImode);
  int regno = REGNO (operands[1]);
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  operands[2] = GEN_INT (lane);
  operands[1] = gen_rtx_REG (DImode, regno);
  if (max == 2)
    return "vst1.64\t{%P1}, %A0";
  else
    return "vst1.64\t{%P1[%c2]}, %A0";
}
}

static const char *
output_2567 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5116 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (8 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld2.8\t%h0, %A1";
}
}

static const char *
output_2568 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5116 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld2.16\t%h0, %A1";
}
}

static const char *
output_2569 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5116 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld2.16\t%h0, %A1";
}
}

static const char *
output_2570 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5116 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld2.16\t%h0, %A1";
}
}

static const char *
output_2571 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5116 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (32 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld2.32\t%h0, %A1";
}
}

static const char *
output_2572 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5116 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (32 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld2.32\t%h0, %A1";
}
}

static const char *
output_2573 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5116 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (64 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld2.64\t%h0, %A1";
}
}

static const char *
output_2580 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5147 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8QImode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = operands[1];
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vld2.8\t{%P0[%c3], %P1[%c3]}, %A2", ops);
  return "";
}
}

static const char *
output_2581 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5147 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4HImode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = operands[1];
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vld2.16\t{%P0[%c3], %P1[%c3]}, %A2", ops);
  return "";
}
}

static const char *
output_2582 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5147 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4HFmode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = operands[1];
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vld2.16\t{%P0[%c3], %P1[%c3]}, %A2", ops);
  return "";
}
}

static const char *
output_2583 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5147 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4BFmode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = operands[1];
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vld2.16\t{%P0[%c3], %P1[%c3]}, %A2", ops);
  return "";
}
}

static const char *
output_2584 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5147 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2SImode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = operands[1];
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vld2.32\t{%P0[%c3], %P1[%c3]}, %A2", ops);
  return "";
}
}

static const char *
output_2585 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5147 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2SFmode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = operands[1];
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vld2.32\t{%P0[%c3], %P1[%c3]}, %A2", ops);
  return "";
}
}

static const char *
output_2586 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5171 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HImode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HImode);
  int regno = REGNO (operands[0]);
  rtx ops[4];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = operands[1];
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vld2.16\t{%P0[%c3], %P1[%c3]}, %A2", ops);
  return "";
}
}

static const char *
output_2587 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5171 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HFmode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HFmode);
  int regno = REGNO (operands[0]);
  rtx ops[4];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = operands[1];
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vld2.16\t{%P0[%c3], %P1[%c3]}, %A2", ops);
  return "";
}
}

static const char *
output_2588 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5171 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SImode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SImode);
  int regno = REGNO (operands[0]);
  rtx ops[4];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = operands[1];
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vld2.32\t{%P0[%c3], %P1[%c3]}, %A2", ops);
  return "";
}
}

static const char *
output_2589 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5171 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SFmode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SFmode);
  int regno = REGNO (operands[0]);
  rtx ops[4];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = operands[1];
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vld2.32\t{%P0[%c3], %P1[%c3]}, %A2", ops);
  return "";
}
}

static const char *
output_2590 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5171 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8BFmode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8BFmode);
  int regno = REGNO (operands[0]);
  rtx ops[4];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = operands[1];
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vld2.16\t{%P0[%c3], %P1[%c3]}, %A2", ops);
  return "";
}
}

static const char *
output_2591 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5197 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V8QImode) > 1)
    return "vld2.8\t{%e0[], %f0[]}, %A1";
  else
    return "vld1.8\t%h0, %A1";
}
}

static const char *
output_2592 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5197 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V4HImode) > 1)
    return "vld2.16\t{%e0[], %f0[]}, %A1";
  else
    return "vld1.16\t%h0, %A1";
}
}

static const char *
output_2593 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5197 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V4HFmode) > 1)
    return "vld2.16\t{%e0[], %f0[]}, %A1";
  else
    return "vld1.16\t%h0, %A1";
}
}

static const char *
output_2594 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5197 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V4BFmode) > 1)
    return "vld2.16\t{%e0[], %f0[]}, %A1";
  else
    return "vld1.16\t%h0, %A1";
}
}

static const char *
output_2595 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5197 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V2SImode) > 1)
    return "vld2.32\t{%e0[], %f0[]}, %A1";
  else
    return "vld1.32\t%h0, %A1";
}
}

static const char *
output_2596 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5197 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V2SFmode) > 1)
    return "vld2.32\t{%e0[], %f0[]}, %A1";
  else
    return "vld1.32\t%h0, %A1";
}
}

static const char *
output_2597 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5197 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (DImode) > 1)
    return "vld2.64\t{%e0[], %f0[]}, %A1";
  else
    return "vld1.64\t%h0, %A1";
}
}

static const char *
output_2598 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5215 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    rtx ops[5];
    int tabbase = REGNO (operands[0]);

    ops[4] = operands[1];
    ops[0] = gen_rtx_REG (V4BFmode, tabbase);
    ops[1] = gen_rtx_REG (V4BFmode, tabbase + 2);
    ops[2] = gen_rtx_REG (V4BFmode, tabbase + 4);
    ops[3] = gen_rtx_REG (V4BFmode, tabbase + 6);
    output_asm_insn ("vld2.16\t{%P0, %P1, %P2, %P3}, %A4", ops);
    return "";
  }
}

static const char *
output_2599 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5243 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (8 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst2.8\t%h1, %A0";
}
}

static const char *
output_2600 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5243 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst2.16\t%h1, %A0";
}
}

static const char *
output_2601 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5243 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst2.16\t%h1, %A0";
}
}

static const char *
output_2602 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5243 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst2.16\t%h1, %A0";
}
}

static const char *
output_2603 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5243 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (32 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst2.32\t%h1, %A0";
}
}

static const char *
output_2604 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5243 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (32 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst2.32\t%h1, %A0";
}
}

static const char *
output_2605 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5243 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (64 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst2.64\t%h1, %A0";
}
}

static const char *
output_2612 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8QImode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vst2.8\t{%P1[%c3], %P2[%c3]}, %A0", ops);
  return "";
}
}

static const char *
output_2613 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4HImode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vst2.16\t{%P1[%c3], %P2[%c3]}, %A0", ops);
  return "";
}
}

static const char *
output_2614 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4HFmode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vst2.16\t{%P1[%c3], %P2[%c3]}, %A0", ops);
  return "";
}
}

static const char *
output_2615 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4BFmode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vst2.16\t{%P1[%c3], %P2[%c3]}, %A0", ops);
  return "";
}
}

static const char *
output_2616 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2SImode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vst2.32\t{%P1[%c3], %P2[%c3]}, %A0", ops);
  return "";
}
}

static const char *
output_2617 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2SFmode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vst2.32\t{%P1[%c3], %P2[%c3]}, %A0", ops);
  return "";
}
}

static const char *
output_2618 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HImode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HImode);
  int regno = REGNO (operands[1]);
  rtx ops[4];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vst2.16\t{%P1[%c3], %P2[%c3]}, %A0", ops);
  return "";
}
}

static const char *
output_2619 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HFmode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HFmode);
  int regno = REGNO (operands[1]);
  rtx ops[4];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vst2.16\t{%P1[%c3], %P2[%c3]}, %A0", ops);
  return "";
}
}

static const char *
output_2620 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SImode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SImode);
  int regno = REGNO (operands[1]);
  rtx ops[4];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vst2.32\t{%P1[%c3], %P2[%c3]}, %A0", ops);
  return "";
}
}

static const char *
output_2621 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SFmode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SFmode);
  int regno = REGNO (operands[1]);
  rtx ops[4];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vst2.32\t{%P1[%c3], %P2[%c3]}, %A0", ops);
  return "";
}
}

static const char *
output_2622 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8BFmode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8BFmode);
  int regno = REGNO (operands[1]);
  rtx ops[4];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = GEN_INT (lane);
  output_asm_insn ("vst2.16\t{%P1[%c3], %P2[%c3]}, %A0", ops);
  return "";
}
}

static const char *
output_2623 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5332 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (8 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld3.8\t%h0, %A1";
}
}

static const char *
output_2624 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5332 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld3.16\t%h0, %A1";
}
}

static const char *
output_2625 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5332 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld3.16\t%h0, %A1";
}
}

static const char *
output_2626 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5332 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld3.16\t%h0, %A1";
}
}

static const char *
output_2627 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5332 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (32 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld3.32\t%h0, %A1";
}
}

static const char *
output_2628 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5332 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (32 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld3.32\t%h0, %A1";
}
}

static const char *
output_2629 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5332 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (64 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld3.64\t%h0, %A1";
}
}

static const char *
output_2630 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5375 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = operands[1];
  output_asm_insn ("vld3.8\t{%P0, %P1, %P2}, %A3", ops);
  return "";
}
}

static const char *
output_2631 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5375 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = operands[1];
  output_asm_insn ("vld3.16\t{%P0, %P1, %P2}, %A3", ops);
  return "";
}
}

static const char *
output_2632 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5375 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = operands[1];
  output_asm_insn ("vld3.16\t{%P0, %P1, %P2}, %A3", ops);
  return "";
}
}

static const char *
output_2633 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5375 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = operands[1];
  output_asm_insn ("vld3.16\t{%P0, %P1, %P2}, %A3", ops);
  return "";
}
}

static const char *
output_2634 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5375 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = operands[1];
  output_asm_insn ("vld3.32\t{%P0, %P1, %P2}, %A3", ops);
  return "";
}
}

static const char *
output_2635 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5375 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = operands[1];
  output_asm_insn ("vld3.32\t{%P0, %P1, %P2}, %A3", ops);
  return "";
}
}

static const char *
output_2636 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno + 2);
  ops[1] = gen_rtx_REG (DImode, regno + 6);
  ops[2] = gen_rtx_REG (DImode, regno + 10);
  ops[3] = operands[1];
  output_asm_insn ("vld3.8\t{%P0, %P1, %P2}, %A3", ops);
  return "";
}
}

static const char *
output_2637 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno + 2);
  ops[1] = gen_rtx_REG (DImode, regno + 6);
  ops[2] = gen_rtx_REG (DImode, regno + 10);
  ops[3] = operands[1];
  output_asm_insn ("vld3.16\t{%P0, %P1, %P2}, %A3", ops);
  return "";
}
}

static const char *
output_2638 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno + 2);
  ops[1] = gen_rtx_REG (DImode, regno + 6);
  ops[2] = gen_rtx_REG (DImode, regno + 10);
  ops[3] = operands[1];
  output_asm_insn ("vld3.16\t{%P0, %P1, %P2}, %A3", ops);
  return "";
}
}

static const char *
output_2639 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno + 2);
  ops[1] = gen_rtx_REG (DImode, regno + 6);
  ops[2] = gen_rtx_REG (DImode, regno + 10);
  ops[3] = operands[1];
  output_asm_insn ("vld3.16\t{%P0, %P1, %P2}, %A3", ops);
  return "";
}
}

static const char *
output_2640 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno + 2);
  ops[1] = gen_rtx_REG (DImode, regno + 6);
  ops[2] = gen_rtx_REG (DImode, regno + 10);
  ops[3] = operands[1];
  output_asm_insn ("vld3.32\t{%P0, %P1, %P2}, %A3", ops);
  return "";
}
}

static const char *
output_2641 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[4];
  ops[0] = gen_rtx_REG (DImode, regno + 2);
  ops[1] = gen_rtx_REG (DImode, regno + 6);
  ops[2] = gen_rtx_REG (DImode, regno + 10);
  ops[3] = operands[1];
  output_asm_insn ("vld3.32\t{%P0, %P1, %P2}, %A3", ops);
  return "";
}
}

static const char *
output_2642 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N (V8QImode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = operands[1];
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vld3.8\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %3",
                   ops);
  return "";
}
}

static const char *
output_2643 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N (V4HImode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = operands[1];
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vld3.16\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %3",
                   ops);
  return "";
}
}

static const char *
output_2644 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N (V4HFmode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = operands[1];
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vld3.16\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %3",
                   ops);
  return "";
}
}

static const char *
output_2645 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N (V4BFmode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = operands[1];
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vld3.16\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %3",
                   ops);
  return "";
}
}

static const char *
output_2646 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N (V2SImode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = operands[1];
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vld3.32\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %3",
                   ops);
  return "";
}
}

static const char *
output_2647 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N (V2SFmode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = operands[1];
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vld3.32\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %3",
                   ops);
  return "";
}
}

static const char *
output_2648 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5444 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HImode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HImode);
  int regno = REGNO (operands[0]);
  rtx ops[5];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = operands[1];
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vld3.16\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %3",
                   ops);
  return "";
}
}

static const char *
output_2649 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5444 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HFmode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HFmode);
  int regno = REGNO (operands[0]);
  rtx ops[5];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = operands[1];
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vld3.16\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %3",
                   ops);
  return "";
}
}

static const char *
output_2650 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5444 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SImode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SImode);
  int regno = REGNO (operands[0]);
  rtx ops[5];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = operands[1];
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vld3.32\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %3",
                   ops);
  return "";
}
}

static const char *
output_2651 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5444 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SFmode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SFmode);
  int regno = REGNO (operands[0]);
  rtx ops[5];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = operands[1];
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vld3.32\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %3",
                   ops);
  return "";
}
}

static const char *
output_2652 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5444 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8BFmode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8BFmode);
  int regno = REGNO (operands[0]);
  rtx ops[5];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = operands[1];
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vld3.16\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %3",
                   ops);
  return "";
}
}

static const char *
output_2653 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5472 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V8QImode) > 1)
    {
      int regno = REGNO (operands[0]);
      rtx ops[4];
      ops[0] = gen_rtx_REG (DImode, regno);
      ops[1] = gen_rtx_REG (DImode, regno + 2);
      ops[2] = gen_rtx_REG (DImode, regno + 4);
      ops[3] = operands[1];
      output_asm_insn ("vld3.8\t{%P0[], %P1[], %P2[]}, %3", ops);
      return "";
    }
  else
    return "vld1.8\t%h0, %A1";
}
}

static const char *
output_2654 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5472 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V4HImode) > 1)
    {
      int regno = REGNO (operands[0]);
      rtx ops[4];
      ops[0] = gen_rtx_REG (DImode, regno);
      ops[1] = gen_rtx_REG (DImode, regno + 2);
      ops[2] = gen_rtx_REG (DImode, regno + 4);
      ops[3] = operands[1];
      output_asm_insn ("vld3.16\t{%P0[], %P1[], %P2[]}, %3", ops);
      return "";
    }
  else
    return "vld1.16\t%h0, %A1";
}
}

static const char *
output_2655 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5472 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V4HFmode) > 1)
    {
      int regno = REGNO (operands[0]);
      rtx ops[4];
      ops[0] = gen_rtx_REG (DImode, regno);
      ops[1] = gen_rtx_REG (DImode, regno + 2);
      ops[2] = gen_rtx_REG (DImode, regno + 4);
      ops[3] = operands[1];
      output_asm_insn ("vld3.16\t{%P0[], %P1[], %P2[]}, %3", ops);
      return "";
    }
  else
    return "vld1.16\t%h0, %A1";
}
}

static const char *
output_2656 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5472 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V4BFmode) > 1)
    {
      int regno = REGNO (operands[0]);
      rtx ops[4];
      ops[0] = gen_rtx_REG (DImode, regno);
      ops[1] = gen_rtx_REG (DImode, regno + 2);
      ops[2] = gen_rtx_REG (DImode, regno + 4);
      ops[3] = operands[1];
      output_asm_insn ("vld3.16\t{%P0[], %P1[], %P2[]}, %3", ops);
      return "";
    }
  else
    return "vld1.16\t%h0, %A1";
}
}

static const char *
output_2657 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5472 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V2SImode) > 1)
    {
      int regno = REGNO (operands[0]);
      rtx ops[4];
      ops[0] = gen_rtx_REG (DImode, regno);
      ops[1] = gen_rtx_REG (DImode, regno + 2);
      ops[2] = gen_rtx_REG (DImode, regno + 4);
      ops[3] = operands[1];
      output_asm_insn ("vld3.32\t{%P0[], %P1[], %P2[]}, %3", ops);
      return "";
    }
  else
    return "vld1.32\t%h0, %A1";
}
}

static const char *
output_2658 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5472 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V2SFmode) > 1)
    {
      int regno = REGNO (operands[0]);
      rtx ops[4];
      ops[0] = gen_rtx_REG (DImode, regno);
      ops[1] = gen_rtx_REG (DImode, regno + 2);
      ops[2] = gen_rtx_REG (DImode, regno + 4);
      ops[3] = operands[1];
      output_asm_insn ("vld3.32\t{%P0[], %P1[], %P2[]}, %3", ops);
      return "";
    }
  else
    return "vld1.32\t%h0, %A1";
}
}

static const char *
output_2659 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5472 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (DImode) > 1)
    {
      int regno = REGNO (operands[0]);
      rtx ops[4];
      ops[0] = gen_rtx_REG (DImode, regno);
      ops[1] = gen_rtx_REG (DImode, regno + 2);
      ops[2] = gen_rtx_REG (DImode, regno + 4);
      ops[3] = operands[1];
      output_asm_insn ("vld3.64\t{%P0[], %P1[], %P2[]}, %3", ops);
      return "";
    }
  else
    return "vld1.64\t%h0, %A1";
}
}

static const char *
output_2660 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    rtx ops[4];
    int tabbase = REGNO (operands[0]);

    ops[3] = operands[1];
    ops[0] = gen_rtx_REG (V4BFmode, tabbase);
    ops[1] = gen_rtx_REG (V4BFmode, tabbase + 2);
    ops[2] = gen_rtx_REG (V4BFmode, tabbase + 4);
    output_asm_insn ("vld3.16\t{%P0[], %P1[], %P2[]}, %A3", ops);
    return "";
  }
}

static const char *
output_2661 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5525 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (8 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst3.8\t%h1, %A0";
}
}

static const char *
output_2662 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5525 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst3.16\t%h1, %A0";
}
}

static const char *
output_2663 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5525 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst3.16\t%h1, %A0";
}
}

static const char *
output_2664 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5525 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst3.16\t%h1, %A0";
}
}

static const char *
output_2665 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5525 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (32 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst3.32\t%h1, %A0";
}
}

static const char *
output_2666 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5525 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (32 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst3.32\t%h1, %A0";
}
}

static const char *
output_2667 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5525 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (64 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst3.64\t%h1, %A0";
}
}

static const char *
output_2668 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5567 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  output_asm_insn ("vst3.8\t{%P1, %P2, %P3}, %A0", ops);
  return "";
}
}

static const char *
output_2669 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5567 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  output_asm_insn ("vst3.16\t{%P1, %P2, %P3}, %A0", ops);
  return "";
}
}

static const char *
output_2670 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5567 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  output_asm_insn ("vst3.16\t{%P1, %P2, %P3}, %A0", ops);
  return "";
}
}

static const char *
output_2671 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5567 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  output_asm_insn ("vst3.16\t{%P1, %P2, %P3}, %A0", ops);
  return "";
}
}

static const char *
output_2672 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5567 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  output_asm_insn ("vst3.32\t{%P1, %P2, %P3}, %A0", ops);
  return "";
}
}

static const char *
output_2673 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5567 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  output_asm_insn ("vst3.32\t{%P1, %P2, %P3}, %A0", ops);
  return "";
}
}

static const char *
output_2674 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5586 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 6);
  ops[3] = gen_rtx_REG (DImode, regno + 10);
  output_asm_insn ("vst3.8\t{%P1, %P2, %P3}, %A0", ops);
  return "";
}
}

static const char *
output_2675 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5586 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 6);
  ops[3] = gen_rtx_REG (DImode, regno + 10);
  output_asm_insn ("vst3.16\t{%P1, %P2, %P3}, %A0", ops);
  return "";
}
}

static const char *
output_2676 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5586 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 6);
  ops[3] = gen_rtx_REG (DImode, regno + 10);
  output_asm_insn ("vst3.16\t{%P1, %P2, %P3}, %A0", ops);
  return "";
}
}

static const char *
output_2677 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5586 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 6);
  ops[3] = gen_rtx_REG (DImode, regno + 10);
  output_asm_insn ("vst3.16\t{%P1, %P2, %P3}, %A0", ops);
  return "";
}
}

static const char *
output_2678 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5586 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 6);
  ops[3] = gen_rtx_REG (DImode, regno + 10);
  output_asm_insn ("vst3.32\t{%P1, %P2, %P3}, %A0", ops);
  return "";
}
}

static const char *
output_2679 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5586 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[4];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 6);
  ops[3] = gen_rtx_REG (DImode, regno + 10);
  output_asm_insn ("vst3.32\t{%P1, %P2, %P3}, %A0", ops);
  return "";
}
}

static const char *
output_2680 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5609 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8QImode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = gen_rtx_REG (DImode, regno + 4);
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vst3.8\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %0",
                   ops);
  return "";
}
}

static const char *
output_2681 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5609 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4HImode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = gen_rtx_REG (DImode, regno + 4);
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vst3.16\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %0",
                   ops);
  return "";
}
}

static const char *
output_2682 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5609 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4HFmode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = gen_rtx_REG (DImode, regno + 4);
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vst3.16\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %0",
                   ops);
  return "";
}
}

static const char *
output_2683 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5609 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4BFmode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = gen_rtx_REG (DImode, regno + 4);
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vst3.16\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %0",
                   ops);
  return "";
}
}

static const char *
output_2684 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5609 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2SImode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = gen_rtx_REG (DImode, regno + 4);
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vst3.32\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %0",
                   ops);
  return "";
}
}

static const char *
output_2685 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5609 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2SFmode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = gen_rtx_REG (DImode, regno + 4);
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vst3.32\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %0",
                   ops);
  return "";
}
}

static const char *
output_2686 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5635 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HImode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HImode);
  int regno = REGNO (operands[1]);
  rtx ops[5];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vst3.16\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %0",
                   ops);
  return "";
}
}

static const char *
output_2687 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5635 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HFmode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HFmode);
  int regno = REGNO (operands[1]);
  rtx ops[5];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vst3.16\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %0",
                   ops);
  return "";
}
}

static const char *
output_2688 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5635 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SImode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SImode);
  int regno = REGNO (operands[1]);
  rtx ops[5];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vst3.32\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %0",
                   ops);
  return "";
}
}

static const char *
output_2689 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5635 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SFmode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SFmode);
  int regno = REGNO (operands[1]);
  rtx ops[5];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vst3.32\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %0",
                   ops);
  return "";
}
}

static const char *
output_2690 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5635 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8BFmode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8BFmode);
  int regno = REGNO (operands[1]);
  rtx ops[5];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = GEN_INT (lane);
  output_asm_insn ("vst3.16\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %0",
                   ops);
  return "";
}
}

static const char *
output_2691 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5670 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (8 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld4.8\t%h0, %A1";
}
}

static const char *
output_2692 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5670 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld4.16\t%h0, %A1";
}
}

static const char *
output_2693 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5670 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld4.16\t%h0, %A1";
}
}

static const char *
output_2694 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5670 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld4.16\t%h0, %A1";
}
}

static const char *
output_2695 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5670 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (32 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld4.32\t%h0, %A1";
}
}

static const char *
output_2696 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5670 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (32 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld4.32\t%h0, %A1";
}
}

static const char *
output_2697 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5670 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (64 == 64)
    return "vld1.64\t%h0, %A1";
  else
    return "vld4.64\t%h0, %A1";
}
}

static const char *
output_2698 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5703 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = gen_rtx_REG (DImode, regno + 12);
  ops[4] = operands[1];
  output_asm_insn ("vld4.8\t{%P0, %P1, %P2, %P3}, %A4", ops);
  return "";
}
}

static const char *
output_2699 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5703 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = gen_rtx_REG (DImode, regno + 12);
  ops[4] = operands[1];
  output_asm_insn ("vld4.16\t{%P0, %P1, %P2, %P3}, %A4", ops);
  return "";
}
}

static const char *
output_2700 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5703 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = gen_rtx_REG (DImode, regno + 12);
  ops[4] = operands[1];
  output_asm_insn ("vld4.16\t{%P0, %P1, %P2, %P3}, %A4", ops);
  return "";
}
}

static const char *
output_2701 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5703 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = gen_rtx_REG (DImode, regno + 12);
  ops[4] = operands[1];
  output_asm_insn ("vld4.16\t{%P0, %P1, %P2, %P3}, %A4", ops);
  return "";
}
}

static const char *
output_2702 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5703 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = gen_rtx_REG (DImode, regno + 12);
  ops[4] = operands[1];
  output_asm_insn ("vld4.32\t{%P0, %P1, %P2, %P3}, %A4", ops);
  return "";
}
}

static const char *
output_2703 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5703 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = gen_rtx_REG (DImode, regno + 12);
  ops[4] = operands[1];
  output_asm_insn ("vld4.32\t{%P0, %P1, %P2, %P3}, %A4", ops);
  return "";
}
}

static const char *
output_2704 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5724 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno + 2);
  ops[1] = gen_rtx_REG (DImode, regno + 6);
  ops[2] = gen_rtx_REG (DImode, regno + 10);
  ops[3] = gen_rtx_REG (DImode, regno + 14);
  ops[4] = operands[1];
  output_asm_insn ("vld4.8\t{%P0, %P1, %P2, %P3}, %A4", ops);
  return "";
}
}

static const char *
output_2705 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5724 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno + 2);
  ops[1] = gen_rtx_REG (DImode, regno + 6);
  ops[2] = gen_rtx_REG (DImode, regno + 10);
  ops[3] = gen_rtx_REG (DImode, regno + 14);
  ops[4] = operands[1];
  output_asm_insn ("vld4.16\t{%P0, %P1, %P2, %P3}, %A4", ops);
  return "";
}
}

static const char *
output_2706 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5724 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno + 2);
  ops[1] = gen_rtx_REG (DImode, regno + 6);
  ops[2] = gen_rtx_REG (DImode, regno + 10);
  ops[3] = gen_rtx_REG (DImode, regno + 14);
  ops[4] = operands[1];
  output_asm_insn ("vld4.16\t{%P0, %P1, %P2, %P3}, %A4", ops);
  return "";
}
}

static const char *
output_2707 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5724 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno + 2);
  ops[1] = gen_rtx_REG (DImode, regno + 6);
  ops[2] = gen_rtx_REG (DImode, regno + 10);
  ops[3] = gen_rtx_REG (DImode, regno + 14);
  ops[4] = operands[1];
  output_asm_insn ("vld4.16\t{%P0, %P1, %P2, %P3}, %A4", ops);
  return "";
}
}

static const char *
output_2708 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5724 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno + 2);
  ops[1] = gen_rtx_REG (DImode, regno + 6);
  ops[2] = gen_rtx_REG (DImode, regno + 10);
  ops[3] = gen_rtx_REG (DImode, regno + 14);
  ops[4] = operands[1];
  output_asm_insn ("vld4.32\t{%P0, %P1, %P2, %P3}, %A4", ops);
  return "";
}
}

static const char *
output_2709 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5724 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[0]);
  rtx ops[5];
  ops[0] = gen_rtx_REG (DImode, regno + 2);
  ops[1] = gen_rtx_REG (DImode, regno + 6);
  ops[2] = gen_rtx_REG (DImode, regno + 10);
  ops[3] = gen_rtx_REG (DImode, regno + 14);
  ops[4] = operands[1];
  output_asm_insn ("vld4.32\t{%P0, %P1, %P2, %P3}, %A4", ops);
  return "";
}
}

static const char *
output_2710 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8QImode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[6];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 6);
  ops[4] = operands[1];
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vld4.8\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
                   ops);
  return "";
}
}

static const char *
output_2711 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4HImode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[6];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 6);
  ops[4] = operands[1];
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vld4.16\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
                   ops);
  return "";
}
}

static const char *
output_2712 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4HFmode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[6];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 6);
  ops[4] = operands[1];
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vld4.16\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
                   ops);
  return "";
}
}

static const char *
output_2713 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4BFmode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[6];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 6);
  ops[4] = operands[1];
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vld4.16\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
                   ops);
  return "";
}
}

static const char *
output_2714 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2SImode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[6];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 6);
  ops[4] = operands[1];
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vld4.32\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
                   ops);
  return "";
}
}

static const char *
output_2715 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2SFmode, INTVAL (operands[3]));
  int regno = REGNO (operands[0]);
  rtx ops[6];
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 6);
  ops[4] = operands[1];
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vld4.32\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
                   ops);
  return "";
}
}

static const char *
output_2716 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HImode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HImode);
  int regno = REGNO (operands[0]);
  rtx ops[6];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = gen_rtx_REG (DImode, regno + 12);
  ops[4] = operands[1];
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vld4.16\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
                   ops);
  return "";
}
}

static const char *
output_2717 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HFmode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HFmode);
  int regno = REGNO (operands[0]);
  rtx ops[6];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = gen_rtx_REG (DImode, regno + 12);
  ops[4] = operands[1];
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vld4.16\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
                   ops);
  return "";
}
}

static const char *
output_2718 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SImode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SImode);
  int regno = REGNO (operands[0]);
  rtx ops[6];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = gen_rtx_REG (DImode, regno + 12);
  ops[4] = operands[1];
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vld4.32\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
                   ops);
  return "";
}
}

static const char *
output_2719 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SFmode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SFmode);
  int regno = REGNO (operands[0]);
  rtx ops[6];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = gen_rtx_REG (DImode, regno + 12);
  ops[4] = operands[1];
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vld4.32\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
                   ops);
  return "";
}
}

static const char *
output_2720 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8BFmode, INTVAL (operands[3]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8BFmode);
  int regno = REGNO (operands[0]);
  rtx ops[6];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = gen_rtx_REG (DImode, regno);
  ops[1] = gen_rtx_REG (DImode, regno + 4);
  ops[2] = gen_rtx_REG (DImode, regno + 8);
  ops[3] = gen_rtx_REG (DImode, regno + 12);
  ops[4] = operands[1];
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vld4.16\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
                   ops);
  return "";
}
}

static const char *
output_2721 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5804 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V8QImode) > 1)
    {
      int regno = REGNO (operands[0]);
      rtx ops[5];
      ops[0] = gen_rtx_REG (DImode, regno);
      ops[1] = gen_rtx_REG (DImode, regno + 2);
      ops[2] = gen_rtx_REG (DImode, regno + 4);
      ops[3] = gen_rtx_REG (DImode, regno + 6);
      ops[4] = operands[1];
      output_asm_insn ("vld4.8\t{%P0[], %P1[], %P2[], %P3[]}, %A4",
                       ops);
      return "";
    }
  else
    return "vld1.8\t%h0, %A1";
}
}

static const char *
output_2722 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5804 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V4HImode) > 1)
    {
      int regno = REGNO (operands[0]);
      rtx ops[5];
      ops[0] = gen_rtx_REG (DImode, regno);
      ops[1] = gen_rtx_REG (DImode, regno + 2);
      ops[2] = gen_rtx_REG (DImode, regno + 4);
      ops[3] = gen_rtx_REG (DImode, regno + 6);
      ops[4] = operands[1];
      output_asm_insn ("vld4.16\t{%P0[], %P1[], %P2[], %P3[]}, %A4",
                       ops);
      return "";
    }
  else
    return "vld1.16\t%h0, %A1";
}
}

static const char *
output_2723 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5804 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V4HFmode) > 1)
    {
      int regno = REGNO (operands[0]);
      rtx ops[5];
      ops[0] = gen_rtx_REG (DImode, regno);
      ops[1] = gen_rtx_REG (DImode, regno + 2);
      ops[2] = gen_rtx_REG (DImode, regno + 4);
      ops[3] = gen_rtx_REG (DImode, regno + 6);
      ops[4] = operands[1];
      output_asm_insn ("vld4.16\t{%P0[], %P1[], %P2[], %P3[]}, %A4",
                       ops);
      return "";
    }
  else
    return "vld1.16\t%h0, %A1";
}
}

static const char *
output_2724 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5804 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V4BFmode) > 1)
    {
      int regno = REGNO (operands[0]);
      rtx ops[5];
      ops[0] = gen_rtx_REG (DImode, regno);
      ops[1] = gen_rtx_REG (DImode, regno + 2);
      ops[2] = gen_rtx_REG (DImode, regno + 4);
      ops[3] = gen_rtx_REG (DImode, regno + 6);
      ops[4] = operands[1];
      output_asm_insn ("vld4.16\t{%P0[], %P1[], %P2[], %P3[]}, %A4",
                       ops);
      return "";
    }
  else
    return "vld1.16\t%h0, %A1";
}
}

static const char *
output_2725 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5804 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V2SImode) > 1)
    {
      int regno = REGNO (operands[0]);
      rtx ops[5];
      ops[0] = gen_rtx_REG (DImode, regno);
      ops[1] = gen_rtx_REG (DImode, regno + 2);
      ops[2] = gen_rtx_REG (DImode, regno + 4);
      ops[3] = gen_rtx_REG (DImode, regno + 6);
      ops[4] = operands[1];
      output_asm_insn ("vld4.32\t{%P0[], %P1[], %P2[], %P3[]}, %A4",
                       ops);
      return "";
    }
  else
    return "vld1.32\t%h0, %A1";
}
}

static const char *
output_2726 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5804 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (V2SFmode) > 1)
    {
      int regno = REGNO (operands[0]);
      rtx ops[5];
      ops[0] = gen_rtx_REG (DImode, regno);
      ops[1] = gen_rtx_REG (DImode, regno + 2);
      ops[2] = gen_rtx_REG (DImode, regno + 4);
      ops[3] = gen_rtx_REG (DImode, regno + 6);
      ops[4] = operands[1];
      output_asm_insn ("vld4.32\t{%P0[], %P1[], %P2[], %P3[]}, %A4",
                       ops);
      return "";
    }
  else
    return "vld1.32\t%h0, %A1";
}
}

static const char *
output_2727 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5804 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (GET_MODE_NUNITS (DImode) > 1)
    {
      int regno = REGNO (operands[0]);
      rtx ops[5];
      ops[0] = gen_rtx_REG (DImode, regno);
      ops[1] = gen_rtx_REG (DImode, regno + 2);
      ops[2] = gen_rtx_REG (DImode, regno + 4);
      ops[3] = gen_rtx_REG (DImode, regno + 6);
      ops[4] = operands[1];
      output_asm_insn ("vld4.64\t{%P0[], %P1[], %P2[], %P3[]}, %A4",
                       ops);
      return "";
    }
  else
    return "vld1.64\t%h0, %A1";
}
}

static const char *
output_2728 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5833 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    rtx ops[5];
    int tabbase = REGNO (operands[0]);

    ops[4] = operands[1];
    ops[0] = gen_rtx_REG (V4BFmode, tabbase);
    ops[1] = gen_rtx_REG (V4BFmode, tabbase + 2);
    ops[2] = gen_rtx_REG (V4BFmode, tabbase + 4);
    ops[3] = gen_rtx_REG (V4BFmode, tabbase + 6);
    output_asm_insn ("vld4.16\t{%P0[], %P1[], %P2[], %P3[]}, %A4", ops);
    return "";
  }
}

static const char *
output_2729 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5861 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (8 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst4.8\t%h1, %A0";
}
}

static const char *
output_2730 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5861 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst4.16\t%h1, %A0";
}
}

static const char *
output_2731 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5861 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst4.16\t%h1, %A0";
}
}

static const char *
output_2732 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5861 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (16 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst4.16\t%h1, %A0";
}
}

static const char *
output_2733 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5861 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (32 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst4.32\t%h1, %A0";
}
}

static const char *
output_2734 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5861 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (32 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst4.32\t%h1, %A0";
}
}

static const char *
output_2735 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5861 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  if (64 == 64)
    return "vst1.64\t%h1, %A0";
  else
    return "vst4.64\t%h1, %A0";
}
}

static const char *
output_2736 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5894 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = gen_rtx_REG (DImode, regno + 12);
  output_asm_insn ("vst4.8\t{%P1, %P2, %P3, %P4}, %A0", ops);
  return "";
}
}

static const char *
output_2737 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5894 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = gen_rtx_REG (DImode, regno + 12);
  output_asm_insn ("vst4.16\t{%P1, %P2, %P3, %P4}, %A0", ops);
  return "";
}
}

static const char *
output_2738 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5894 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = gen_rtx_REG (DImode, regno + 12);
  output_asm_insn ("vst4.16\t{%P1, %P2, %P3, %P4}, %A0", ops);
  return "";
}
}

static const char *
output_2739 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5894 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = gen_rtx_REG (DImode, regno + 12);
  output_asm_insn ("vst4.16\t{%P1, %P2, %P3, %P4}, %A0", ops);
  return "";
}
}

static const char *
output_2740 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5894 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = gen_rtx_REG (DImode, regno + 12);
  output_asm_insn ("vst4.32\t{%P1, %P2, %P3, %P4}, %A0", ops);
  return "";
}
}

static const char *
output_2741 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5894 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = gen_rtx_REG (DImode, regno + 12);
  output_asm_insn ("vst4.32\t{%P1, %P2, %P3, %P4}, %A0", ops);
  return "";
}
}

static const char *
output_2742 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5914 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 6);
  ops[3] = gen_rtx_REG (DImode, regno + 10);
  ops[4] = gen_rtx_REG (DImode, regno + 14);
  output_asm_insn ("vst4.8\t{%P1, %P2, %P3, %P4}, %A0", ops);
  return "";
}
}

static const char *
output_2743 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5914 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 6);
  ops[3] = gen_rtx_REG (DImode, regno + 10);
  ops[4] = gen_rtx_REG (DImode, regno + 14);
  output_asm_insn ("vst4.16\t{%P1, %P2, %P3, %P4}, %A0", ops);
  return "";
}
}

static const char *
output_2744 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5914 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 6);
  ops[3] = gen_rtx_REG (DImode, regno + 10);
  ops[4] = gen_rtx_REG (DImode, regno + 14);
  output_asm_insn ("vst4.16\t{%P1, %P2, %P3, %P4}, %A0", ops);
  return "";
}
}

static const char *
output_2745 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5914 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 6);
  ops[3] = gen_rtx_REG (DImode, regno + 10);
  ops[4] = gen_rtx_REG (DImode, regno + 14);
  output_asm_insn ("vst4.16\t{%P1, %P2, %P3, %P4}, %A0", ops);
  return "";
}
}

static const char *
output_2746 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5914 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 6);
  ops[3] = gen_rtx_REG (DImode, regno + 10);
  ops[4] = gen_rtx_REG (DImode, regno + 14);
  output_asm_insn ("vst4.32\t{%P1, %P2, %P3, %P4}, %A0", ops);
  return "";
}
}

static const char *
output_2747 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5914 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  int regno = REGNO (operands[1]);
  rtx ops[5];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno + 2);
  ops[2] = gen_rtx_REG (DImode, regno + 6);
  ops[3] = gen_rtx_REG (DImode, regno + 10);
  ops[4] = gen_rtx_REG (DImode, regno + 14);
  output_asm_insn ("vst4.32\t{%P1, %P2, %P3, %P4}, %A0", ops);
  return "";
}
}

static const char *
output_2748 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5938 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8QImode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[6];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = gen_rtx_REG (DImode, regno + 4);
  ops[4] = gen_rtx_REG (DImode, regno + 6);
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vst4.8\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
                   ops);
  return "";
}
}

static const char *
output_2749 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5938 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4HImode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[6];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = gen_rtx_REG (DImode, regno + 4);
  ops[4] = gen_rtx_REG (DImode, regno + 6);
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vst4.16\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
                   ops);
  return "";
}
}

static const char *
output_2750 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5938 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4HFmode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[6];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = gen_rtx_REG (DImode, regno + 4);
  ops[4] = gen_rtx_REG (DImode, regno + 6);
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vst4.16\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
                   ops);
  return "";
}
}

static const char *
output_2751 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5938 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4BFmode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[6];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = gen_rtx_REG (DImode, regno + 4);
  ops[4] = gen_rtx_REG (DImode, regno + 6);
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vst4.16\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
                   ops);
  return "";
}
}

static const char *
output_2752 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5938 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2SImode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[6];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = gen_rtx_REG (DImode, regno + 4);
  ops[4] = gen_rtx_REG (DImode, regno + 6);
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vst4.32\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
                   ops);
  return "";
}
}

static const char *
output_2753 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5938 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V2SFmode, INTVAL (operands[2]));
  int regno = REGNO (operands[1]);
  rtx ops[6];
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 2);
  ops[3] = gen_rtx_REG (DImode, regno + 4);
  ops[4] = gen_rtx_REG (DImode, regno + 6);
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vst4.32\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
                   ops);
  return "";
}
}

static const char *
output_2754 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5965 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HImode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HImode);
  int regno = REGNO (operands[1]);
  rtx ops[6];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = gen_rtx_REG (DImode, regno + 12);
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vst4.16\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
                   ops);
  return "";
}
}

static const char *
output_2755 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5965 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8HFmode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8HFmode);
  int regno = REGNO (operands[1]);
  rtx ops[6];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = gen_rtx_REG (DImode, regno + 12);
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vst4.16\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
                   ops);
  return "";
}
}

static const char *
output_2756 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5965 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SImode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SImode);
  int regno = REGNO (operands[1]);
  rtx ops[6];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = gen_rtx_REG (DImode, regno + 12);
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vst4.32\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
                   ops);
  return "";
}
}

static const char *
output_2757 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5965 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V4SFmode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V4SFmode);
  int regno = REGNO (operands[1]);
  rtx ops[6];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = gen_rtx_REG (DImode, regno + 12);
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vst4.32\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
                   ops);
  return "";
}
}

static const char *
output_2758 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 5965 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(V8BFmode, INTVAL (operands[2]));
  HOST_WIDE_INT max = GET_MODE_NUNITS (V8BFmode);
  int regno = REGNO (operands[1]);
  rtx ops[6];
  if (lane >= max / 2)
    {
      lane -= max / 2;
      regno += 2;
    }
  ops[0] = operands[0];
  ops[1] = gen_rtx_REG (DImode, regno);
  ops[2] = gen_rtx_REG (DImode, regno + 4);
  ops[3] = gen_rtx_REG (DImode, regno + 8);
  ops[4] = gen_rtx_REG (DImode, regno + 12);
  ops[5] = GEN_INT (lane);
  output_asm_insn ("vst4.16\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
                   ops);
  return "";
}
}

static const char *
output_2783 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 6119 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vshll.s8 %q0, %P1, %2";
}
}

static const char *
output_2784 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 6119 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vshll.u8 %q0, %P1, %2";
}
}

static const char *
output_2785 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 6119 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vshll.s16 %q0, %P1, %2";
}
}

static const char *
output_2786 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 6119 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vshll.u16 %q0, %P1, %2";
}
}

static const char *
output_2787 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 6119 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vshll.s32 %q0, %P1, %2";
}
}

static const char *
output_2788 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 6119 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
  return "vshll.u32 %q0, %P1, %2";
}
}

static const char *
output_2822 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 6360 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = INTVAL (operands[4]);
    int half = GET_MODE_NUNITS (GET_MODE (operands[3])) / 4;
    if (lane < half)
      return "vdot.bf16\t%P0, %P2, %e3[%c4]";
    else
      {
	operands[4] = GEN_INT (lane - half);
	return "vdot.bf16\t%P0, %P2, %f3[%c4]";
      }
  }
}

static const char *
output_2823 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 6360 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md"
{
    int lane = INTVAL (operands[4]);
    int half = GET_MODE_NUNITS (GET_MODE (operands[3])) / 4;
    if (lane < half)
      return "vdot.bf16\t%q0, %q2, %e3[%c4]";
    else
      {
	operands[4] = GEN_INT (lane - half);
	return "vdot.bf16\t%q0, %q2, %f3[%c4]";
      }
  }
}

static const char *
output_2842 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 76 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md"
{
    switch (which_alternative)
      {
      case 0: return "vmov\t%q0, %q1";
      case 1: return "vmov\t%e0, %Q1, %R1  @ V16QI\n\tvmov\t%f0, %J1, %K1";
      case 2: return output_move_neon (operands);
      default: gcc_unreachable ();
      }
  }
}

static const char *
output_2862 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 50 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (TARGET_HAVE_DMB)
      {
	return "dmb\tish";
      }

    if (TARGET_HAVE_DMB_MCR)
      return "mcr\tp15, 0, r0, c7, c10, 5";

    gcc_unreachable ();
  }
}

static const char *
output_2863 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 72 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (aarch_mm_needs_acquire (operands[2]))
      {
	if (TARGET_THUMB1)
	  return "ldab\t%0, %1";
	else
	  return "ldab%?\t%0, %1";
      }
    else
      {
	if (TARGET_THUMB1)
	  return "ldrb\t%0, %1";
	else
	  return "ldrb%?\t%0, %1";
      }
  }
}

static const char *
output_2864 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 72 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (aarch_mm_needs_acquire (operands[2]))
      {
	if (TARGET_THUMB1)
	  return "ldah\t%0, %1";
	else
	  return "ldah%?\t%0, %1";
      }
    else
      {
	if (TARGET_THUMB1)
	  return "ldrh\t%0, %1";
	else
	  return "ldrh%?\t%0, %1";
      }
  }
}

static const char *
output_2865 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 72 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (aarch_mm_needs_acquire (operands[2]))
      {
	if (TARGET_THUMB1)
	  return "lda\t%0, %1";
	else
	  return "lda%?\t%0, %1";
      }
    else
      {
	if (TARGET_THUMB1)
	  return "ldr\t%0, %1";
	else
	  return "ldr%?\t%0, %1";
      }
  }
}

static const char *
output_2866 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 98 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (aarch_mm_needs_release (operands[2]))
      {
	if (TARGET_THUMB1)
	  return "stlb\t%1, %0";
	else
	  return "stlb%?\t%1, %0";
      }
    else
      {
	if (TARGET_THUMB1)
	  return "strb\t%1, %0";
	else
	  return "strb%?\t%1, %0";
      }
  }
}

static const char *
output_2867 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 98 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (aarch_mm_needs_release (operands[2]))
      {
	if (TARGET_THUMB1)
	  return "stlh\t%1, %0";
	else
	  return "stlh%?\t%1, %0";
      }
    else
      {
	if (TARGET_THUMB1)
	  return "strh\t%1, %0";
	else
	  return "strh%?\t%1, %0";
      }
  }
}

static const char *
output_2868 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 98 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (aarch_mm_needs_release (operands[2]))
      {
	if (TARGET_THUMB1)
	  return "stl\t%1, %0";
	else
	  return "stl%?\t%1, %0";
      }
    else
      {
	if (TARGET_THUMB1)
	  return "str\t%1, %0";
	else
	  return "str%?\t%1, %0";
      }
  }
}

static const char * const output_2954[] = {
  "ldrexb%?\t%0, %C1",
  "ldrexb\t%0, %C1",
};

static const char * const output_2955[] = {
  "ldrexh%?\t%0, %C1",
  "ldrexh\t%0, %C1",
};

static const char * const output_2956[] = {
  "ldaexb%?\t%0, %C1",
  "ldaexb\t%0, %C1",
};

static const char * const output_2957[] = {
  "ldaexh%?\t%0, %C1",
  "ldaexh\t%0, %C1",
};

static const char * const output_2958[] = {
  "ldrex%?\t%0, %C1",
  "ldrex\t%0, %C1",
};

static const char * const output_2959[] = {
  "ldaex%?\t%0, %C1",
  "ldaex\t%0, %C1",
};

static const char *
output_2962 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 524 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (QImode == DImode)
      {
	/* The restrictions on target registers in ARM mode are that the two
	   registers are consecutive and the first one is even; Thumb is
	   actually more flexible, but DI should give us this anyway.
	   Note that the 1st register always gets the
	   lowest word in memory.  */
	gcc_assert ((REGNO (operands[2]) & 1) == 0 || TARGET_THUMB2);
	return "strexd%?\t%0, %2, %H2, %C1";
      }
    if (TARGET_THUMB1)
      return "strexb\t%0, %2, %C1";
    else
      return "strexb%?\t%0, %2, %C1";
  }
}

static const char *
output_2963 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 524 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (HImode == DImode)
      {
	/* The restrictions on target registers in ARM mode are that the two
	   registers are consecutive and the first one is even; Thumb is
	   actually more flexible, but DI should give us this anyway.
	   Note that the 1st register always gets the
	   lowest word in memory.  */
	gcc_assert ((REGNO (operands[2]) & 1) == 0 || TARGET_THUMB2);
	return "strexd%?\t%0, %2, %H2, %C1";
      }
    if (TARGET_THUMB1)
      return "strexh\t%0, %2, %C1";
    else
      return "strexh%?\t%0, %2, %C1";
  }
}

static const char *
output_2964 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 524 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (SImode == DImode)
      {
	/* The restrictions on target registers in ARM mode are that the two
	   registers are consecutive and the first one is even; Thumb is
	   actually more flexible, but DI should give us this anyway.
	   Note that the 1st register always gets the
	   lowest word in memory.  */
	gcc_assert ((REGNO (operands[2]) & 1) == 0 || TARGET_THUMB2);
	return "strexd%?\t%0, %2, %H2, %C1";
      }
    if (TARGET_THUMB1)
      return "strex\t%0, %2, %C1";
    else
      return "strex%?\t%0, %2, %C1";
  }
}

static const char *
output_2965 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 524 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (DImode == DImode)
      {
	/* The restrictions on target registers in ARM mode are that the two
	   registers are consecutive and the first one is even; Thumb is
	   actually more flexible, but DI should give us this anyway.
	   Note that the 1st register always gets the
	   lowest word in memory.  */
	gcc_assert ((REGNO (operands[2]) & 1) == 0 || TARGET_THUMB2);
	return "strexd%?\t%0, %2, %H2, %C1";
      }
    if (TARGET_THUMB1)
      return "strexd\t%0, %2, %C1";
    else
      return "strexd%?\t%0, %2, %C1";
  }
}

static const char *
output_2966 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 550 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    /* See comment in arm_store_exclusive<mode> above.  */
    gcc_assert ((REGNO (operands[2]) & 1) == 0 || TARGET_THUMB2);
    return "stlexd%?\t%0, %2, %H2, %C1";
  }
}

static const char * const output_2967[] = {
  "stlexb%?\t%0, %2, %C1",
  "stlexb\t%0, %2, %C1",
};

static const char * const output_2968[] = {
  "stlexh%?\t%0, %2, %C1",
  "stlexh\t%0, %2, %C1",
};

static const char * const output_2969[] = {
  "stlex%?\t%0, %2, %C1",
  "stlex\t%0, %2, %C1",
};

static const char *
output_3024 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 265 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md"
{
  /* s16.15 * s16.15 -> s32.30.  */
  output_asm_insn ("smull\t%Q3, %R3, %1, %2", operands);

  if (TARGET_ARM)
    output_asm_insn ("msr\tAPSR_nzcvq, #0", operands);
  else
    {
      output_asm_insn ("mov\t%4, #0", operands);
      output_asm_insn ("msr\tAPSR_nzcvq, %4", operands);
    }

  /* We have:
      31  high word  0     31  low word  0

    [ S i i .... i i i ] [ i f f f ... f f ]
                        |
			v
	     [ S i ... i f ... f f ]

    Need 16 integral bits, so saturate at 15th bit of high word.  */

  output_asm_insn ("ssat\t%R3, #15, %R3", operands);
  output_asm_insn ("mrs\t%4, APSR", operands);
  output_asm_insn ("tst\t%4, #1<<27", operands);
  if (arm_restrict_it)
    {
      output_asm_insn ("mvn\t%4, %R3, asr #32", operands);
      output_asm_insn ("it\tne", operands);
      output_asm_insn ("movne\t%Q3, %4", operands);
    }
  else
    {
      if (TARGET_THUMB2)
        output_asm_insn ("it\tne", operands);
      output_asm_insn ("mvnne\t%Q3, %R3, asr #32", operands);
    }
  output_asm_insn ("mov\t%0, %Q3, lsr #15", operands);
  output_asm_insn ("orr\t%0, %0, %R3, asl #17", operands);
  return "";
}
}

static const char *
output_3025 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 337 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md"
{
  /* 16.16 * 16.16 -> 32.32.  */
  output_asm_insn ("umull\t%Q3, %R3, %1, %2", operands);

  if (TARGET_ARM)
    output_asm_insn ("msr\tAPSR_nzcvq, #0", operands);
  else
    {
      output_asm_insn ("mov\t%4, #0", operands);
      output_asm_insn ("msr\tAPSR_nzcvq, %4", operands);
    }

  /* We have:
      31  high word  0     31  low word  0

    [ i i i .... i i i ] [ f f f f ... f f ]
                        |
			v
	     [ i i ... i f ... f f ]

    Need 16 integral bits, so saturate at 16th bit of high word.  */

  output_asm_insn ("usat\t%R3, #16, %R3", operands);
  output_asm_insn ("mrs\t%4, APSR", operands);
  output_asm_insn ("tst\t%4, #1<<27", operands);
  if (arm_restrict_it)
    {
      output_asm_insn ("sbfx\t%4, %R3, #15, #1", operands);
      output_asm_insn ("it\tne", operands);
      output_asm_insn ("movne\t%Q3, %4", operands);
    }
  else
    {
      if (TARGET_THUMB2)
        output_asm_insn ("it\tne", operands);
      output_asm_insn ("sbfxne\t%Q3, %R3, #15, #1", operands);
    }
  output_asm_insn ("lsr\t%0, %Q3, #16", operands);
  output_asm_insn ("orr\t%0, %0, %R3, asl #16", operands);
  return "";
}
}

static const char *
output_3028 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 24 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (which_alternative == 3 || which_alternative == 6)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V16QImode,
	&operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
	return "vmov.f32\t%q0, %1  @ v16qi";
      else
	sprintf (templ, "vmov.i%d\t%%q0, %%x1  @ v16qi", width);
      return templ;
    }

  if (which_alternative == 4 || which_alternative == 7)
    {
      if (V16QImode == V2DFmode || V16QImode == V2DImode || V16QImode == TImode)
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstrw.32\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldrw.u32\t%q0, %E1",operands);
	}
      else
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstrb.8\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldrb.8\t%q0, %E1", operands);
	}
      return "";
    }
  switch (which_alternative)
    {
    case 0:
      return "vmov\t%q0, %q1";
    case 1:
      return "vmov\t%e0, %Q1, %R1  @ v16qi\n\tvmov\t%f0, %J1, %K1";
    case 2:
      return "vmov\t%Q0, %R0, %e1  @ v16qi\n\tvmov\t%J0, %K0, %f1";
    case 5:
      return output_move_quad (operands);
    case 8:
	return output_move_neon (operands);
    default:
      gcc_unreachable ();
      return "";
    }
}
}

static const char *
output_3029 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 24 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (which_alternative == 3 || which_alternative == 6)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V8HImode,
	&operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
	return "vmov.f32\t%q0, %1  @ v8hi";
      else
	sprintf (templ, "vmov.i%d\t%%q0, %%x1  @ v8hi", width);
      return templ;
    }

  if (which_alternative == 4 || which_alternative == 7)
    {
      if (V8HImode == V2DFmode || V8HImode == V2DImode || V8HImode == TImode)
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstrw.32\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldrw.u32\t%q0, %E1",operands);
	}
      else
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstrh.16\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldrh.16\t%q0, %E1", operands);
	}
      return "";
    }
  switch (which_alternative)
    {
    case 0:
      return "vmov\t%q0, %q1";
    case 1:
      return "vmov\t%e0, %Q1, %R1  @ v8hi\n\tvmov\t%f0, %J1, %K1";
    case 2:
      return "vmov\t%Q0, %R0, %e1  @ v8hi\n\tvmov\t%J0, %K0, %f1";
    case 5:
      return output_move_quad (operands);
    case 8:
	return output_move_neon (operands);
    default:
      gcc_unreachable ();
      return "";
    }
}
}

static const char *
output_3030 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 24 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (which_alternative == 3 || which_alternative == 6)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V4SImode,
	&operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
	return "vmov.f32\t%q0, %1  @ v4si";
      else
	sprintf (templ, "vmov.i%d\t%%q0, %%x1  @ v4si", width);
      return templ;
    }

  if (which_alternative == 4 || which_alternative == 7)
    {
      if (V4SImode == V2DFmode || V4SImode == V2DImode || V4SImode == TImode)
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstrw.32\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldrw.u32\t%q0, %E1",operands);
	}
      else
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstrw.32\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldrw.32\t%q0, %E1", operands);
	}
      return "";
    }
  switch (which_alternative)
    {
    case 0:
      return "vmov\t%q0, %q1";
    case 1:
      return "vmov\t%e0, %Q1, %R1  @ v4si\n\tvmov\t%f0, %J1, %K1";
    case 2:
      return "vmov\t%Q0, %R0, %e1  @ v4si\n\tvmov\t%J0, %K0, %f1";
    case 5:
      return output_move_quad (operands);
    case 8:
	return output_move_neon (operands);
    default:
      gcc_unreachable ();
      return "";
    }
}
}

static const char *
output_3031 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 24 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (which_alternative == 3 || which_alternative == 6)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V2DImode,
	&operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
	return "vmov.f32\t%q0, %1  @ v2di";
      else
	sprintf (templ, "vmov.i%d\t%%q0, %%x1  @ v2di", width);
      return templ;
    }

  if (which_alternative == 4 || which_alternative == 7)
    {
      if (V2DImode == V2DFmode || V2DImode == V2DImode || V2DImode == TImode)
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstrw.32\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldrw.u32\t%q0, %E1",operands);
	}
      else
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstr<V_sz_elem1>.64\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldr<V_sz_elem1>.64\t%q0, %E1", operands);
	}
      return "";
    }
  switch (which_alternative)
    {
    case 0:
      return "vmov\t%q0, %q1";
    case 1:
      return "vmov\t%e0, %Q1, %R1  @ v2di\n\tvmov\t%f0, %J1, %K1";
    case 2:
      return "vmov\t%Q0, %R0, %e1  @ v2di\n\tvmov\t%J0, %K0, %f1";
    case 5:
      return output_move_quad (operands);
    case 8:
	return output_move_neon (operands);
    default:
      gcc_unreachable ();
      return "";
    }
}
}

static const char *
output_3032 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 24 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (which_alternative == 3 || which_alternative == 6)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], TImode,
	&operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
	return "vmov.f32\t%q0, %1  @ ti";
      else
	sprintf (templ, "vmov.i%d\t%%q0, %%x1  @ ti", width);
      return templ;
    }

  if (which_alternative == 4 || which_alternative == 7)
    {
      if (TImode == V2DFmode || TImode == V2DImode || TImode == TImode)
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstrw.32\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldrw.u32\t%q0, %E1",operands);
	}
      else
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstr<V_sz_elem1>.<V_sz_elem>\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldr<V_sz_elem1>.<V_sz_elem>\t%q0, %E1", operands);
	}
      return "";
    }
  switch (which_alternative)
    {
    case 0:
      return "vmov\t%q0, %q1";
    case 1:
      return "vmov\t%e0, %Q1, %R1  @ ti\n\tvmov\t%f0, %J1, %K1";
    case 2:
      return "vmov\t%Q0, %R0, %e1  @ ti\n\tvmov\t%J0, %K0, %f1";
    case 5:
      return output_move_quad (operands);
    case 8:
	return output_move_neon (operands);
    default:
      gcc_unreachable ();
      return "";
    }
}
}

static const char *
output_3033 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 24 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (which_alternative == 3 || which_alternative == 6)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V8HFmode,
	&operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
	return "vmov.f32\t%q0, %1  @ v8hf";
      else
	sprintf (templ, "vmov.i%d\t%%q0, %%x1  @ v8hf", width);
      return templ;
    }

  if (which_alternative == 4 || which_alternative == 7)
    {
      if (V8HFmode == V2DFmode || V8HFmode == V2DImode || V8HFmode == TImode)
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstrw.32\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldrw.u32\t%q0, %E1",operands);
	}
      else
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstrh.16\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldrh.16\t%q0, %E1", operands);
	}
      return "";
    }
  switch (which_alternative)
    {
    case 0:
      return "vmov\t%q0, %q1";
    case 1:
      return "vmov\t%e0, %Q1, %R1  @ v8hf\n\tvmov\t%f0, %J1, %K1";
    case 2:
      return "vmov\t%Q0, %R0, %e1  @ v8hf\n\tvmov\t%J0, %K0, %f1";
    case 5:
      return output_move_quad (operands);
    case 8:
	return output_move_neon (operands);
    default:
      gcc_unreachable ();
      return "";
    }
}
}

static const char *
output_3034 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 24 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (which_alternative == 3 || which_alternative == 6)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V4SFmode,
	&operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
	return "vmov.f32\t%q0, %1  @ v4sf";
      else
	sprintf (templ, "vmov.i%d\t%%q0, %%x1  @ v4sf", width);
      return templ;
    }

  if (which_alternative == 4 || which_alternative == 7)
    {
      if (V4SFmode == V2DFmode || V4SFmode == V2DImode || V4SFmode == TImode)
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstrw.32\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldrw.u32\t%q0, %E1",operands);
	}
      else
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstrw.32\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldrw.32\t%q0, %E1", operands);
	}
      return "";
    }
  switch (which_alternative)
    {
    case 0:
      return "vmov\t%q0, %q1";
    case 1:
      return "vmov\t%e0, %Q1, %R1  @ v4sf\n\tvmov\t%f0, %J1, %K1";
    case 2:
      return "vmov\t%Q0, %R0, %e1  @ v4sf\n\tvmov\t%J0, %K0, %f1";
    case 5:
      return output_move_quad (operands);
    case 8:
	return output_move_neon (operands);
    default:
      gcc_unreachable ();
      return "";
    }
}
}

static const char *
output_3035 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 24 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (which_alternative == 3 || which_alternative == 6)
    {
      int width, is_valid;
      static char templ[40];

      is_valid = simd_immediate_valid_for_move (operands[1], V2DFmode,
	&operands[1], &width);

      gcc_assert (is_valid != 0);

      if (width == 0)
	return "vmov.f32\t%q0, %1  @ v2df";
      else
	sprintf (templ, "vmov.i%d\t%%q0, %%x1  @ v2df", width);
      return templ;
    }

  if (which_alternative == 4 || which_alternative == 7)
    {
      if (V2DFmode == V2DFmode || V2DFmode == V2DImode || V2DFmode == TImode)
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstrw.32\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldrw.u32\t%q0, %E1",operands);
	}
      else
	{
	  if (which_alternative == 7)
	    output_asm_insn ("vstr<V_sz_elem1>.<V_sz_elem>\t%q1, %E0", operands);
	  else
	    output_asm_insn ("vldr<V_sz_elem1>.<V_sz_elem>\t%q0, %E1", operands);
	}
      return "";
    }
  switch (which_alternative)
    {
    case 0:
      return "vmov\t%q0, %q1";
    case 1:
      return "vmov\t%e0, %Q1, %R1  @ v2df\n\tvmov\t%f0, %J1, %K1";
    case 2:
      return "vmov\t%Q0, %R0, %e1  @ v2df\n\tvmov\t%J0, %K0, %f1";
    case 5:
      return output_move_quad (operands);
    case 8:
	return output_move_neon (operands);
    default:
      gcc_unreachable ();
      return "";
    }
}
}

static const char *
output_3043 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 101 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[6];
   int regno = REGNO (operands[1]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno+4);
   ops[2] = gen_rtx_REG (TImode, regno+8);
   ops[3] = gen_rtx_REG (TImode, regno+12);
   rtx reg  = operands[0];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[4] = reg;
   ops[5] = operands[0];
   /* Here in first three instructions data is stored to ops[4]'s location but
      in the fourth instruction data is stored to operands[0], this is to
      support the writeback.  */
   output_asm_insn ("vst40.8\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vst41.8\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vst42.8\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vst43.8\t{%q0, %q1, %q2, %q3}, %5", ops);
   return "";
}
}

static const char *
output_3044 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 101 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[6];
   int regno = REGNO (operands[1]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno+4);
   ops[2] = gen_rtx_REG (TImode, regno+8);
   ops[3] = gen_rtx_REG (TImode, regno+12);
   rtx reg  = operands[0];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[4] = reg;
   ops[5] = operands[0];
   /* Here in first three instructions data is stored to ops[4]'s location but
      in the fourth instruction data is stored to operands[0], this is to
      support the writeback.  */
   output_asm_insn ("vst40.16\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vst41.16\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vst42.16\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vst43.16\t{%q0, %q1, %q2, %q3}, %5", ops);
   return "";
}
}

static const char *
output_3045 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 101 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[6];
   int regno = REGNO (operands[1]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno+4);
   ops[2] = gen_rtx_REG (TImode, regno+8);
   ops[3] = gen_rtx_REG (TImode, regno+12);
   rtx reg  = operands[0];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[4] = reg;
   ops[5] = operands[0];
   /* Here in first three instructions data is stored to ops[4]'s location but
      in the fourth instruction data is stored to operands[0], this is to
      support the writeback.  */
   output_asm_insn ("vst40.32\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vst41.32\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vst42.32\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vst43.32\t{%q0, %q1, %q2, %q3}, %5", ops);
   return "";
}
}

static const char *
output_3046 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 101 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[6];
   int regno = REGNO (operands[1]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno+4);
   ops[2] = gen_rtx_REG (TImode, regno+8);
   ops[3] = gen_rtx_REG (TImode, regno+12);
   rtx reg  = operands[0];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[4] = reg;
   ops[5] = operands[0];
   /* Here in first three instructions data is stored to ops[4]'s location but
      in the fourth instruction data is stored to operands[0], this is to
      support the writeback.  */
   output_asm_insn ("vst40.16\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vst41.16\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vst42.16\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vst43.16\t{%q0, %q1, %q2, %q3}, %5", ops);
   return "";
}
}

static const char *
output_3047 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 101 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[6];
   int regno = REGNO (operands[1]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno+4);
   ops[2] = gen_rtx_REG (TImode, regno+8);
   ops[3] = gen_rtx_REG (TImode, regno+12);
   rtx reg  = operands[0];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[4] = reg;
   ops[5] = operands[0];
   /* Here in first three instructions data is stored to ops[4]'s location but
      in the fourth instruction data is stored to operands[0], this is to
      support the writeback.  */
   output_asm_insn ("vst40.32\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vst41.32\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vst42.32\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vst43.32\t{%q0, %q1, %q2, %q3}, %5", ops);
   return "";
}
}

static const char *
output_3185 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 763 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
    return neon_output_shift_immediate ("vshr", 's', &operands[2],
					V16QImode,
					VALID_NEON_QREG_MODE (V16QImode),
					true);
  }
}

static const char *
output_3186 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 763 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
    return neon_output_shift_immediate ("vshr", 's', &operands[2],
					V8HImode,
					VALID_NEON_QREG_MODE (V8HImode),
					true);
  }
}

static const char *
output_3187 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 763 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
    return neon_output_shift_immediate ("vshr", 's', &operands[2],
					V4SImode,
					VALID_NEON_QREG_MODE (V4SImode),
					true);
  }
}

static const char *
output_3188 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 778 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
    return neon_output_shift_immediate ("vshr", 'u', &operands[2],
					V16QImode,
					VALID_NEON_QREG_MODE (V16QImode),
					true);
  }
}

static const char *
output_3189 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 778 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
    return neon_output_shift_immediate ("vshr", 'u', &operands[2],
					V8HImode,
					VALID_NEON_QREG_MODE (V8HImode),
					true);
  }
}

static const char *
output_3190 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 778 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
    return neon_output_shift_immediate ("vshr", 'u', &operands[2],
					V4SImode,
					VALID_NEON_QREG_MODE (V4SImode),
					true);
  }
}

static const char *
output_3269 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vand\t%q0, %q1, %q2";
    case 1:
       return neon_output_logic_immediate ("vand", &operands[2], V16QImode, 1, VALID_NEON_QREG_MODE (V16QImode));
      default: gcc_unreachable ();
    }
}

static const char *
output_3270 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vand\t%q0, %q1, %q2";
    case 1:
       return neon_output_logic_immediate ("vand", &operands[2], V8HImode, 1, VALID_NEON_QREG_MODE (V8HImode));
      default: gcc_unreachable ();
    }
}

static const char *
output_3271 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vand\t%q0, %q1, %q2";
    case 1:
       return neon_output_logic_immediate ("vand", &operands[2], V4SImode, 1, VALID_NEON_QREG_MODE (V4SImode));
      default: gcc_unreachable ();
    }
}

static const char *
output_3407 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vorr\t%q0, %q1, %q2";
    case 1:
       return neon_output_logic_immediate ("vorr", &operands[2], V16QImode, 0, VALID_NEON_QREG_MODE (V16QImode));
      default: gcc_unreachable ();
    }
}

static const char *
output_3408 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vorr\t%q0, %q1, %q2";
    case 1:
       return neon_output_logic_immediate ("vorr", &operands[2], V8HImode, 0, VALID_NEON_QREG_MODE (V8HImode));
      default: gcc_unreachable ();
    }
}

static const char *
output_3409 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
  switch (which_alternative)
    {
    case 0: return "vorr\t%q0, %q1, %q2";
    case 1:
       return neon_output_logic_immediate ("vorr", &operands[2], V4SImode, 0, VALID_NEON_QREG_MODE (V4SImode));
      default: gcc_unreachable ();
    }
}

static const char * const output_3968[] = {
  "vcmul.f%#16	%q0, %q2, %q3, #0",
  "vcmla.f%#16	%q0, %q2, %q3, #0",
};

static const char * const output_3969[] = {
  "vcmul.f%#16	%q0, %q2, %q3, #90",
  "vcmla.f%#16	%q0, %q2, %q3, #90",
};

static const char * const output_3970[] = {
  "vcmul.f%#16	%q0, %q2, %q3, #180",
  "vcmla.f%#16	%q0, %q2, %q3, #180",
};

static const char * const output_3971[] = {
  "vcmul.f%#16	%q0, %q2, %q3, #270",
  "vcmla.f%#16	%q0, %q2, %q3, #270",
};

static const char * const output_3972[] = {
  "vcmul.f%#32	%q0, %q2, %q3, #0",
  "vcmla.f%#32	%q0, %q2, %q3, #0",
};

static const char * const output_3973[] = {
  "vcmul.f%#32	%q0, %q2, %q3, #90",
  "vcmla.f%#32	%q0, %q2, %q3, #90",
};

static const char * const output_3974[] = {
  "vcmul.f%#32	%q0, %q2, %q3, #180",
  "vcmla.f%#32	%q0, %q2, %q3, #180",
};

static const char * const output_3975[] = {
  "vcmul.f%#32	%q0, %q2, %q3, #270",
  "vcmla.f%#32	%q0, %q2, %q3, #270",
};

static const char *
output_4632 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7086 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn("vstrb.8\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4633 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7086 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn("vstrb.8\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4634 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7086 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn("vstrb.16\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4635 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7086 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn("vstrb.16\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4636 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7086 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn("vstrb.32\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4637 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7086 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn("vstrb.32\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4644 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7136 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn("vstrw.u32\t%q2, [%q0, %1]",ops);
   return "";
}
}

static const char *
output_4645 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7136 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn("vstrw.u32\t%q2, [%q0, %1]",ops);
   return "";
}
}

static const char *
output_4646 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7156 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   if (!strcmp ("s","s") && 8 == 8)
     output_asm_insn ("vldrb.u8\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vldrb.s8\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4647 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7156 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   if (!strcmp ("u","s") && 8 == 8)
     output_asm_insn ("vldrb.u8\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vldrb.u8\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4648 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7156 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   if (!strcmp ("s","s") && 16 == 8)
     output_asm_insn ("vldrb.u8\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vldrb.s16\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4649 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7156 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   if (!strcmp ("u","s") && 16 == 8)
     output_asm_insn ("vldrb.u8\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vldrb.u16\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4650 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7156 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   if (!strcmp ("s","s") && 32 == 8)
     output_asm_insn ("vldrb.u8\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vldrb.s32\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4651 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7156 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   if (!strcmp ("u","s") && 32 == 8)
     output_asm_insn ("vldrb.u8\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vldrb.u32\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4652 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (8 == 8)
     output_asm_insn ("vldrb.8\t%q0, %E1",ops);
   else
     output_asm_insn ("vldrb.s8\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4653 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (8 == 8)
     output_asm_insn ("vldrb.8\t%q0, %E1",ops);
   else
     output_asm_insn ("vldrb.u8\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4654 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (16 == 8)
     output_asm_insn ("vldrb.16\t%q0, %E1",ops);
   else
     output_asm_insn ("vldrb.s16\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4655 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (16 == 8)
     output_asm_insn ("vldrb.16\t%q0, %E1",ops);
   else
     output_asm_insn ("vldrb.u16\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4656 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (32 == 8)
     output_asm_insn ("vldrb.32\t%q0, %E1",ops);
   else
     output_asm_insn ("vldrb.s32\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4657 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (32 == 8)
     output_asm_insn ("vldrb.32\t%q0, %E1",ops);
   else
     output_asm_insn ("vldrb.u32\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4658 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vldrw.u32\t%q0, [%q1, %2]",ops);
   return "";
}
}

static const char *
output_4659 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vldrw.u32\t%q0, [%q1, %2]",ops);
   return "";
}
}

static const char *
output_4666 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7256 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vpst\n\tvstrwt.u32\t%q2, [%q0, %1]",ops);
   return "";
}
}

static const char *
output_4667 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7256 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vpst\n\tvstrwt.u32\t%q2, [%q0, %1]",ops);
   return "";
}
}

static const char *
output_4668 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7276 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vpst\n\tvstrbt.8\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4669 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7276 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vpst\n\tvstrbt.8\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4670 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7276 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vpst\n\tvstrbt.16\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4671 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7276 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vpst\n\tvstrbt.16\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4672 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7276 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vpst\n\tvstrbt.32\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4673 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7276 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vpst\n\tvstrbt.32\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4674 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7297 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   if (!strcmp ("s","s") && 8 == 8)
     output_asm_insn ("vpst\n\tvldrbt.u8\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vpst\n\tvldrbt.s8\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4675 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7297 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   if (!strcmp ("u","s") && 8 == 8)
     output_asm_insn ("vpst\n\tvldrbt.u8\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vpst\n\tvldrbt.u8\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4676 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7297 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   if (!strcmp ("s","s") && 16 == 8)
     output_asm_insn ("vpst\n\tvldrbt.u8\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vpst\n\tvldrbt.s16\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4677 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7297 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   if (!strcmp ("u","s") && 16 == 8)
     output_asm_insn ("vpst\n\tvldrbt.u8\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vpst\n\tvldrbt.u16\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4678 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7297 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   if (!strcmp ("s","s") && 32 == 8)
     output_asm_insn ("vpst\n\tvldrbt.u8\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vpst\n\tvldrbt.s32\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4679 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7297 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   if (!strcmp ("u","s") && 32 == 8)
     output_asm_insn ("vpst\n\tvldrbt.u8\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vpst\n\tvldrbt.u32\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4680 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7321 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (8 == 8)
     output_asm_insn ("vpst\n\tvldrbt.8\t%q0, %E1",ops);
   else
     output_asm_insn ("vpst\n\tvldrbt.s8\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4681 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7321 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (8 == 8)
     output_asm_insn ("vpst\n\tvldrbt.8\t%q0, %E1",ops);
   else
     output_asm_insn ("vpst\n\tvldrbt.u8\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4682 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7321 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (16 == 8)
     output_asm_insn ("vpst\n\tvldrbt.16\t%q0, %E1",ops);
   else
     output_asm_insn ("vpst\n\tvldrbt.s16\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4683 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7321 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (16 == 8)
     output_asm_insn ("vpst\n\tvldrbt.16\t%q0, %E1",ops);
   else
     output_asm_insn ("vpst\n\tvldrbt.u16\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4684 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7321 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (32 == 8)
     output_asm_insn ("vpst\n\tvldrbt.32\t%q0, %E1",ops);
   else
     output_asm_insn ("vpst\n\tvldrbt.s32\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4685 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7321 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (32 == 8)
     output_asm_insn ("vpst\n\tvldrbt.32\t%q0, %E1",ops);
   else
     output_asm_insn ("vpst\n\tvldrbt.u32\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4686 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7345 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%q1, %2]",ops);
   return "";
}
}

static const char *
output_4687 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7345 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%q1, %2]",ops);
   return "";
}
}

static const char *
output_4688 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7364 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   output_asm_insn ("vldrh.16\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4689 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7384 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   if (!strcmp ("s","s") && 16 == 16)
     output_asm_insn ("vldrh.u16\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vldrh.s16\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4690 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7384 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   if (!strcmp ("u","s") && 16 == 16)
     output_asm_insn ("vldrh.u16\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vldrh.u16\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4691 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7384 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   if (!strcmp ("s","s") && 32 == 16)
     output_asm_insn ("vldrh.u16\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vldrh.s32\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4692 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7384 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   if (!strcmp ("u","s") && 32 == 16)
     output_asm_insn ("vldrh.u16\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vldrh.u32\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4693 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7408 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   if (!strcmp ("s","s") && 16 == 16)
     output_asm_insn ("vpst\n\tvldrht.u16\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vpst\n\tvldrht.s16\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4694 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7408 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   if (!strcmp ("u","s") && 16 == 16)
     output_asm_insn ("vpst\n\tvldrht.u16\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vpst\n\tvldrht.u16\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4695 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7408 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   if (!strcmp ("s","s") && 32 == 16)
     output_asm_insn ("vpst\n\tvldrht.u16\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vpst\n\tvldrht.s32\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4696 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7408 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   if (!strcmp ("u","s") && 32 == 16)
     output_asm_insn ("vpst\n\tvldrht.u16\t%q0, [%m1, %q2]",ops);
   else
     output_asm_insn ("vpst\n\tvldrht.u32\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4697 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7432 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
      if (!strcmp ("s","s") && 16 == 16)
     output_asm_insn ("vldrh.u16\t%q0, [%m1, %q2, uxtw #1]",ops);
   else
     output_asm_insn ("vldrh.s16\t%q0, [%m1, %q2, uxtw #1]",ops);
   return "";
}
}

static const char *
output_4698 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7432 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
      if (!strcmp ("u","s") && 16 == 16)
     output_asm_insn ("vldrh.u16\t%q0, [%m1, %q2, uxtw #1]",ops);
   else
     output_asm_insn ("vldrh.u16\t%q0, [%m1, %q2, uxtw #1]",ops);
   return "";
}
}

static const char *
output_4699 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7432 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
      if (!strcmp ("s","s") && 32 == 16)
     output_asm_insn ("vldrh.u16\t%q0, [%m1, %q2, uxtw #1]",ops);
   else
     output_asm_insn ("vldrh.s32\t%q0, [%m1, %q2, uxtw #1]",ops);
   return "";
}
}

static const char *
output_4700 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7432 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
      if (!strcmp ("u","s") && 32 == 16)
     output_asm_insn ("vldrh.u16\t%q0, [%m1, %q2, uxtw #1]",ops);
   else
     output_asm_insn ("vldrh.u32\t%q0, [%m1, %q2, uxtw #1]",ops);
   return "";
}
}

static const char *
output_4701 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7456 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   if (!strcmp ("s","s") && 16 == 16)
     output_asm_insn ("vpst\n\tvldrht.u16\t%q0, [%m1, %q2, uxtw #1]",ops);
   else
     output_asm_insn ("vpst\n\tvldrht.s16\t%q0, [%m1, %q2, uxtw #1]",ops);
   return "";
}
}

static const char *
output_4702 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7456 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   if (!strcmp ("u","s") && 16 == 16)
     output_asm_insn ("vpst\n\tvldrht.u16\t%q0, [%m1, %q2, uxtw #1]",ops);
   else
     output_asm_insn ("vpst\n\tvldrht.u16\t%q0, [%m1, %q2, uxtw #1]",ops);
   return "";
}
}

static const char *
output_4703 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7456 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   if (!strcmp ("s","s") && 32 == 16)
     output_asm_insn ("vpst\n\tvldrht.u16\t%q0, [%m1, %q2, uxtw #1]",ops);
   else
     output_asm_insn ("vpst\n\tvldrht.s32\t%q0, [%m1, %q2, uxtw #1]",ops);
   return "";
}
}

static const char *
output_4704 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7456 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   if (!strcmp ("u","s") && 32 == 16)
     output_asm_insn ("vpst\n\tvldrht.u16\t%q0, [%m1, %q2, uxtw #1]",ops);
   else
     output_asm_insn ("vpst\n\tvldrht.u32\t%q0, [%m1, %q2, uxtw #1]",ops);
   return "";
}
}

static const char *
output_4705 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7479 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (16 == 16)
     output_asm_insn ("vldrh.16\t%q0, %E1",ops);
   else
     output_asm_insn ("vldrh.s16\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4706 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7479 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (16 == 16)
     output_asm_insn ("vldrh.16\t%q0, %E1",ops);
   else
     output_asm_insn ("vldrh.u16\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4707 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7479 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (32 == 16)
     output_asm_insn ("vldrh.16\t%q0, %E1",ops);
   else
     output_asm_insn ("vldrh.s32\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4708 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7479 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (32 == 16)
     output_asm_insn ("vldrh.16\t%q0, %E1",ops);
   else
     output_asm_insn ("vldrh.u32\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4709 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7502 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   output_asm_insn ("vpst\n\tvldrht.16\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4710 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7522 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (16 == 16)
     output_asm_insn ("vpst\n\tvldrht.16\t%q0, %E1",ops);
   else
     output_asm_insn ("vpst\n\tvldrht.s16\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4711 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7522 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (16 == 16)
     output_asm_insn ("vpst\n\tvldrht.16\t%q0, %E1",ops);
   else
     output_asm_insn ("vpst\n\tvldrht.u16\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4712 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7522 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (32 == 16)
     output_asm_insn ("vpst\n\tvldrht.16\t%q0, %E1",ops);
   else
     output_asm_insn ("vpst\n\tvldrht.s32\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4713 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7522 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   if (32 == 16)
     output_asm_insn ("vpst\n\tvldrht.16\t%q0, %E1",ops);
   else
     output_asm_insn ("vpst\n\tvldrht.u32\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4714 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7544 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   output_asm_insn ("vldrw.32\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4715 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   output_asm_insn ("vldrw.32\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4716 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   output_asm_insn ("vldrw.32\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4717 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   output_asm_insn ("vpst\n\tvldrwt.32\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4718 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7603 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   output_asm_insn ("vpst\n\tvldrwt.32\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4719 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7603 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1]  = operands[1];
   output_asm_insn ("vpst\n\tvldrwt.32\t%q0, %E1",ops);
   return "";
}
}

static const char *
output_4720 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7643 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vldrd.64\t%q0, [%q1, %2]",ops);
   return "";
}
}

static const char *
output_4721 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7643 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vldrd.64\t%q0, [%q1, %2]",ops);
   return "";
}
}

static const char *
output_4722 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7664 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vpst\n\tvldrdt.u64\t%q0, [%q1, %2]",ops);
   return "";
}
}

static const char *
output_4723 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7664 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vpst\n\tvldrdt.u64\t%q0, [%q1, %2]",ops);
   return "";
}
}

static const char *
output_4724 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7684 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  rtx ops[3];
  ops[0] = operands[0];
  ops[1] = operands[1];
  ops[2] = operands[2];
  output_asm_insn ("vldrd.u64\t%q0, [%m1, %q2]",ops);
  return "";
}
}

static const char *
output_4725 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7684 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  rtx ops[3];
  ops[0] = operands[0];
  ops[1] = operands[1];
  ops[2] = operands[2];
  output_asm_insn ("vldrd.u64\t%q0, [%m1, %q2]",ops);
  return "";
}
}

static const char *
output_4726 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7705 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  rtx ops[3];
  ops[0] = operands[0];
  ops[1] = operands[1];
  ops[2] = operands[2];
  output_asm_insn ("vpst\n\tvldrdt.u64\t%q0, [%m1, %q2]",ops);
  return "";
}
}

static const char *
output_4727 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7705 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  rtx ops[3];
  ops[0] = operands[0];
  ops[1] = operands[1];
  ops[2] = operands[2];
  output_asm_insn ("vpst\n\tvldrdt.u64\t%q0, [%m1, %q2]",ops);
  return "";
}
}

static const char *
output_4728 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7725 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vldrd.u64\t%q0, [%m1, %q2, uxtw #3]",ops);
   return "";
}
}

static const char *
output_4729 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7725 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vldrd.u64\t%q0, [%m1, %q2, uxtw #3]",ops);
   return "";
}
}

static const char *
output_4730 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7746 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vpst\n\tvldrdt.u64\t%q0, [%m1, %q2, uxtw #3]",ops);
   return "";
}
}

static const char *
output_4731 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7746 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vpst\n\tvldrdt.u64\t%q0, [%m1, %q2, uxtw #3]",ops);
   return "";
}
}

static const char *
output_4732 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7766 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vldrh.f16\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4733 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7787 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   output_asm_insn ("vpst\n\tvldrht.f16\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4734 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7808 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vldrh.f16\t%q0, [%m1, %q2, uxtw #1]",ops);
   return "";
}
}

static const char *
output_4735 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   output_asm_insn ("vpst\n\tvldrht.f16\t%q0, [%m1, %q2, uxtw #1]",ops);
   return "";
}
}

static const char *
output_4736 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7850 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vldrw.u32\t%q0, [%q1, %2]",ops);
   return "";
}
}

static const char *
output_4737 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7871 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%q1, %2]",ops);
   return "";
}
}

static const char *
output_4738 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7891 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vldrw.u32\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4739 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vldrw.u32\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4740 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vldrw.u32\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4741 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7932 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4742 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7954 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4743 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7954 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%m1, %q2]",ops);
   return "";
}
}

static const char *
output_4744 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7975 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vldrw.u32\t%q0, [%m1, %q2, uxtw #2]",ops);
   return "";
}
}

static const char *
output_4745 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7995 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vldrw.u32\t%q0, [%m1, %q2, uxtw #2]",ops);
   return "";
}
}

static const char *
output_4746 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7995 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vldrw.u32\t%q0, [%m1, %q2, uxtw #2]",ops);
   return "";
}
}

static const char *
output_4747 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8016 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%m1, %q2, uxtw #2]",ops);
   return "";
}
}

static const char *
output_4748 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8038 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%m1, %q2, uxtw #2]",ops);
   return "";
}
}

static const char *
output_4749 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8038 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   ops[3] = operands[3];
   output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%m1, %q2, uxtw #2]",ops);
   return "";
}
}

static const char *
output_4750 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8058 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vstrh.16\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4751 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8078 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vpst\n\tvstrht.16\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4752 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8098 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vpst\n\tvstrht.16\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4753 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8098 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vpst\n\tvstrht.16\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4754 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8098 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vpst\n\tvstrht.32\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4755 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8098 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vpst\n\tvstrht.32\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4772 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8238 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vstrh.16\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4773 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8238 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vstrh.16\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4774 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8238 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vstrh.32\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4775 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8238 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vstrh.32\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4776 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8257 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vstrw.32\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4777 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8277 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vpst\n\tvstrwt.32\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4778 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8297 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vpst\n\tvstrwt.32\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4779 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8297 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vpst\n\tvstrwt.32\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4780 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8316 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vstrw.32\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4781 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8316 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[2];
   int regno = REGNO (operands[1]);
   ops[1] = gen_rtx_REG (TImode, regno);
   ops[0]  = operands[0];
   output_asm_insn ("vstrw.32\t%q1, %E0",ops);
   return "";
}
}

static const char *
output_4782 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8359 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vpst\n\t\tvstrdt.u64\t%q2, [%q0, %1]",ops);
   return "";
}
}

static const char *
output_4783 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8359 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vpst\n\t\tvstrdt.u64\t%q2, [%q0, %1]",ops);
   return "";
}
}

static const char *
output_4784 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8381 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vstrd.u64\t%q2, [%q0, %1]",ops);
   return "";
}
}

static const char *
output_4785 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8381 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vstrd.u64\t%q2, [%q0, %1]",ops);
   return "";
}
}

static const char *
output_4798 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8642 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vstrw.u32\t%q2, [%q0, %1]",ops);
   return "";
}
}

static const char *
output_4799 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8665 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[1];
   ops[2] = operands[2];
   output_asm_insn ("vpst\n\tvstrwt.u32\t%q2, [%q0, %1]",ops);
   return "";
}
}

static const char *
output_4841 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9327 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[1];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vstrw.u32\t%q2, [%q0, %1]!",ops);
   return "";
}
}

static const char *
output_4842 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9327 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[1];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vstrw.u32\t%q2, [%q0, %1]!",ops);
   return "";
}
}

static const char *
output_4843 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[1];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vpst\n\t\tvstrwt.u32\t%q2, [%q0, %1]!",ops);
   return "";
}
}

static const char *
output_4844 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[1];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vpst\n\t\tvstrwt.u32\t%q2, [%q0, %1]!",ops);
   return "";
}
}

static const char *
output_4845 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9378 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[1];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vstrw.u32\t%q2, [%q0, %1]!",ops);
   return "";
}
}

static const char *
output_4846 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9404 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[1];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vpst\n\t\tvstrwt.u32\t%q2, [%q0, %1]!",ops);
   return "";
}
}

static const char *
output_4847 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9429 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[1];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vstrd.u64\t%q2, [%q0, %1]!",ops);
   return "";
}
}

static const char *
output_4848 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9429 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[1];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vstrd.u64\t%q2, [%q0, %1]!",ops);
   return "";
}
}

static const char *
output_4849 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9455 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[1];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vpst;vstrdt.u64\t%q2, [%q0, %1]!",ops);
   return "";
}
}

static const char *
output_4850 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9455 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[1];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vpst;vstrdt.u64\t%q2, [%q0, %1]!",ops);
   return "";
}
}

static const char *
output_4851 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9507 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vldrw.u32\t%q0, [%q1, %2]!",ops);
   return "";
}
}

static const char *
output_4852 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9507 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vldrw.u32\t%q0, [%q1, %2]!",ops);
   return "";
}
}

static const char *
output_4853 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%q1, %2]!",ops);
   return "";
}
}

static const char *
output_4854 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%q1, %2]!",ops);
   return "";
}
}

static const char *
output_4855 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9615 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vldrw.u32\t%q0, [%q1, %2]!",ops);
   return "";
}
}

static const char *
output_4856 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9672 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%q1, %2]!",ops);
   return "";
}
}

static const char *
output_4857 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9725 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vldrd.64\t%q0, [%q1, %2]!",ops);
   return "";
}
}

static const char *
output_4858 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9725 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vldrd.64\t%q0, [%q1, %2]!",ops);
   return "";
}
}

static const char *
output_4861 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9797 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vpst\n\tvldrdt.u64\t%q0, [%q1, %2]!",ops);
   return "";
}
}

static const char *
output_4862 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9797 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[3];
   ops[0] = operands[0];
   ops[1] = operands[2];
   ops[2] = operands[3];
   output_asm_insn ("vpst\n\tvldrdt.u64\t%q0, [%q1, %2]!",ops);
   return "";
}
}

static const char *
output_4879 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9962 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   int regno = REGNO (operands[1]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno + 4);
   rtx reg  = operands[0];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[2] = reg;
   ops[3] = operands[0];
   output_asm_insn ("vst20.8\t{%q0, %q1}, [%2]\n\t"
		    "vst21.8\t{%q0, %q1}, %3", ops);
   return "";
}
}

static const char *
output_4880 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9962 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   int regno = REGNO (operands[1]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno + 4);
   rtx reg  = operands[0];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[2] = reg;
   ops[3] = operands[0];
   output_asm_insn ("vst20.16\t{%q0, %q1}, [%2]\n\t"
		    "vst21.16\t{%q0, %q1}, %3", ops);
   return "";
}
}

static const char *
output_4881 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9962 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   int regno = REGNO (operands[1]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno + 4);
   rtx reg  = operands[0];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[2] = reg;
   ops[3] = operands[0];
   output_asm_insn ("vst20.32\t{%q0, %q1}, [%2]\n\t"
		    "vst21.32\t{%q0, %q1}, %3", ops);
   return "";
}
}

static const char *
output_4882 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9962 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   int regno = REGNO (operands[1]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno + 4);
   rtx reg  = operands[0];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[2] = reg;
   ops[3] = operands[0];
   output_asm_insn ("vst20.16\t{%q0, %q1}, [%2]\n\t"
		    "vst21.16\t{%q0, %q1}, %3", ops);
   return "";
}
}

static const char *
output_4883 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9962 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   int regno = REGNO (operands[1]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno + 4);
   rtx reg  = operands[0];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[2] = reg;
   ops[3] = operands[0];
   output_asm_insn ("vst20.32\t{%q0, %q1}, [%2]\n\t"
		    "vst21.32\t{%q0, %q1}, %3", ops);
   return "";
}
}

static const char *
output_4884 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9990 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno + 4);
   rtx reg  = operands[1];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[2] = reg;
   ops[3] = operands[1];
   output_asm_insn ("vld20.8\t{%q0, %q1}, [%2]\n\t"
		    "vld21.8\t{%q0, %q1}, %3", ops);
   return "";
}
}

static const char *
output_4885 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9990 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno + 4);
   rtx reg  = operands[1];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[2] = reg;
   ops[3] = operands[1];
   output_asm_insn ("vld20.16\t{%q0, %q1}, [%2]\n\t"
		    "vld21.16\t{%q0, %q1}, %3", ops);
   return "";
}
}

static const char *
output_4886 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9990 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno + 4);
   rtx reg  = operands[1];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[2] = reg;
   ops[3] = operands[1];
   output_asm_insn ("vld20.32\t{%q0, %q1}, [%2]\n\t"
		    "vld21.32\t{%q0, %q1}, %3", ops);
   return "";
}
}

static const char *
output_4887 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9990 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno + 4);
   rtx reg  = operands[1];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[2] = reg;
   ops[3] = operands[1];
   output_asm_insn ("vld20.16\t{%q0, %q1}, [%2]\n\t"
		    "vld21.16\t{%q0, %q1}, %3", ops);
   return "";
}
}

static const char *
output_4888 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 9990 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[4];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno + 4);
   rtx reg  = operands[1];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[2] = reg;
   ops[3] = operands[1];
   output_asm_insn ("vld20.32\t{%q0, %q1}, [%2]\n\t"
		    "vld21.32\t{%q0, %q1}, %3", ops);
   return "";
}
}

static const char *
output_4889 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10018 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[6];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno+4);
   ops[2] = gen_rtx_REG (TImode, regno+8);
   ops[3] = gen_rtx_REG (TImode, regno + 12);
   rtx reg  = operands[1];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[4] = reg;
   ops[5] = operands[1];
   output_asm_insn ("vld40.8\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vld41.8\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vld42.8\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vld43.8\t{%q0, %q1, %q2, %q3}, %5", ops);
   return "";
}
}

static const char *
output_4890 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10018 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[6];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno+4);
   ops[2] = gen_rtx_REG (TImode, regno+8);
   ops[3] = gen_rtx_REG (TImode, regno + 12);
   rtx reg  = operands[1];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[4] = reg;
   ops[5] = operands[1];
   output_asm_insn ("vld40.16\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vld41.16\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vld42.16\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vld43.16\t{%q0, %q1, %q2, %q3}, %5", ops);
   return "";
}
}

static const char *
output_4891 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10018 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[6];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno+4);
   ops[2] = gen_rtx_REG (TImode, regno+8);
   ops[3] = gen_rtx_REG (TImode, regno + 12);
   rtx reg  = operands[1];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[4] = reg;
   ops[5] = operands[1];
   output_asm_insn ("vld40.32\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vld41.32\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vld42.32\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vld43.32\t{%q0, %q1, %q2, %q3}, %5", ops);
   return "";
}
}

static const char *
output_4892 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10018 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[6];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno+4);
   ops[2] = gen_rtx_REG (TImode, regno+8);
   ops[3] = gen_rtx_REG (TImode, regno + 12);
   rtx reg  = operands[1];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[4] = reg;
   ops[5] = operands[1];
   output_asm_insn ("vld40.16\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vld41.16\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vld42.16\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vld43.16\t{%q0, %q1, %q2, %q3}, %5", ops);
   return "";
}
}

static const char *
output_4893 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10018 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
   rtx ops[6];
   int regno = REGNO (operands[0]);
   ops[0] = gen_rtx_REG (TImode, regno);
   ops[1] = gen_rtx_REG (TImode, regno+4);
   ops[2] = gen_rtx_REG (TImode, regno+8);
   ops[3] = gen_rtx_REG (TImode, regno + 12);
   rtx reg  = operands[1];
   while (reg && !REG_P (reg))
    reg = XEXP (reg, 0);
   gcc_assert (REG_P (reg));
   ops[4] = reg;
   ops[5] = operands[1];
   output_asm_insn ("vld40.32\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vld41.32\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vld42.32\t{%q0, %q1, %q2, %q3}, [%4]\n\t"
		    "vld43.32\t{%q0, %q1, %q2, %q3}, %5", ops);
   return "";
}
}

static const char *
output_4894 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10048 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V16QImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.u8\t%0, %q1[%c2]";
}
}

static const char *
output_4895 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10048 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V8HImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.u16\t%0, %q1[%c2]";
}
}

static const char *
output_4896 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10048 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V4SImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.32\t%0, %q1[%c2]";
}
}

static const char *
output_4897 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10048 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V8HFmode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.u16\t%0, %q1[%c2]";
}
}

static const char *
output_4898 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10048 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V4SFmode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.32\t%0, %q1[%c2]";
}
}

static const char *
output_4899 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10065 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  int elt = INTVAL (operands[2]);
  if (BYTES_BIG_ENDIAN)
    elt = 1 - elt;

  if (elt == 0)
   return "vmov\t%Q0, %R0, %e1";
  else
   return "vmov\t%Q0, %R0, %f1";
}
}

static const char *
output_4900 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10085 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V16QImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.s8\t%0, %q1[%c2]";
}
}

static const char *
output_4901 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10085 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V8HImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.s16\t%0, %q1[%c2]";
}
}

static const char *
output_4902 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10085 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V4SImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.s32\t%0, %q1[%c2]";
}
}

static const char *
output_4903 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10104 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V16QImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.u8\t%0, %q1[%c2]";
}
}

static const char *
output_4904 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10104 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V8HImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.u16\t%0, %q1[%c2]";
}
}

static const char *
output_4905 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10104 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      int elt = INTVAL (operands[2]);
      elt = GET_MODE_NUNITS (V4SImode) - 1 - elt;
      operands[2] = GEN_INT (elt);
    }
  return "vmov.u32\t%0, %q1[%c2]";
}
}

static const char *
output_4906 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10127 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  int elt = ffs ((int) INTVAL (operands[2])) - 1;
  if (BYTES_BIG_ENDIAN)
    elt = GET_MODE_NUNITS (V16QImode) - 1 - elt;
  operands[2] = GEN_INT (elt);

  return "vmov.8\t%q0[%c2], %1";
}
}

static const char *
output_4907 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10127 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  int elt = ffs ((int) INTVAL (operands[2])) - 1;
  if (BYTES_BIG_ENDIAN)
    elt = GET_MODE_NUNITS (V8HImode) - 1 - elt;
  operands[2] = GEN_INT (elt);

  return "vmov.16\t%q0[%c2], %1";
}
}

static const char *
output_4908 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10127 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  int elt = ffs ((int) INTVAL (operands[2])) - 1;
  if (BYTES_BIG_ENDIAN)
    elt = GET_MODE_NUNITS (V8HFmode) - 1 - elt;
  operands[2] = GEN_INT (elt);

  return "vmov.16\t%q0[%c2], %1";
}
}

static const char *
output_4909 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10127 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  int elt = ffs ((int) INTVAL (operands[2])) - 1;
  if (BYTES_BIG_ENDIAN)
    elt = GET_MODE_NUNITS (V4SImode) - 1 - elt;
  operands[2] = GEN_INT (elt);

  return "vmov.32\t%q0[%c2], %1";
}
}

static const char *
output_4910 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10127 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  int elt = ffs ((int) INTVAL (operands[2])) - 1;
  if (BYTES_BIG_ENDIAN)
    elt = GET_MODE_NUNITS (V4SFmode) - 1 - elt;
  operands[2] = GEN_INT (elt);

  return "vmov.32\t%q0[%c2], %1";
}
}

static const char *
output_4911 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 10145 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md"
{
  int elt = ffs ((int) INTVAL (operands[2])) - 1;
  if (BYTES_BIG_ENDIAN)
    elt = 1 - elt;

  if (elt == 0)
   return "vmov\t%e0, %Q1, %R1";
  else
   return "vmov\t%f0, %J1, %K1";
}
}

static const char * const output_6318[] = {
  "add%?\t%0, %0, %2",
  "add%?\t%0, %1, %2",
  "add%?\t%0, %1, %2",
  "add%?\t%0, %1, %2",
  "add%?\t%0, %1, %2",
  "add%?\t%0, %1, %2",
  "add%?\t%0, %2, %1",
  "add%?\t%0, %1, %2",
  "addw%?\t%0, %1, %2",
  "addw%?\t%0, %1, %2",
  "sub%?\t%0, %1, #%n2",
  "sub%?\t%0, %1, #%n2",
  "sub%?\t%0, %1, #%n2",
  "subw%?\t%0, %1, #%n2",
  "subw%?\t%0, %1, #%n2",
  "#",
};

static const char * const output_6319[] = {
  "cmn%?\t%0, %1",
  "cmp%?\t%0, #%n1",
  "cmn%?\t%0, %1",
};

static const char * const output_6321[] = {
  "cmn%?\t%0, %1",
  "cmp%?\t%0, #%n1",
  "cmn%?\t%0, %1",
  "cmp%?\t%0, #%n1",
};

static const char * const output_6322[] = {
  "cmn%?\t%0, %1",
  "cmp%?\t%0, #%n1",
  "cmn%?\t%0, %1",
  "cmp%?\t%0, #%n1",
};

static const char * const output_6323[] = {
  "adc%?\t%0, %1, %2",
  "adc%?\t%0, %1, %2",
  "sbc%?\t%0, %1, #%B2",
};

static const char * const output_6325[] = {
  "adc%?\t%0, %1, %2",
  "adc%?\t%0, %1, %2",
  "sbc%?\t%0, %1, #%B2",
};

static const char * const output_6327[] = {
  "sbc%?\t%0, %1, %2",
  "rsc%?\t%0, %2, %1",
  "sbc%?\t%0, %2, %2, lsl #1",
};

static const char * const output_6329[] = {
  "sbc%?\t%0, %2, %1",
  "rsc%?\t%0, %1, %2",
};

static const char * const output_6335[] = {
  "sub%?\t%0, %1, %2",
  "sub%?\t%0, %2",
  "sub%?\t%0, %1, %2",
  "rsb%?\t%0, %2, %1",
  "rsb%?\t%0, %2, %1",
  "sub%?\t%0, %1, %2",
  "sub%?\t%0, %1, %2",
  "sub%?\t%0, %1, %2",
  "#",
};

static const char * const output_6362[] = {
  "and%?\t%0, %1, %2",
  "and%?\t%0, %1, %2",
  "bic%?\t%0, %1, #%B2",
  "and%?\t%0, %1, %2",
  "#",
};

static const char *
output_6363 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  operands[1] = GEN_INT (((1 << INTVAL (operands[1])) - 1)
			 << INTVAL (operands[2]));
  output_asm_insn ("tst%?\t%0, %1", operands);
  return "";
  
}

static const char * const output_6370[] = {
  "orr%?\t%0, %1, %2",
  "orr%?\t%0, %1, %2",
  "orn%?\t%0, %1, #%B2",
  "orr%?\t%0, %1, %2",
  "#",
};

static const char * const output_6371[] = {
  "eor%?\t%0, %1, %2",
  "eor%?\t%0, %1, %2",
  "eor%?\t%0, %1, %2",
  "#",
};

static const char *
output_6382 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4376 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  int mask;
  bool signed_sat;
  if (!arm_sat_operator_match (operands[1], operands[2],
                               &mask, &signed_sat))
    gcc_unreachable ();

  operands[1] = GEN_INT (mask);
  if (signed_sat)
    return "ssat%?\t%0, %1, %3";
  else
    return "usat%?\t%0, %1, %3";
}
}

static const char *
output_6383 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4376 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  int mask;
  bool signed_sat;
  if (!arm_sat_operator_match (operands[1], operands[2],
                               &mask, &signed_sat))
    gcc_unreachable ();

  operands[1] = GEN_INT (mask);
  if (signed_sat)
    return "ssat%?\t%0, %1, %3";
  else
    return "usat%?\t%0, %1, %3";
}
}

static const char *
output_6384 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4376 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  int mask;
  bool signed_sat;
  if (!arm_sat_operator_match (operands[2], operands[1],
                               &mask, &signed_sat))
    gcc_unreachable ();

  operands[1] = GEN_INT (mask);
  if (signed_sat)
    return "ssat%?\t%0, %1, %3";
  else
    return "usat%?\t%0, %1, %3";
}
}

static const char *
output_6385 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4376 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  int mask;
  bool signed_sat;
  if (!arm_sat_operator_match (operands[2], operands[1],
                               &mask, &signed_sat))
    gcc_unreachable ();

  operands[1] = GEN_INT (mask);
  if (signed_sat)
    return "ssat%?\t%0, %1, %3";
  else
    return "usat%?\t%0, %1, %3";
}
}

static const char *
output_6386 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4402 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  int mask;
  bool signed_sat;
  if (!arm_sat_operator_match (operands[1], operands[2],
                               &mask, &signed_sat))
    gcc_unreachable ();

  operands[1] = GEN_INT (mask);
  if (signed_sat)
    return "ssat%?\t%0, %1, %4%S3";
  else
    return "usat%?\t%0, %1, %4%S3";
}
}

static const char *
output_6387 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4402 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  int mask;
  bool signed_sat;
  if (!arm_sat_operator_match (operands[2], operands[1],
                               &mask, &signed_sat))
    gcc_unreachable ();

  operands[1] = GEN_INT (mask);
  if (signed_sat)
    return "ssat%?\t%0, %1, %4%S3";
  else
    return "usat%?\t%0, %1, %4%S3";
}
}

static const char *
output_6388 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 4651 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
 return arm_output_shift(operands, 0);
}

static const char * const output_6390[] = {
  "ldr\t%0, %1\t@ unaligned",
  "ldr%?\t%0, %1\t@ unaligned",
  "ldr%?\t%0, %1\t@ unaligned",
};

static const char * const output_6392[] = {
  "ldrh\t%0, %1\t@ unaligned",
  "ldrh%?\t%0, %1\t@ unaligned",
  "ldrh%?\t%0, %1\t@ unaligned",
};

static const char * const output_6393[] = {
  "str\t%1, %0\t@ unaligned",
  "str%?\t%1, %0\t@ unaligned",
  "str%?\t%1, %0\t@ unaligned",
};

static const char * const output_6394[] = {
  "strh\t%1, %0\t@ unaligned",
  "strh%?\t%1, %0\t@ unaligned",
  "strh%?\t%1, %0\t@ unaligned",
};

static const char * const output_6397[] = {
  "sdiv%?\t%0, %1, %2",
  "sdiv\t%0, %1, %2",
};

static const char * const output_6398[] = {
  "udiv%?\t%0, %1, %2",
  "udiv\t%0, %1, %2",
};

static const char * const output_6403[] = {
  "#",
  "ldrh%?\t%0, %1",
};

static const char * const output_6404[] = {
  "uxth%?\t%0, %1",
  "ldrh%?\t%0, %1",
};

static const char * const output_6406[] = {
  "#",
  "ldrb%?\t%0, %1\t%@ zero_extendqisi2",
};

static const char * const output_6407[] = {
  "uxtb%?\t%0, %1",
  "ldrb%?\t%0, %1\t%@ zero_extendqisi2",
};

static const char * const output_6410[] = {
  "#",
  "ldrsh%?\t%0, %1",
};

static const char * const output_6411[] = {
  "sxth%?\t%0, %1",
  "ldrsh%?\t%0, %1",
};

static const char * const output_6413[] = {
  "#",
  "ldrsb%?\t%0, %1",
};

static const char * const output_6414[] = {
  "sxtb%?\t%0, %1",
  "ldrsb%?\t%0, %1",
};

static const char * const output_6481[] = {
  "movt%?\t%0, #:upper16:%c2",
  "movt\t%0, #:upper16:%c2",
};

static const char * const output_6482[] = {
  "mov%?\t%0, %1",
  "mov%?\t%0, %1",
  "mvn%?\t%0, #%B1",
  "movw%?\t%0, %1",
  "ldr%?\t%0, %1",
  "str%?\t%1, %0",
};

static const char *
output_6483 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 6653 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

    (*targetm.asm_out.internal_label) (asm_out_file, "LPIC",
				       INTVAL (operands[2]));
    return "add%?\t%0, %|pc, %1";
  
}

static const char *
output_6484 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 6669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

    (*targetm.asm_out.internal_label) (asm_out_file, "LPIC",
				       INTVAL (operands[2]));
    return "ldr%?\t%0, [%|pc, %1]\t\t@ tls_load_dot_plus_eight";
  
}

static const char * const output_6485[] = {
  "mov%?\t%0, %1\t%@ movhi",
  "mvn%?\t%0, #%B1\t%@ movhi",
  "movw%?\t%0, %L1\t%@ movhi",
  "strh%?\t%1, %0\t%@ movhi",
  "ldrh%?\t%0, %1\t%@ movhi",
};

static const char * const output_6486[] = {
  "mov%?\t%0, %1\t%@ movhi",
  "mov%?\t%0, %1\t%@ movhi",
  "mvn%?\t%0, #%B1\t%@ movhi",
};

static const char * const output_6487[] = {
  "mov%?\t%0, %1",
  "mov%?\t%0, %1",
  "mov%?\t%0, %1",
  "mov%?\t%0, %1",
  "mvn%?\t%0, #%B1",
  "ldrb%?\t%0, %1",
  "strb%?\t%1, %0",
  "ldrb%?\t%0, %1",
  "strb%?\t%1, %0",
};

static const char *
output_6488 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7305 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  switch (which_alternative)
    {
    case 0:	/* ARM register from memory */
      return "ldrh%?\t%0, %1\t%@ __fp16";
    case 1:	/* memory from ARM register */
      return "strh%?\t%1, %0\t%@ __fp16";
    case 2:	/* ARM register from ARM register */
      return "mov%?\t%0, %1\t%@ __fp16";
    case 3:	/* ARM register from constant */
      {
	long bits;
	rtx ops[4];

	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
			       HFmode);
	ops[0] = operands[0];
	ops[1] = GEN_INT (bits);
	ops[2] = GEN_INT (bits & 0xff00);
	ops[3] = GEN_INT (bits & 0x00ff);

	if (arm_arch_thumb2)
	  output_asm_insn ("movw%?\t%0, %1", ops);
	else
	  output_asm_insn ("mov%?\t%0, %2\n\torr%?\t%0, %0, %3", ops);
	return "";
       }
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6489 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7305 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  switch (which_alternative)
    {
    case 0:	/* ARM register from memory */
      return "ldrh%?\t%0, %1\t%@ __bf16";
    case 1:	/* memory from ARM register */
      return "strh%?\t%1, %0\t%@ __bf16";
    case 2:	/* ARM register from ARM register */
      return "mov%?\t%0, %1\t%@ __bf16";
    case 3:	/* ARM register from constant */
      {
	long bits;
	rtx ops[4];

	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
			       BFmode);
	ops[0] = operands[0];
	ops[1] = GEN_INT (bits);
	ops[2] = GEN_INT (bits & 0xff00);
	ops[3] = GEN_INT (bits & 0x00ff);

	if (arm_arch_thumb2)
	  output_asm_insn ("movw%?\t%0, %1", ops);
	else
	  output_asm_insn ("mov%?\t%0, %2\n\torr%?\t%0, %0, %3", ops);
	return "";
       }
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6490 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 7403 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"
{
  switch (which_alternative)
    {
    case 0: return "mov%?\t%0, %1";
    case 1:
      /* Cannot load it directly, split to load it via MOV / MOVT.  */
      if (!MEM_P (operands[1]) && arm_disable_literal_pool)
	return "#";
      return "ldr%?\t%0, %1\t%@ float";
    case 2: return "str%?\t%1, %0\t%@ float";
    default: gcc_unreachable ();
    }
}
}

static const char * const output_6491[] = {
  "cmp%?\t%0, %1",
  "cmp%?\t%0, %1",
  "cmp%?\t%0, %1",
  "cmp%?\t%0, %1",
  "cmn%?\t%0, #%n1",
};

static const char *
output_6493 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8489 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    if (arm_ccfsm_state == 1 || arm_ccfsm_state == 2)
      {
        arm_ccfsm_state += 2;
        return "";
      }
    return "b%?\t%l0";
  }
  
}

static const char *
output_6494 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8920 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    if (arm_ccfsm_state == 2)
      {
        arm_ccfsm_state += 2;
        return "";
      }
    return output_return_instruction (const_true_rtx, true, false, false);
  }
}

static const char *
output_6495 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 8981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    if (arm_ccfsm_state == 2)
      {
        arm_ccfsm_state += 2;
        return "";
      }
    return output_return_instruction (const_true_rtx, true, false, true);
  }
}

static const char *
output_6510 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    rtx ldm[3];
    rtx arith[4];
    rtx base_reg;
    HOST_WIDE_INT val1 = 0, val2 = 0;

    if (REGNO (operands[0]) > REGNO (operands[4]))
      {
	ldm[1] = operands[4];
	ldm[2] = operands[0];
      }
    else
      {
	ldm[1] = operands[0];
	ldm[2] = operands[4];
      }

    base_reg = XEXP (operands[2], 0);

    if (!REG_P (base_reg))
      {
	val1 = INTVAL (XEXP (base_reg, 1));
	base_reg = XEXP (base_reg, 0);
      }

    if (!REG_P (XEXP (operands[3], 0)))
      val2 = INTVAL (XEXP (XEXP (operands[3], 0), 1));

    arith[0] = operands[0];
    arith[3] = operands[1];

    if (val1 < val2)
      {
	arith[1] = ldm[1];
	arith[2] = ldm[2];
      }
    else
      {
	arith[1] = ldm[2];
	arith[2] = ldm[1];
      }

    ldm[0] = base_reg;
    if (val1 !=0 && val2 != 0)
      {
	rtx ops[3];

	if (val1 == 4 || val2 == 4)
	  /* Other val must be 8, since we know they are adjacent and neither
	     is zero.  */
	  output_asm_insn ("ldmib%?\t%0, {%1, %2}", ldm);
	else if (const_ok_for_arm (val1) || const_ok_for_arm (-val1))
	  {
	    ldm[0] = ops[0] = operands[4];
	    ops[1] = base_reg;
	    ops[2] = GEN_INT (val1);
	    output_add_immediate (ops);
	    if (val1 < val2)
	      output_asm_insn ("ldmia%?\t%0, {%1, %2}", ldm);
	    else
	      output_asm_insn ("ldmda%?\t%0, {%1, %2}", ldm);
	  }
	else
	  {
	    /* Offset is out of range for a single add, so use two ldr.  */
	    ops[0] = ldm[1];
	    ops[1] = base_reg;
	    ops[2] = GEN_INT (val1);
	    output_asm_insn ("ldr%?\t%0, [%1, %2]", ops);
	    ops[0] = ldm[2];
	    ops[2] = GEN_INT (val2);
	    output_asm_insn ("ldr%?\t%0, [%1, %2]", ops);
	  }
      }
    else if (val1 != 0)
      {
	if (val1 < val2)
	  output_asm_insn ("ldmda%?\t%0, {%1, %2}", ldm);
	else
	  output_asm_insn ("ldmia%?\t%0, {%1, %2}", ldm);
      }
    else
      {
	if (val1 < val2)
	  output_asm_insn ("ldmia%?\t%0, {%1, %2}", ldm);
	else
	  output_asm_insn ("ldmda%?\t%0, {%1, %2}", ldm);
      }
    output_asm_insn ("%I3%?\t%0, %1, %2", arith);
    return "";
  }
}

static const char *
output_6511 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11835 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    arm_output_multireg_pop (operands, /*return_pc=*/false,
                                       /*cond=*/const_true_rtx,
                                       /*reverse=*/false,
                                       /*update=*/true);
    return "";
  }
  
}

static const char *
output_6512 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11868 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    arm_output_multireg_pop (operands, /*return_pc=*/true,
                                       /*cond=*/const_true_rtx,
                                       /*reverse=*/false,
                                       /*update=*/true);
    return "";
  }
  
}

static const char *
output_6513 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 11891 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    arm_output_multireg_pop (operands, /*return_pc=*/true,
                                       /*cond=*/const_true_rtx,
                                       /*reverse=*/false,
                                       /*update=*/false);
    return "";
  }
  
}

static const char * const output_6518[] = {
  "movt%?\t%0, %L1",
  "movt\t%0, %L1",
};

static const char * const output_6519[] = {
  "rev\t%0, %1",
  "rev%?\t%0, %1",
  "rev%?\t%0, %1",
};

static const char *
output_6526 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 166 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldrdstrd.md"
{
    rtx op[2];
    op[0] = gen_rtx_REG (DImode, REGNO (operands[0]));
    op[1] = adjust_address (operands[2], DImode, 0);
    return output_move_double (op, true, NULL);
  }
}

static const char *
output_6527 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 186 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldrdstrd.md"
{
    rtx op[2];
    op[0] = adjust_address (operands[2], DImode, 0);
    op[1] = gen_rtx_REG (DImode, REGNO (operands[0]));
    return output_move_double (op, true, NULL);
  }
}

static const char *
output_6576 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 12634 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md"

  {
    arm_output_multireg_pop (operands, /*return_pc=*/false,
                                       /*cond=*/const_true_rtx,
                                       /*reverse=*/false,
                                       /*update=*/false);
    return "";
  }
  
}

static const char *
output_6584 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 230 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

   switch (which_alternative)
   {
   case 0: return "wmov%?\t%0, %1";
   case 1: return "wstrd%?\t%1, %0";
   case 2: return "wldrd%?\t%0, %1";
   case 3: return "tmrrc%?\t%Q0, %R0, %1";
   case 4: return "tmcrr%?\t%0, %Q1, %R1";
   case 5: return "#";
   default: return output_move_double (operands, true, NULL);
   }
}

static const char *
output_6585 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 230 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

   switch (which_alternative)
   {
   case 0: return "wmov%?\t%0, %1";
   case 1: return "wstrd%?\t%1, %0";
   case 2: return "wldrd%?\t%0, %1";
   case 3: return "tmrrc%?\t%Q0, %R0, %1";
   case 4: return "tmcrr%?\t%0, %Q1, %R1";
   case 5: return "#";
   default: return output_move_double (operands, true, NULL);
   }
}

static const char *
output_6586 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 230 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

   switch (which_alternative)
   {
   case 0: return "wmov%?\t%0, %1";
   case 1: return "wstrd%?\t%1, %0";
   case 2: return "wldrd%?\t%0, %1";
   case 3: return "tmrrc%?\t%Q0, %R0, %1";
   case 4: return "tmcrr%?\t%0, %Q1, %R1";
   case 5: return "#";
   default: return output_move_double (operands, true, NULL);
   }
}

static const char *
output_6629 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 677 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

   {
     return arm_output_iwmmxt_tinsr (operands);
   }
   
}

static const char *
output_6630 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 694 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

   {
     return arm_output_iwmmxt_tinsr (operands);
   }
   
}

static const char *
output_6631 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 711 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

   {
     return arm_output_iwmmxt_tinsr (operands);
   }
   
}

static const char *
output_6683 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1278 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wrorhg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wrorh", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6684 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1278 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wrorwg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wrorw", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6685 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1278 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wrordg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wrord", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6686 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsrahg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrah", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6687 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsrawg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsraw", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6688 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsradg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrad", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6689 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1320 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsrlhg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrlh", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6690 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1320 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsrlwg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrlw", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6691 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1320 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsrldg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrld", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6692 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1341 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsllhg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsllh", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6693 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1341 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wsllwg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsllw", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6694 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1341 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch  (which_alternative)
    {
    case 0:
      return "wslldg%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wslld", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6695 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wrorh%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wrorh", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6696 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wrorw%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wrorw", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6697 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wrord%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wrord", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6698 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsrah%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrah", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6699 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsraw%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsraw", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6700 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsrad%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrad", operands, true);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6701 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1404 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsrlh%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrlh", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6702 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1404 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsrlw%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrlw", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6703 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1404 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsrld%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsrld", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6704 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1425 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsllh%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsllh", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6705 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1425 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wsllw%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wsllw", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6706 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1425 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md"

  switch (which_alternative)
    {
    case 0:
      return "wslld%?\t%0, %1, %2";
    case 1:
      return arm_output_iwmmxt_shift_immediate ("wslld", operands, false);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6797 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 33 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      return "mvn%?\t%0, #%B1\t%@ movhi";
    case 2:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 3:
      return "strh%?\t%1, %0\t%@ movhi";
    case 4:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 5:
    case 6:
      return "vmov%?\t%0, %1\t%@ int";
    case 7:
      return "vmov%?.f32\t%0, %1\t%@ int";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_6798 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 84 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov%?\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t@ movhi";
    case 10:
      return "vmrs%?\t %0, P0\t@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_6799 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 84 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov%?\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t@ movhi";
    case 10:
      return "vmrs%?\t %0, P0\t@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_6800 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 84 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov%?\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t@ movhi";
    case 10:
      return "vmrs%?\t %0, P0\t@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_6801 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 84 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov%?\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t@ movhi";
    case 10:
      return "vmrs%?\t %0, P0\t@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_6802 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 138 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      return "mvn%?\t%0, #%B1\t%@ movhi";
    case 2:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 3:
      return "strh%?\t%1, %0\t%@ movhi";
    case 4:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 5:
    case 6:
      return "vmov.f16\t%0, %1\t%@ int";
    case 7:
      return "vmov%?.f32\t%0, %1\t%@ int";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_6803 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 188 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov.f16\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t%@ movhi";
    case 10:
      return "vmrs%?\t%0, P0\t%@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_6804 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 188 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov.f16\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t%@ movhi";
    case 10:
      return "vmrs%?\t%0, P0\t%@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_6805 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 188 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov.f16\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t%@ movhi";
    case 10:
      return "vmrs%?\t%0, P0\t%@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_6806 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 188 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0:
    case 2:
      return "mov%?\t%0, %1\t%@ movhi";
    case 1:
      if (GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_VECTOR_BOOL)
        operands[1] = mve_bool_vec_to_const (operands[1]);
      else
        operands[1] = gen_lowpart (HImode, operands[1]);
      return "mov%?\t%0, %1\t%@ movhi";
    case 3:
      return "movw%?\t%0, %L1\t%@ movhi";
    case 4:
      return "strh%?\t%1, %0\t%@ movhi";
    case 5:
      return "ldrh%?\t%0, %1\t%@ movhi";
    case 6:
    case 7:
      return "vmov.f16\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9:
      return "vmsr%?\t P0, %1\t%@ movhi";
    case 10:
      return "vmrs%?\t%0, P0\t%@ movhi";
    default:
      gcc_unreachable ();
    }
}
}

static const char *
output_6807 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 241 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  switch (which_alternative)
    {
    case 0: case 1:
      return "mov%?\t%0, %1";
    case 2:
      return "mvn%?\t%0, #%B1";
    case 3:
      return "movw%?\t%0, %1";
    case 4:
      return "ldr%?\t%0, %1";
    case 5:
      return "str%?\t%1, %0";
    case 6:
      return "vmov%?\t%0, %1\t%@ int";
    case 7:
      return "vmov%?\t%0, %1\t%@ int";
    case 8:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 9: case 10:
      return output_move_vfp (operands);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6808 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 286 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  switch (which_alternative)
    {
    case 0:
    case 1:
    case 2:
      return "mov%?\t%0, %1";
    case 3:
      return "mvn%?\t%0, #%B1";
    case 4:
      return "movw%?\t%0, %1";
    case 5:
    case 6:
      /* Cannot load it directly, split to load it via MOV / MOVT.  */
      if (!MEM_P (operands[1]) && arm_disable_literal_pool)
	return "#";
      return "ldr%?\t%0, %1";
    case 7:
    case 8:
      return "str%?\t%1, %0";
    case 9:
      return "vmov%?\t%0, %1\t%@ int";
    case 10:
      return "vmov%?\t%0, %1\t%@ int";
    case 11:
      return "vmov%?.f32\t%0, %1\t%@ int";
    case 12: case 13:
      return output_move_vfp (operands);
    case 14:
      return "vmsr\t P0, %1";
    case 15:
      return "vmrs\t %0, P0";
    case 16:
      return "mcr\tp10, 7, %1, cr1, cr0, 0\t @SET_FPSCR";
    case 17:
      return "mrc\tp10, 7, %0, cr1, cr0, 0\t @GET_FPSCR";
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6809 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 349 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  switch (which_alternative)
    {
    case 0: 
    case 1:
    case 2:
    case 3:
      return "#";
    case 4:
    case 5:
      /* Cannot load it directly, split to load it via MOV / MOVT.  */
      if (!MEM_P (operands[1]) && arm_disable_literal_pool)
	return "#";
      /* Fall through.  */
    case 6:
      return output_move_double (operands, true, NULL);
    case 7:
      return "vmov%?\t%P0, %Q1, %R1\t%@ int";
    case 8:
      return "vmov%?\t%Q0, %R0, %P1\t%@ int";
    case 9:
      if (TARGET_VFP_SINGLE || TARGET_HAVE_MVE)
	return "vmov%?.f32\t%0, %1\t%@ int\n\tvmov%?.f32\t%p0, %p1\t%@ int";
      else
	return "vmov%?.f64\t%P0, %P1\t%@ int";
    case 10: case 11:
      return output_move_vfp (operands);
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6810 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0: /* ARM register from memory.  */
      return "ldrh%?\t%0, %1\t%@ __fp16";
    case 1: /* Memory from ARM register.  */
      return "strh%?\t%1, %0\t%@ __fp16";
    case 2: /* S register from S register.  */
      return "vmov\t%0, %1\t%@ __fp16";
    case 3: /* ARM register from ARM register.  */
      return "mov%?\t%0, %1\t%@ __fp16";
    case 4: /* S register from ARM register.  */
    case 5: /* ARM register from S register.  */
    case 6: /* S register from immediate.  */
      return "vmov.f16\t%0, %1\t%@ __fp16";
    case 7: /* S register from memory.  */
      if (TARGET_HAVE_MVE)
	return "vldr.16\t%0, %1";
      else
	return "vld1.16\t{%z0}, %A1";
    case 8: /* Memory from S register.  */
      if (TARGET_HAVE_MVE)
	return "vstr.16\t%1, %0";
      else
	return "vst1.16\t{%z1}, %A0";
    case 9: /* ARM register from constant.  */
      {
	long bits;
	rtx ops[4];

	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
			       HFmode);
	ops[0] = operands[0];
	ops[1] = GEN_INT (bits);
	ops[2] = GEN_INT (bits & 0xff00);
	ops[3] = GEN_INT (bits & 0x00ff);

	if (arm_arch_thumb2)
	  output_asm_insn ("movw\t%0, %1", ops);
	else
	  output_asm_insn ("mov\t%0, %2\n\torr\t%0, %0, %3", ops);
	return "";
       }
    default:
      gcc_unreachable ();
    }
 }
}

static const char *
output_6811 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
  switch (which_alternative)
    {
    case 0: /* ARM register from memory.  */
      return "ldrh%?\t%0, %1\t%@ __bf16";
    case 1: /* Memory from ARM register.  */
      return "strh%?\t%1, %0\t%@ __bf16";
    case 2: /* S register from S register.  */
      return "vmov\t%0, %1\t%@ __bf16";
    case 3: /* ARM register from ARM register.  */
      return "mov%?\t%0, %1\t%@ __bf16";
    case 4: /* S register from ARM register.  */
    case 5: /* ARM register from S register.  */
    case 6: /* S register from immediate.  */
      return "vmov.f16\t%0, %1\t%@ __bf16";
    case 7: /* S register from memory.  */
      if (TARGET_HAVE_MVE)
	return "vldr.16\t%0, %1";
      else
	return "vld1.16\t{%z0}, %A1";
    case 8: /* Memory from S register.  */
      if (TARGET_HAVE_MVE)
	return "vstr.16\t%1, %0";
      else
	return "vst1.16\t{%z1}, %A0";
    case 9: /* ARM register from constant.  */
      {
	long bits;
	rtx ops[4];

	bits = real_to_target (NULL, CONST_DOUBLE_REAL_VALUE (operands[1]),
			       BFmode);
	ops[0] = operands[0];
	ops[1] = GEN_INT (bits);
	ops[2] = GEN_INT (bits & 0xff00);
	ops[3] = GEN_INT (bits & 0x00ff);

	if (arm_arch_thumb2)
	  output_asm_insn ("movw\t%0, %1", ops);
	else
	  output_asm_insn ("mov\t%0, %2\n\torr\t%0, %0, %3", ops);
	return "";
       }
    default:
      gcc_unreachable ();
    }
 }
}

static const char *
output_6812 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 603 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  switch (which_alternative)
    {
    case 0:
      return "vmov%?\t%0, %1";
    case 1:
      return "vmov%?\t%0, %1";
    case 2:
      return "vmov%?.f32\t%0, %1";
    case 3: case 4:
      return output_move_vfp (operands);
    case 5:
      return "ldr%?\t%0, %1\t%@ float";
    case 6:
      return "str%?\t%1, %0\t%@ float";
    case 7:
      return "vmov%?.f32\t%0, %1";
    case 8:
      return "mov%?\t%0, %1\t%@ float";
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6813 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  switch (which_alternative)
    {
    case 0:
      return "vmov%?\t%0, %1";
    case 1:
      return "vmov%?\t%0, %1";
    case 2:
      return "vmov%?.f32\t%0, %1";
    case 3: case 4:
      return output_move_vfp (operands);
    case 5:
      return "ldr%?\t%0, %1\t%@ float";
    case 6:
      return "str%?\t%1, %0\t%@ float";
    case 7:
      return "vmov%?.f32\t%0, %1";
    case 8:
      return "mov%?\t%0, %1\t%@ float";
    default:
      gcc_unreachable ();
    }
  
}

static const char *
output_6814 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 677 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"

  {
    switch (which_alternative)
      {
      case 0:
	return "vmov%?\t%P0, %Q1, %R1";
      case 1:
	return "vmov%?\t%Q0, %R0, %P1";
      case 2:
	gcc_assert (TARGET_VFP_DOUBLE);
        return "vmov%?.f64\t%P0, %1";
      case 3:
	gcc_assert (TARGET_VFP_DOUBLE);
	return "vmov.i64\t%P0, #0\t%@ float";
      case 4: case 5:
	return output_move_vfp (operands);
      case 6: case 7:
	return output_move_double (operands, true, NULL);
      case 8:
	if (TARGET_VFP_SINGLE)
	  return "vmov%?.f32\t%0, %1\n\tvmov%?.f32\t%p0, %p1";
	else
	  return "vmov%?.f64\t%P0, %P1";
      case 9:
        return "#";
      default:
	gcc_unreachable ();
      }
    }
  
}

static const char * const output_6817[] = {
  "vneg%?.f32\t%0, %1",
  "eor%?\t%0, %1, #-2147483648",
};

static const char * const output_6818[] = {
  "vneg%?.f64\t%P0, %P1",
  "#",
  "#",
};

static const char *
output_6863 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
    static char buf[32];
    int fp_sysreg_enum = INTVAL (operands[1]);

    gcc_assert (IN_RANGE (fp_sysreg_enum, 0, NB_FP_SYSREGS - 1));

    snprintf (buf, sizeof (buf), "vstr%%?\t%s, [%%0, #-4]!",
	      fp_sysreg_names[fp_sysreg_enum]);
    return buf;
  }
}

static const char *
output_6864 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1667 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
    static char buf[32];
    int fp_sysreg_enum = INTVAL (operands[1]);

    gcc_assert (IN_RANGE (fp_sysreg_enum, 0, NB_FP_SYSREGS - 1));

    snprintf (buf, sizeof (buf), "vldr%%?\t%s, [%%0], #4",
	      fp_sysreg_names[fp_sysreg_enum]);
    return buf;
  }
}

static const char *
output_6865 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1689 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md"
{
    int num_regs = XVECLEN (operands[0], 0);
    char pattern[30];
    rtx reg;

    strcpy (pattern, "vscclrm%?\t{%|");
    if (num_regs > 1)
      {
	reg = XEXP (XVECEXP (operands[0], 0, 1), 0);
	strcat (pattern, reg_names[REGNO (reg)]);
	if (num_regs > 2)
	  {
	    strcat (pattern, "-%|");
	    reg = XEXP (XVECEXP (operands[0], 0, num_regs - 1), 0);
	    strcat (pattern, reg_names[REGNO (reg)]);
	  }
	strcat (pattern, ", ");
      }

    strcat (pattern, "VPR}");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char * const output_6867[] = {
  "vcmp%?.f32\t%0, %1",
  "vcmp%?.f32\t%0, #0",
};

static const char * const output_6868[] = {
  "vcmpe%?.f32\t%0, %1",
  "vcmpe%?.f32\t%0, #0",
};

static const char * const output_6869[] = {
  "vcmp%?.f64\t%P0, %P1",
  "vcmp%?.f64\t%P0, #0",
};

static const char * const output_6870[] = {
  "vcmpe%?.f64\t%P0, %P1",
  "vcmpe%?.f64\t%P0, #0",
};

static const char * const output_6873[] = {
  "vmov%?.f32\t%0, %1\n\tvcvt%?.f64.u32\t%P0, %P0, %v2",
  "vmov%?.f32\t%0, %1\n\tvcvt%?.f64.u32\t%P0, %P0, %v2",
  "vmov%?.f64\t%P0, %1, %1\n\tvcvt%?.f64.u32\t%P0, %P0, %v2",
};

static const char * const output_6874[] = {
  "vmov%?.f32\t%0, %1\n\tvcvt%?.f64.s32\t%P0, %P0, %v2",
  "vmov%?.f32\t%0, %1\n\tvcvt%?.f64.s32\t%P0, %P0, %v2",
  "vmov%?.f64\t%P0, %1, %1\n\tvcvt%?.f64.s32\t%P0, %P0, %v2",
};

static const char *
output_6885 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 241 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"
{
  switch (which_alternative)
    {
    case 0:
    case 1:
    case 2:
      return "mov%?\t%0, %1";
    case 3: return "mvn%?\t%0, #%B1";
    case 4: return "movw%?\t%0, %1";
    case 5:
      /* Cannot load it directly, split to load it via MOV / MOVT.  */
      if (!MEM_P (operands[1]) && arm_disable_literal_pool)
	return "#";
      return "ldr%?\t%0, %1";
    case 6: return "str%?\t%1, %0";
    default: gcc_unreachable ();
    }
}
}

static const char * const output_6886[] = {
  "mov%?\t%0, %1\t%@ movhi",
  "mov%?\t%0, %1\t%@ movhi",
  "mov%?\t%0, %1\t%@ movhi",
  "movw%?\t%0, %L1\t%@ movhi",
  "strh%?\t%1, %0\t%@ movhi",
  "ldrh%?\t%0, %1\t%@ movhi",
};

static const char * const output_6887[] = {
  "sxtb%?\t%0, %1",
  "ldrsb%?\t%0, %1",
};

static const char * const output_6888[] = {
  "uxth%?\t%0, %1",
  "ldrh%?\t%0, %1",
};

static const char * const output_6889[] = {
  "uxtb%?\t%0, %1",
  "ldrb%?\t%0, %1\t%@ zero_extendqisi2",
};

static const char *
output_6891 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1274 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"
 return arm_output_shift(operands, 2);
}

static const char *
output_6895 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1302 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"

    HOST_WIDE_INT val;

    if (CONST_INT_P (operands[2]))
      val = INTVAL(operands[2]);
    else
      val = 0;

    /* We prefer eg. subs rn, rn, #1 over adds rn, rn, #0xffffffff.  */
    if (val < 0 && const_ok_for_arm(ARM_SIGN_EXTEND (-val)))
      return "sub%!\t%0, %1, #%n2";
    else
      return "add%!\t%0, %1, %2";
  
}

static const char *
output_6903 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 1678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md"
{
    char pattern[100];
    int i, num_saves = XVECLEN (operands[0], 0);

    strcpy (pattern, "clrm%?\t{");
    for (i = 0; i < num_saves; i++)
      {
	if (GET_CODE (XVECEXP (operands[0], 0, i)) == UNSPEC_VOLATILE)
	  {
	    strcat (pattern, "APSR");
	    ++i;
	  }
	else
	  strcat (pattern,
		  reg_names[REGNO (XEXP (XVECEXP (operands[0], 0, i), 0))]);
	if (i < num_saves - 1)
	  strcat (pattern, ", %|");
      }
    strcat (pattern, "}");
    output_asm_insn (pattern, operands);
    return "";
  }
}

static const char *
output_6907 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 72 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (aarch_mm_needs_acquire (operands[2]))
      {
	if (TARGET_THUMB1)
	  return "ldab\t%0, %1";
	else
	  return "ldab%?\t%0, %1";
      }
    else
      {
	if (TARGET_THUMB1)
	  return "ldrb\t%0, %1";
	else
	  return "ldrb%?\t%0, %1";
      }
  }
}

static const char *
output_6908 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 72 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (aarch_mm_needs_acquire (operands[2]))
      {
	if (TARGET_THUMB1)
	  return "ldah\t%0, %1";
	else
	  return "ldah%?\t%0, %1";
      }
    else
      {
	if (TARGET_THUMB1)
	  return "ldrh\t%0, %1";
	else
	  return "ldrh%?\t%0, %1";
      }
  }
}

static const char *
output_6909 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 72 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (aarch_mm_needs_acquire (operands[2]))
      {
	if (TARGET_THUMB1)
	  return "lda\t%0, %1";
	else
	  return "lda%?\t%0, %1";
      }
    else
      {
	if (TARGET_THUMB1)
	  return "ldr\t%0, %1";
	else
	  return "ldr%?\t%0, %1";
      }
  }
}

static const char *
output_6910 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 98 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (aarch_mm_needs_release (operands[2]))
      {
	if (TARGET_THUMB1)
	  return "stlb\t%1, %0";
	else
	  return "stlb%?\t%1, %0";
      }
    else
      {
	if (TARGET_THUMB1)
	  return "strb\t%1, %0";
	else
	  return "strb%?\t%1, %0";
      }
  }
}

static const char *
output_6911 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 98 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (aarch_mm_needs_release (operands[2]))
      {
	if (TARGET_THUMB1)
	  return "stlh\t%1, %0";
	else
	  return "stlh%?\t%1, %0";
      }
    else
      {
	if (TARGET_THUMB1)
	  return "strh\t%1, %0";
	else
	  return "strh%?\t%1, %0";
      }
  }
}

static const char *
output_6912 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 98 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (aarch_mm_needs_release (operands[2]))
      {
	if (TARGET_THUMB1)
	  return "stl\t%1, %0";
	else
	  return "stl%?\t%1, %0";
      }
    else
      {
	if (TARGET_THUMB1)
	  return "str\t%1, %0";
	else
	  return "str%?\t%1, %0";
      }
  }
}

static const char * const output_6914[] = {
  "ldrexb%?\t%0, %C1",
  "ldrexb\t%0, %C1",
};

static const char * const output_6915[] = {
  "ldrexh%?\t%0, %C1",
  "ldrexh\t%0, %C1",
};

static const char * const output_6916[] = {
  "ldaexb%?\t%0, %C1",
  "ldaexb\t%0, %C1",
};

static const char * const output_6917[] = {
  "ldaexh%?\t%0, %C1",
  "ldaexh\t%0, %C1",
};

static const char * const output_6918[] = {
  "ldrex%?\t%0, %C1",
  "ldrex\t%0, %C1",
};

static const char * const output_6919[] = {
  "ldaex%?\t%0, %C1",
  "ldaex\t%0, %C1",
};

static const char *
output_6922 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 524 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (QImode == DImode)
      {
	/* The restrictions on target registers in ARM mode are that the two
	   registers are consecutive and the first one is even; Thumb is
	   actually more flexible, but DI should give us this anyway.
	   Note that the 1st register always gets the
	   lowest word in memory.  */
	gcc_assert ((REGNO (operands[2]) & 1) == 0 || TARGET_THUMB2);
	return "strexd%?\t%0, %2, %H2, %C1";
      }
    if (TARGET_THUMB1)
      return "strexb\t%0, %2, %C1";
    else
      return "strexb%?\t%0, %2, %C1";
  }
}

static const char *
output_6923 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 524 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (HImode == DImode)
      {
	/* The restrictions on target registers in ARM mode are that the two
	   registers are consecutive and the first one is even; Thumb is
	   actually more flexible, but DI should give us this anyway.
	   Note that the 1st register always gets the
	   lowest word in memory.  */
	gcc_assert ((REGNO (operands[2]) & 1) == 0 || TARGET_THUMB2);
	return "strexd%?\t%0, %2, %H2, %C1";
      }
    if (TARGET_THUMB1)
      return "strexh\t%0, %2, %C1";
    else
      return "strexh%?\t%0, %2, %C1";
  }
}

static const char *
output_6924 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 524 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (SImode == DImode)
      {
	/* The restrictions on target registers in ARM mode are that the two
	   registers are consecutive and the first one is even; Thumb is
	   actually more flexible, but DI should give us this anyway.
	   Note that the 1st register always gets the
	   lowest word in memory.  */
	gcc_assert ((REGNO (operands[2]) & 1) == 0 || TARGET_THUMB2);
	return "strexd%?\t%0, %2, %H2, %C1";
      }
    if (TARGET_THUMB1)
      return "strex\t%0, %2, %C1";
    else
      return "strex%?\t%0, %2, %C1";
  }
}

static const char *
output_6925 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 524 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    if (DImode == DImode)
      {
	/* The restrictions on target registers in ARM mode are that the two
	   registers are consecutive and the first one is even; Thumb is
	   actually more flexible, but DI should give us this anyway.
	   Note that the 1st register always gets the
	   lowest word in memory.  */
	gcc_assert ((REGNO (operands[2]) & 1) == 0 || TARGET_THUMB2);
	return "strexd%?\t%0, %2, %H2, %C1";
      }
    if (TARGET_THUMB1)
      return "strexd\t%0, %2, %C1";
    else
      return "strexd%?\t%0, %2, %C1";
  }
}

static const char *
output_6926 (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)
{
#line 550 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md"
{
    /* See comment in arm_store_exclusive<mode> above.  */
    gcc_assert ((REGNO (operands[2]) & 1) == 0 || TARGET_THUMB2);
    return "stlexd%?\t%0, %2, %H2, %C1";
  }
}

static const char * const output_6927[] = {
  "stlexb%?\t%0, %2, %C1",
  "stlexb\t%0, %2, %C1",
};

static const char * const output_6928[] = {
  "stlexh%?\t%0, %2, %C1",
  "stlexh\t%0, %2, %C1",
};

static const char * const output_6929[] = {
  "stlex%?\t%0, %2, %C1",
  "stlex\t%0, %2, %C1",
};



static const struct insn_operand_data operand_data[] = 
{
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_adcimm_operand,
    "I,K",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_adcimm_operand,
    "I,K",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n,n",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=rk,l,l,l,r,k,r,k,r,k,r,k,k,r,k,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%0,l,0,l,rk,k,r,r,rk,k,rk,k,r,rk,k,rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "rk,l,Py,Pd,rI,rI,k,rI,Pj,Pj,L,L,L,PJ,PJ,?n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "%l,0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "%l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=l,l,l,l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l,0,l,0,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_addimm_operand,
    "Pd,Py,Px,Pw,I,L",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_addimm_operand,
    "Pw,I,L",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "I,L,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_addimm_operand,
    "I,L",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_addimm_operand,
    "L,I",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,l,l,l,rk,rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,0,l,0,rk,rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "lPd,Py,lPx,Pw,rkI,L",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,l,l,l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,0,l,0,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "lPd,Py,lPx,Pw,rI,L",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "l,Pw,rI,L",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "0,rI,K",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "l,rI,K",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_immediate_operand,
    "I",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "r,I,Pz",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "r,I",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=l,r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=l,r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_adcimm_operand,
    "I,K",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=l,r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_neg_immediate_operand,
    "L",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,l,l,l,r,r,r,rk,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "l,0,l,Pz,I,r,r,k,?n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "l,Py,Pd,l,r,I,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "r,r,I",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "I,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_immediate_operand,
    "I",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    arm_not_immediate_operand,
    "K",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    arm_immediate_operand,
    "I",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_adcimm_operand,
    "I,K",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n,n",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_adcimm_operand,
    "I,K",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r,&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%0,r,0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,&r,&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,0,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r,r,0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "%0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&r,&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%0,r,0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,0,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&r,&r,&r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "%0,r,0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "?r,r,0,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "2,2",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r,0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=r,&r,&r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,l,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r,0,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "I,l,K,r,?n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "I,K,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=X,r,X",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "rIK",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "rIK",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_M_operand,
    "M",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_M_operand,
    "M",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r,0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "I,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=r,l,r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "%r,0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "I,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r,0,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "I,l,r,?n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "I,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%0,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,0,rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,rI,rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%0,?r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,r,?r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,0,rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    minmax_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,?r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shiftable_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    minmax_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=Ts,Ts",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,?Ts",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "Ts,Ts",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "TsI,TsI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    minmax_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    sat_shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_ccde1_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_ccde1_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_ccde1_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_ccde1_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_ccde2_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_ccde2_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_ccde2_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_ccde2_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_ccde3_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_ccde3_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_ccde3_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_ccde3_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "l,M,M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    scratch_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    scratch_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "m",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=l,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "m,Uw,m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Uh",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=l,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "m,Uw,m",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    memory_operand,
    "=m",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=m,Uw,m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "l,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=m,Uw,m",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "l,l,r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r,m",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r,Uh",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r,m",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r,Uh",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_extendqisi_mem_op,
    "Uq",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_reg_or_extendqisi_mem_op,
    "r,Uq",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    ssat16_imm,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    usat16_imm,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_di_operand,
    "=r,r,r,r,m",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    di_operand,
    "rDa,Db,Dc,mi,r",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "0,0",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=rk,r,r,r,rk,m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,I,K,j,mi,rk",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r,r,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "mX,mX,mX",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "mX",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "mX",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,rk,l,r,rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0,l,rk,rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r,r,r,m,r",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rIk,K,n,r,mi",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r,r,r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "I,rk,K",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r,r,r,l,r,l,Uu,r,m",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,rk,I,Py,K,Uu,l,Uh,r",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=r,m,r,r",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "m,r,r,F",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=r,m,r,r",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "m,r,r,F",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=r,r,m",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "r,mE,r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_soft_df_operand,
    "=r,r,r,r,m",
    E_DFmode,
    0,
    0,
    1,
    1
  },
  {
    soft_df_operand,
    "rDa,Db,Dc,mF,r",
    E_DFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "l,r,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "Py,r,r,I,L",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator_mode,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_vsel_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_vsel_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_vsel_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r,r,r,r,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "0,0,rI,K,rI,rI,K,K",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "rI,K,0,0,rI,K,rI,K",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,0",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r,m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    call_insn_operand,
    "Cs,US",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    cc_register,
    "",
    E_CC_NZmode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=o",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=m,m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    guard_addr_operand,
    "X,X",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    scratch_operand,
    "=&l,&r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&l,&r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    memory_operand,
    "=m,m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    register_operand,
    "+&l,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "m,m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    guard_addr_operand,
    "X,X",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&l,&r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&l,&r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    register_operand,
    "=&l,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "m,m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    register_operand,
    "+l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    memory_operand,
    "m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    scratch_operand,
    "=&r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    memory_operand,
    "m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    memory_operand,
    "m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    scratch_operand,
    "=&r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk,rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    power_of_two_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    power_of_two_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk,rk,rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_nomul_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk,r,rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_nomul_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shiftable_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    shiftable_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,?r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Ts,Ts",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rI,L",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "0,rI,?rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,0,rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    equality_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,?r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    shiftable_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "l,l,l,r,r,r,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "lPy,lPy,lPy,rI,L,rI,L,rI,L",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r,r,l,l,r,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "lPy,rI,L,lPy,lPy,rI,rI,L,L",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    dominant_cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,l,l,r,r,r,r,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "lPy,lPy,lPy,rI,L,r,rI,L,rI,L",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r,r,l,l,r,r,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "lPy,rI,L,lPy,lPy,r,rI,rI,L,L",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    dominant_cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Ts,Ts",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "lPy,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "lPy,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    dominant_cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "lPy,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "lPy,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=Ts,Ts",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&Ts,&Ts,&Ts",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rIL,0,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rIL,rIL,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,rPy,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,rPy,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rIL,rIL,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "0,rI,?rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,0,rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rIL,rIL,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "0,?rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rIL,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rIL,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "0,0,?rI,?rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rI,L,rI,L",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shiftable_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    shiftable_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    shiftable_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    shiftable_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "0,?rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rIL,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    shiftable_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "0,?rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    shiftable_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "0,?rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rIL,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    shiftable_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "0,?rIK",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rIL,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "0,?rI,K",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "0,?rIK",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rM,rM",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rIL,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "0,?rI,K",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rM,rM,rM",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rM",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rM",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rM",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rM",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    shiftable_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    shiftable_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shiftable_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    memory_operand,
    "m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    memory_operand,
    "m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    scratch_operand,
    "=r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "0,?rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    push_mult_memory_operand,
    "",
    E_BLKmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    multi_register_push,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "+rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_I_operand,
    "I",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    pop_multiple_return,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "+rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_I_operand,
    "I",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    pop_multiple_return,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    pop_multiple_fp,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "+rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_I_operand,
    "I",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vfp_hard_register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    address_operand,
    "p",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    0,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    0,
    "X",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,l,r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,l,r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,l,r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=l,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n,n,n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n,n,n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    ldrd_strd_offset_operand,
    "Do",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    ldrd_strd_offset_operand,
    "Do",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    memory_operand,
    "m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    memory_operand,
    "=m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    store_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    store_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    store_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    store_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    store_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    store_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    store_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    store_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    store_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Uz",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=Uz",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    imm_lshift_or_reg_neon,
    "w,Ds",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    imm_lshift_or_reg_neon,
    "w,Ds",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    imm_lshift_or_reg_neon,
    "w,Ds",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    imm_lshift_or_reg_neon,
    "w,Ds",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    imm_lshift_or_reg_neon,
    "w,Ds",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    imm_lshift_or_reg_neon,
    "w,Ds",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "%y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_di_operand,
    "=r,r,r,r,m,y,y,r,y,Uy,*w,r,*w,*w,*Uv",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    di_operand,
    "rDa,Db,Dc,mi,r,y,r,y,Uy,y,r,*w,*w,*Uvi,*w",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=rk,r,r,r,rk,m,z,r,?z,?Uy,*t,r,*t,*t,*Uv",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,I,K,j,mi,rk,r,z,Uy,z,r,*t,*t,*Uvi,*t",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=r,r,r,m,z,r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rI,K,mi,r,r,z",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=y,m,y,?r,?y,?r,?r,?m",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "y,y,mi,y,r,r,mi,r",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=y,m,y,?r,?y,?r,?r,?m",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "y,y,mi,y,r,r,mi,r",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=y,m,y,?r,?y,?r,?r,?m",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "y,y,mi,y,r,r,mi,r",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    imm_or_reg_operand,
    "z,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    imm_or_reg_operand,
    "z,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    imm_or_reg_operand,
    "z,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    imm_or_reg_operand,
    "y,i",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    imm_or_reg_operand,
    "y,i",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    imm_or_reg_operand,
    "y,i",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,i",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,i",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,i",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "z",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=rk,r,r,m,r,*t,r,*t",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rIk,K,n,r,mi,r,*t,*t",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=rk,r,l,r,m,r,*t,r,*t,Up,r",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,IDB,Py,n,r,m,r,*t,*t,r,Up",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=rk,r,l,r,m,r,*t,r,*t,Up,r",
    E_V16BImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,IDB,Py,n,r,m,r,*t,*t,r,Up",
    E_V16BImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=rk,r,l,r,m,r,*t,r,*t,Up,r",
    E_V8BImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,IDB,Py,n,r,m,r,*t,*t,r,Up",
    E_V8BImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=rk,r,l,r,m,r,*t,r,*t,Up,r",
    E_V4BImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,IDB,Py,n,r,m,r,*t,*t,r,Up",
    E_V4BImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=r,r,r,m,r,*t,r,*t",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rIk,K,n,r,mi,r,*t,*t",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=rk,r,r,r,rk,m,*t,r,*t,*t,*Uv",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,I,K,j,mi,rk,r,t,*t,*Uvi,*t",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=rk,r,l,r,r,l,*hk,m,*m,*t,r,*t,*t,*Uv,Up,r,Uf,r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,I,Py,K,j,mi,*mi,l,*hk,r,*t,*t,*UvTu,*t,r,Up,r,Uf",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_di_operand,
    "=r,r,r,r,r,r,m,w,!r,w,w,Uv",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    di_operand,
    "r,rDa,Db,Dc,mi,mi,r,r,w,w,UvTu,w",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=?r,?m,t,r,t,r,t,t,Uj,r",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "m,r,t,r,r,t,Dv,Uj,t,F",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=?r,?m,t,r,t,r,t,t,Uj,r",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "m,r,t,r,r,t,Dv,Uj,t,F",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=t,Um,?r,?m,t,r,t,r,r",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "Um,t,m,r,t,r,r,t,F",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=t,Um,?r,?m,t,r,t,r,r",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "Um,t,m,r,t,r,r,t,F",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=r,m,t,r,t,r,r",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "m,r,t,r,r,t,F",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=r,m,t,r,t,r,r",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "m,r,t,r,r,t,F",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=t,?r,t,t,Uv,r,m,t,r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "?r,t,Dv,UvE,t,mE,r,t,r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=t,?r,t,t,Uv,r,m,t,r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    hard_sf_operand,
    "?r,t,Dv,UvHa,t,mHa,r,t,r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_soft_df_operand,
    "=w,?r,w,w,w,Uv,r,m,w,r",
    E_DFmode,
    0,
    0,
    1,
    1
  },
  {
    soft_df_operand,
    "?r,w,Dy,G,UvF,w,mF,r,w,r",
    E_DFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_soft_df_operand,
    "=w,?r,w,w,w,Uv,r,m,w,r",
    E_DFmode,
    0,
    0,
    1,
    1
  },
  {
    hard_df_operand,
    "?r,w,Dy,G,UvHa,w,mHa,r,w,r",
    E_DFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=t,t,t,t,t,t,?r,?r,?r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,t,t,0,?r,?r,0,t,t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t,0,t,?r,0,?r,t,0,t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w,w,w,w,w,?r,?r,?r",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,w,w,0,?r,?r,0,w,w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,w,?r,0,?r,w,0,w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t,?r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t,r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,?r,?r",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,r",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&t,t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t,t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t,t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w,w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    clear_vfp_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    vfp_compare_operand,
    "tG",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    vfp_compare_operand,
    "wG",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t,t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    vfp_compare_operand,
    "t,G",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    vfp_compare_operand,
    "w,G",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_double_vcvt_power_of_two_reciprocal,
    "Dt",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=x,x,w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,t,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_double_vcvt_power_of_two_reciprocal,
    "Dt,Dt,Dt",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    const_double_vcvt_power_of_two,
    "Dp",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=m",
    E_BLKmode,
    0,
    0,
    1,
    1
  },
  {
    vfp_register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    multi_register_push,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    const_double_operand,
    "F",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    const_double_operand,
    "E",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_vcde1_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_vcde1_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_vcde1_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_vcde1_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_vcde2_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_vcde2_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_vcde2_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_vcde2_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_vcde3_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_vcde3_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_vcde3_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_vcde3_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "%0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=l,l,l,*rk,*hk,l,k,l,l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "%0,0,l,*0,*0,k,k,0,l,k",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonmemory_operand,
    "I,J,lL,*hk,*rk,M,O,Pa,Pb,Pc",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "lPd",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=&l,&l,&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "%l,*h,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l,l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=l,l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0,l,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l,0,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "%0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonmemory_operand,
    "N,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=&l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    register_operand,
    "=l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "l,m",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    register_operand,
    "=l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "l,m",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    register_operand,
    "=l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "l,m",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    scratch_operand,
    "=X,l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    register_operand,
    "=l,l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "l,V,m",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=l,l,l,r,l,>,l,m,*r",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "l,I,J,j,>,l,mi,l,*r",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=l,l,r,l,l,l,>,l,l,m,*l*h*k",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "l,I,j,J,K,>,l,i,mi,l,*l*h*k",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=l,l,m,l*r,*h,l,r",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "l,m,l,k*h,*r,I,n",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=l,l,m,l*r,*h,l",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "l,m,l,k*h,*r,I",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=l,l,l,m,*r,*h",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "l,m,F,l,*h,*r",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=l,l,>,l,m,*r,*h",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "l,>,l,mF,l,*h,*r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=l,l,>,l,m,*r",
    E_DFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "l,>,l,mF,l,*r",
    E_DFmode,
    0,
    0,
    1,
    1
  },
  {
    register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    equality_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "l,l*h",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    thumb1_cmp_operand,
    "lI*h,*r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=l,l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "l,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    thumb1_cmpneg_operand,
    "L,J",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    equality_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    equality_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "%l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    equality_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    thumb_cbrch_target_operand,
    "=l,*?h,*?m,*?m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    scratch_operand,
    "=X,l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "l,l,1,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    equality_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    thumb_cbrch_target_operand,
    "=l,l,*!h,*?h,*?m,*?m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    scratch_operand,
    "=X,X,l,l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "%0,l,*l,1,1,1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "IJ,lL,*l,lIJ,lIJ,lIJ",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=X,X,l,l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "%l,l,l,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "J,l,L,IJ",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=X,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,*h",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    thumb1_cmp_operand,
    "lI*h,*r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    thumb1_cmp_operand,
    "lI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l*r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l*r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    register_operand,
    "+l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%0,0,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "r,Py,I",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,0,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=rk,r,l,r,r,lk*r,m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,I,Py,K,j,mi,lk*r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    register_operand,
    "=l,l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=X,l,X,r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    register_operand,
    "0,1,0,1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r,r,l,r,m,r",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,I,Py,n,r,m",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    register_operand,
    "=&kr",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator_mode,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator_mode,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,l,r,r,r,r,r,r,r,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "0,lPy,0,0,rI,K,I,r,rI,K,K,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "lPy,0,rI,K,0,0,rI,I,K,rI,K,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l*r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Ts",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    shiftable_operator_strict_it,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=Ts,Ts",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,?Ts",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "=Ts",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_general_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operation,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "r,Pz",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Ts,Ts,Ts",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "0,TsI,?TsI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "TsI,0,TsI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "rIL,rIL,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    thumb_16bit_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    low_register_operand,
    "=l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "0,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_reg_or_int_operand,
    "l,M",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    low_register_operand,
    "=l",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "I",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=l",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "I",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "I",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "l,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_reg_or_int_operand,
    "lPt,Ps",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "lPt,Ps,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "lPv,rIL",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "%0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    register_operand,
    "%0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,?r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "M",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    clear_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "+r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_reg_or_long_shift_imm,
    "rPg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_general_register_operand,
    "+r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    long_shift_imm,
    "Pg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    memory_operand,
    "=Un",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=w,Un,w,w,w,?r,?w,?r,?Us,*r",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Dm,Dn,Uni,w,r,Usi,r,*r",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Un,w,w,w,?r,?w,?r,?Us,*r",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Dm,Dn,Uni,w,r,Usi,r,*r",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Un,w,w,w,?r,?w,?r,?Us,*r",
    E_V4HFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Dm,Dn,Uni,w,r,Usi,r,*r",
    E_V4HFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Un,w,w,w,?r,?w,?r,?Us,*r",
    E_V4BFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Dm,Dn,Uni,w,r,Usi,r,*r",
    E_V4BFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Un,w,w,w,?r,?w,?r,?Us,*r",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Dm,Dn,Uni,w,r,Usi,r,*r",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Un,w,w,w,?r,?w,?r,?Us,*r",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Dm,Dn,Uni,w,r,Usi,r,*r",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Un,w,w,w,?r,?w,?r,?Us,*r",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Dm,Dn,Uni,w,r,Usi,r,*r",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Un,w,w,w,?r,?w,?r,?r,?Us",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Dm,DN,Uni,w,r,r,Usi,r",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Un,w,w,w,?r,?w,?r,?r,?Us",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Dm,DN,Uni,w,r,r,Usi,r",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Un,w,w,w,?r,?w,?r,?r,?Us",
    E_V8HFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Dm,DN,Uni,w,r,r,Usi,r",
    E_V8HFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Un,w,w,w,?r,?w,?r,?r,?Us",
    E_V8BFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Dm,DN,Uni,w,r,r,Usi,r",
    E_V8BFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Un,w,w,w,?r,?w,?r,?r,?Us",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Dm,DN,Uni,w,r,r,Usi,r",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Un,w,w,w,?r,?w,?r,?r,?Us",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Dm,DN,Uni,w,r,r,Usi,r",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Un,w,w,w,?r,?w,?r,?r,?Us",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Dm,DN,Uni,w,r,r,Usi,r",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Un,w,w,w,?r,?w,?r,?r,?Us",
    E_TImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Dm,DN,Uni,w,r,r,Usi,r",
    E_TImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Ut,w",
    E_EImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Ut",
    E_EImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Ut,w",
    E_OImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Ut",
    E_OImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Ut,w",
    E_CImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Ut",
    E_CImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,Ut,w",
    E_XImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,w,Ut",
    E_XImode,
    0,
    0,
    1,
    1
  },
  {
    neon_permissive_struct_operand,
    "=Um",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Um",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Um",
    E_V4HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Um",
    E_V4BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Um",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Um",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Um",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Um",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Um",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Um",
    E_V4HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Um",
    E_V4BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Um",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Um",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Um",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    neon_permissive_struct_operand,
    "=Um",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Um",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Um",
    E_V8HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Um",
    E_V8BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Um",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Um",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Um",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Um",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Um",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Um",
    E_V8HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Um",
    E_V8BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Um",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Um",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Um",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w,w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "Um,r",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "Um,r",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "Um,r",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "Um,r",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "Um,r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "Um,r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "Um,r",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "Um,r",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "Um,r",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "Um,r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "Um,r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "Um,r",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=Um,r",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w,w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=Um,r",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w,w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=Um,r",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w,w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=Um,r",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w,w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=Um,r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w,w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=Um,r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w,w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=Um,r",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w,w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=Um,r",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w,w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=Um,r",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w,w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=Um,r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w,w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=Um,r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w,w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=Um,r",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w,w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "w,Dl",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "w,Dl",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "w,Dl",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "w,Dl",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "w,Dl",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "w,Dl",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "w,Dl",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "w,Dl",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "w,Dl",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "w,Dl",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "w,Dl",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "w,DL",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "w,DL",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "w,DL",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "w,DL",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "w,DL",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "w,DL",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "w,DL",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "w,DL",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "w,DL",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "w,DL",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "w,DL",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    imm_for_neon_rshift_operand,
    "Dm",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    imm_for_neon_rshift_operand,
    "Dm",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    imm_for_neon_rshift_operand,
    "Dm",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    imm_for_neon_rshift_operand,
    "Dm",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    imm_for_neon_rshift_operand,
    "Dm",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    imm_for_neon_rshift_operand,
    "Dm",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "Um,r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "w,Dz",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "w,Dz",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "w,Dz",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "w,Dz",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "w,Dz",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "w,Dz",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "w,Dz",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "w,Dz",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "w,Dz",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "w,Dz",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    zero_operand,
    "i",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    minus_one_operand,
    "i",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    zero_operand,
    "i",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    minus_one_operand,
    "i",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    zero_operand,
    "i",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    minus_one_operand,
    "i",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    zero_operand,
    "i",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    minus_one_operand,
    "i",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    zero_operand,
    "i",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    minus_one_operand,
    "i",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    zero_operand,
    "i",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    minus_one_operand,
    "i",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "x",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w,w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,w,w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w,0",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w,w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,w,w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w,0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w,w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,w,w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w,0",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w,w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,w,w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w,0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w,w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,w,w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w,0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w,w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,w,w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w,0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w,w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,w,w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w,0",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w,w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,w,w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w,0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w,w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,w,w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w,0",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w,w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,w,w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w,0",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w,w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,w,w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w,0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w,w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,w,w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w,0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w,w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,w,w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w,0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w,w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,w,w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w,0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_EImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_EImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "2",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "2",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "2",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "2",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "2",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "2",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "2",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "2",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "2",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "2",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V4HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V8HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V4BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V8BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V4HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V8HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V4BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V8BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_TImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_OImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V2BFmode,
    0,
    0,
    1,
    1
  },
  {
    neon_struct_operand,
    "=Um",
    E_TImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_OImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_EImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_EImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_CImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_EImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_CImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_EImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_BLKmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_EImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_CImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_BLKmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_CImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_CImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V2BFmode,
    0,
    0,
    1,
    1
  },
  {
    neon_struct_operand,
    "=Um",
    E_EImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_EImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_EImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_CImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_BLKmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_EImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_BLKmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_CImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_OImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V4HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V4BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V4HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V4BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "0",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_V2BFmode,
    0,
    0,
    1,
    1
  },
  {
    neon_struct_operand,
    "=Um",
    E_OImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V4HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V4BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V4HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_V4BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_low,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vect_par_constant_high,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    const_neon_scalar_shift_amount_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    const_neon_scalar_shift_amount_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    const_neon_scalar_shift_amount_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=&w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=&w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "x",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "x",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "x",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "x",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=x",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=x",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "x",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "%0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w,w,w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    general_operand,
    "w,r,Uni",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_BLKmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r,r,l",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_sync_memory_operand,
    "Q,Q,Q",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "n,Pf,n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r,r,l",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_sync_memory_operand,
    "Q,Q,Q",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "n,Pf,n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r,r,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_sync_memory_operand,
    "Q,Q,Q",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "n,Pf,n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=Q,Q,Q",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "r,r,l",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "n,Pf,n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=Q,Q,Q",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "r,r,l",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "n,Pf,n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=Q,Q,Q",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "r,r,l",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "n,Pf,n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_sync_memory_operand,
    "Q",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    cc_register_operand,
    "=&c,&l,&l",
    E_CC_Zmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l*h",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    arm_add_operand,
    "rIL,lILJ*h,*r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,X,X",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    cc_register_operand,
    "=&c,&l,&l",
    E_CC_Zmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l*h",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    arm_add_operand,
    "rIL,lILJ*h,*r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,X,X",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    cc_register_operand,
    "=&c,&l,&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l*h",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    arm_add_operand,
    "rIL,lILJ*h,*r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,X,X",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    cc_register_operand,
    "=&c,&l,&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l*h",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    arm_add_operand,
    "rIL,lILJ*h,*r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,X,X",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    cc_register_operand,
    "=&c,&l,&l",
    E_CC_Zmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l*h",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_add_operand,
    "rIL,lILJ*h,*r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,X,X",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    cc_register_operand,
    "=&c,&l,&l",
    E_CC_Zmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l*h",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    cmpdi_operand,
    "rDi,lILJ*h,*r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,X,X",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    cc_register_operand,
    "=&c,&l,&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l*h",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_add_operand,
    "rIL,lILJ*h,*r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,X,X",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    cc_register_operand,
    "=&c,&l,&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l*h",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    cmpdi_operand,
    "rDi,lILJ*h,*r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,X,X",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lIJL,r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&r",
    E_QImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lPd,lPd",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_QImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l,l",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_QImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lIJL,r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&r",
    E_HImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lPd,lPd",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_HImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l,l",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_HImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lIJL,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lPd,lPd",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,lIJL,r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&r",
    E_DImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,lPd,lPd",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_DImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,l,l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_DImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_QImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_HImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_DImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&r,&r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lL,?IJ,?r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&r",
    E_QImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l,&l",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lPd,lPd,lPd",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_QImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&r,&r,&r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l,l,l",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_QImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&r,&r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lL,?IJ,?r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&r",
    E_HImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l,&l",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lPd,lPd,lPd",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_HImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&r,&r,&r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l,l,l",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_HImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lL,?IJ,?r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l,&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lPd,lPd,lPd",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&r,&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l,l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&r,&r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua,Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,lL,?IJ,?r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&r",
    E_DImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l,&l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua,Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,lPd,lPd,lPd",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_DImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&r,&r,&r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua,Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,l,l,l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_DImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_QImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_HImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_DImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lIJL,r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lPd,lPd",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l,l",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lIJL,r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lPd,lPd",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l,l",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lIJL,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,lPd,lPd",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,lIJL,r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,lPd,lPd",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l,&l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua,Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,l,l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "rn,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=&r,&l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "+Ua,Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=&r,&l",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "=Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "=Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "=Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "=Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "=Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "=Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "=Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_SQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_UQQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_UQQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_UQQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_UHQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_UHQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_UHQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_USQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_USQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_USQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_USAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_USAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_USAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_V4QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V4QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V4QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_V2HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_V2HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_V4UQQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V4UQQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V4UQQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_V2UHQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2UHQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2UHQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_UQQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_UQQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_UQQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_UHQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_UHQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_UHQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_V2UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=r",
    E_DImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=r",
    E_USAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_USAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_USAmode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=r",
    E_DImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "=r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "=r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    sat_shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "I",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=w,w,r,w,w,r,w,Ux,w",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,r,w,Dn,UxUi,r,Dm,w,Ul",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,w,r,w,w,r,w,Ux,w",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,r,w,Dn,UxUi,r,Dm,w,Ul",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,w,r,w,w,r,w,Ux,w",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,r,w,Dn,UxUi,r,Dm,w,Ul",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,w,r,w,w,r,w,Ux,w",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,r,w,Dn,UxUi,r,Dm,w,Ul",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,w,r,w,w,r,w,Ux,w",
    E_TImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,r,w,Dn,UxUi,r,Dm,w,Ul",
    E_TImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,w,r,w,w,r,w,Ux,w",
    E_V8HFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,r,w,Dn,UxUi,r,Dm,w,Ul",
    E_V8HFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,w,r,w,w,r,w,Ux,w",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,r,w,Dn,UxUi,r,Dm,w,Ul",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=w,w,r,w,w,r,w,Ux,w",
    E_V2DFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "w,r,w,Dn,UxUi,r,Dm,w,Ul",
    E_V2DFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "=Um",
    E_XImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "0",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_16,
    "Rd",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "Rf",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_8,
    "Rb",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_16,
    "Rd",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "Rf",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    imm_for_neon_rshift_operand,
    "i",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    imm_for_neon_rshift_operand,
    "i",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    imm_for_neon_rshift_operand,
    "i",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_16,
    "Rd",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "Rf",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_7,
    "Ra",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_7,
    "Ra",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_7,
    "Ra",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_8,
    "Rb",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_8,
    "Rb",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "Rf",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "Rf",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "Rf",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_7,
    "Ra",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_15,
    "Rc",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_31,
    "Re",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "Dz,0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "Dz,0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "=Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_16,
    "Rd",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_16,
    "Rd",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "Rf",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_7,
    "Ra",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_7,
    "Ra",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_7,
    "Ra",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_16,
    "Rd",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "Rf",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_8,
    "Rb",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_16,
    "Rd",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "Rf",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_15,
    "Rc",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_31,
    "Re",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_8,
    "Rb",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_8,
    "Rb",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_16,
    "Rd",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "=Ux",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "=Ux",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "=Ux",
    E_V4QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V4QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V4QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "=Ux",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "=Ux",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "=Ux",
    E_V4QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V4QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V4QImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=&w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "Ux",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Us",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "=Ux",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "=Ux",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "=Ux",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "=Ux",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "=Ux",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_vldrd_immediate,
    "Ri",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_vldrd_immediate,
    "Ri",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "2",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "2",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "2",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=Te",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "Rg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_vldrd_immediate,
    "Ri",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_vldrd_immediate,
    "Ri",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_vldrd_immediate,
    "Ri",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_vldrd_immediate,
    "Ri",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_vldrd_immediate,
    "Ri",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_vldrd_immediate,
    "Ri",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_vldrd_immediate,
    "Ri",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "Um",
    E_XImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "=r",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_low_register_operand,
    "=l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_low_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_low_register_operand,
    "=l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_low_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "Pg",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "Pg",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "Pg",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "Rf",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "Rf",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "1",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "Rf",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_mve_cde1_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_mve_cde1_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_mve_cde2_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_mve_cde2_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_mve_cde3_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_mve_cde3_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_mve_cde1_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_mve_cde2_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_coproc_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_mve_cde3_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Ux",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Ux",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Ux",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Ux",
    E_V8HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "=Ux",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Ux",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Ux",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Ux",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Ux",
    E_V8HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_permissive_struct_operand,
    "Ux",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_adcimm_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_adcimm_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_anddi_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_iordi_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_xordi_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    1
  },
  {
    reg_or_int_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    general_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    general_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_reg_or_extendqisi_mem_op,
    "",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    0,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_reg_or_extendqisi_mem_op,
    "",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_reg_or_extendqisi_mem_op,
    "",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    ssat16_imm,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    usat16_imm,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    general_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    arm_reload_memory_operand,
    "=o",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_reload_memory_operand,
    "o",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "=&r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    general_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    1
  },
  {
    arm_reload_memory_operand,
    "=o",
    E_DFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    general_operand,
    "",
    E_BLKmode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    general_operand,
    "",
    E_BLKmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_BLKmode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    expandable_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonmemory_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    expandable_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    vfp_compare_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    expandable_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    vfp_compare_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    expandable_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    expandable_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    expandable_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    vfp_compare_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    expandable_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    vfp_compare_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    expandable_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    vfp_compare_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    expandable_comparison_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    expandable_comparison_operator,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_cond_move_operator,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_cond_move_operator,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_cond_move_operator,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    1
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    1
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "",
    E_BLKmode,
    0,
    0,
    1,
    1
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    guard_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    scratch_operand,
    "",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    memory_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    guard_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    memory_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    memory_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    0,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    neon_inv_logic_op2,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    neon_logic_op2,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    neon_perm_struct_or_reg_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    imm_lshift_or_reg_neon,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    imm_lshift_or_reg_neon,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    imm_lshift_or_reg_neon,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    imm_lshift_or_reg_neon,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    imm_lshift_or_reg_neon,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    imm_lshift_or_reg_neon,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    imm_rshift_or_reg_neon,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    imm_rshift_or_reg_neon,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    imm_rshift_or_reg_neon,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    imm_rshift_or_reg_neon,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    imm_rshift_or_reg_neon,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    imm_rshift_or_reg_neon,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_OImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_OImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_XImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_XImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    lt_ge_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    memory_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    const0_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    thumb1_cmpneg_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    thumb1_cmp_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    scratch_operand,
    "",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_TImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_TImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "",
    E_EImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_EImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "",
    E_OImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_OImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "",
    E_CImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_CImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "",
    E_XImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_XImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_V8QImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_V16QImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_V4HImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_V8HImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_V2SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_V4SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_V2SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_V4SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_V8HImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_V4HImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    general_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    general_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    general_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    general_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    general_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V4BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V8BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    neon_struct_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V4BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4BFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V8BFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V2SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_TImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_TImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_EImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_EImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_CImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_CImode,
    0,
    0,
    1,
    1
  },
  {
    neon_struct_operand,
    "",
    E_EImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_EImode,
    0,
    0,
    1,
    0
  },
  {
    neon_struct_operand,
    "",
    E_CImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_CImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "x",
    E_V8BFmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_USAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_USAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_USAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "",
    E_DImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_USAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_USAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_USAmode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "",
    E_DImode,
    0,
    0,
    0,
    0
  },
  {
    scratch_operand,
    "",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_UHAmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    mve_scatter_memory,
    "",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    mve_scatter_memory,
    "",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_scatter_memory,
    "",
    E_V4QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_scatter_memory,
    "",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    mve_scatter_memory,
    "",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    mve_scatter_memory,
    "",
    E_V4QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    mve_scatter_memory,
    "",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    mve_scatter_memory,
    "",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_memory_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_scatter_memory,
    "",
    E_V2DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    mve_scatter_memory,
    "",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=Us",
    E_V8HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "w",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "Up",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    mve_scatter_memory,
    "",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    mve_scatter_memory,
    "",
    E_V4SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    vpr_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_selective_upto_8,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_vldrd_immediate,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_vldrd_immediate,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V2DImode,
    0,
    0,
    1,
    0
  },
  {
    mve_vldrd_immediate,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mve_imm_32,
    "",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    vpr_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "",
    E_V16BImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_V16BImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "",
    E_V8BImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_V8BImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_V16BImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_V8BImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_V4BImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_V8BImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    comparison_operator,
    "",
    E_V4BImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_zero_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V16BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V8BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_V4BImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=rk,l,l,l,r,k,r,k,r,k,r,k,k,r,k,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%0,l,0,l,rk,k,r,r,rk,k,rk,k,r,rk,k,rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "rk,l,Py,Pd,rI,rI,k,rI,Pj,Pj,L,L,L,PJ,PJ,?n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "I,L,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "l,Pw,rI,L",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "0,rI,K",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_not_operand,
    "l,rI,K",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "r,I,Pz",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "r,I",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_carry_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_borrow_operation,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,l,l,l,r,r,r,rk,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "l,0,l,Pz,I,r,r,k,?n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "l,Py,Pd,l,r,I,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r,&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%0,r,0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,&r,&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,0,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r,r,0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "2,2",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r,0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=r,&r,&r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,l,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r,0,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "I,l,K,r,?n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_M_operand,
    "M",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_M_operand,
    "M",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_M_operand,
    "M",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_M_operand,
    "M",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    scratch_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%r,0,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "I,l,r,?n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "%0,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,0,rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "rI,rI,rI",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    sat_shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,l,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    reg_or_int_operand,
    "l,M,M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "m,Uw,m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "Uh",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "m,Uw,m",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=m,Uw,m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "l,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=m,Uw,m",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "l,l,r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r,m",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r,Uh",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r,m",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r,Uh",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_extendqisi_mem_op,
    "Uq",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_reg_or_extendqisi_mem_op,
    "r,Uq",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    ssat16_imm,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    usat16_imm,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    nonimmediate_operand,
    "0,0",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "i,i",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=rk,r,r,r,rk,m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,I,K,j,mi,rk",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    0,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r,r,r,m,r",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rIk,K,n,r,mi",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r,r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_rhs_operand,
    "I,rk,K",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r,r,r,l,r,l,Uu,r,m",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,rk,I,Py,K,Uu,l,Uh,r",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r,m,r,r",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "m,r,r,F",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r,m,r,r",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "m,r,r,F",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r,r,m",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "r,mE,r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r,r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_add_operand,
    "Py,r,r,I,L",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=o",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk,rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    power_of_two_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    power_of_two_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk,rk,rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_nomul_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk,r,rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_nomul_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_amount_operand,
    "M,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shiftable_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    memory_operand,
    "m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    memory_operand,
    "m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    scratch_operand,
    "=r",
    E_SImode,
    0,
    0,
    0,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "+rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_I_operand,
    "I",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    pop_multiple_return,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "+rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_I_operand,
    "I",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    pop_multiple_return,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    ldrd_strd_offset_operand,
    "Do",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    ldrd_strd_offset_operand,
    "Do",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    memory_operand,
    "m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    memory_operand,
    "=m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    store_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    store_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    store_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    store_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    store_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    store_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_hard_general_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    load_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "%y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=y,m,y,?r,?y,?r,?r,?m",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "y,y,mi,y,r,r,mi,r",
    E_V2SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=y,m,y,?r,?y,?r,?r,?m",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "y,y,mi,y,r,r,mi,r",
    E_V4HImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=y,m,y,?r,?y,?r,?r,?m",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "y,y,mi,y,r,r,mi,r",
    E_V8QImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    imm_or_reg_operand,
    "z,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    imm_or_reg_operand,
    "z,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    imm_or_reg_operand,
    "z,i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    imm_or_reg_operand,
    "y,i",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    imm_or_reg_operand,
    "y,i",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    imm_or_reg_operand,
    "y,i",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,i",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,i",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y,y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y,i",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "z",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V4HImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V8QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_V2SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "y",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "i",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=rk,r,r,m,r,*t,r,*t",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rIk,K,n,r,mi,r,*t,*t",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=rk,r,l,r,m,r,*t,r,*t,Up,r",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,IDB,Py,n,r,m,r,*t,*t,r,Up",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=rk,r,l,r,m,r,*t,r,*t,Up,r",
    E_V16BImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,IDB,Py,n,r,m,r,*t,*t,r,Up",
    E_V16BImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=rk,r,l,r,m,r,*t,r,*t,Up,r",
    E_V8BImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,IDB,Py,n,r,m,r,*t,*t,r,Up",
    E_V8BImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=rk,r,l,r,m,r,*t,r,*t,Up,r",
    E_V4BImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,IDB,Py,n,r,m,r,*t,*t,r,Up",
    E_V4BImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r,r,r,m,r,*t,r,*t",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rIk,K,n,r,mi,r,*t,*t",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=rk,r,r,r,rk,m,*t,r,*t,*t,*Uv",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,I,K,j,mi,rk,r,t,*t,*Uvi,*t",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=rk,r,l,r,r,l,*hk,m,*m,*t,r,*t,*t,*Uv,Up,r,Uf,r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,I,Py,K,j,mi,*mi,l,*hk,r,*t,*t,*UvTu,*t,r,Up,r,Uf",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_di_operand,
    "=r,r,r,r,r,r,m,w,!r,w,w,Uv",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    di_operand,
    "r,rDa,Db,Dc,mi,mi,r,r,w,w,UvTu,w",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=?r,?m,t,r,t,r,t,t,Uj,r",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "m,r,t,r,r,t,Dv,Uj,t,F",
    E_HFmode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=?r,?m,t,r,t,r,t,t,Uj,r",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "m,r,t,r,r,t,Dv,Uj,t,F",
    E_BFmode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=t,?r,t,t,Uv,r,m,t,r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "?r,t,Dv,UvE,t,mE,r,t,r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=t,?r,t,t,Uv,r,m,t,r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    hard_sf_operand,
    "?r,t,Dv,UvHa,t,mHa,r,t,r",
    E_SFmode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_soft_df_operand,
    "=w,?r,w,w,w,Uv,r,m,w,r",
    E_DFmode,
    0,
    0,
    1,
    1
  },
  {
    soft_df_operand,
    "?r,w,Dy,G,UvF,w,mF,r,w,r",
    E_DFmode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t,?r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t,r",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w,?r,?r",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,0,r",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&t,t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t,t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t,t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w,w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "0",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_HFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&t,t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t,t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&w,w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "+&rk",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    clear_vfp_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "t,t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    vfp_compare_operand,
    "t,G",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "w,w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    vfp_compare_operand,
    "w,G",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_double_vcvt_power_of_two_reciprocal,
    "Dt",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=x,x,w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,t,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_double_vcvt_power_of_two_reciprocal,
    "Dt,Dt,Dt",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=t",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    const_double_vcvt_power_of_two,
    "Dp",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "t",
    E_SFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "w",
    E_DFmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,l,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r,0,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=rk,r,l,r,r,lk*r,m",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,I,Py,K,j,mi,lk*r",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    nonimmediate_operand,
    "=r,r,l,r,m,r",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "rk,I,Py,n,r,m",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    thumb_16bit_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "0,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_reg_or_int_operand,
    "l,M",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=l",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "I",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=l",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "I",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "I",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=l,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "l,0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_reg_or_int_operand,
    "lPt,Ps",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "%0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "=l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    low_register_operand,
    "l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    const_int_operand,
    "M",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    clear_multiple_operation,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "+r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_reg_or_long_shift_imm,
    "rPg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "+r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    long_shift_imm,
    "Pg",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r,r,l",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_sync_memory_operand,
    "Q,Q,Q",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "n,Pf,n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r,r,l",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_sync_memory_operand,
    "Q,Q,Q",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "n,Pf,n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r,r,l",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_sync_memory_operand,
    "Q,Q,Q",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "n,Pf,n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=Q,Q,Q",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "r,r,l",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "n,Pf,n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=Q,Q,Q",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "r,r,l",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "n,Pf,n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    memory_operand,
    "=Q,Q,Q",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    general_operand,
    "r,r,l",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    const_int_operand,
    "n,Pf,n",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_sync_memory_operand,
    "Q",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "=Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "=Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "=Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "=Ua",
    E_DImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "=Ua,Ua",
    E_QImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,r",
    E_QImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "=Ua,Ua",
    E_HImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=&r,&r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    mem_noofs_operand,
    "=Ua,Ua",
    E_SImode,
    0,
    0,
    1,
    1
  },
  {
    s_register_operand,
    "r,r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_QQmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_HQmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_SQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SQmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_UQQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_UQQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_UQQmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_UHQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_UHQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_UHQmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_USQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_USQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_USQmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_HAmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_UHAmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=l,r",
    E_USAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_USAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "l,r",
    E_USAmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_V4QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V4QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V4QQmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_V2HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2HQmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_V2HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2HAmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_V4UQQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V4UQQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V4UQQmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_V2UHQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2UHQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2UHQmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_UQQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_UQQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_UQQmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_UHQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_UHQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_UHQmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_V2UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_V2UHAmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_UHAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_UHAmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_QQmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HQmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_HAmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SQmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SQmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "r",
    E_SAmode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    sat_shift_operator,
    "",
    E_SImode,
    0,
    1,
    0,
    0
  },
  {
    s_register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "I",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "=r",
    E_HImode,
    0,
    0,
    1,
    0
  },
  {
    s_register_operand,
    "",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_low_register_operand,
    "=l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_low_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    register_operand,
    "r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_low_register_operand,
    "=l",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    arm_low_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "Pg",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "0",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "Pg",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "=r",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_general_register_operand,
    "0",
    E_DImode,
    0,
    0,
    1,
    0
  },
  {
    immediate_operand,
    "Pg",
    E_SImode,
    0,
    0,
    1,
    0
  },
  {
    arm_comparison_operator,
    "",
    E_VOIDmode,
    0,
    1,
    0,
    0
  },
  {
    cc_register,
    "",
    E_VOIDmode,
    0,
    0,
    1,
    0
  },
};


#if GCC_VERSION >= 2007
__extension__
#endif

const struct insn_data_d insn_data[] = 
{
  /* <internal>:0 */
  {
    "*placeholder_for_nothing",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { 0 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:613 */
  {
    "*addsi3_cin_vout_reg_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_1 },
#else
    { 0, output_1, 0 },
#endif
    { 0 },
    &operand_data[1],
    5,
    5,
    5,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:659 */
  {
    "*addsi3_cin_vout_imm_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2 },
#else
    { 0, output_2, 0 },
#endif
    { 0 },
    &operand_data[6],
    5,
    5,
    5,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:699 */
  {
    "*addsi3_cin_vout_0_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "adcs%?\t%0, %1, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[11],
    4,
    4,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:793 */
  {
    "*addsi3_cin_cout_reg_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_4 },
#else
    { 0, output_4, 0 },
#endif
    { 0 },
    &operand_data[1],
    5,
    5,
    2,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:837 */
  {
    "*addsi3_cin_cout_imm_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_5 },
#else
    { 0, output_5, 0 },
#endif
    { 0 },
    &operand_data[15],
    6,
    6,
    1,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:876 */
  {
    "*addsi3_cin_cout_0_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "adcs%?\t%0, %1, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[11],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:925 */
  {
    "*arm_addsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_7 },
#else
    { 0, output_7, 0 },
#endif
    { 0 },
    &operand_data[21],
    3,
    3,
    0,
    16,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:968 */
  {
    "addsi3_compareV_reg",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "adds%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsi3_compareV_reg },
    &operand_data[24],
    3,
    3,
    4,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:985 */
  {
    "*addsi3_compareV_reg_nosum",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cmn%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[27],
    2,
    2,
    2,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1000 */
  {
    "subvsi3_intmin",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "subs%?\t%0, %1, #-2147483648",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subvsi3_intmin },
    &operand_data[29],
    2,
    2,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1016 */
  {
    "addsi3_compareV_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_11 },
#else
    { 0, output_11, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsi3_compareV_imm },
    &operand_data[31],
    3,
    3,
    4,
    6,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1041 */
  {
    "addsi3_compareV_imm_nosum",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_12 },
#else
    { 0, output_12, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsi3_compareV_imm_nosum },
    &operand_data[34],
    2,
    2,
    2,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1104 */
  {
    "addsi3_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_13 },
#else
    { 0, output_13, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsi3_compare0 },
    &operand_data[36],
    3,
    3,
    2,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1121 */
  {
    "*addsi3_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_14 },
#else
    { 0, output_14, 0 },
#endif
    { 0 },
    &operand_data[37],
    2,
    2,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1137 */
  {
    "*compare_negsi_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cmn%?\t%1, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[39],
    2,
    2,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1154 */
  {
    "cmpsi2_addneg",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_16 },
#else
    { 0, 0, output_16 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmpsi2_addneg },
    &operand_data[41],
    4,
    4,
    1,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1222 */
  {
    "addsi3_compare_op1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_17 },
#else
    { 0, output_17, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsi3_compare_op1 },
    &operand_data[45],
    3,
    3,
    3,
    6,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1247 */
  {
    "*addsi3_compare_op2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_18 },
#else
    { 0, output_18, 0 },
#endif
    { 0 },
    &operand_data[48],
    3,
    3,
    3,
    6,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1272 */
  {
    "*compare_addsi2_op0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_19 },
#else
    { 0, output_19, 0 },
#endif
    { 0 },
    &operand_data[51],
    2,
    2,
    1,
    4,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1295 */
  {
    "*compare_addsi2_op1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_20 },
#else
    { 0, output_20, 0 },
#endif
    { 0 },
    &operand_data[51],
    2,
    2,
    1,
    4,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1318 */
  {
    "addsi3_carryin",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_21 },
#else
    { 0, output_21, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsi3_carryin },
    &operand_data[53],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1337 */
  {
    "add0si3_carryin",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "adc%?\t%0, %1, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_add0si3_carryin },
    &operand_data[57],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1349 */
  {
    "*addsi3_carryin_alt2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_23 },
#else
    { 0, output_23, 0 },
#endif
    { 0 },
    &operand_data[60],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1367 */
  {
    "*addsi3_carryin_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "adc%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[64],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1384 */
  {
    "*addsi3_carryin_clobercc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "adcs%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[70],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1632 */
  {
    "subsi3_compare1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "subs%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subsi3_compare1 },
    &operand_data[74],
    3,
    3,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1645 */
  {
    "subvsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "subs%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subvsi3 },
    &operand_data[77],
    3,
    3,
    4,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1662 */
  {
    "subvsi3_imm1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsbs%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subvsi3_imm1 },
    &operand_data[80],
    3,
    3,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1677 */
  {
    "subsi3_carryin",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_29 },
#else
    { 0, output_29, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subsi3_carryin },
    &operand_data[83],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1695 */
  {
    "rsbsi_carryin_reg",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsc%?\t%0, %2, #1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rsbsi_carryin_reg },
    &operand_data[87],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1708 */
  {
    "*add_not_cin",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_31 },
#else
    { 0, output_31, 0 },
#endif
    { 0 },
    &operand_data[90],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1726 */
  {
    "add_not_shift_cin",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsc%?\t%0, %4, %1%S3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_add_not_shift_cin },
    &operand_data[94],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1741 */
  {
    "cmpsi3_carryin_CC_NVout",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sbcs\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmpsi3_carryin_CC_NVout },
    &operand_data[100],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1741 */
  {
    "cmpsi3_carryin_CC_Bout",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sbcs\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmpsi3_carryin_CC_Bout },
    &operand_data[100],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1758 */
  {
    "cmpsi3_imm_carryin_CC_NVout",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_35 },
#else
    { 0, output_35, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmpsi3_imm_carryin_CC_NVout },
    &operand_data[104],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1758 */
  {
    "cmpsi3_imm_carryin_CC_Bout",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_36 },
#else
    { 0, output_36, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmpsi3_imm_carryin_CC_Bout },
    &operand_data[104],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1774 */
  {
    "cmpsi3_0_carryin_CC_NVout",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sbcs\t%0, %1, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmpsi3_0_carryin_CC_NVout },
    &operand_data[108],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1774 */
  {
    "cmpsi3_0_carryin_CC_Bout",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sbcs\t%0, %1, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmpsi3_0_carryin_CC_Bout },
    &operand_data[108],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1786 */
  {
    "*subsi3_carryin_const",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sbc\t%0, %1, #%n2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[111],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1798 */
  {
    "*subsi3_carryin_const0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sbc\t%0, %1, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[115],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1808 */
  {
    "*subsi3_carryin_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sbc%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[118],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1825 */
  {
    "*subsi3_carryin_shift_alt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sbc%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[118],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1843 */
  {
    "*rsbsi3_carryin_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsc%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[118],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1858 */
  {
    "*rsbsi3_carryin_shift_alt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsc%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[118],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2001 */
  {
    "*arm_subsi3_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_45 },
#else
    { 0, output_45, 0 },
#endif
    { 0 },
    &operand_data[124],
    3,
    3,
    0,
    9,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2044 */
  {
    "subsi3_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_46 },
#else
    { 0, output_46, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subsi3_compare0 },
    &operand_data[127],
    3,
    3,
    2,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2061 */
  {
    "subsi3_compare",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_47 },
#else
    { 0, output_47, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subsi3_compare },
    &operand_data[127],
    3,
    3,
    2,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2079 */
  {
    "rsb_imm_compare",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsbs\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rsb_imm_compare },
    &operand_data[130],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2093 */
  {
    "rsb_imm_compare_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsbs\t%0, %2, #%B1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rsb_imm_compare_scratch },
    &operand_data[134],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2106 */
  {
    "rscsi3_CC_NVout_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rscs\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rscsi3_CC_NVout_scratch },
    &operand_data[137],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2106 */
  {
    "rscsi3_CC_Bout_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rscs\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rscsi3_CC_Bout_scratch },
    &operand_data[137],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2119 */
  {
    "usubvsi3_borrow",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sbcs%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usubvsi3_borrow },
    &operand_data[141],
    5,
    5,
    2,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2137 */
  {
    "usubvsi3_borrow_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_53 },
#else
    { 0, output_53, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usubvsi3_borrow_imm },
    &operand_data[146],
    6,
    6,
    1,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2156 */
  {
    "subvsi3_borrow",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sbcs%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subvsi3_borrow },
    &operand_data[141],
    5,
    5,
    5,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2177 */
  {
    "subvsi3_borrow_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_55 },
#else
    { 0, output_55, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subvsi3_borrow_imm },
    &operand_data[152],
    5,
    5,
    5,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2242 */
  {
    "*mul",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mul%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[157],
    3,
    3,
    0,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2258 */
  {
    "*mla",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mla%?\t%0, %3, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[160],
    4,
    4,
    0,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2271 */
  {
    "*mls",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mls%?\t%0, %3, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2283 */
  {
    "*mulsi3_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "muls%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[168],
    3,
    3,
    2,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2297 */
  {
    "*mulsi3_compare0_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "muls%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[164],
    3,
    3,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2311 */
  {
    "*mulsi_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "muls%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[171],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2324 */
  {
    "*mulsi_compare0_scratch_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "muls%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[174],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2337 */
  {
    "*mulsi3addsi_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mlas%?\t%0, %2, %1, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[177],
    4,
    4,
    3,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2354 */
  {
    "*mulsi3addsi_compare0_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mlas%?\t%0, %2, %1, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[164],
    4,
    4,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2371 */
  {
    "*mulsi3addsi_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mlas%?\t%0, %2, %1, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[181],
    4,
    4,
    0,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2386 */
  {
    "*mulsi3addsi_compare0_scratch_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mlas%?\t%0, %2, %1, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[185],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2419 */
  {
    "smull",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smull%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smull },
    &operand_data[189],
    4,
    4,
    2,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2419 */
  {
    "umull",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "umull%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_umull },
    &operand_data[189],
    4,
    4,
    2,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2454 */
  {
    "smlal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlal%?\t%0, %2, %4, %5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smlal },
    &operand_data[193],
    6,
    6,
    3,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2454 */
  {
    "umlal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "umlal%?\t%0, %2, %4, %5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_umlal },
    &operand_data[193],
    6,
    6,
    3,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2491 */
  {
    "*smull_high",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smull%?\t%3, %0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[199],
    3,
    4,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2491 */
  {
    "*umull_high",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "umull%?\t%3, %0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[199],
    3,
    4,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2507 */
  {
    "mulhisi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smulbb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulhisi3 },
    &operand_data[203],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2519 */
  {
    "*mulhisi3tb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smultb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[206],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2532 */
  {
    "*mulhisi3bt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smulbt%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[209],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2545 */
  {
    "*mulhisi3tt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smultt%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2581 */
  {
    "*arm_maddhisi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlabb%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[212],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2594 */
  {
    "arm_smlabb_setq",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlabb%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlabb_setq },
    &operand_data[212],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2627 */
  {
    "maddhisi4tb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlatb%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_maddhisi4tb },
    &operand_data[216],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2641 */
  {
    "arm_smlatb_setq",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlatb%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlatb_setq },
    &operand_data[216],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2675 */
  {
    "maddhisi4tt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlatt%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_maddhisi4tt },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2690 */
  {
    "arm_smlatt_setq",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlatt%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlatt_setq },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2724 */
  {
    "maddhidi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlalbb%?\t%Q0, %R0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_maddhidi4 },
    &operand_data[220],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2738 */
  {
    "*maddhidi4tb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlaltb%?\t%Q0, %R0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[224],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2753 */
  {
    "*maddhidi4tt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlaltt%?\t%Q0, %R0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[228],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2770 */
  {
    "arm_smlawb_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlawb%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlawb_insn },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2770 */
  {
    "arm_smlawb_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlawb%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlawb_setq_insn },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2770 */
  {
    "arm_smlawt_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlawt%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlawt_insn },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2770 */
  {
    "arm_smlawt_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlawt%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlawt_setq_insn },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3004 */
  {
    "*arm_andsi3_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_90 },
#else
    { 0, output_90, 0 },
#endif
    { 0 },
    &operand_data[232],
    3,
    3,
    0,
    5,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3031 */
  {
    "*andsi3_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_91 },
#else
    { 0, output_91, 0 },
#endif
    { 0 },
    &operand_data[235],
    3,
    3,
    2,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3048 */
  {
    "*andsi3_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_92 },
#else
    { 0, output_92, 0 },
#endif
    { 0 },
    &operand_data[236],
    2,
    3,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3064 */
  {
    "*zeroextractsi_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_93 },
#else
    { 0, 0, output_93 },
#endif
    { 0 },
    &operand_data[239],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3087 */
  {
    "*ne_zeroextractsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[242],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3125 */
  {
    "*ne_zeroextractsi_shifted",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[242],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3151 */
  {
    "*ite_ne_zeroextractsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[242],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3190 */
  {
    "*ite_ne_zeroextractsi_shifted",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[247],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3474 */
  {
    "insv_zero",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bfc%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_insv_zero },
    &operand_data[251],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3486 */
  {
    "insv_t2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bfi%?\t%0, %3, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_insv_t2 },
    &operand_data[251],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3498 */
  {
    "andsi_notsi_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bic%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andsi_notsi_si },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3508 */
  {
    "andsi_not_shiftsi_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bic%?\t%0, %1, %2%S4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andsi_not_shiftsi_si },
    &operand_data[255],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3525 */
  {
    "andsi_not_shiftsi_si_scc_no_reuse",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bics%?\t%4, %3, %1%S0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andsi_not_shiftsi_si_scc_no_reuse },
    &operand_data[259],
    4,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3545 */
  {
    "andsi_not_shiftsi_si_scc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bics%?\t%4, %3, %1%S0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andsi_not_shiftsi_si_scc },
    &operand_data[264],
    5,
    5,
    4,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3567 */
  {
    "*andsi_notsi_si_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bics\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[164],
    3,
    3,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3581 */
  {
    "*andsi_notsi_si_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bics\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[174],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3630 */
  {
    "*iorsi3_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_106 },
#else
    { 0, output_106, 0 },
#endif
    { 0 },
    &operand_data[232],
    3,
    3,
    0,
    5,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3671 */
  {
    "*iorsi3_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "orrs%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[269],
    3,
    3,
    2,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3687 */
  {
    "*iorsi3_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "orrs%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[272],
    3,
    3,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3736 */
  {
    "*arm_xorsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_109 },
#else
    { 0, output_109, 0 },
#endif
    { 0 },
    &operand_data[275],
    3,
    3,
    0,
    4,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3761 */
  {
    "*xorsi3_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "eors%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[278],
    3,
    3,
    2,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3774 */
  {
    "*xorsi3_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "teq%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[279],
    2,
    2,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3802 */
  {
    "*andsi_iorsi3_notsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[281],
    4,
    4,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3960 */
  {
    "*smax_0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bic%?\t%0, %1, %1, asr #31",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[11],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3970 */
  {
    "*smax_m1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "orr%?\t%0, %1, %1, asr #31",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[11],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3980 */
  {
    "*arm_smax_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[285],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4020 */
  {
    "*smin_0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "and%?\t%0, %1, %1, asr #31",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[11],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4030 */
  {
    "*arm_smin_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[285],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4062 */
  {
    "*arm_umaxsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[288],
    3,
    3,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4095 */
  {
    "*arm_uminsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[288],
    3,
    3,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4118 */
  {
    "*store_minmaxsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_120 },
#else
    { 0, 0, output_120 },
#endif
    { 0 },
    &operand_data[291],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4145 */
  {
    "*minmax_arithsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_121 },
#else
    { 0, 0, output_121 },
#endif
    { 0 },
    &operand_data[295],
    6,
    6,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4190 */
  {
    "*minmax_arithsi_non_canon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[301],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4253 */
  {
    "arm_qadd_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_qadd_insn },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4253 */
  {
    "arm_qadd_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_qadd_setq_insn },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4253 */
  {
    "arm_qsub_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_qsub_insn },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4253 */
  {
    "arm_qsub_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_qsub_setq_insn },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4313 */
  {
    "arm_get_apsr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mrs%?\t%0, APSR",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_get_apsr },
    &operand_data[11],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4322 */
  {
    "arm_set_apsr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "msr%?\tAPSR_nzcvq, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_set_apsr },
    &operand_data[12],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4369 */
  {
    "satsi_smin",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_129 },
#else
    { 0, 0, output_129 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_satsi_smin },
    &operand_data[306],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4369 */
  {
    "satsi_smin_setq",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_130 },
#else
    { 0, 0, output_130 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_satsi_smin_setq },
    &operand_data[306],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4369 */
  {
    "satsi_smax",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_131 },
#else
    { 0, 0, output_131 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_satsi_smax },
    &operand_data[306],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4369 */
  {
    "satsi_smax_setq",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_132 },
#else
    { 0, 0, output_132 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_satsi_smax_setq },
    &operand_data[306],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4393 */
  {
    "*satsi_smin_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_133 },
#else
    { 0, 0, output_133 },
#endif
    { 0 },
    &operand_data[310],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4393 */
  {
    "*satsi_smax_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_134 },
#else
    { 0, 0, output_134 },
#endif
    { 0 },
    &operand_data[310],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4420 */
  {
    "arm_cx1si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cx1\tp%c1, %0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_cx1si },
    &operand_data[316],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4420 */
  {
    "arm_cx1di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cx1d\tp%c1, %0, %H0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_cx1di },
    &operand_data[319],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4430 */
  {
    "arm_cx1asi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cx1a\tp%c1, %0, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_cx1asi },
    &operand_data[322],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4430 */
  {
    "arm_cx1adi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cx1da\tp%c1, %0, %H0, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_cx1adi },
    &operand_data[326],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4441 */
  {
    "arm_cx2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cx2\tp%c1, %0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_cx2si },
    &operand_data[330],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4441 */
  {
    "arm_cx2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cx2d\tp%c1, %0, %H0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_cx2di },
    &operand_data[334],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4452 */
  {
    "arm_cx2asi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cx2a\tp%c1, %0, %3, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_cx2asi },
    &operand_data[338],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4452 */
  {
    "arm_cx2adi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cx2da\tp%c1, %0, %H0, %3, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_cx2adi },
    &operand_data[343],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4464 */
  {
    "arm_cx3si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cx3\tp%c1, %0, %2, %3, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_cx3si },
    &operand_data[348],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4464 */
  {
    "arm_cx3di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cx3d\tp%c1, %0, %H0, %2, %3, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_cx3di },
    &operand_data[353],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4476 */
  {
    "arm_cx3asi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cx3a\tp%c1, %0, %3, %4, %5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_cx3asi },
    &operand_data[358],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4476 */
  {
    "arm_cx3adi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cx3da\tp%c1, %0, %H0, %3, %4, %5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_cx3adi },
    &operand_data[364],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4645 */
  {
    "*arm_shiftsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_147 },
#else
    { 0, 0, output_147 },
#endif
    { 0 },
    &operand_data[370],
    4,
    4,
    0,
    4,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4660 */
  {
    "*shiftsi3_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_148 },
#else
    { 0, 0, output_148 },
#endif
    { 0 },
    &operand_data[374],
    4,
    4,
    3,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4675 */
  {
    "*shiftsi3_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_149 },
#else
    { 0, 0, output_149 },
#endif
    { 0 },
    &operand_data[378],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4689 */
  {
    "*not_shiftsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mvn%?\t%0, %1%S3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[94],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4701 */
  {
    "*not_shiftsi_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mvns%?\t%0, %1%S3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[94],
    4,
    4,
    3,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4717 */
  {
    "*not_shiftsi_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mvns%?\t%0, %1%S3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[382],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4898 */
  {
    "unaligned_loaddi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_153 },
#else
    { 0, 0, output_153 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_unaligned_loaddi },
    &operand_data[386],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4909 */
  {
    "unaligned_loadsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_154 },
#else
    { 0, output_154, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_unaligned_loadsi },
    &operand_data[388],
    2,
    2,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4928 */
  {
    "unaligned_loadhis",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldrsh%?\t%0, %1\t@ unaligned",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_unaligned_loadhis },
    &operand_data[390],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4938 */
  {
    "unaligned_loadhiu",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_156 },
#else
    { 0, output_156, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_unaligned_loadhiu },
    &operand_data[392],
    2,
    2,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4954 */
  {
    "unaligned_storedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_157 },
#else
    { 0, 0, output_157 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_unaligned_storedi },
    &operand_data[394],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4965 */
  {
    "unaligned_storesi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_158 },
#else
    { 0, output_158, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_unaligned_storesi },
    &operand_data[396],
    2,
    2,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4980 */
  {
    "unaligned_storehi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_159 },
#else
    { 0, output_159, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_unaligned_storehi },
    &operand_data[398],
    2,
    2,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4996 */
  {
    "*extv_reg",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sbfx%?\t%0, %1, %3, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[242],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5010 */
  {
    "extzv_t2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ubfx%?\t%0, %1, %3, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_extzv_t2 },
    &operand_data[242],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5026 */
  {
    "divsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_162 },
#else
    { 0, output_162, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_divsi3 },
    &operand_data[255],
    3,
    3,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5039 */
  {
    "udivsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_163 },
#else
    { 0, output_163, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_udivsi3 },
    &operand_data[255],
    3,
    3,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5073 */
  {
    "*arm_negsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsb%?\t%0, %1, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[77],
    2,
    2,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5088 */
  {
    "negsi2_0compare",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_165 },
#else
    { 0, output_165, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negsi2_0compare },
    &operand_data[77],
    2,
    2,
    1,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5104 */
  {
    "negsi2_carryin",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_166 },
#else
    { 0, output_166, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negsi2_carryin },
    &operand_data[400],
    3,
    3,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5148 */
  {
    "*arm_abssi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[403],
    2,
    2,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5212 */
  {
    "*arm_neg_abssi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[403],
    2,
    2,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5296 */
  {
    "*arm_one_cmplsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mvn%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[77],
    2,
    2,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5308 */
  {
    "*notsi_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mvns%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[11],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5320 */
  {
    "*notsi_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mvns%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[174],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5582 */
  {
    "*arm_zero_extendhisi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_172 },
#else
    { 0, output_172, 0 },
#endif
    { 0 },
    &operand_data[405],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5593 */
  {
    "*arm_zero_extendhisi2_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_173 },
#else
    { 0, output_173, 0 },
#endif
    { 0 },
    &operand_data[407],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5604 */
  {
    "*arm_zero_extendhisi2addsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uxtah%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[209],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5651 */
  {
    "*arm_zero_extendqisi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_175 },
#else
    { 0, output_175, 0 },
#endif
    { 0 },
    &operand_data[409],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5663 */
  {
    "*arm_zero_extendqisi2_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_176 },
#else
    { 0, output_176, 0 },
#endif
    { 0 },
    &operand_data[411],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5674 */
  {
    "*arm_zero_extendqisi2addsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uxtab%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[413],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5725 */
  {
    "*compareqi_eq0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tst%?\t%0, #255",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[414],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5821 */
  {
    "*arm_extendhisi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_179 },
#else
    { 0, output_179, 0 },
#endif
    { 0 },
    &operand_data[407],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5834 */
  {
    "*arm_extendhisi2_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_180 },
#else
    { 0, output_180, 0 },
#endif
    { 0 },
    &operand_data[407],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5845 */
  {
    "*arm_extendhisi2addsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sxtah%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[209],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5878 */
  {
    "*arm_extendqihi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldrsb%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[416],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5915 */
  {
    "*arm_extendqisi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_183 },
#else
    { 0, output_183, 0 },
#endif
    { 0 },
    &operand_data[418],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5927 */
  {
    "*arm_extendqisi_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_184 },
#else
    { 0, output_184, 0 },
#endif
    { 0 },
    &operand_data[418],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5939 */
  {
    "*arm_extendqisi2addsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sxtab%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[413],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5949 */
  {
    "arm_sxtb16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sxtb16%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_sxtb16 },
    &operand_data[11],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5949 */
  {
    "arm_uxtb16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uxtb16%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uxtb16 },
    &operand_data[11],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_qadd8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_qadd8 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_qsub8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_qsub8 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_shadd8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "shadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_shadd8 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_shsub8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "shsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_shsub8 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_uhadd8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uhadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uhadd8 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_uhsub8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uhsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uhsub8 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_uqadd8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uqadd8 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_uqsub8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uqsub8 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_qadd16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_qadd16 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_qasx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qasx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_qasx },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_qsax",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsax%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_qsax },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_qsub16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_qsub16 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_shadd16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "shadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_shadd16 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_shasx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "shasx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_shasx },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_shsax",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "shsax%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_shsax },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_shsub16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "shsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_shsub16 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_uhadd16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uhadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uhadd16 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_uhasx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uhasx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uhasx },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_uhsax",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uhsax%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uhsax },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_uhsub16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uhsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uhsub16 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_uqadd16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uqadd16 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_uqasx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqasx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uqasx },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_uqsax",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsax%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uqsax },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_uqsub16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uqsub16 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_smusd",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smusd%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smusd },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_smusdx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smusdx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smusdx },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_sxtab16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sxtab16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_sxtab16 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_uxtab16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uxtab16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uxtab16 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "arm_usad8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usad8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_usad8 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5968 */
  {
    "arm_usada8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usada8%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_usada8 },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5979 */
  {
    "arm_smlald",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlald%?\t%Q0, %R0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlald },
    &operand_data[228],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5979 */
  {
    "arm_smlaldx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlaldx%?\t%Q0, %R0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlaldx },
    &operand_data[228],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5979 */
  {
    "arm_smlsld",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlsld%?\t%Q0, %R0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlsld },
    &operand_data[228],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5979 */
  {
    "arm_smlsldx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlsldx%?\t%Q0, %R0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlsldx },
    &operand_data[228],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "arm_sadd8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_sadd8 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "arm_ssub8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_ssub8 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "arm_uadd8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uadd8 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "arm_usub8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_usub8 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "arm_sadd16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_sadd16 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "arm_sasx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sasx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_sasx },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "arm_ssax",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssax%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_ssax },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "arm_ssub16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_ssub16 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "arm_uadd16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uadd16 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "arm_uasx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uasx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_uasx },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "arm_usax",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usax%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_usax },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "arm_usub16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_usub16 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "arm_smlad_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlad%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlad_insn },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "arm_smlad_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlad%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlad_setq_insn },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "arm_smladx_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smladx%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smladx_insn },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "arm_smladx_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smladx%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smladx_setq_insn },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "arm_smlsd_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlsd%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlsd_insn },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "arm_smlsd_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlsd%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlsd_setq_insn },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "arm_smlsdx_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlsdx%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlsdx_insn },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "arm_smlsdx_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlsdx%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlsdx_setq_insn },
    &operand_data[164],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6031 */
  {
    "arm_smuad_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smuad%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smuad_insn },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6031 */
  {
    "arm_smuad_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smuad%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smuad_setq_insn },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6031 */
  {
    "arm_smuadx_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smuadx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smuadx_insn },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6031 */
  {
    "arm_smuadx_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smuadx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smuadx_setq_insn },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6058 */
  {
    "arm_ssat16_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssat16%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_ssat16_insn },
    &operand_data[420],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6058 */
  {
    "arm_ssat16_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssat16%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_ssat16_setq_insn },
    &operand_data[420],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6058 */
  {
    "arm_usat16_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usat16%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_usat16_insn },
    &operand_data[423],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6058 */
  {
    "arm_usat16_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usat16%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_usat16_setq_insn },
    &operand_data[423],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6085 */
  {
    "arm_sel",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sel%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_sel },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6239 */
  {
    "*arm_movdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_251 },
#else
    { 0, 0, output_251 },
#endif
    { 0 },
    &operand_data[426],
    2,
    2,
    0,
    5,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6437 */
  {
    "*arm_movt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_252 },
#else
    { 0, output_252, 0 },
#endif
    { 0 },
    &operand_data[428],
    3,
    3,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6451 */
  {
    "*arm_movsi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_253 },
#else
    { 0, output_253, 0 },
#endif
    { 0 },
    &operand_data[431],
    2,
    2,
    0,
    6,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6582 */
  {
    "pic_load_addr_unified",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_pic_load_addr_unified },
    &operand_data[433],
    3,
    3,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6605 */
  {
    "pic_load_addr_32bit",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldr%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_pic_load_addr_32bit },
    &operand_data[436],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6621 */
  {
    "pic_load_addr_thumb1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldr\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_pic_load_addr_thumb1 },
    &operand_data[438],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6630 */
  {
    "pic_add_dot_plus_four",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_257 },
#else
    { 0, 0, output_257 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_pic_add_dot_plus_four },
    &operand_data[440],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6646 */
  {
    "pic_add_dot_plus_eight",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_258 },
#else
    { 0, 0, output_258 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_pic_add_dot_plus_eight },
    &operand_data[443],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6662 */
  {
    "tls_load_dot_plus_eight",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_259 },
#else
    { 0, 0, output_259 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_tls_load_dot_plus_eight },
    &operand_data[443],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6725 */
  {
    "*movsi_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_260 },
#else
    { 0, output_260, 0 },
#endif
    { 0 },
    &operand_data[446],
    2,
    2,
    1,
    5,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7106 */
  {
    "*movhi_insn_arch4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_261 },
#else
    { 0, output_261, 0 },
#endif
    { 0 },
    &operand_data[448],
    2,
    2,
    0,
    5,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7133 */
  {
    "*movhi_bytes",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_262 },
#else
    { 0, output_262, 0 },
#endif
    { 0 },
    &operand_data[450],
    2,
    2,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7250 */
  {
    "*arm_movqi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_263 },
#else
    { 0, output_263, 0 },
#endif
    { 0 },
    &operand_data[452],
    2,
    2,
    0,
    9,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7297 */
  {
    "*arm32_movhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_264 },
#else
    { 0, 0, output_264 },
#endif
    { 0 },
    &operand_data[454],
    2,
    2,
    0,
    4,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7297 */
  {
    "*arm32_movbf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_265 },
#else
    { 0, 0, output_265 },
#endif
    { 0 },
    &operand_data[456],
    2,
    2,
    0,
    4,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7396 */
  {
    "*arm_movsf_soft_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_266 },
#else
    { 0, 0, output_266 },
#endif
    { 0 },
    &operand_data[458],
    2,
    2,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7521 */
  {
    "*movdf_soft_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_267 },
#else
    { 0, 0, output_267 },
#endif
    { 0 },
    &operand_data[460],
    2,
    2,
    0,
    5,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7770 */
  {
    "*arm_cmpsi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_268 },
#else
    { 0, output_268, 0 },
#endif
    { 0 },
    &operand_data[462],
    2,
    2,
    0,
    5,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7789 */
  {
    "*cmpsi_shiftsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cmp\t%0, %1%S3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[256],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7802 */
  {
    "*cmpsi_shiftsi_swp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cmp%?\t%0, %1%S3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[256],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7815 */
  {
    "*arm_cmpsi_negshiftsi_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cmn%?\t%0, %2%S1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[65],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7837 */
  {
    "*deleted_compare",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "\t%@ deleted compare",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[464],
    1,
    1,
    1,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7865 */
  {
    "arm_cond_branch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_273 },
#else
    { 0, 0, output_273 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_cond_branch },
    &operand_data[465],
    3,
    3,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7918 */
  {
    "*arm_cond_branch_reversed",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_274 },
#else
    { 0, 0, output_274 },
#endif
    { 0 },
    &operand_data[465],
    3,
    3,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7985 */
  {
    "*mov_scc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[468],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8002 */
  {
    "*negscc_borrow",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sbc\t%0, %0, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[471],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8012 */
  {
    "*mov_negscc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[468],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8031 */
  {
    "*mov_notscc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[473],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8332 */
  {
    "*cmovsf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_279 },
#else
    { 0, 0, output_279 },
#endif
    { 0 },
    &operand_data[476],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8332 */
  {
    "*cmovdf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_280 },
#else
    { 0, 0, output_280 },
#endif
    { 0 },
    &operand_data[481],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8365 */
  {
    "*cmovhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_281 },
#else
    { 0, 0, output_281 },
#endif
    { 0 },
    &operand_data[486],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8396 */
  {
    "*movsicc_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_282 },
#else
    { 0, output_282, 0 },
#endif
    { 0 },
    &operand_data[491],
    5,
    5,
    0,
    8,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8461 */
  {
    "*movsfcc_soft_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_283 },
#else
    { 0, output_283, 0 },
#endif
    { 0 },
    &operand_data[496],
    5,
    5,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8485 */
  {
    "*arm_jump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_284 },
#else
    { 0, 0, output_284 },
#endif
    { 0 },
    &operand_data[442],
    1,
    1,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8566 */
  {
    "restore_pic_register_after_call",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_285 },
#else
    { 0, output_285, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_restore_pic_register_after_call },
    &operand_data[501],
    2,
    2,
    1,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8606 */
  {
    "*call_reg_armv5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "blx%?\t%0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[503],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8616 */
  {
    "*call_reg_arm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_287 },
#else
    { 0, 0, output_287 },
#endif
    { 0 },
    &operand_data[503],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8717 */
  {
    "*call_value_reg_armv5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "blx%?\t%1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[505],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8728 */
  {
    "*call_value_reg_arm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_289 },
#else
    { 0, 0, output_289 },
#endif
    { 0 },
    &operand_data[505],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8745 */
  {
    "*call_symbol",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_290 },
#else
    { 0, 0, output_290 },
#endif
    { 0 },
    &operand_data[509],
    3,
    3,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8768 */
  {
    "*call_value_symbol",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_291 },
#else
    { 0, 0, output_291 },
#endif
    { 0 },
    &operand_data[511],
    4,
    4,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8858 */
  {
    "*sibcall_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_292 },
#else
    { 0, 0, output_292 },
#endif
    { 0 },
    &operand_data[515],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8878 */
  {
    "*sibcall_value_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_293 },
#else
    { 0, 0, output_293 },
#endif
    { 0 },
    &operand_data[514],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8917 */
  {
    "*arm_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_294 },
#else
    { 0, 0, output_294 },
#endif
    { 0 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8934 */
  {
    "*cond_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_295 },
#else
    { 0, 0, output_295 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8934 */
  {
    "*cond_simple_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_296 },
#else
    { 0, 0, output_296 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8956 */
  {
    "*cond_return_inverted",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_297 },
#else
    { 0, 0, output_297 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8956 */
  {
    "*cond_simple_return_inverted",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_298 },
#else
    { 0, 0, output_298 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8978 */
  {
    "*arm_simple_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_299 },
#else
    { 0, 0, output_299 },
#endif
    { 0 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9012 */
  {
    "*check_arch2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "teq\t%|r0, %|r0\n\tteq\t%|pc, %|pc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[518],
    1,
    1,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9145 */
  {
    "blockage",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_blockage },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9156 */
  {
    "probe_stack",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "str%?\tr0, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_probe_stack },
    &operand_data[519],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9165 */
  {
    "probe_stack_range",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_303 },
#else
    { 0, 0, output_303 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_probe_stack_range },
    &operand_data[520],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9195 */
  {
    "*stack_protect_combined_set_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[523],
    2,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9243 */
  {
    "*stack_protect_set_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_305 },
#else
    { 0, output_305, 0 },
#endif
    { 0 },
    &operand_data[527],
    2,
    2,
    1,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9279 */
  {
    "*stack_protect_combined_test_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[529],
    3,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9348 */
  {
    "arm_stack_protect_test_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldr\t%0, [%2]\n\tldr\t%2, %1\n\teors\t%0, %2, %0\n\tmov\t%2, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_stack_protect_test_insn },
    &operand_data[534],
    3,
    3,
    1,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9378 */
  {
    "stack_protect_set_tls",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldr\t%2, %1\n\tstr\t%2, %0\n\tmov\t%2, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_stack_protect_set_tls },
    &operand_data[537],
    2,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9407 */
  {
    "stack_protect_test_tls",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldr\t%2, %0\n\tldr\t%3, %1\n\teors\t%2, %3, %2\n\tmov\t%3, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_stack_protect_test_tls },
    &operand_data[540],
    2,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9481 */
  {
    "*arm_casesi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_310 },
#else
    { 0, 0, output_310 },
#endif
    { 0 },
    &operand_data[544],
    4,
    4,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9520 */
  {
    "*arm_indirect_jump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mov%?\t%|pc, %0\t%@ indirect register jump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[12],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9529 */
  {
    "*load_indirect_jump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldr%?\t%|pc, %0\t%@ indirect memory jump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[538],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9543 */
  {
    "nop",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "nop",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_nop },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9554 */
  {
    "trap",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_314 },
#else
    { 0, 0, output_314 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_trap },
    &operand_data[0],
    0,
    0,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9574 */
  {
    "*add_multsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2, lsl %b3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[548],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9574 */
  {
    "*rsb_multsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsb%?\t%0, %1, %2, lsl %b3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[552],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9574 */
  {
    "*orr_multsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "orr%?\t%0, %1, %2, lsl %b3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[552],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9574 */
  {
    "*eor_multsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "eor%?\t%0, %1, %2, lsl %b3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[552],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9574 */
  {
    "*and_multsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "and%?\t%0, %1, %2, lsl %b3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[552],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9587 */
  {
    "*add_shiftsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[556],
    5,
    5,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9587 */
  {
    "*rsb_shiftsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsb%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[561],
    5,
    5,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9587 */
  {
    "*orr_shiftsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "orr%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[561],
    5,
    5,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9587 */
  {
    "*eor_shiftsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "eor%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[561],
    5,
    5,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9587 */
  {
    "*and_shiftsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "and%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[561],
    5,
    5,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9619 */
  {
    "*arith_shiftsi_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "%i1s%?\t%0, %2, %4%S3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[566],
    6,
    6,
    5,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9638 */
  {
    "*arith_shiftsi_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "%i1s%?\t%0, %2, %4%S3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[572],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9655 */
  {
    "*sub_shiftsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[64],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9669 */
  {
    "*sub_shiftsi_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "subs%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[64],
    5,
    5,
    4,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9687 */
  {
    "*sub_shiftsi_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "subs%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[578],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9704 */
  {
    "*and_scc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[583],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9733 */
  {
    "*ior_scc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_331 },
#else
    { 0, output_331, 0 },
#endif
    { 0 },
    &operand_data[587],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9840 */
  {
    "*compare_scc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[591],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9960 */
  {
    "*cond_move",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_333 },
#else
    { 0, 0, output_333 },
#endif
    { 0 },
    &operand_data[595],
    6,
    6,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9996 */
  {
    "*cond_arith",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_334 },
#else
    { 0, 0, output_334 },
#endif
    { 0 },
    &operand_data[601],
    6,
    6,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10023 */
  {
    "*cond_sub",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_335 },
#else
    { 0, 0, output_335 },
#endif
    { 0 },
    &operand_data[601],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10042 */
  {
    "*cmp_ite0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_336 },
#else
    { 0, 0, output_336 },
#endif
    { 0 },
    &operand_data[607],
    7,
    7,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10125 */
  {
    "*cmp_ite1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_337 },
#else
    { 0, 0, output_337 },
#endif
    { 0 },
    &operand_data[607],
    7,
    7,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10209 */
  {
    "*cmp_and",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_338 },
#else
    { 0, 0, output_338 },
#endif
    { 0 },
    &operand_data[614],
    7,
    7,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10294 */
  {
    "*cmp_ior",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_339 },
#else
    { 0, 0, output_339 },
#endif
    { 0 },
    &operand_data[614],
    7,
    7,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10379 */
  {
    "*ior_scc_scc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[621],
    7,
    7,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10412 */
  {
    "*ior_scc_scc_cmp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[628],
    8,
    8,
    6,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10441 */
  {
    "*and_scc_scc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[621],
    7,
    7,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10476 */
  {
    "*and_scc_scc_cmp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[628],
    8,
    8,
    6,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10509 */
  {
    "*and_scc_scc_nodom",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[636],
    7,
    7,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10580 */
  {
    "*negscc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[643],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10651 */
  {
    "movcond_addsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movcond_addsi },
    &operand_data[647],
    6,
    6,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10692 */
  {
    "movcond",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_347 },
#else
    { 0, 0, output_347 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movcond },
    &operand_data[653],
    6,
    6,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10758 */
  {
    "*ifcompare_plus_move",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[659],
    7,
    7,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10775 */
  {
    "*if_plus_move",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_349 },
#else
    { 0, output_349, 0 },
#endif
    { 0 },
    &operand_data[666],
    6,
    6,
    0,
    4,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10801 */
  {
    "*ifcompare_move_plus",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[659],
    7,
    7,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10818 */
  {
    "*if_move_plus",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_351 },
#else
    { 0, output_351, 0 },
#endif
    { 0 },
    &operand_data[666],
    6,
    6,
    0,
    4,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10844 */
  {
    "*ifcompare_arith_arith",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[672],
    10,
    10,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10863 */
  {
    "*if_arith_arith",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "%I6%d5\t%0, %1, %2\n\t%I7%D5\t%0, %3, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[682],
    9,
    9,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10880 */
  {
    "*ifcompare_arith_move",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_354 },
#else
    { 0, 0, output_354 },
#endif
    { 0 },
    &operand_data[691],
    8,
    8,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10922 */
  {
    "*if_arith_move",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_355 },
#else
    { 0, output_355, 0 },
#endif
    { 0 },
    &operand_data[699],
    7,
    7,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10945 */
  {
    "*ifcompare_move_arith",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_356 },
#else
    { 0, 0, output_356 },
#endif
    { 0 },
    &operand_data[706],
    8,
    8,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:10988 */
  {
    "*if_move_arith",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_357 },
#else
    { 0, output_357, 0 },
#endif
    { 0 },
    &operand_data[699],
    7,
    7,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11012 */
  {
    "*ifcompare_move_not",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[714],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11029 */
  {
    "*if_move_not",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_359 },
#else
    { 0, output_359, 0 },
#endif
    { 0 },
    &operand_data[720],
    5,
    5,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11047 */
  {
    "*ifcompare_not_move",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[714],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11064 */
  {
    "*if_not_move",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_361 },
#else
    { 0, output_361, 0 },
#endif
    { 0 },
    &operand_data[720],
    5,
    5,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11081 */
  {
    "*ifcompare_shift_move",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[725],
    8,
    8,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11099 */
  {
    "*if_shift_move",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_363 },
#else
    { 0, output_363, 0 },
#endif
    { 0 },
    &operand_data[733],
    7,
    7,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11124 */
  {
    "*ifcompare_move_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[725],
    8,
    8,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11142 */
  {
    "*if_move_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_365 },
#else
    { 0, output_365, 0 },
#endif
    { 0 },
    &operand_data[733],
    7,
    7,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11167 */
  {
    "*ifcompare_shift_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[740],
    10,
    10,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11187 */
  {
    "*if_shift_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mov%d5\t%0, %1%S6\n\tmov%D5\t%0, %3%S7",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[750],
    9,
    9,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11210 */
  {
    "*ifcompare_not_arith",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[759],
    8,
    8,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11228 */
  {
    "*if_not_arith",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mvn%d5\t%0, %1\n\t%I6%D5\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[767],
    7,
    7,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11244 */
  {
    "*ifcompare_arith_not",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[759],
    8,
    8,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11262 */
  {
    "*if_arith_not",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mvn%D5\t%0, %1\n\t%I6%d5\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[767],
    7,
    7,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11278 */
  {
    "*ifcompare_neg_move",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[714],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11294 */
  {
    "*if_neg_move",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[774],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11314 */
  {
    "*ifcompare_move_neg",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[714],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11330 */
  {
    "*if_move_neg",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[774],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11360 */
  {
    "*arith_adjacentmem",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_376 },
#else
    { 0, 0, output_376 },
#endif
    { 0 },
    &operand_data[779],
    4,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11708 */
  {
    "*cond_move_not",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_377 },
#else
    { 0, output_377, 0 },
#endif
    { 0 },
    &operand_data[784],
    5,
    5,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11727 */
  {
    "*sign_extract_onebit",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_378 },
#else
    { 0, 0, output_378 },
#endif
    { 0 },
    &operand_data[242],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11744 */
  {
    "*not_signextract_onebit",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_379 },
#else
    { 0, 0, output_379 },
#endif
    { 0 },
    &operand_data[242],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11769 */
  {
    "*push_multi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_380 },
#else
    { 0, 0, output_380 },
#endif
    { 0 },
    &operand_data[789],
    3,
    3,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11813 */
  {
    "stack_tie",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_stack_tie },
    &operand_data[792],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11826 */
  {
    "*load_multiple_with_writeback",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_382 },
#else
    { 0, 0, output_382 },
#endif
    { 0 },
    &operand_data[794],
    4,
    4,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11858 */
  {
    "*pop_multiple_with_writeback_and_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_383 },
#else
    { 0, 0, output_383 },
#endif
    { 0 },
    &operand_data[798],
    4,
    4,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11884 */
  {
    "*pop_multiple_with_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_384 },
#else
    { 0, 0, output_384 },
#endif
    { 0 },
    &operand_data[802],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11908 */
  {
    "*ldr_with_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldr%?\t%|pc, [%0], #4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[795],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11918 */
  {
    "*vfp_pop_multiple_with_writeback",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_386 },
#else
    { 0, 0, output_386 },
#endif
    { 0 },
    &operand_data[805],
    4,
    4,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11954 */
  {
    "align_4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_387 },
#else
    { 0, 0, output_387 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_align_4 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11964 */
  {
    "align_8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_388 },
#else
    { 0, 0, output_388 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_align_8 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11974 */
  {
    "consttable_end",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_389 },
#else
    { 0, 0, output_389 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_consttable_end },
    &operand_data[0],
    0,
    0,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11984 */
  {
    "consttable_1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_390 },
#else
    { 0, 0, output_390 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_consttable_1 },
    &operand_data[442],
    1,
    1,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11997 */
  {
    "consttable_2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_391 },
#else
    { 0, 0, output_391 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_consttable_2 },
    &operand_data[442],
    1,
    1,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12020 */
  {
    "consttable_4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_392 },
#else
    { 0, 0, output_392 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_consttable_4 },
    &operand_data[442],
    1,
    1,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12048 */
  {
    "consttable_8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_393 },
#else
    { 0, 0, output_393 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_consttable_8 },
    &operand_data[442],
    1,
    1,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12066 */
  {
    "consttable_16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_394 },
#else
    { 0, 0, output_394 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_consttable_16 },
    &operand_data[442],
    1,
    1,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12086 */
  {
    "clzsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "clz%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_clzsi2 },
    &operand_data[11],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12094 */
  {
    "rbitsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rbit%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rbitsi2 },
    &operand_data[11],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12106 */
  {
    "ctzsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ctzsi2 },
    &operand_data[11],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12121 */
  {
    "prefetch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "pld\t%a0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_prefetch },
    &operand_data[809],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12142 */
  {
    "force_register_use",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "%@ %0 needed",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_force_register_use },
    &operand_data[812],
    1,
    1,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12167 */
  {
    "arm_eh_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_eh_return },
    &operand_data[813],
    1,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12185 */
  {
    "load_tp_hard",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mrc%?\tp15, 0, %0, c13, c0, 3\t@ load_tp_hard",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_load_tp_hard },
    &operand_data[29],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12195 */
  {
    "reload_tp_hard",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mrc\tp15, 0, %0, c13, c0, 3\t@ reload_tp_hard",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reload_tp_hard },
    &operand_data[29],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12204 */
  {
    "load_tp_soft_fdpic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bl\t__aeabi_read_tp\t@ load_tp_soft",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_load_tp_soft_fdpic },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12217 */
  {
    "load_tp_soft",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bl\t__aeabi_read_tp\t@ load_tp_soft",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_load_tp_soft },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12229 */
  {
    "tlscall",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_405 },
#else
    { 0, 0, output_405 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_tlscall },
    &operand_data[815],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12262 */
  {
    "*arm_movtas_ze",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_406 },
#else
    { 0, output_406, 0 },
#endif
    { 0 },
    &operand_data[817],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12277 */
  {
    "*arm_rev",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_407 },
#else
    { 0, output_407, 0 },
#endif
    { 0 },
    &operand_data[819],
    2,
    2,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12448 */
  {
    "*arm_revsh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_408 },
#else
    { 0, output_408, 0 },
#endif
    { 0 },
    &operand_data[821],
    2,
    2,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12461 */
  {
    "*arm_rev16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_409 },
#else
    { 0, output_409, 0 },
#endif
    { 0 },
    &operand_data[823],
    2,
    2,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12478 */
  {
    "arm_rev16si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rev16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_rev16si2 },
    &operand_data[825],
    4,
    4,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12495 */
  {
    "arm_rev16si2_alt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rev16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_rev16si2_alt },
    &operand_data[825],
    4,
    4,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12521 */
  {
    "*thumb2_ldrd",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldrd%?\t%0, %3, [%1, %2]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[829],
    5,
    5,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12537 */
  {
    "*thumb2_ldrd_base",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldrd%?\t%0, %2, [%1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[834],
    3,
    3,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12550 */
  {
    "*thumb2_ldrd_base_neg",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldrd%?\t%0, %2, [%1, #-4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[834],
    3,
    3,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12563 */
  {
    "*thumb2_strd",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "strd%?\t%2, %4, [%0, %1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[837],
    5,
    5,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12579 */
  {
    "*thumb2_strd_base",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "strd%?\t%1, %2, [%0]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[842],
    3,
    3,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12592 */
  {
    "*thumb2_strd_base_neg",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "strd%?\t%1, %2, [%0, #-4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[842],
    3,
    3,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12606 */
  {
    "arm_crc32b",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "crc32b\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_crc32b },
    &operand_data[845],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12606 */
  {
    "arm_crc32h",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "crc32h\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_crc32h },
    &operand_data[206],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12606 */
  {
    "arm_crc32w",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "crc32w\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_crc32w },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12606 */
  {
    "arm_crc32cb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "crc32cb\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_crc32cb },
    &operand_data[845],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12606 */
  {
    "arm_crc32ch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "crc32ch\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_crc32ch },
    &operand_data[206],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12606 */
  {
    "arm_crc32cw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "crc32cw\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_crc32cw },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldrdstrd.md:159 */
  {
    "*arm_ldrd",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_424 },
#else
    { 0, 0, output_424 },
#endif
    { 0 },
    &operand_data[848],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldrdstrd.md:179 */
  {
    "*arm_strd",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_425 },
#else
    { 0, 0, output_425 },
#endif
    { 0 },
    &operand_data[852],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:24 */
  {
    "*ldm4_",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldm%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[856],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:42 */
  {
    "*thumb_ldm4_ia",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmia\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[862],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:59 */
  {
    "*ldm4_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmia%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[868],
    6,
    6,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:79 */
  {
    "*thumb_ldm4_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmia\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[874],
    6,
    6,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:98 */
  {
    "*stm4_",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stm%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[880],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:113 */
  {
    "*stm4_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmia%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[886],
    6,
    6,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:130 */
  {
    "*thumb_stm4_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmia\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[892],
    6,
    6,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:146 */
  {
    "*ldm4_ib",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmib%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[856],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:165 */
  {
    "*ldm4_ib_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmib%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[868],
    6,
    6,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:186 */
  {
    "*stm4_ib",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmib%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[880],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:201 */
  {
    "*stm4_ib_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmib%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[886],
    6,
    6,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:218 */
  {
    "*ldm4_da",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmda%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[856],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:236 */
  {
    "*ldm4_da_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmda%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[868],
    6,
    6,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:256 */
  {
    "*stm4_da",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmda%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[880],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:271 */
  {
    "*stm4_da_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmda%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[886],
    6,
    6,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:288 */
  {
    "*ldm4_db",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmdb%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[856],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:307 */
  {
    "*ldm4_db_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmdb%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[868],
    6,
    6,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:328 */
  {
    "*stm4_db",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmdb%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[880],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:343 */
  {
    "*stm4_db_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmdb%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[886],
    6,
    6,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:467 */
  {
    "*ldm3_",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldm%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[898],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:482 */
  {
    "*thumb_ldm3_ia",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmia\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[903],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:496 */
  {
    "*ldm3_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmia%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[908],
    5,
    5,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:513 */
  {
    "*thumb_ldm3_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmia\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[913],
    5,
    5,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:529 */
  {
    "*stm3_",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stm%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[918],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:542 */
  {
    "*stm3_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmia%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[923],
    5,
    5,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:557 */
  {
    "*thumb_stm3_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmia\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[928],
    5,
    5,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:571 */
  {
    "*ldm3_ib",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmib%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[898],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:587 */
  {
    "*ldm3_ib_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmib%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[908],
    5,
    5,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:605 */
  {
    "*stm3_ib",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmib%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[918],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:618 */
  {
    "*stm3_ib_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmib%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[923],
    5,
    5,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:633 */
  {
    "*ldm3_da",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmda%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[898],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:648 */
  {
    "*ldm3_da_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmda%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[908],
    5,
    5,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:665 */
  {
    "*stm3_da",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmda%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[918],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:678 */
  {
    "*stm3_da_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmda%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[923],
    5,
    5,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:693 */
  {
    "*ldm3_db",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmdb%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[898],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:709 */
  {
    "*ldm3_db_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmdb%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[908],
    5,
    5,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:727 */
  {
    "*stm3_db",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmdb%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[918],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:740 */
  {
    "*stm3_db_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmdb%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[923],
    5,
    5,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:848 */
  {
    "*ldm2_",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldm%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[933],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:860 */
  {
    "*thumb_ldm2_ia",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmia\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[937],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:871 */
  {
    "*ldm2_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmia%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[941],
    4,
    4,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:885 */
  {
    "*thumb_ldm2_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmia\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[945],
    4,
    4,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:898 */
  {
    "*stm2_",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stm%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[949],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:909 */
  {
    "*stm2_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmia%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[953],
    4,
    4,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:922 */
  {
    "*thumb_stm2_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmia\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[957],
    4,
    4,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:934 */
  {
    "*ldm2_ib",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmib%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[933],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:947 */
  {
    "*ldm2_ib_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmib%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[941],
    4,
    4,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:962 */
  {
    "*stm2_ib",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmib%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[949],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:973 */
  {
    "*stm2_ib_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmib%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[953],
    4,
    4,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:986 */
  {
    "*ldm2_da",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmda%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[933],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:998 */
  {
    "*ldm2_da_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmda%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[941],
    4,
    4,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:1012 */
  {
    "*stm2_da",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmda%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[949],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:1023 */
  {
    "*stm2_da_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmda%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[953],
    4,
    4,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:1036 */
  {
    "*ldm2_db",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmdb%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[933],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:1049 */
  {
    "*ldm2_db_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmdb%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[941],
    4,
    4,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:1064 */
  {
    "*stm2_db",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmdb%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[949],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:1075 */
  {
    "*stm2_db_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmdb%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[953],
    4,
    4,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12628 */
  {
    "*load_multiple",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_483 },
#else
    { 0, 0, output_483 },
#endif
    { 0 },
    &operand_data[961],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12738 */
  {
    "arm_cdp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_484 },
#else
    { 0, 0, output_484 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_cdp },
    &operand_data[964],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12738 */
  {
    "arm_cdp2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_485 },
#else
    { 0, 0, output_485 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_cdp2 },
    &operand_data[964],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12758 */
  {
    "*ldc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_486 },
#else
    { 0, 0, output_486 },
#endif
    { 0 },
    &operand_data[968],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12758 */
  {
    "*ldc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_487 },
#else
    { 0, 0, output_487 },
#endif
    { 0 },
    &operand_data[968],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12758 */
  {
    "*ldc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_488 },
#else
    { 0, 0, output_488 },
#endif
    { 0 },
    &operand_data[968],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12758 */
  {
    "*ldc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_489 },
#else
    { 0, 0, output_489 },
#endif
    { 0 },
    &operand_data[968],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12771 */
  {
    "*stc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_490 },
#else
    { 0, 0, output_490 },
#endif
    { 0 },
    &operand_data[971],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12771 */
  {
    "*stc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_491 },
#else
    { 0, 0, output_491 },
#endif
    { 0 },
    &operand_data[971],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12771 */
  {
    "*stc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_492 },
#else
    { 0, 0, output_492 },
#endif
    { 0 },
    &operand_data[971],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12771 */
  {
    "*stc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_493 },
#else
    { 0, 0, output_493 },
#endif
    { 0 },
    &operand_data[971],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12796 */
  {
    "arm_mcr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_494 },
#else
    { 0, 0, output_494 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_mcr },
    &operand_data[974],
    6,
    6,
    1,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12796 */
  {
    "arm_mcr2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_495 },
#else
    { 0, 0, output_495 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_mcr2 },
    &operand_data[974],
    6,
    6,
    1,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12816 */
  {
    "arm_mrc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_496 },
#else
    { 0, 0, output_496 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_mrc },
    &operand_data[980],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12816 */
  {
    "arm_mrc2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_497 },
#else
    { 0, 0, output_497 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_mrc2 },
    &operand_data[980],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12835 */
  {
    "arm_mcrr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_498 },
#else
    { 0, 0, output_498 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_mcrr },
    &operand_data[984],
    4,
    4,
    1,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12835 */
  {
    "arm_mcrr2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_499 },
#else
    { 0, 0, output_499 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_mcrr2 },
    &operand_data[984],
    4,
    4,
    1,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12851 */
  {
    "arm_mrrc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_500 },
#else
    { 0, 0, output_500 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_mrrc },
    &operand_data[988],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12851 */
  {
    "arm_mrrc2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_501 },
#else
    { 0, 0, output_501 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_mrrc2 },
    &operand_data[988],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12885 */
  {
    "*speculation_barrier_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "isb\n\tdsb\tsy",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:308 */
  {
    "mve_vshlq_sv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_503 },
#else
    { 0, 0, output_503 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_sv8qi },
    &operand_data[992],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:308 */
  {
    "mve_vshlq_uv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_504 },
#else
    { 0, 0, output_504 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_uv8qi },
    &operand_data[992],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:308 */
  {
    "mve_vshlq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_505 },
#else
    { 0, 0, output_505 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_sv16qi },
    &operand_data[995],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:308 */
  {
    "mve_vshlq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_506 },
#else
    { 0, 0, output_506 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_uv16qi },
    &operand_data[995],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:308 */
  {
    "mve_vshlq_sv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_507 },
#else
    { 0, 0, output_507 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_sv4hi },
    &operand_data[998],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:308 */
  {
    "mve_vshlq_uv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_508 },
#else
    { 0, 0, output_508 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_uv4hi },
    &operand_data[998],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:308 */
  {
    "mve_vshlq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_509 },
#else
    { 0, 0, output_509 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_sv8hi },
    &operand_data[1001],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:308 */
  {
    "mve_vshlq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_510 },
#else
    { 0, 0, output_510 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_uv8hi },
    &operand_data[1001],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:308 */
  {
    "mve_vshlq_sv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_511 },
#else
    { 0, 0, output_511 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_sv2si },
    &operand_data[1004],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:308 */
  {
    "mve_vshlq_uv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_512 },
#else
    { 0, 0, output_512 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_uv2si },
    &operand_data[1004],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:308 */
  {
    "mve_vshlq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_513 },
#else
    { 0, 0, output_513 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_sv4si },
    &operand_data[1007],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:308 */
  {
    "mve_vshlq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_514 },
#else
    { 0, 0, output_514 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_uv4si },
    &operand_data[1007],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:30 */
  {
    "tbcstv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tbcstb%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_tbcstv8qi },
    &operand_data[1010],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:39 */
  {
    "tbcstv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tbcsth%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_tbcstv4hi },
    &operand_data[1012],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:48 */
  {
    "tbcstv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tbcstw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_tbcstv2si },
    &operand_data[1014],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:57 */
  {
    "iwmmxt_iordi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wor%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_iordi3 },
    &operand_data[1016],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:68 */
  {
    "iwmmxt_xordi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_xordi3 },
    &operand_data[1016],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:79 */
  {
    "iwmmxt_anddi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wand%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_anddi3 },
    &operand_data[1016],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:90 */
  {
    "iwmmxt_nanddi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wandn%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_nanddi3 },
    &operand_data[1019],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:100 */
  {
    "*iwmmxt_arm_movdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_522 },
#else
    { 0, 0, output_522 },
#endif
    { 0 },
    &operand_data[1022],
    2,
    2,
    0,
    15,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:155 */
  {
    "*iwmmxt_movsi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_523 },
#else
    { 0, 0, output_523 },
#endif
    { 0 },
    &operand_data[1024],
    2,
    2,
    0,
    15,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:201 */
  {
    "*cond_iwmmxt_movsi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_524 },
#else
    { 0, 0, output_524 },
#endif
    { 0 },
    &operand_data[1026],
    4,
    4,
    0,
    6,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:226 */
  {
    "movv2si_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_525 },
#else
    { 0, 0, output_525 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv2si_internal },
    &operand_data[1030],
    2,
    2,
    0,
    8,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:226 */
  {
    "movv4hi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_526 },
#else
    { 0, 0, output_526 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv4hi_internal },
    &operand_data[1032],
    2,
    2,
    0,
    8,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:226 */
  {
    "movv8qi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_527 },
#else
    { 0, 0, output_527 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv8qi_internal },
    &operand_data[1034],
    2,
    2,
    0,
    8,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:304 */
  {
    "*andv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wand\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:304 */
  {
    "*andv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wand\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:304 */
  {
    "*andv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wand\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:314 */
  {
    "*iorv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wor\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:314 */
  {
    "*iorv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wor\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:314 */
  {
    "*iorv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wor\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:324 */
  {
    "*xorv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:324 */
  {
    "*xorv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:324 */
  {
    "*xorv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:337 */
  {
    "*addv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:337 */
  {
    "*addv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:337 */
  {
    "*addv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:347 */
  {
    "ssaddv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddbss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ssaddv8qi3 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:357 */
  {
    "ssaddv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddhss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ssaddv4hi3 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:367 */
  {
    "ssaddv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddwss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ssaddv2si3 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:377 */
  {
    "usaddv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddbus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usaddv8qi3 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:387 */
  {
    "usaddv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddhus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usaddv4hi3 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:397 */
  {
    "usaddv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddwus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usaddv2si3 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:407 */
  {
    "*subv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:407 */
  {
    "*subv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:407 */
  {
    "*subv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:417 */
  {
    "sssubv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubbss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sssubv8qi3 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:427 */
  {
    "sssubv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubhss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sssubv4hi3 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:437 */
  {
    "sssubv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubwss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sssubv2si3 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:447 */
  {
    "ussubv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubbus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ussubv8qi3 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:457 */
  {
    "ussubv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubhus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ussubv4hi3 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:467 */
  {
    "ussubv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubwus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ussubv2si3 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:477 */
  {
    "*mulv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulul%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:487 */
  {
    "smulv4hi3_highpart",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulsm%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smulv4hi3_highpart },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:500 */
  {
    "umulv4hi3_highpart",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulum%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_umulv4hi3_highpart },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:513 */
  {
    "iwmmxt_wmacs",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmacs%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmacs },
    &operand_data[1045],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:524 */
  {
    "iwmmxt_wmacsz",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmacsz%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmacsz },
    &operand_data[1049],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:534 */
  {
    "iwmmxt_wmacu",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmacu%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmacu },
    &operand_data[1045],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:545 */
  {
    "iwmmxt_wmacuz",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmacuz%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmacuz },
    &operand_data[1049],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:557 */
  {
    "iwmmxt_clrdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor%?\t%0, %0, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_clrdi },
    &operand_data[1016],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:568 */
  {
    "iwmmxt_clrv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor%?\t%0, %0, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_clrv8qi },
    &operand_data[1052],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:580 */
  {
    "iwmmxt_clrv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor%?\t%0, %0, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_clrv4hi },
    &operand_data[1053],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:590 */
  {
    "iwmmxt_clrv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor%?\t%0, %0, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_clrv2si },
    &operand_data[1014],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:601 */
  {
    "iwmmxt_uavgrndv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wavg2br%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_uavgrndv8qi3 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:623 */
  {
    "iwmmxt_uavgrndv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wavg2hr%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_uavgrndv4hi3 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:641 */
  {
    "iwmmxt_uavgv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wavg2b%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_uavgv8qi3 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:654 */
  {
    "iwmmxt_uavgv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wavg2h%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_uavgv4hi3 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:669 */
  {
    "iwmmxt_tinsrb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_570 },
#else
    { 0, 0, output_570 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_tinsrb },
    &operand_data[1054],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:686 */
  {
    "iwmmxt_tinsrh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_571 },
#else
    { 0, 0, output_571 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_tinsrh },
    &operand_data[1058],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:703 */
  {
    "iwmmxt_tinsrw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_572 },
#else
    { 0, 0, output_572 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_tinsrw },
    &operand_data[1062],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:720 */
  {
    "iwmmxt_textrmub",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrmub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_textrmub },
    &operand_data[1066],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:731 */
  {
    "iwmmxt_textrmsb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrmsb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_textrmsb },
    &operand_data[1066],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:742 */
  {
    "iwmmxt_textrmuh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrmuh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_textrmuh },
    &operand_data[1069],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:753 */
  {
    "iwmmxt_textrmsh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrmsh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_textrmsh },
    &operand_data[1069],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:766 */
  {
    "iwmmxt_textrmw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrmsw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_textrmw },
    &operand_data[1072],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:776 */
  {
    "iwmmxt_wshufh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wshufh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wshufh },
    &operand_data[1075],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:797 */
  {
    "eqv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpeqb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_eqv8qi3 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:808 */
  {
    "eqv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpeqh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_eqv4hi3 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:819 */
  {
    "eqv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpeqw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_eqv2si3 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:831 */
  {
    "gtuv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpgtub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_gtuv8qi3 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:842 */
  {
    "gtuv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpgtuh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_gtuv4hi3 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:853 */
  {
    "gtuv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpgtuw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_gtuv2si3 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:864 */
  {
    "gtv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpgtsb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_gtv8qi3 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:875 */
  {
    "gtv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpgtsh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_gtv4hi3 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:886 */
  {
    "gtv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpgtsw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_gtv2si3 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:899 */
  {
    "*smaxv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaxsw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:899 */
  {
    "*smaxv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaxsh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:899 */
  {
    "*smaxv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaxsb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:909 */
  {
    "*umaxv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaxuw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:909 */
  {
    "*umaxv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaxuh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:909 */
  {
    "*umaxv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaxub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:919 */
  {
    "*sminv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wminsw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:919 */
  {
    "*sminv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wminsh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:919 */
  {
    "*sminv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wminsb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:929 */
  {
    "*uminv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wminuw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:929 */
  {
    "*uminv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wminuh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:929 */
  {
    "*uminv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wminub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:941 */
  {
    "iwmmxt_wpackhss",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wpackhss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wpackhss },
    &operand_data[1078],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:952 */
  {
    "iwmmxt_wpackwss",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wpackwss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wpackwss },
    &operand_data[1081],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:963 */
  {
    "iwmmxt_wpackdss",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wpackdss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wpackdss },
    &operand_data[1084],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:974 */
  {
    "iwmmxt_wpackhus",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wpackhus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wpackhus },
    &operand_data[1078],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:985 */
  {
    "iwmmxt_wpackwus",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wpackwus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wpackwus },
    &operand_data[1081],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:996 */
  {
    "iwmmxt_wpackdus",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wpackdus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wpackdus },
    &operand_data[1084],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1007 */
  {
    "iwmmxt_wunpckihb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckihb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckihb },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1035 */
  {
    "iwmmxt_wunpckihh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckihh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckihh },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1055 */
  {
    "iwmmxt_wunpckihw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckihw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckihw },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1071 */
  {
    "iwmmxt_wunpckilb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckilb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckilb },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1099 */
  {
    "iwmmxt_wunpckilh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckilh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckilh },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1119 */
  {
    "iwmmxt_wunpckilw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckilw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckilw },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1135 */
  {
    "iwmmxt_wunpckehub",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckehub%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckehub },
    &operand_data[1087],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1147 */
  {
    "iwmmxt_wunpckehuh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckehuh%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckehuh },
    &operand_data[1089],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1158 */
  {
    "iwmmxt_wunpckehuw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckehuw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckehuw },
    &operand_data[1091],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1169 */
  {
    "iwmmxt_wunpckehsb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckehsb%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckehsb },
    &operand_data[1087],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1181 */
  {
    "iwmmxt_wunpckehsh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckehsh%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckehsh },
    &operand_data[1089],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1192 */
  {
    "iwmmxt_wunpckehsw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckehsw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckehsw },
    &operand_data[1091],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1203 */
  {
    "iwmmxt_wunpckelub",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckelub%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckelub },
    &operand_data[1087],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1215 */
  {
    "iwmmxt_wunpckeluh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckeluh%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckeluh },
    &operand_data[1089],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1226 */
  {
    "iwmmxt_wunpckeluw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckeluw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckeluw },
    &operand_data[1091],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1237 */
  {
    "iwmmxt_wunpckelsb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckelsb%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckelsb },
    &operand_data[1087],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1249 */
  {
    "iwmmxt_wunpckelsh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckelsh%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckelsh },
    &operand_data[1089],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1260 */
  {
    "iwmmxt_wunpckelsw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckelsw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wunpckelsw },
    &operand_data[1091],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1273 */
  {
    "rorv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_624 },
#else
    { 0, 0, output_624 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rorv4hi3 },
    &operand_data[1093],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1273 */
  {
    "rorv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_625 },
#else
    { 0, 0, output_625 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rorv2si3 },
    &operand_data[1096],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1273 */
  {
    "rordi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_626 },
#else
    { 0, 0, output_626 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rordi3 },
    &operand_data[1099],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1294 */
  {
    "ashrv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_627 },
#else
    { 0, 0, output_627 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashrv4hi3_iwmmxt },
    &operand_data[1093],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1294 */
  {
    "ashrv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_628 },
#else
    { 0, 0, output_628 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashrv2si3_iwmmxt },
    &operand_data[1096],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1294 */
  {
    "ashrdi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_629 },
#else
    { 0, 0, output_629 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashrdi3_iwmmxt },
    &operand_data[1099],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1315 */
  {
    "lshrv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_630 },
#else
    { 0, 0, output_630 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lshrv4hi3_iwmmxt },
    &operand_data[1093],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1315 */
  {
    "lshrv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_631 },
#else
    { 0, 0, output_631 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lshrv2si3_iwmmxt },
    &operand_data[1096],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1315 */
  {
    "lshrdi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_632 },
#else
    { 0, 0, output_632 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lshrdi3_iwmmxt },
    &operand_data[1099],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1336 */
  {
    "ashlv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_633 },
#else
    { 0, 0, output_633 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv4hi3_iwmmxt },
    &operand_data[1093],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1336 */
  {
    "ashlv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_634 },
#else
    { 0, 0, output_634 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv2si3_iwmmxt },
    &operand_data[1096],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1336 */
  {
    "ashldi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_635 },
#else
    { 0, 0, output_635 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashldi3_iwmmxt },
    &operand_data[1099],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1357 */
  {
    "rorv4hi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_636 },
#else
    { 0, 0, output_636 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rorv4hi3_di },
    &operand_data[1102],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1357 */
  {
    "rorv2si3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_637 },
#else
    { 0, 0, output_637 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rorv2si3_di },
    &operand_data[1105],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1357 */
  {
    "rordi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_638 },
#else
    { 0, 0, output_638 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rordi3_di },
    &operand_data[1108],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1378 */
  {
    "ashrv4hi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_639 },
#else
    { 0, 0, output_639 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashrv4hi3_di },
    &operand_data[1102],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1378 */
  {
    "ashrv2si3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_640 },
#else
    { 0, 0, output_640 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashrv2si3_di },
    &operand_data[1105],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1378 */
  {
    "ashrdi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_641 },
#else
    { 0, 0, output_641 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashrdi3_di },
    &operand_data[1108],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1399 */
  {
    "lshrv4hi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_642 },
#else
    { 0, 0, output_642 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lshrv4hi3_di },
    &operand_data[1111],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1399 */
  {
    "lshrv2si3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_643 },
#else
    { 0, 0, output_643 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lshrv2si3_di },
    &operand_data[1114],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1399 */
  {
    "lshrdi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_644 },
#else
    { 0, 0, output_644 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lshrdi3_di },
    &operand_data[1117],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1420 */
  {
    "ashlv4hi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_645 },
#else
    { 0, 0, output_645 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv4hi3_di },
    &operand_data[1102],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1420 */
  {
    "ashlv2si3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_646 },
#else
    { 0, 0, output_646 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv2si3_di },
    &operand_data[1105],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1420 */
  {
    "ashldi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_647 },
#else
    { 0, 0, output_647 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashldi3_di },
    &operand_data[1108],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1441 */
  {
    "iwmmxt_wmadds",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmadds%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmadds },
    &operand_data[1120],
    3,
    3,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1460 */
  {
    "iwmmxt_wmaddu",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaddu%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmaddu },
    &operand_data[1120],
    3,
    3,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1479 */
  {
    "iwmmxt_tmia",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmia%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_tmia },
    &operand_data[1123],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1492 */
  {
    "iwmmxt_tmiaph",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmiaph%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_tmiaph },
    &operand_data[1123],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1510 */
  {
    "iwmmxt_tmiabb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmiabb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_tmiabb },
    &operand_data[1123],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1523 */
  {
    "iwmmxt_tmiatb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmiatb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_tmiatb },
    &operand_data[1123],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1540 */
  {
    "iwmmxt_tmiabt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmiabt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_tmiabt },
    &operand_data[1123],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1557 */
  {
    "iwmmxt_tmiatt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmiatt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_tmiatt },
    &operand_data[1123],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1576 */
  {
    "iwmmxt_tmovmskb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmovmskb%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_tmovmskb },
    &operand_data[1066],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1585 */
  {
    "iwmmxt_tmovmskh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmovmskh%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_tmovmskh },
    &operand_data[1069],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1594 */
  {
    "iwmmxt_tmovmskw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmovmskw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_tmovmskw },
    &operand_data[1072],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1603 */
  {
    "iwmmxt_waccb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waccb%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_waccb },
    &operand_data[1127],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1612 */
  {
    "iwmmxt_wacch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wacch%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wacch },
    &operand_data[1049],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1621 */
  {
    "iwmmxt_waccw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waccw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_waccw },
    &operand_data[1091],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1631 */
  {
    "iwmmxt_waligni",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waligni%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_waligni },
    &operand_data[1129],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1647 */
  {
    "iwmmxt_walignr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "walignr%U3%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_walignr },
    &operand_data[1133],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1662 */
  {
    "iwmmxt_walignr0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "walignr0%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_walignr0 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1677 */
  {
    "iwmmxt_walignr1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "walignr1%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_walignr1 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1692 */
  {
    "iwmmxt_walignr2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "walignr2%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_walignr2 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1707 */
  {
    "iwmmxt_walignr3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "walignr3%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_walignr3 },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1722 */
  {
    "iwmmxt_wsadb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsadb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wsadb },
    &operand_data[1137],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1734 */
  {
    "iwmmxt_wsadh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsadh%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wsadh },
    &operand_data[1141],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1746 */
  {
    "iwmmxt_wsadbz",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsadbz%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wsadbz },
    &operand_data[1145],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1756 */
  {
    "iwmmxt_wsadhz",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsadhz%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wsadhz },
    &operand_data[1120],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:21 */
  {
    "iwmmxt_wabsv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wabsw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wabsv2si3 },
    &operand_data[1036],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:21 */
  {
    "iwmmxt_wabsv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wabsh%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wabsv4hi3 },
    &operand_data[1039],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:21 */
  {
    "iwmmxt_wabsv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wabsb%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wabsv8qi3 },
    &operand_data[1042],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:30 */
  {
    "iwmmxt_wabsdiffb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wabsdiffb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wabsdiffb },
    &operand_data[1042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:43 */
  {
    "iwmmxt_wabsdiffh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wabsdiffh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wabsdiffh },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:56 */
  {
    "iwmmxt_wabsdiffw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wabsdiffw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wabsdiffw },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:69 */
  {
    "iwmmxt_waddsubhx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddsubhx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_waddsubhx },
    &operand_data[1039],
    3,
    3,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:87 */
  {
    "iwmmxt_wsubaddhx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubaddhx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wsubaddhx },
    &operand_data[1039],
    3,
    3,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:105 */
  {
    "addcv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddhc%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addcv4hi3 },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:105 */
  {
    "addcv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddwc%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addcv2si3 },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:117 */
  {
    "iwmmxt_avg4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wavg4%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_avg4 },
    &operand_data[1042],
    3,
    3,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:149 */
  {
    "iwmmxt_avg4r",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wavg4r%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_avg4r },
    &operand_data[1042],
    3,
    3,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:181 */
  {
    "iwmmxt_wmaddsx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaddsx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmaddsx },
    &operand_data[1120],
    3,
    3,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:200 */
  {
    "iwmmxt_wmaddux",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaddux%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmaddux },
    &operand_data[1120],
    3,
    3,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:219 */
  {
    "iwmmxt_wmaddsn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaddsn%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmaddsn },
    &operand_data[1120],
    3,
    3,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:238 */
  {
    "iwmmxt_wmaddun",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaddun%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmaddun },
    &operand_data[1120],
    3,
    3,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:257 */
  {
    "iwmmxt_wmulwsm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulwsm%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmulwsm },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:271 */
  {
    "iwmmxt_wmulwum",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulwum%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmulwum },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:285 */
  {
    "iwmmxt_wmulsmr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulsmr%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmulsmr },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:303 */
  {
    "iwmmxt_wmulumr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulumr%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmulumr },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:322 */
  {
    "iwmmxt_wmulwsmr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulwsmr%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmulwsmr },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:339 */
  {
    "iwmmxt_wmulwumr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulwumr%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmulwumr },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:356 */
  {
    "iwmmxt_wmulwl",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulwl%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmulwl },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:367 */
  {
    "iwmmxt_wqmulm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmulm%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wqmulm },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:377 */
  {
    "iwmmxt_wqmulwm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmulwm%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wqmulwm },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:387 */
  {
    "iwmmxt_wqmulmr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmulmr%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wqmulmr },
    &operand_data[1039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:397 */
  {
    "iwmmxt_wqmulwmr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmulwmr%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wqmulwmr },
    &operand_data[1036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:407 */
  {
    "iwmmxt_waddbhusm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddbhusm%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_waddbhusm },
    &operand_data[1148],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:423 */
  {
    "iwmmxt_waddbhusl",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddbhusl%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_waddbhusl },
    &operand_data[1148],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:439 */
  {
    "iwmmxt_wqmiabb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiabb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wqmiabb },
    &operand_data[1141],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:452 */
  {
    "iwmmxt_wqmiabt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiabt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wqmiabt },
    &operand_data[1141],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:465 */
  {
    "iwmmxt_wqmiatb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiatb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wqmiatb },
    &operand_data[1141],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:478 */
  {
    "iwmmxt_wqmiatt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiatt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wqmiatt },
    &operand_data[1141],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:491 */
  {
    "iwmmxt_wqmiabbn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiabbn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wqmiabbn },
    &operand_data[1141],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:504 */
  {
    "iwmmxt_wqmiabtn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiabtn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wqmiabtn },
    &operand_data[1141],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:517 */
  {
    "iwmmxt_wqmiatbn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiatbn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wqmiatbn },
    &operand_data[1141],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:530 */
  {
    "iwmmxt_wqmiattn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiattn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wqmiattn },
    &operand_data[1141],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:543 */
  {
    "iwmmxt_wmiabb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiabb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiabb },
    &operand_data[1045],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:567 */
  {
    "iwmmxt_wmiabt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiabt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiabt },
    &operand_data[1045],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:591 */
  {
    "iwmmxt_wmiatb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiatb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiatb },
    &operand_data[1045],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:615 */
  {
    "iwmmxt_wmiatt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiatt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiatt },
    &operand_data[1045],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:639 */
  {
    "iwmmxt_wmiabbn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiabbn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiabbn },
    &operand_data[1045],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:663 */
  {
    "iwmmxt_wmiabtn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiabtn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiabtn },
    &operand_data[1045],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:687 */
  {
    "iwmmxt_wmiatbn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiatbn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiatbn },
    &operand_data[1045],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:711 */
  {
    "iwmmxt_wmiattn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiattn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiattn },
    &operand_data[1045],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:735 */
  {
    "iwmmxt_wmiawbb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawbb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiawbb },
    &operand_data[1151],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:748 */
  {
    "iwmmxt_wmiawbt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawbt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiawbt },
    &operand_data[1151],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:761 */
  {
    "iwmmxt_wmiawtb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawtb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiawtb },
    &operand_data[1151],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:774 */
  {
    "iwmmxt_wmiawtt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawtt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiawtt },
    &operand_data[1151],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:787 */
  {
    "iwmmxt_wmiawbbn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawbbn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiawbbn },
    &operand_data[1151],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:800 */
  {
    "iwmmxt_wmiawbtn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawbtn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiawbtn },
    &operand_data[1151],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:813 */
  {
    "iwmmxt_wmiawtbn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawtbn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiawtbn },
    &operand_data[1151],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:826 */
  {
    "iwmmxt_wmiawttn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawttn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmiawttn },
    &operand_data[1151],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:839 */
  {
    "iwmmxt_wmerge",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmerge%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_wmerge },
    &operand_data[1155],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:864 */
  {
    "iwmmxt_tandcv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tandcw%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_tandcv2si3 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:864 */
  {
    "iwmmxt_tandcv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tandch%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_tandcv4hi3 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:864 */
  {
    "iwmmxt_tandcv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tandcb%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_tandcv8qi3 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:874 */
  {
    "iwmmxt_torcv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "torcw%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_torcv2si3 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:874 */
  {
    "iwmmxt_torcv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "torch%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_torcv4hi3 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:874 */
  {
    "iwmmxt_torcv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "torcb%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_torcv8qi3 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:884 */
  {
    "iwmmxt_torvscv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "torvscw%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_torvscv2si3 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:884 */
  {
    "iwmmxt_torvscv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "torvsch%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_torvscv4hi3 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:884 */
  {
    "iwmmxt_torvscv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "torvscb%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_torvscv8qi3 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:894 */
  {
    "iwmmxt_textrcv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrcw%?\t r15, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_textrcv2si3 },
    &operand_data[1057],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:894 */
  {
    "iwmmxt_textrcv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrch%?\t r15, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_textrcv4hi3 },
    &operand_data[1057],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:894 */
  {
    "iwmmxt_textrcv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrcb%?\t r15, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_textrcv8qi3 },
    &operand_data[1057],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:23 */
  {
    "*arm_movhi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_738 },
#else
    { 0, 0, output_738 },
#endif
    { 0 },
    &operand_data[1159],
    2,
    2,
    0,
    8,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:74 */
  {
    "*thumb2_movhi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_739 },
#else
    { 0, 0, output_739 },
#endif
    { 0 },
    &operand_data[1161],
    2,
    2,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:74 */
  {
    "*thumb2_movhi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_740 },
#else
    { 0, 0, output_740 },
#endif
    { 0 },
    &operand_data[1163],
    2,
    2,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:74 */
  {
    "*thumb2_movhi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_741 },
#else
    { 0, 0, output_741 },
#endif
    { 0 },
    &operand_data[1165],
    2,
    2,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:74 */
  {
    "*thumb2_movhi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_742 },
#else
    { 0, 0, output_742 },
#endif
    { 0 },
    &operand_data[1167],
    2,
    2,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:129 */
  {
    "*arm_movhi_fp16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_743 },
#else
    { 0, 0, output_743 },
#endif
    { 0 },
    &operand_data[1169],
    2,
    2,
    0,
    8,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:179 */
  {
    "*thumb2_movhi_fp16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_744 },
#else
    { 0, 0, output_744 },
#endif
    { 0 },
    &operand_data[1161],
    2,
    2,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:179 */
  {
    "*thumb2_movhi_fp16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_745 },
#else
    { 0, 0, output_745 },
#endif
    { 0 },
    &operand_data[1163],
    2,
    2,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:179 */
  {
    "*thumb2_movhi_fp16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_746 },
#else
    { 0, 0, output_746 },
#endif
    { 0 },
    &operand_data[1165],
    2,
    2,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:179 */
  {
    "*thumb2_movhi_fp16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_747 },
#else
    { 0, 0, output_747 },
#endif
    { 0 },
    &operand_data[1167],
    2,
    2,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:235 */
  {
    "*arm_movsi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_748 },
#else
    { 0, 0, output_748 },
#endif
    { 0 },
    &operand_data[1171],
    2,
    2,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:278 */
  {
    "*thumb2_movsi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_749 },
#else
    { 0, 0, output_749 },
#endif
    { 0 },
    &operand_data[1173],
    2,
    2,
    0,
    18,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:341 */
  {
    "*movdi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_750 },
#else
    { 0, 0, output_750 },
#endif
    { 0 },
    &operand_data[1175],
    2,
    2,
    0,
    12,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:402 */
  {
    "*movhf_vfp_hf16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_751 },
#else
    { 0, 0, output_751 },
#endif
    { 0 },
    &operand_data[1177],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:402 */
  {
    "*movbf_vfp_bf16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_752 },
#else
    { 0, 0, output_752 },
#endif
    { 0 },
    &operand_data[1179],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:485 */
  {
    "*movhf_vfp_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_753 },
#else
    { 0, 0, output_753 },
#endif
    { 0 },
    &operand_data[1181],
    2,
    2,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:485 */
  {
    "*movbf_vfp_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_754 },
#else
    { 0, 0, output_754 },
#endif
    { 0 },
    &operand_data[1183],
    2,
    2,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:541 */
  {
    "*movhf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_755 },
#else
    { 0, 0, output_755 },
#endif
    { 0 },
    &operand_data[1185],
    2,
    2,
    0,
    7,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:541 */
  {
    "*movbf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_756 },
#else
    { 0, 0, output_756 },
#endif
    { 0 },
    &operand_data[1187],
    2,
    2,
    0,
    7,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:597 */
  {
    "*movsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_757 },
#else
    { 0, 0, output_757 },
#endif
    { 0 },
    &operand_data[1189],
    2,
    2,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:633 */
  {
    "*thumb2_movsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_758 },
#else
    { 0, 0, output_758 },
#endif
    { 0 },
    &operand_data[1191],
    2,
    2,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:671 */
  {
    "*movdf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_759 },
#else
    { 0, 0, output_759 },
#endif
    { 0 },
    &operand_data[1193],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:722 */
  {
    "*thumb2_movdf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_760 },
#else
    { 0, 0, output_760 },
#endif
    { 0 },
    &operand_data[1195],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:773 */
  {
    "*movsfcc_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_761 },
#else
    { 0, output_761, 0 },
#endif
    { 0 },
    &operand_data[1197],
    5,
    5,
    0,
    9,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:796 */
  {
    "*thumb2_movsfcc_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_762 },
#else
    { 0, output_762, 0 },
#endif
    { 0 },
    &operand_data[1197],
    5,
    5,
    0,
    9,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:819 */
  {
    "*movdfcc_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_763 },
#else
    { 0, output_763, 0 },
#endif
    { 0 },
    &operand_data[1202],
    5,
    5,
    0,
    9,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:842 */
  {
    "*thumb2_movdfcc_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_764 },
#else
    { 0, output_764, 0 },
#endif
    { 0 },
    &operand_data[1202],
    5,
    5,
    0,
    9,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:869 */
  {
    "*abssf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs%?.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1207],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:878 */
  {
    "*absdf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs%?.f64\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1209],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:887 */
  {
    "*negsf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_767 },
#else
    { 0, output_767, 0 },
#endif
    { 0 },
    &operand_data[1211],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:898 */
  {
    "*negdf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_768 },
#else
    { 0, output_768, 0 },
#endif
    { 0 },
    &operand_data[1213],
    2,
    2,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:946 */
  {
    "abshf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_abshf2 },
    &operand_data[1215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:946 */
  {
    "neghf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neghf2 },
    &operand_data[1215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:966 */
  {
    "neon_vrndhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintz.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndhf },
    &operand_data[1215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:966 */
  {
    "neon_vrndahf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrinta.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndahf },
    &operand_data[1215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:966 */
  {
    "neon_vrndmhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintm.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndmhf },
    &operand_data[1215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:966 */
  {
    "neon_vrndnhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintn.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndnhf },
    &operand_data[1215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:966 */
  {
    "neon_vrndphf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintp.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndphf },
    &operand_data[1215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:966 */
  {
    "neon_vrndxhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintx.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndxhf },
    &operand_data[1215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:977 */
  {
    "neon_vrndihf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintr.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndihf },
    &operand_data[1215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:990 */
  {
    "addhf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.f16\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addhf3 },
    &operand_data[1215],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1002 */
  {
    "*addsf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1218],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1012 */
  {
    "*adddf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1221],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1022 */
  {
    "subhf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.f16\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subhf3 },
    &operand_data[1215],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1034 */
  {
    "*subsf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1218],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1044 */
  {
    "*subdf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1221],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1058 */
  {
    "divhf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdiv.f16\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_divhf3 },
    &operand_data[1215],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1073 */
  {
    "*divsf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdiv%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1224],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1084 */
  {
    "*divdf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdiv%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1227],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1098 */
  {
    "mulhf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.f16\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulhf3 },
    &operand_data[1215],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1109 */
  {
    "*mulsf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1218],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1119 */
  {
    "*muldf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1221],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1129 */
  {
    "*mulsf3neghf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmul.f16\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1230],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1139 */
  {
    "*negmulhf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmul.f16\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1230],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1149 */
  {
    "*mulsf3negsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmul%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1218],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1159 */
  {
    "*negmulsf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmul%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1218],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1169 */
  {
    "*muldf3negdf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmul%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1221],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1180 */
  {
    "*negmuldf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmul%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1221],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1194 */
  {
    "*mulsf3addhf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.f16\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1233],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1206 */
  {
    "*mulsf3addsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla%?.f32\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1237],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1217 */
  {
    "*muldf3adddf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla%?.f64\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1241],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1229 */
  {
    "*mulhf3subhf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmls.f16\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1233],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1240 */
  {
    "*mulsf3subsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmls%?.f32\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1237],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1251 */
  {
    "*muldf3subdf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmls%?.f64\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1241],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1263 */
  {
    "*mulhf3neghfaddhf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.f16\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1233],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1274 */
  {
    "*mulsf3negsfaddsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls%?.f32\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1237],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1285 */
  {
    "*fmuldf3negdfadddf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls%?.f64\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1241],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1298 */
  {
    "*mulhf3neghfsubhf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmla.f16\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1233],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1310 */
  {
    "*mulsf3negsfsubsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmla%?.f32\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1237],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1322 */
  {
    "*muldf3negdfsubdf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmla%?.f64\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1241],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1336 */
  {
    "fmahf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfma.f16\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmahf4 },
    &operand_data[1245],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1360 */
  {
    "fmasf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfma%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmasf4 },
    &operand_data[1249],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1360 */
  {
    "fmadf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfma%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmadf4 },
    &operand_data[1253],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1371 */
  {
    "fmsubhf4_fp16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfms.f16\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmsubhf4_fp16 },
    &operand_data[1245],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1395 */
  {
    "*fmsubsf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfms%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1249],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1395 */
  {
    "*fmsubdf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfms%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1253],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1407 */
  {
    "*fnmsubhf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfnms.f16\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1245],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1418 */
  {
    "*fnmsubsf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfnms%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1249],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1418 */
  {
    "*fnmsubdf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfnms%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1253],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1429 */
  {
    "*fnmaddhf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfnma.f16\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1245],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1440 */
  {
    "*fnmaddsf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfnma%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1249],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1440 */
  {
    "*fnmadddf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfnma%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1253],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1455 */
  {
    "*extendsfdf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f64.f32\t%P0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1257],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1464 */
  {
    "*truncdfsf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f32.f64\t%0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1259],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1473 */
  {
    "extendhfsf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtb%?.f32.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_extendhfsf2 },
    &operand_data[1261],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1482 */
  {
    "*truncdfhf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtb%?.f16.f64\t%0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1263],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1491 */
  {
    "*extendhfdf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtb%?.f64.f16\t%P0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1265],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1500 */
  {
    "truncsfhf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtb%?.f16.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_truncsfhf2 },
    &operand_data[1267],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1509 */
  {
    "*truncsisf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.s32.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1269],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1518 */
  {
    "*truncsidf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.s32.f64\t%0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1271],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1528 */
  {
    "fixuns_truncsfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.u32.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fixuns_truncsfsi2 },
    &operand_data[1269],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1537 */
  {
    "fixuns_truncdfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.u32.f64\t%0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fixuns_truncdfsi2 },
    &operand_data[1273],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1547 */
  {
    "*floatsisf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f32.s32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1275],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1556 */
  {
    "*floatsidf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f64.s32\t%P0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1277],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1566 */
  {
    "floatunssisf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f32.u32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_floatunssisf2 },
    &operand_data[1275],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1575 */
  {
    "floatunssidf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f64.u32\t%P0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_floatunssidf2 },
    &operand_data[1277],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1587 */
  {
    "neon_vsqrthf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsqrt.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsqrthf },
    &operand_data[1215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1596 */
  {
    "neon_vrsqrtshf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrsqrts.f16\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsqrtshf },
    &operand_data[1215],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1611 */
  {
    "*sqrtsf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsqrt%?.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1224],
    2,
    2,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1621 */
  {
    "*sqrtdf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsqrt%?.f64\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1227],
    2,
    2,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1634 */
  {
    "*movcc_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmrs%?\tAPSR_nzcv, FPSCR",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1643 */
  {
    "push_fpsysreg_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_839 },
#else
    { 0, 0, output_839 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_push_fpsysreg_insn },
    &operand_data[1279],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1662 */
  {
    "pop_fpsysreg_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_840 },
#else
    { 0, 0, output_840 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_pop_fpsysreg_insn },
    &operand_data[1279],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1684 */
  {
    "*clear_vfp_multiple",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_841 },
#else
    { 0, 0, output_841 },
#endif
    { 0 },
    &operand_data[1281],
    1,
    1,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1721 */
  {
    "lazy_store_multiple_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vlstm%?\t%0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lazy_store_multiple_insn },
    &operand_data[792],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1731 */
  {
    "lazy_load_multiple_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_843 },
#else
    { 0, output_843, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lazy_load_multiple_insn },
    &operand_data[549],
    1,
    1,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1745 */
  {
    "*cmpsf_split_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1282],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1760 */
  {
    "*cmpsf_trap_split_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1282],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1775 */
  {
    "*cmpdf_split_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1284],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1790 */
  {
    "*cmpdf_trap_split_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1284],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1811 */
  {
    "*cmpsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_848 },
#else
    { 0, output_848, 0 },
#endif
    { 0 },
    &operand_data[1286],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1823 */
  {
    "*cmpsf_trap_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_849 },
#else
    { 0, output_849, 0 },
#endif
    { 0 },
    &operand_data[1286],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1835 */
  {
    "*cmpdf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_850 },
#else
    { 0, output_850, 0 },
#endif
    { 0 },
    &operand_data[1288],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1847 */
  {
    "*cmpdf_trap_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_851 },
#else
    { 0, output_851, 0 },
#endif
    { 0 },
    &operand_data[1288],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1860 */
  {
    "*combine_vcvt_f32_u32",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f32.u32\t%0, %1, %v2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1290],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1860 */
  {
    "*combine_vcvt_f32_s32",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f32.s32\t%0, %1, %v2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1290],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1873 */
  {
    "*combine_vcvt_f64_u32",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_854 },
#else
    { 0, output_854, 0 },
#endif
    { 0 },
    &operand_data[1293],
    3,
    3,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1873 */
  {
    "*combine_vcvt_f64_s32",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_855 },
#else
    { 0, output_855, 0 },
#endif
    { 0 },
    &operand_data[1293],
    3,
    3,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1890 */
  {
    "*combine_vcvtf2i",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.s32.f32\t%0, %1, %v2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1296],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1902 */
  {
    "neon_vcvthshf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f16.s%#32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvthshf },
    &operand_data[1299],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1902 */
  {
    "neon_vcvthuhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f16.u%#32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvthuhf },
    &operand_data[1299],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1913 */
  {
    "neon_vcvthssi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.s%#32.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvthssi },
    &operand_data[1301],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1913 */
  {
    "neon_vcvthusi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.u%#32.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvthusi },
    &operand_data[1301],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1931 */
  {
    "neon_vcvths_nhf_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_861 },
#else
    { 0, 0, output_861 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvths_nhf_unspec },
    &operand_data[1303],
    4,
    4,
    1,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1931 */
  {
    "neon_vcvthu_nhf_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_862 },
#else
    { 0, 0, output_862 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvthu_nhf_unspec },
    &operand_data[1303],
    4,
    4,
    1,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1973 */
  {
    "neon_vcvths_nsi_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_863 },
#else
    { 0, 0, output_863 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvths_nsi_unspec },
    &operand_data[1307],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1973 */
  {
    "neon_vcvthu_nsi_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_864 },
#else
    { 0, 0, output_864 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvthu_nsi_unspec },
    &operand_data[1307],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2008 */
  {
    "neon_vcvtahssi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.s%#32.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtahssi },
    &operand_data[1301],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2008 */
  {
    "neon_vcvtahusi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.u%#32.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtahusi },
    &operand_data[1301],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2008 */
  {
    "neon_vcvtmhssi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.s%#32.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtmhssi },
    &operand_data[1301],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2008 */
  {
    "neon_vcvtmhusi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.u%#32.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtmhusi },
    &operand_data[1301],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2008 */
  {
    "neon_vcvtnhssi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtn.s%#32.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtnhssi },
    &operand_data[1301],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2008 */
  {
    "neon_vcvtnhusi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtn.u%#32.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtnhusi },
    &operand_data[1301],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2008 */
  {
    "neon_vcvtphssi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.s%#32.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtphssi },
    &operand_data[1301],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2008 */
  {
    "neon_vcvtphusi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.u%#32.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtphusi },
    &operand_data[1301],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2021 */
  {
    "*push_multi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_873 },
#else
    { 0, 0, output_873 },
#endif
    { 0 },
    &operand_data[1310],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "btruncsf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintz%?.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_btruncsf2 },
    &operand_data[1249],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "ceilsf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintp%?.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ceilsf2 },
    &operand_data[1249],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "floorsf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintm%?.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_floorsf2 },
    &operand_data[1249],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "nearbyintsf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintr%?.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_nearbyintsf2 },
    &operand_data[1249],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "rintsf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintx%?.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rintsf2 },
    &operand_data[1249],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "roundsf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrinta%?.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_roundsf2 },
    &operand_data[1249],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "btruncdf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintz%?.f64\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_btruncdf2 },
    &operand_data[1253],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "ceildf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintp%?.f64\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ceildf2 },
    &operand_data[1253],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "floordf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintm%?.f64\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_floordf2 },
    &operand_data[1253],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "nearbyintdf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintr%?.f64\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_nearbyintdf2 },
    &operand_data[1253],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "rintdf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintx%?.f64\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rintdf2 },
    &operand_data[1253],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "rounddf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrinta%?.f64\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rounddf2 },
    &operand_data[1253],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2048 */
  {
    "lceilsfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.s32.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lceilsfsi2 },
    &operand_data[1313],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2048 */
  {
    "lfloorsfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.s32.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lfloorsfsi2 },
    &operand_data[1313],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2048 */
  {
    "lroundsfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.s32.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lroundsfsi2 },
    &operand_data[1313],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2048 */
  {
    "lceilusfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.u32.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lceilusfsi2 },
    &operand_data[1313],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2048 */
  {
    "lfloorusfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.u32.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lfloorusfsi2 },
    &operand_data[1313],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2048 */
  {
    "lroundusfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.u32.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lroundusfsi2 },
    &operand_data[1313],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2048 */
  {
    "lceildfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.s32.f64\t%0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lceildfsi2 },
    &operand_data[1315],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2048 */
  {
    "lfloordfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.s32.f64\t%0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lfloordfsi2 },
    &operand_data[1315],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2048 */
  {
    "lrounddfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.s32.f64\t%0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lrounddfsi2 },
    &operand_data[1315],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2048 */
  {
    "lceiludfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.u32.f64\t%0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lceiludfsi2 },
    &operand_data[1315],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2048 */
  {
    "lfloorudfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.u32.f64\t%0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lfloorudfsi2 },
    &operand_data[1315],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2048 */
  {
    "lroundudfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.u32.f64\t%0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lroundudfsi2 },
    &operand_data[1315],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2066 */
  {
    "smaxsf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnm.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smaxsf3 },
    &operand_data[1249],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2066 */
  {
    "smaxdf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnm.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smaxdf3 },
    &operand_data[1253],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2076 */
  {
    "sminsf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnm.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sminsf3 },
    &operand_data[1249],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2076 */
  {
    "smindf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnm.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smindf3 },
    &operand_data[1253],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2088 */
  {
    "neon_vmaxnmhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnm.f16\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxnmhf },
    &operand_data[1215],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2088 */
  {
    "neon_vminnmhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnm.f16\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminnmhf },
    &operand_data[1215],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2101 */
  {
    "fmaxsf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnm.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmaxsf3 },
    &operand_data[1218],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2101 */
  {
    "fminsf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnm.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fminsf3 },
    &operand_data[1218],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2101 */
  {
    "fmaxdf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnm.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmaxdf3 },
    &operand_data[1221],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2101 */
  {
    "fmindf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnm.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmindf3 },
    &operand_data[1221],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2113 */
  {
    "set_fpscr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mcr\tp10, 7, %0, cr1, cr0, 0\t @SET_FPSCR",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_set_fpscr },
    &operand_data[30],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2121 */
  {
    "get_fpscr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mrc\tp10, 7, %0, cr1, cr0, 0\t @GET_FPSCR",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_get_fpscr },
    &operand_data[29],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2138 */
  {
    "no_literal_pool_df_immediate",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_no_literal_pool_df_immediate },
    &operand_data[1317],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2164 */
  {
    "no_literal_pool_sf_immediate",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_no_literal_pool_sf_immediate },
    &operand_data[1320],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2186 */
  {
    "arm_vcx1si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx1\tp%c1, %0, #%c2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx1si },
    &operand_data[1323],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2186 */
  {
    "arm_vcx1di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx1\tp%c1, %P0, #%c2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx1di },
    &operand_data[1326],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2196 */
  {
    "arm_vcx1asi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx1a\tp%c1, %0, #%c3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx1asi },
    &operand_data[1329],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2196 */
  {
    "arm_vcx1adi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx1a\tp%c1, %P0, #%c3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx1adi },
    &operand_data[1333],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2207 */
  {
    "arm_vcx2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx2\tp%c1, %0, %2, #%c3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx2si },
    &operand_data[1337],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2207 */
  {
    "arm_vcx2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx2\tp%c1, %P0, %P2, #%c3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx2di },
    &operand_data[1341],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2218 */
  {
    "arm_vcx2asi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx2a\tp%c1, %0, %3, #%c4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx2asi },
    &operand_data[1345],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2218 */
  {
    "arm_vcx2adi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx2a\tp%c1, %P0, %P3, #%c4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx2adi },
    &operand_data[1350],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2230 */
  {
    "arm_vcx3si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx3\tp%c1, %0, %2, %3, #%c4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx3si },
    &operand_data[1355],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2230 */
  {
    "arm_vcx3di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx3\tp%c1, %P0, %P2, %P3, #%c4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx3di },
    &operand_data[1360],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2242 */
  {
    "arm_vcx3asi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx3a\tp%c1, %0, %3, %4, #%c5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx3asi },
    &operand_data[1365],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2242 */
  {
    "arm_vcx3adi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx3a\tp%c1, %P0, %P3, %P4, #%c5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx3adi },
    &operand_data[1371],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:46 */
  {
    "*thumb1_adddi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "adds\t%Q0, %Q0, %Q2\n\tadcs\t%R0, %R0, %R2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1377],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:62 */
  {
    "*thumb1_addsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_925 },
#else
    { 0, 0, output_925 },
#endif
    { 0 },
    &operand_data[1380],
    3,
    3,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:127 */
  {
    "*thumb_subdi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "subs\t%Q0, %Q0, %Q2\n\tsbcs\t%R0, %R0, %R2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1383],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:142 */
  {
    "thumb1_subsi3_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "subs\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb1_subsi3_insn },
    &operand_data[1386],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:158 */
  {
    "*thumb_mulsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_928 },
#else
    { 0, output_928, 0 },
#endif
    { 0 },
    &operand_data[1389],
    3,
    3,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:171 */
  {
    "*thumb_mulsi3_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_929 },
#else
    { 0, output_929, 0 },
#endif
    { 0 },
    &operand_data[1392],
    3,
    3,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:188 */
  {
    "*thumb1_andsi3_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ands\t%0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1395],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:231 */
  {
    "thumb1_bicsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bics\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb1_bicsi3 },
    &operand_data[1398],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:246 */
  {
    "*thumb1_iorsi3_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "orrs\t%0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1395],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:260 */
  {
    "*thumb1_xorsi3_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "eors\t%0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1395],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:271 */
  {
    "*thumb1_ashlsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "lsls\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1401],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:281 */
  {
    "*thumb1_ashrsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "asrs\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1401],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:291 */
  {
    "*thumb1_lshrsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "lsrs\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1401],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:301 */
  {
    "*thumb1_rotrsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rors\t%0, %0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1404],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:311 */
  {
    "*thumb1_negdi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "movs\t%R0, #0\n\trsbs\t%Q0, %Q1, #0\n\tsbcs\t%R0, %R1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1407],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:321 */
  {
    "*thumb1_negsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsbs\t%0, %1, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1386],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:330 */
  {
    "*thumb1_abssi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1409],
    2,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:345 */
  {
    "*thumb1_neg_abssi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1409],
    2,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:360 */
  {
    "*thumb1_one_cmplsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mvns\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1386],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:369 */
  {
    "*thumb1_zero_extendhisi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_943 },
#else
    { 0, 0, output_943 },
#endif
    { 0 },
    &operand_data[1412],
    2,
    2,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:412 */
  {
    "*thumb1_zero_extendqisi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_944 },
#else
    { 0, output_944, 0 },
#endif
    { 0 },
    &operand_data[1414],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:424 */
  {
    "*thumb1_zero_extendqisi2_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_945 },
#else
    { 0, output_945, 0 },
#endif
    { 0 },
    &operand_data[1414],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:442 */
  {
    "thumb1_extendhisi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_946 },
#else
    { 0, 0, output_946 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb1_extendhisi2 },
    &operand_data[1416],
    2,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:580 */
  {
    "thumb1_extendqisi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_947 },
#else
    { 0, 0, output_947 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb1_extendqisi2 },
    &operand_data[1419],
    2,
    2,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:612 */
  {
    "*thumb1_movdi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_948 },
#else
    { 0, 0, output_948 },
#endif
    { 0 },
    &operand_data[1421],
    2,
    2,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:658 */
  {
    "*thumb1_movsi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_949 },
#else
    { 0, 0, output_949 },
#endif
    { 0 },
    &operand_data[1423],
    2,
    2,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:799 */
  {
    "*thumb1_movhi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_950 },
#else
    { 0, 0, output_950 },
#endif
    { 0 },
    &operand_data[1425],
    2,
    2,
    0,
    7,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:856 */
  {
    "*thumb1_movqi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_951 },
#else
    { 0, output_951, 0 },
#endif
    { 0 },
    &operand_data[1427],
    2,
    2,
    0,
    6,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:874 */
  {
    "*thumb1_movhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_952 },
#else
    { 0, 0, output_952 },
#endif
    { 0 },
    &operand_data[1429],
    2,
    2,
    0,
    6,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:930 */
  {
    "*thumb1_movsf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_953 },
#else
    { 0, output_953, 0 },
#endif
    { 0 },
    &operand_data[1431],
    2,
    2,
    0,
    7,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:954 */
  {
    "*thumb_movdf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_954 },
#else
    { 0, 0, output_954 },
#endif
    { 0 },
    &operand_data[1433],
    2,
    2,
    0,
    6,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:994 */
  {
    "cpymem12b",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_955 },
#else
    { 0, 0, output_955 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cpymem12b },
    &operand_data[1435],
    4,
    7,
    6,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1016 */
  {
    "cpymem8b",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_956 },
#else
    { 0, 0, output_956 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cpymem8b },
    &operand_data[1435],
    4,
    6,
    4,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1065 */
  {
    "thumb1_cbz",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_957 },
#else
    { 0, 0, output_957 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb1_cbz },
    &operand_data[1442],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1148 */
  {
    "cbranchsi4_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_958 },
#else
    { 0, 0, output_958 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cbranchsi4_insn },
    &operand_data[1445],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1227 */
  {
    "cbranchsi4_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_959 },
#else
    { 0, 0, output_959 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cbranchsi4_scratch },
    &operand_data[1449],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1264 */
  {
    "*negated_cbranchsi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_960 },
#else
    { 0, 0, output_960 },
#endif
    { 0 },
    &operand_data[1454],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1300 */
  {
    "*tbit_cbranch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_961 },
#else
    { 0, 0, output_961 },
#endif
    { 0 },
    &operand_data[1458],
    4,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1345 */
  {
    "*tlobits_cbranch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_962 },
#else
    { 0, 0, output_962 },
#endif
    { 0 },
    &operand_data[1458],
    4,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1390 */
  {
    "*tstsi3_cbranch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_963 },
#else
    { 0, 0, output_963 },
#endif
    { 0 },
    &operand_data[1463],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1428 */
  {
    "*cbranchne_decr1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_964 },
#else
    { 0, 0, output_964 },
#endif
    { 0 },
    &operand_data[1467],
    5,
    5,
    1,
    4,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1532 */
  {
    "*addsi3_cbranch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_965 },
#else
    { 0, 0, output_965 },
#endif
    { 0 },
    &operand_data[1472],
    6,
    6,
    2,
    6,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1614 */
  {
    "*addsi3_cbranch_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_966 },
#else
    { 0, 0, output_966 },
#endif
    { 0 },
    &operand_data[1478],
    5,
    5,
    0,
    4,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1683 */
  {
    "*thumb_cmpdi_zero",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "orrs\t%1, %Q0, %R0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1483],
    1,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1715 */
  {
    "*cstoresi_eq0_thumb1_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_968 },
#else
    { 0, output_968, 0 },
#endif
    { 0 },
    &operand_data[1485],
    3,
    3,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1728 */
  {
    "*cstoresi_ne0_thumb1_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "subs\t%2, %1, #1\n\tsbcs\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1488],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1739 */
  {
    "cstoresi_nltu_thumb1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cmp\t%1, %2\n\tsbcs\t%0, %0, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cstoresi_nltu_thumb1 },
    &operand_data[1491],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1749 */
  {
    "cstoresi_ltu_thumb1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cstoresi_ltu_thumb1 },
    &operand_data[1491],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1765 */
  {
    "thumb1_addsi3_addgeu",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cmp\t%3, %4\n\tadcs\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb1_addsi3_addgeu },
    &operand_data[1494],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1778 */
  {
    "*thumb_jump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_973 },
#else
    { 0, 0, output_973 },
#endif
    { 0 },
    &operand_data[442],
    1,
    1,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1801 */
  {
    "*call_reg_thumb1_v5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "blx\t%0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1499],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1812 */
  {
    "*nonsecure_call_reg_thumb1_v5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bl\t__gnu_cmse_nonsecure_call",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[504],
    2,
    2,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1824 */
  {
    "*call_reg_thumb1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_976 },
#else
    { 0, 0, output_976 },
#endif
    { 0 },
    &operand_data[1499],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1844 */
  {
    "*call_value_reg_thumb1_v5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "blx\t%1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1501],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1856 */
  {
    "*nonsecure_call_value_reg_thumb1_v5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bl\t__gnu_cmse_nonsecure_call",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1503],
    3,
    3,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1870 */
  {
    "*call_value_reg_thumb1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_979 },
#else
    { 0, 0, output_979 },
#endif
    { 0 },
    &operand_data[1501],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1891 */
  {
    "*call_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bl\t%a0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[512],
    3,
    3,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1904 */
  {
    "*call_value_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bl\t%a1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1503],
    4,
    4,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1936 */
  {
    "thumb1_casesi_dispatch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_982 },
#else
    { 0, 0, output_982 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb1_casesi_dispatch },
    &operand_data[442],
    1,
    1,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1951 */
  {
    "*thumb1_indirect_jump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mov\tpc, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1499],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1962 */
  {
    "prologue_thumb1_interwork",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_984 },
#else
    { 0, 0, output_984 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_prologue_thumb1_interwork },
    &operand_data[0],
    0,
    0,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1970 */
  {
    "*epilogue_insns",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_985 },
#else
    { 0, 0, output_985 },
#endif
    { 0 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:2008 */
  {
    "*thumb1_movpc_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mov\t%0, pc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[438],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:2019 */
  {
    "*thumb1_tablejump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mov\t%|pc, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1499],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:2028 */
  {
    "thumb_eh_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb_eh_return },
    &operand_data[1410],
    1,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:2046 */
  {
    "thumb1_stack_protect_test_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldr\t%0, [%2]\n\tldr\t%2, %1\n\teors\t%0, %2, %0\n\tmovs\t%2, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb1_stack_protect_test_insn },
    &operand_data[1507],
    3,
    3,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:29 */
  {
    "*thumb2_smaxsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1510],
    3,
    3,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:50 */
  {
    "*thumb2_sminsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1510],
    3,
    3,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:71 */
  {
    "*thumb32_umaxsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1510],
    3,
    3,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:92 */
  {
    "*thumb2_uminsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1510],
    3,
    3,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:113 */
  {
    "*thumb2_abssi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1513],
    2,
    2,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:166 */
  {
    "*thumb2_neg_abssi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1513],
    2,
    2,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:220 */
  {
    "*thumb2_pop_single",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "pop\t{%0}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1515],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:235 */
  {
    "*thumb2_movsi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_997 },
#else
    { 0, 0, output_997 },
#endif
    { 0 },
    &operand_data[1516],
    2,
    2,
    0,
    7,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:267 */
  {
    "tls_load_dot_plus_four",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_998 },
#else
    { 0, 0, output_998 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_tls_load_dot_plus_four },
    &operand_data[1518],
    4,
    4,
    0,
    4,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:286 */
  {
    "*thumb2_movhi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_999 },
#else
    { 0, output_999, 0 },
#endif
    { 0 },
    &operand_data[1522],
    2,
    2,
    0,
    6,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:307 */
  {
    "*thumb2_storewb_pairsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "strd\t%3, %4, [%0, %2]!",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1524],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:322 */
  {
    "*thumb2_mov_scc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1530],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:340 */
  {
    "*thumb2_mov_negscc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[468],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:361 */
  {
    "*thumb2_mov_negscc_strict_it",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1533],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:392 */
  {
    "*thumb2_mov_notscc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[468],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:412 */
  {
    "*thumb2_mov_notscc_strict_it",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1533],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:435 */
  {
    "*thumb2_movsicc_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_1006 },
#else
    { 0, output_1006, 0 },
#endif
    { 0 },
    &operand_data[1536],
    5,
    5,
    0,
    12,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:514 */
  {
    "*thumb2_movsfcc_soft_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_1007 },
#else
    { 0, output_1007, 0 },
#endif
    { 0 },
    &operand_data[496],
    5,
    5,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:529 */
  {
    "*call_reg_thumb2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "blx%?\t%0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[503],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:539 */
  {
    "*nonsecure_call_reg_thumb2_fpcxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "blxns\t%0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1541],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:551 */
  {
    "*nonsecure_call_reg_thumb2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bl\t__gnu_cmse_nonsecure_call",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[504],
    2,
    2,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:563 */
  {
    "*call_value_reg_thumb2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "blx\t%1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1501],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:574 */
  {
    "*nonsecure_call_value_reg_thumb2_fpcxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "blxns\t%1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1501],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:588 */
  {
    "*nonsecure_call_value_reg_thumb2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bl\t__gnu_cmse_nonsecure_call",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1503],
    3,
    3,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:601 */
  {
    "*thumb2_indirect_jump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bx\t%0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1499],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:613 */
  {
    "*thumb2_and_scc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1544],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:641 */
  {
    "*thumb2_ior_scc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_1016 },
#else
    { 0, output_1016, 0 },
#endif
    { 0 },
    &operand_data[587],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:672 */
  {
    "*thumb2_ior_scc_strict_it",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1548],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:698 */
  {
    "*thumb2_cond_move",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1018 },
#else
    { 0, 0, output_1018 },
#endif
    { 0 },
    &operand_data[595],
    6,
    6,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:748 */
  {
    "*thumb2_cond_arith",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1019 },
#else
    { 0, 0, output_1019 },
#endif
    { 0 },
    &operand_data[601],
    6,
    6,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:790 */
  {
    "*thumb2_cond_arith_strict_it",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1552],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:861 */
  {
    "*thumb2_cond_sub",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1021 },
#else
    { 0, 0, output_1021 },
#endif
    { 0 },
    &operand_data[1558],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:893 */
  {
    "*thumb2_negscc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1563],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:960 */
  {
    "*thumb2_csinv",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_1023 },
#else
    { 0, output_1023, 0 },
#endif
    { 0 },
    &operand_data[1567],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:974 */
  {
    "*thumb2_csinc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_1024 },
#else
    { 0, output_1024, 0 },
#endif
    { 0 },
    &operand_data[1567],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:989 */
  {
    "*thumb2_csneg",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_1025 },
#else
    { 0, output_1025, 0 },
#endif
    { 0 },
    &operand_data[1567],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1003 */
  {
    "*thumb2_movcond",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1026 },
#else
    { 0, 0, output_1026 },
#endif
    { 0 },
    &operand_data[1571],
    6,
    6,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1091 */
  {
    "*thumb2_extendqisi_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_1027 },
#else
    { 0, output_1027, 0 },
#endif
    { 0 },
    &operand_data[409],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1104 */
  {
    "*thumb2_zero_extendhisi2_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_1028 },
#else
    { 0, output_1028, 0 },
#endif
    { 0 },
    &operand_data[405],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1117 */
  {
    "thumb2_zero_extendqisi2_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_1029 },
#else
    { 0, output_1029, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb2_zero_extendqisi2_v6 },
    &operand_data[409],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1150 */
  {
    "*thumb2_casesi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1030 },
#else
    { 0, 0, output_1030 },
#endif
    { 0 },
    &operand_data[1577],
    4,
    5,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1189 */
  {
    "*thumb2_casesi_internal_pic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1031 },
#else
    { 0, 0, output_1031 },
#endif
    { 0 },
    &operand_data[1577],
    4,
    6,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1208 */
  {
    "*thumb2_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1032 },
#else
    { 0, 0, output_1032 },
#endif
    { 0 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1216 */
  {
    "*thumb2_cmse_entry_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1033 },
#else
    { 0, 0, output_1033 },
#endif
    { 0 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1235 */
  {
    "thumb2_eh_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb2_eh_return },
    &operand_data[813],
    1,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1250 */
  {
    "*thumb2_alusi3_short",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "%I3%!\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1583],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1265 */
  {
    "*thumb2_shiftsi3_short",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1036 },
#else
    { 0, 0, output_1036 },
#endif
    { 0 },
    &operand_data[1587],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1285 */
  {
    "*thumb2_movqi_shortim",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mov%!\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1591],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1285 */
  {
    "*thumb2_movhi_shortim",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mov%!\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1593],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1285 */
  {
    "*thumb2_movsi_shortim",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mov%!\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1595],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1296 */
  {
    "*thumb2_addsi_short",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1040 },
#else
    { 0, 0, output_1040 },
#endif
    { 0 },
    &operand_data[1597],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1325 */
  {
    "*thumb2_subsi_short",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%!\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1600],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1363 */
  {
    "thumb2_addsi3_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1042 },
#else
    { 0, 0, output_1042 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb2_addsi3_compare0 },
    &operand_data[1603],
    3,
    3,
    2,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1397 */
  {
    "*thumb2_addsi3_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1043 },
#else
    { 0, 0, output_1043 },
#endif
    { 0 },
    &operand_data[1606],
    2,
    2,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1424 */
  {
    "*thumb2_mulsi_short",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mul%!\t%0, %2, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1608],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1435 */
  {
    "*thumb2_mulsi_short_compare0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "muls\t%0, %2, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1395],
    3,
    3,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1448 */
  {
    "*thumb2_mulsi_short_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "muls\t%0, %2, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1611],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1460 */
  {
    "*thumb2_cbz",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1047 },
#else
    { 0, 0, output_1047 },
#endif
    { 0 },
    &operand_data[1614],
    2,
    2,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1484 */
  {
    "*thumb2_cbnz",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1048 },
#else
    { 0, 0, output_1048 },
#endif
    { 0 },
    &operand_data[1614],
    2,
    2,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1508 */
  {
    "*thumb2_one_cmplsi2_short",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mvn%!\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1600],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1519 */
  {
    "*thumb2_negsi2_short",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsb%!\t%0, %1, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1600],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1530 */
  {
    "*orsi_notsi_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "orn%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[164],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1540 */
  {
    "*orsi_not_shiftsi_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "orn%?\t%0, %1, %2%S4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1662 */
  {
    "*clear_apsr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "clrm%?\t{APSR}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[0],
    0,
    0,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1673 */
  {
    "*clear_multiple",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1054 },
#else
    { 0, 0, output_1054 },
#endif
    { 0 },
    &operand_data[1621],
    2,
    2,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1703 */
  {
    "thumb2_asrl",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "asrl%?\t%Q0, %R0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb2_asrl },
    &operand_data[1623],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1711 */
  {
    "thumb2_lsll",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "lsll%?\t%Q0, %R0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb2_lsll },
    &operand_data[1623],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1719 */
  {
    "thumb2_lsrl",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "lsrl%?\t%Q0, %R0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb2_lsrl },
    &operand_data[1625],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1728 */
  {
    "*doloop_end_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1058 },
#else
    { 0, 0, output_1058 },
#endif
    { 0 },
    &operand_data[442],
    1,
    1,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1765 */
  {
    "dls_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "dls\t%|lr, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_dls_insn },
    &operand_data[12],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:26 */
  {
    "unaligned_storev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1060 },
#else
    { 0, 0, output_1060 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_unaligned_storev8qi },
    &operand_data[1627],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:36 */
  {
    "*neon_movv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1061 },
#else
    { 0, 0, output_1061 },
#endif
    { 0 },
    &operand_data[1629],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:36 */
  {
    "*neon_movv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1062 },
#else
    { 0, 0, output_1062 },
#endif
    { 0 },
    &operand_data[1631],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:36 */
  {
    "*neon_movv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1063 },
#else
    { 0, 0, output_1063 },
#endif
    { 0 },
    &operand_data[1633],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:36 */
  {
    "*neon_movv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1064 },
#else
    { 0, 0, output_1064 },
#endif
    { 0 },
    &operand_data[1635],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:36 */
  {
    "*neon_movv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1065 },
#else
    { 0, 0, output_1065 },
#endif
    { 0 },
    &operand_data[1637],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:36 */
  {
    "*neon_movv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1066 },
#else
    { 0, 0, output_1066 },
#endif
    { 0 },
    &operand_data[1639],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:36 */
  {
    "*neon_movdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1067 },
#else
    { 0, 0, output_1067 },
#endif
    { 0 },
    &operand_data[1641],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:83 */
  {
    "*neon_movv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1068 },
#else
    { 0, 0, output_1068 },
#endif
    { 0 },
    &operand_data[1643],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:83 */
  {
    "*neon_movv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1069 },
#else
    { 0, 0, output_1069 },
#endif
    { 0 },
    &operand_data[1645],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:83 */
  {
    "*neon_movv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1070 },
#else
    { 0, 0, output_1070 },
#endif
    { 0 },
    &operand_data[1647],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:83 */
  {
    "*neon_movv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1071 },
#else
    { 0, 0, output_1071 },
#endif
    { 0 },
    &operand_data[1649],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:83 */
  {
    "*neon_movv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1072 },
#else
    { 0, 0, output_1072 },
#endif
    { 0 },
    &operand_data[1651],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:83 */
  {
    "*neon_movv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1073 },
#else
    { 0, 0, output_1073 },
#endif
    { 0 },
    &operand_data[1653],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:83 */
  {
    "*neon_movv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1074 },
#else
    { 0, 0, output_1074 },
#endif
    { 0 },
    &operand_data[1655],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:83 */
  {
    "*neon_movti",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1075 },
#else
    { 0, 0, output_1075 },
#endif
    { 0 },
    &operand_data[1657],
    2,
    2,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:181 */
  {
    "*neon_movei",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1076 },
#else
    { 0, 0, output_1076 },
#endif
    { 0 },
    &operand_data[1659],
    2,
    2,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:181 */
  {
    "*neon_movoi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1077 },
#else
    { 0, 0, output_1077 },
#endif
    { 0 },
    &operand_data[1661],
    2,
    2,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:181 */
  {
    "*neon_movci",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1078 },
#else
    { 0, 0, output_1078 },
#endif
    { 0 },
    &operand_data[1663],
    2,
    2,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:181 */
  {
    "*neon_movxi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1079 },
#else
    { 0, 0, output_1079 },
#endif
    { 0 },
    &operand_data[1665],
    2,
    2,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:283 */
  {
    "*movmisalignv8qi_neon_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.8\t{%P1}, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1667],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:283 */
  {
    "*movmisalignv4hi_neon_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.16\t{%P1}, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1669],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:283 */
  {
    "*movmisalignv4hf_neon_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.16\t{%P1}, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1671],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:283 */
  {
    "*movmisalignv4bf_neon_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.16\t{%P1}, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1673],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:283 */
  {
    "*movmisalignv2si_neon_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.32\t{%P1}, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1675],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:283 */
  {
    "*movmisalignv2sf_neon_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.32\t{%P1}, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1677],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:283 */
  {
    "*movmisaligndi_neon_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.64\t{%P1}, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1679],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:291 */
  {
    "*movmisalignv8qi_neon_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.8\t{%P0}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1681],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:291 */
  {
    "*movmisalignv4hi_neon_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.16\t{%P0}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1683],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:291 */
  {
    "*movmisalignv4hf_neon_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.16\t{%P0}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1685],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:291 */
  {
    "*movmisalignv4bf_neon_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.16\t{%P0}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1687],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:291 */
  {
    "*movmisalignv2si_neon_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.32\t{%P0}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1689],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:291 */
  {
    "*movmisalignv2sf_neon_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.32\t{%P0}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1691],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:291 */
  {
    "*movmisaligndi_neon_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.64\t{%P0}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1693],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:300 */
  {
    "*movmisalignv16qi_neon_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.8\t{%q1}, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1695],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:300 */
  {
    "*movmisalignv8hi_neon_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.16\t{%q1}, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1697],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:300 */
  {
    "*movmisalignv8hf_neon_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.16\t{%q1}, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1699],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:300 */
  {
    "*movmisalignv8bf_neon_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.16\t{%q1}, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1701],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:300 */
  {
    "*movmisalignv4si_neon_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.32\t{%q1}, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1703],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:300 */
  {
    "*movmisalignv4sf_neon_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.32\t{%q1}, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1705],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:300 */
  {
    "*movmisalignv2di_neon_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.64\t{%q1}, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1707],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:308 */
  {
    "*movmisalignv16qi_neon_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.8\t{%q0}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1709],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:308 */
  {
    "*movmisalignv8hi_neon_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.16\t{%q0}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1711],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:308 */
  {
    "*movmisalignv8hf_neon_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.16\t{%q0}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1713],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:308 */
  {
    "*movmisalignv8bf_neon_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.16\t{%q0}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1715],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:308 */
  {
    "*movmisalignv4si_neon_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.32\t{%q0}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1717],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:308 */
  {
    "*movmisalignv4sf_neon_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.32\t{%q0}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1719],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:308 */
  {
    "*movmisalignv2di_neon_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.64\t{%q0}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1721],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:317 */
  {
    "vec_setv8qi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1108 },
#else
    { 0, 0, output_1108 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv8qi_internal },
    &operand_data[1723],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:317 */
  {
    "vec_setv4hi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1109 },
#else
    { 0, 0, output_1109 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv4hi_internal },
    &operand_data[1727],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:317 */
  {
    "vec_setv4hf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1110 },
#else
    { 0, 0, output_1110 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv4hf_internal },
    &operand_data[1731],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:317 */
  {
    "vec_setv4bf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1111 },
#else
    { 0, 0, output_1111 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv4bf_internal },
    &operand_data[1735],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:317 */
  {
    "vec_setv2si_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1112 },
#else
    { 0, 0, output_1112 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv2si_internal },
    &operand_data[1739],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:317 */
  {
    "vec_setv2sf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1113 },
#else
    { 0, 0, output_1113 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv2sf_internal },
    &operand_data[1743],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:338 */
  {
    "vec_setv16qi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1114 },
#else
    { 0, 0, output_1114 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv16qi_internal },
    &operand_data[1747],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:338 */
  {
    "vec_setv8hi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1115 },
#else
    { 0, 0, output_1115 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv8hi_internal },
    &operand_data[1751],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:338 */
  {
    "vec_setv8hf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1116 },
#else
    { 0, 0, output_1116 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv8hf_internal },
    &operand_data[1755],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:338 */
  {
    "vec_setv4si_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1117 },
#else
    { 0, 0, output_1117 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv4si_internal },
    &operand_data[1759],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:338 */
  {
    "vec_setv4sf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1118 },
#else
    { 0, 0, output_1118 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv4sf_internal },
    &operand_data[1763],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:367 */
  {
    "vec_setv2di_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1119 },
#else
    { 0, 0, output_1119 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv2di_internal },
    &operand_data[1767],
    4,
    4,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:389 */
  {
    "vec_extractv8qiqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1120 },
#else
    { 0, 0, output_1120 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_extractv8qiqi },
    &operand_data[1771],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:389 */
  {
    "vec_extractv4hihi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1121 },
#else
    { 0, 0, output_1121 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_extractv4hihi },
    &operand_data[1774],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:389 */
  {
    "vec_extractv4hfhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1122 },
#else
    { 0, 0, output_1122 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_extractv4hfhf },
    &operand_data[1777],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:389 */
  {
    "vec_extractv4bfbf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1123 },
#else
    { 0, 0, output_1123 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_extractv4bfbf },
    &operand_data[1780],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:389 */
  {
    "vec_extractv2sisi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1124 },
#else
    { 0, 0, output_1124 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_extractv2sisi },
    &operand_data[1783],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:389 */
  {
    "vec_extractv2sfsf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1125 },
#else
    { 0, 0, output_1125 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_extractv2sfsf },
    &operand_data[1786],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:414 */
  {
    "neon_vec_extractv16qiqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1126 },
#else
    { 0, 0, output_1126 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_extractv16qiqi },
    &operand_data[1789],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:414 */
  {
    "neon_vec_extractv8hihi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1127 },
#else
    { 0, 0, output_1127 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_extractv8hihi },
    &operand_data[1792],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:414 */
  {
    "neon_vec_extractv8hfhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1128 },
#else
    { 0, 0, output_1128 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_extractv8hfhf },
    &operand_data[1795],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:414 */
  {
    "neon_vec_extractv4sisi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1129 },
#else
    { 0, 0, output_1129 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_extractv4sisi },
    &operand_data[1798],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:414 */
  {
    "neon_vec_extractv4sfsf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1130 },
#else
    { 0, 0, output_1130 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_extractv4sfsf },
    &operand_data[1801],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:442 */
  {
    "neon_vec_extractv2didi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1131 },
#else
    { 0, 0, output_1131 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_extractv2didi },
    &operand_data[1804],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:466 */
  {
    "*addv8qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:466 */
  {
    "*addv16qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:466 */
  {
    "*addv4hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:466 */
  {
    "*addv8hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:466 */
  {
    "*addv2si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:466 */
  {
    "*addv4si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:466 */
  {
    "*addv4hf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:466 */
  {
    "*addv8hf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:466 */
  {
    "*addv2sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:466 */
  {
    "*addv4sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:466 */
  {
    "*addv2di3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:478 */
  {
    "*subv8qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:478 */
  {
    "*subv16qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:478 */
  {
    "*subv4hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:478 */
  {
    "*subv8hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:478 */
  {
    "*subv2si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:478 */
  {
    "*subv4si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:478 */
  {
    "*subv4hf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:478 */
  {
    "*subv8hf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:478 */
  {
    "*subv2sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:478 */
  {
    "*subv4sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:478 */
  {
    "*subv2di3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:490 */
  {
    "*mulv8qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:490 */
  {
    "*mulv16qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:490 */
  {
    "*mulv4hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:490 */
  {
    "*mulv8hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:490 */
  {
    "*mulv2si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:490 */
  {
    "*mulv4si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:490 */
  {
    "*mulv2sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:490 */
  {
    "*mulv4sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:534 */
  {
    "mulv8qi3addv8qi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.i8\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv8qi3addv8qi_neon },
    &operand_data[1840],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:534 */
  {
    "mulv16qi3addv16qi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.i8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv16qi3addv16qi_neon },
    &operand_data[1844],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:534 */
  {
    "mulv4hi3addv4hi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.i16\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv4hi3addv4hi_neon },
    &operand_data[1848],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:534 */
  {
    "mulv8hi3addv8hi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.i16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv8hi3addv8hi_neon },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:534 */
  {
    "mulv2si3addv2si_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.i32\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv2si3addv2si_neon },
    &operand_data[1856],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:534 */
  {
    "mulv4si3addv4si_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.i32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv4si3addv4si_neon },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:534 */
  {
    "mulv2sf3addv2sf_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.f32\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv2sf3addv2sf_neon },
    &operand_data[1864],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:534 */
  {
    "mulv4sf3addv4sf_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.f32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv4sf3addv4sf_neon },
    &operand_data[1868],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:547 */
  {
    "mulv8hf3addv8hf_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.f16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv8hf3addv8hf_neon },
    &operand_data[1872],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:547 */
  {
    "mulv4hf3addv4hf_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.f16\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv4hf3addv4hf_neon },
    &operand_data[1876],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:557 */
  {
    "mulv8qi3negv8qiaddv8qi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.i8\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv8qi3negv8qiaddv8qi_neon },
    &operand_data[1840],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:557 */
  {
    "mulv16qi3negv16qiaddv16qi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.i8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv16qi3negv16qiaddv16qi_neon },
    &operand_data[1844],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:557 */
  {
    "mulv4hi3negv4hiaddv4hi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.i16\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv4hi3negv4hiaddv4hi_neon },
    &operand_data[1848],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:557 */
  {
    "mulv8hi3negv8hiaddv8hi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.i16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv8hi3negv8hiaddv8hi_neon },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:557 */
  {
    "mulv2si3negv2siaddv2si_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.i32\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv2si3negv2siaddv2si_neon },
    &operand_data[1856],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:557 */
  {
    "mulv4si3negv4siaddv4si_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.i32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv4si3negv4siaddv4si_neon },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:557 */
  {
    "mulv2sf3negv2sfaddv2sf_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.f32\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv2sf3negv2sfaddv2sf_neon },
    &operand_data[1864],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:557 */
  {
    "mulv4sf3negv4sfaddv4sf_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.f32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv4sf3negv4sfaddv4sf_neon },
    &operand_data[1868],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:575 */
  {
    "fmav2sf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfma.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmav2sf4 },
    &operand_data[1880],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:575 */
  {
    "fmav4sf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfma.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmav4sf4 },
    &operand_data[1884],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:585 */
  {
    "fmav2sf4_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfma.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmav2sf4_intrinsic },
    &operand_data[1880],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:585 */
  {
    "fmav4sf4_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfma.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmav4sf4_intrinsic },
    &operand_data[1884],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:595 */
  {
    "fmav8hf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfma.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmav8hf4 },
    &operand_data[1888],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:595 */
  {
    "fmav4hf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfma.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmav4hf4 },
    &operand_data[1892],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:606 */
  {
    "*fmsubv2sf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfms.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1880],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:606 */
  {
    "*fmsubv4sf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfms.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1884],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:616 */
  {
    "fmsubv2sf4_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfms.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmsubv2sf4_intrinsic },
    &operand_data[1880],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:616 */
  {
    "fmsubv4sf4_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfms.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmsubv4sf4_intrinsic },
    &operand_data[1884],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:627 */
  {
    "fmsubv8hf4_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfms.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmsubv8hf4_intrinsic },
    &operand_data[1888],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:627 */
  {
    "fmsubv4hf4_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfms.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmsubv4hf4_intrinsic },
    &operand_data[1892],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:638 */
  {
    "neon_vrintpv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintp.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrintpv2sf },
    &operand_data[1831],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:638 */
  {
    "neon_vrintzv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintz.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrintzv2sf },
    &operand_data[1831],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:638 */
  {
    "neon_vrintmv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintm.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrintmv2sf },
    &operand_data[1831],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:638 */
  {
    "neon_vrintxv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintx.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrintxv2sf },
    &operand_data[1831],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:638 */
  {
    "neon_vrintav2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrinta.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrintav2sf },
    &operand_data[1831],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:638 */
  {
    "neon_vrintnv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintn.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrintnv2sf },
    &operand_data[1831],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:638 */
  {
    "neon_vrintpv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintp.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrintpv4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:638 */
  {
    "neon_vrintzv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintz.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrintzv4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:638 */
  {
    "neon_vrintmv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintm.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrintmv4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:638 */
  {
    "neon_vrintxv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintx.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrintxv4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:638 */
  {
    "neon_vrintav4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrinta.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrintav4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:638 */
  {
    "neon_vrintnv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintn.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrintnv4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:648 */
  {
    "neon_vcvtpv2sfv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.s32.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtpv2sfv2si },
    &operand_data[1896],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:648 */
  {
    "neon_vcvtmv2sfv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.s32.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtmv2sfv2si },
    &operand_data[1896],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:648 */
  {
    "neon_vcvtav2sfv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.s32.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtav2sfv2si },
    &operand_data[1896],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:648 */
  {
    "neon_vcvtpuv2sfv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.u32.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtpuv2sfv2si },
    &operand_data[1896],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:648 */
  {
    "neon_vcvtmuv2sfv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.u32.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtmuv2sfv2si },
    &operand_data[1896],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:648 */
  {
    "neon_vcvtauv2sfv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.u32.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtauv2sfv2si },
    &operand_data[1896],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:648 */
  {
    "neon_vcvtpv4sfv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.s32.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtpv4sfv4si },
    &operand_data[1898],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:648 */
  {
    "neon_vcvtmv4sfv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.s32.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtmv4sfv4si },
    &operand_data[1898],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:648 */
  {
    "neon_vcvtav4sfv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.s32.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtav4sfv4si },
    &operand_data[1898],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:648 */
  {
    "neon_vcvtpuv4sfv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.u32.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtpuv4sfv4si },
    &operand_data[1898],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:648 */
  {
    "neon_vcvtmuv4sfv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.u32.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtmuv4sfv4si },
    &operand_data[1898],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:648 */
  {
    "neon_vcvtauv4sfv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.u32.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtauv4sfv4si },
    &operand_data[1898],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:659 */
  {
    "iorv8qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1216 },
#else
    { 0, 0, output_1216 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv8qi3_neon },
    &operand_data[1900],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:659 */
  {
    "iorv16qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1217 },
#else
    { 0, 0, output_1217 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv16qi3_neon },
    &operand_data[1903],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:659 */
  {
    "iorv4hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1218 },
#else
    { 0, 0, output_1218 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv4hi3_neon },
    &operand_data[1906],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:659 */
  {
    "iorv8hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1219 },
#else
    { 0, 0, output_1219 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv8hi3_neon },
    &operand_data[1909],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:659 */
  {
    "iorv2si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1220 },
#else
    { 0, 0, output_1220 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv2si3_neon },
    &operand_data[1912],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:659 */
  {
    "iorv4si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1221 },
#else
    { 0, 0, output_1221 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv4si3_neon },
    &operand_data[1915],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:659 */
  {
    "iorv4hf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1222 },
#else
    { 0, 0, output_1222 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv4hf3_neon },
    &operand_data[1918],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:659 */
  {
    "iorv8hf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1223 },
#else
    { 0, 0, output_1223 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv8hf3_neon },
    &operand_data[1921],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:659 */
  {
    "iorv2sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1224 },
#else
    { 0, 0, output_1224 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv2sf3_neon },
    &operand_data[1924],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:659 */
  {
    "iorv4sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1225 },
#else
    { 0, 0, output_1225 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv4sf3_neon },
    &operand_data[1927],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:659 */
  {
    "iorv2di3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1226 },
#else
    { 0, 0, output_1226 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv2di3_neon },
    &operand_data[1930],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:681 */
  {
    "andv8qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1227 },
#else
    { 0, 0, output_1227 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv8qi3_neon },
    &operand_data[1933],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:681 */
  {
    "andv16qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1228 },
#else
    { 0, 0, output_1228 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv16qi3_neon },
    &operand_data[1936],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:681 */
  {
    "andv4hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1229 },
#else
    { 0, 0, output_1229 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv4hi3_neon },
    &operand_data[1939],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:681 */
  {
    "andv8hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1230 },
#else
    { 0, 0, output_1230 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv8hi3_neon },
    &operand_data[1942],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:681 */
  {
    "andv2si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1231 },
#else
    { 0, 0, output_1231 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv2si3_neon },
    &operand_data[1945],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:681 */
  {
    "andv4si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1232 },
#else
    { 0, 0, output_1232 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv4si3_neon },
    &operand_data[1948],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:681 */
  {
    "andv4hf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1233 },
#else
    { 0, 0, output_1233 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv4hf3_neon },
    &operand_data[1951],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:681 */
  {
    "andv8hf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1234 },
#else
    { 0, 0, output_1234 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv8hf3_neon },
    &operand_data[1954],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:681 */
  {
    "andv2sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1235 },
#else
    { 0, 0, output_1235 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv2sf3_neon },
    &operand_data[1957],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:681 */
  {
    "andv4sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1236 },
#else
    { 0, 0, output_1236 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv4sf3_neon },
    &operand_data[1960],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:681 */
  {
    "andv2di3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1237 },
#else
    { 0, 0, output_1237 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv2di3_neon },
    &operand_data[1963],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:698 */
  {
    "ornv8qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ornv8qi3_neon },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:698 */
  {
    "ornv16qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ornv16qi3_neon },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:698 */
  {
    "ornv4hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ornv4hi3_neon },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:698 */
  {
    "ornv8hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ornv8hi3_neon },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:698 */
  {
    "ornv2si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ornv2si3_neon },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:698 */
  {
    "ornv4si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ornv4si3_neon },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:698 */
  {
    "ornv4hf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ornv4hf3_neon },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:698 */
  {
    "ornv8hf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ornv8hf3_neon },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:698 */
  {
    "ornv2sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ornv2sf3_neon },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:698 */
  {
    "ornv4sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ornv4sf3_neon },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:698 */
  {
    "ornv2di3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ornv2di3_neon },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:707 */
  {
    "bicv8qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_bicv8qi3_neon },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:707 */
  {
    "bicv16qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_bicv16qi3_neon },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:707 */
  {
    "bicv4hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_bicv4hi3_neon },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:707 */
  {
    "bicv8hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_bicv8hi3_neon },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:707 */
  {
    "bicv2si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_bicv2si3_neon },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:707 */
  {
    "bicv4si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_bicv4si3_neon },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:707 */
  {
    "bicv4hf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_bicv4hf3_neon },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:707 */
  {
    "bicv8hf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_bicv8hf3_neon },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:707 */
  {
    "bicv2sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_bicv2sf3_neon },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:707 */
  {
    "bicv4sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_bicv4sf3_neon },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:707 */
  {
    "bicv2di3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_bicv2di3_neon },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:716 */
  {
    "xorv8qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv8qi3_neon },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:716 */
  {
    "xorv16qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv16qi3_neon },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:716 */
  {
    "xorv4hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv4hi3_neon },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:716 */
  {
    "xorv8hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv8hi3_neon },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:716 */
  {
    "xorv2si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv2si3_neon },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:716 */
  {
    "xorv4si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv4si3_neon },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:716 */
  {
    "xorv4hf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv4hf3_neon },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:716 */
  {
    "xorv8hf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv8hf3_neon },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:716 */
  {
    "xorv2sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv2sf3_neon },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:716 */
  {
    "xorv4sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv4sf3_neon },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:716 */
  {
    "xorv2di3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv2di3_neon },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:725 */
  {
    "one_cmplv8qi2_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv8qi2_neon },
    &operand_data[1807],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:725 */
  {
    "one_cmplv16qi2_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv16qi2_neon },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:725 */
  {
    "one_cmplv4hi2_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv4hi2_neon },
    &operand_data[1813],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:725 */
  {
    "one_cmplv8hi2_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv8hi2_neon },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:725 */
  {
    "one_cmplv2si2_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv2si2_neon },
    &operand_data[1819],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:725 */
  {
    "one_cmplv4si2_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv4si2_neon },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:725 */
  {
    "one_cmplv4hf2_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv4hf2_neon },
    &operand_data[1825],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:725 */
  {
    "one_cmplv8hf2_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv8hf2_neon },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:725 */
  {
    "one_cmplv2sf2_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv2sf2_neon },
    &operand_data[1831],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:725 */
  {
    "one_cmplv4sf2_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv4sf2_neon },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:725 */
  {
    "one_cmplv2di2_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv2di2_neon },
    &operand_data[1837],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:733 */
  {
    "neon_absv8qi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.s8\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_absv8qi2 },
    &operand_data[1807],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:733 */
  {
    "neon_absv16qi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.s8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_absv16qi2 },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:733 */
  {
    "neon_absv4hi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.s16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_absv4hi2 },
    &operand_data[1813],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:733 */
  {
    "neon_absv8hi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.s16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_absv8hi2 },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:733 */
  {
    "neon_absv2si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.s32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_absv2si2 },
    &operand_data[1819],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:733 */
  {
    "neon_absv4si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.s32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_absv4si2 },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:733 */
  {
    "neon_absv2sf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_absv2sf2 },
    &operand_data[1831],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:733 */
  {
    "neon_absv4sf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_absv4sf2 },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:744 */
  {
    "neon_negv8qi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.s8\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_negv8qi2 },
    &operand_data[1807],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:744 */
  {
    "neon_negv16qi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.s8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_negv16qi2 },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:744 */
  {
    "neon_negv4hi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.s16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_negv4hi2 },
    &operand_data[1813],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:744 */
  {
    "neon_negv8hi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.s16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_negv8hi2 },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:744 */
  {
    "neon_negv2si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.s32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_negv2si2 },
    &operand_data[1819],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:744 */
  {
    "neon_negv4si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.s32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_negv4si2 },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:744 */
  {
    "neon_negv2sf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_negv2sf2 },
    &operand_data[1831],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:744 */
  {
    "neon_negv4sf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_negv4sf2 },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:755 */
  {
    "neon_absv8hf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_absv8hf2 },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:755 */
  {
    "neon_negv8hf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_negv8hf2 },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:755 */
  {
    "neon_absv4hf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_absv4hf2 },
    &operand_data[1825],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:755 */
  {
    "neon_negv4hf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_negv4hf2 },
    &operand_data[1825],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:773 */
  {
    "neon_vrndv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintz.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndv8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:773 */
  {
    "neon_vrndav8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrinta.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndav8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:773 */
  {
    "neon_vrndmv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintm.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndmv8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:773 */
  {
    "neon_vrndnv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintn.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndnv8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:773 */
  {
    "neon_vrndpv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintp.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndpv8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:773 */
  {
    "neon_vrndxv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintx.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndxv8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:773 */
  {
    "neon_vrndv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintz.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndv4hf },
    &operand_data[1825],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:773 */
  {
    "neon_vrndav4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrinta.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndav4hf },
    &operand_data[1825],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:773 */
  {
    "neon_vrndmv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintm.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndmv4hf },
    &operand_data[1825],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:773 */
  {
    "neon_vrndnv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintn.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndnv4hf },
    &operand_data[1825],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:773 */
  {
    "neon_vrndpv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintp.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndpv4hf },
    &operand_data[1825],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:773 */
  {
    "neon_vrndxv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintx.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrndxv4hf },
    &operand_data[1825],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:783 */
  {
    "neon_vrsqrtev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrsqrte.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsqrtev8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:783 */
  {
    "neon_vrsqrtev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrsqrte.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsqrtev4hf },
    &operand_data[1825],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:793 */
  {
    "*uminv8qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.u8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:793 */
  {
    "*uminv16qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.u8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:793 */
  {
    "*uminv4hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.u16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:793 */
  {
    "*uminv8hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.u16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:793 */
  {
    "*uminv2si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.u32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:793 */
  {
    "*uminv4si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.u32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:802 */
  {
    "*umaxv8qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.u8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:802 */
  {
    "*umaxv16qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.u8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:802 */
  {
    "*umaxv4hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.u16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:802 */
  {
    "*umaxv8hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.u16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:802 */
  {
    "*umaxv2si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.u32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:802 */
  {
    "*umaxv4si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.u32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:811 */
  {
    "*sminv8qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.s8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:811 */
  {
    "*sminv16qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.s8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:811 */
  {
    "*sminv4hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.s16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:811 */
  {
    "*sminv8hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.s16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:811 */
  {
    "*sminv2si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.s32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:811 */
  {
    "*sminv4si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.s32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:811 */
  {
    "*sminv2sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:811 */
  {
    "*sminv4sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:823 */
  {
    "*smaxv8qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.s8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:823 */
  {
    "*smaxv16qi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.s8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:823 */
  {
    "*smaxv4hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.s16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:823 */
  {
    "*smaxv8hi3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.s16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:823 */
  {
    "*smaxv2si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.s32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:823 */
  {
    "*smaxv4si3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.s32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:823 */
  {
    "*smaxv2sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:823 */
  {
    "*smaxv4sf3_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:839 */
  {
    "vashrv8qi3_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1344 },
#else
    { 0, 0, output_1344 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashrv8qi3_imm },
    &operand_data[1966],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:839 */
  {
    "vashrv16qi3_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1345 },
#else
    { 0, 0, output_1345 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashrv16qi3_imm },
    &operand_data[1969],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:839 */
  {
    "vashrv4hi3_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1346 },
#else
    { 0, 0, output_1346 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashrv4hi3_imm },
    &operand_data[1972],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:839 */
  {
    "vashrv8hi3_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1347 },
#else
    { 0, 0, output_1347 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashrv8hi3_imm },
    &operand_data[1975],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:839 */
  {
    "vashrv2si3_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1348 },
#else
    { 0, 0, output_1348 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashrv2si3_imm },
    &operand_data[1978],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:839 */
  {
    "vashrv4si3_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1349 },
#else
    { 0, 0, output_1349 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashrv4si3_imm },
    &operand_data[1981],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:852 */
  {
    "vlshrv8qi3_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1350 },
#else
    { 0, 0, output_1350 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vlshrv8qi3_imm },
    &operand_data[1966],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:852 */
  {
    "vlshrv16qi3_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1351 },
#else
    { 0, 0, output_1351 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vlshrv16qi3_imm },
    &operand_data[1969],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:852 */
  {
    "vlshrv4hi3_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1352 },
#else
    { 0, 0, output_1352 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vlshrv4hi3_imm },
    &operand_data[1972],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:852 */
  {
    "vlshrv8hi3_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1353 },
#else
    { 0, 0, output_1353 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vlshrv8hi3_imm },
    &operand_data[1975],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:852 */
  {
    "vlshrv2si3_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1354 },
#else
    { 0, 0, output_1354 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vlshrv2si3_imm },
    &operand_data[1978],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:852 */
  {
    "vlshrv4si3_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1355 },
#else
    { 0, 0, output_1355 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vlshrv4si3_imm },
    &operand_data[1981],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:870 */
  {
    "ashlv8qi3_signed",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv8qi3_signed },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:870 */
  {
    "ashlv16qi3_signed",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv16qi3_signed },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:870 */
  {
    "ashlv4hi3_signed",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv4hi3_signed },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:870 */
  {
    "ashlv8hi3_signed",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv8hi3_signed },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:870 */
  {
    "ashlv2si3_signed",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv2si3_signed },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:870 */
  {
    "ashlv4si3_signed",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv4si3_signed },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:870 */
  {
    "ashlv2di3_signed",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv2di3_signed },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:883 */
  {
    "ashlv8qi3_unsigned",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv8qi3_unsigned },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:883 */
  {
    "ashlv16qi3_unsigned",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv16qi3_unsigned },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:883 */
  {
    "ashlv4hi3_unsigned",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv4hi3_unsigned },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:883 */
  {
    "ashlv8hi3_unsigned",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv8hi3_unsigned },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:883 */
  {
    "ashlv2si3_unsigned",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv2si3_unsigned },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:883 */
  {
    "ashlv4si3_unsigned",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv4si3_unsigned },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:883 */
  {
    "ashlv2di3_unsigned",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlv2di3_unsigned },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:900 */
  {
    "neon_load_count",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_1370 },
#else
    { 0, output_1370, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_load_count },
    &operand_data[1984],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:942 */
  {
    "vec_sel_widen_ssum_lov16qiv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1371 },
#else
    { 0, 0, output_1371 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_sel_widen_ssum_lov16qiv8qi3 },
    &operand_data[1986],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:942 */
  {
    "vec_sel_widen_ssum_lov8hiv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1372 },
#else
    { 0, 0, output_1372 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_sel_widen_ssum_lov8hiv4hi3 },
    &operand_data[1990],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:942 */
  {
    "vec_sel_widen_ssum_lov4siv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1373 },
#else
    { 0, 0, output_1373 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_sel_widen_ssum_lov4siv2si3 },
    &operand_data[1994],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:957 */
  {
    "vec_sel_widen_ssum_hiv16qiv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1374 },
#else
    { 0, 0, output_1374 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_sel_widen_ssum_hiv16qiv8qi3 },
    &operand_data[1998],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:957 */
  {
    "vec_sel_widen_ssum_hiv8hiv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1375 },
#else
    { 0, 0, output_1375 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_sel_widen_ssum_hiv8hiv4hi3 },
    &operand_data[2002],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:957 */
  {
    "vec_sel_widen_ssum_hiv4siv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1376 },
#else
    { 0, 0, output_1376 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_sel_widen_ssum_hiv4siv2si3 },
    &operand_data[2006],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:972 */
  {
    "widen_ssumv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddw.s8\t%q0, %q2, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_widen_ssumv8qi3 },
    &operand_data[2010],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:972 */
  {
    "widen_ssumv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddw.s16\t%q0, %q2, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_widen_ssumv4hi3 },
    &operand_data[2013],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:972 */
  {
    "widen_ssumv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddw.s32\t%q0, %q2, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_widen_ssumv2si3 },
    &operand_data[2016],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1012 */
  {
    "vec_sel_widen_usum_lov16qiv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1380 },
#else
    { 0, 0, output_1380 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_sel_widen_usum_lov16qiv8qi3 },
    &operand_data[1986],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1012 */
  {
    "vec_sel_widen_usum_lov8hiv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1381 },
#else
    { 0, 0, output_1381 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_sel_widen_usum_lov8hiv4hi3 },
    &operand_data[1990],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1012 */
  {
    "vec_sel_widen_usum_lov4siv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1382 },
#else
    { 0, 0, output_1382 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_sel_widen_usum_lov4siv2si3 },
    &operand_data[1994],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1027 */
  {
    "vec_sel_widen_usum_hiv16qiv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1383 },
#else
    { 0, 0, output_1383 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_sel_widen_usum_hiv16qiv8qi3 },
    &operand_data[1998],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1027 */
  {
    "vec_sel_widen_usum_hiv8hiv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1384 },
#else
    { 0, 0, output_1384 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_sel_widen_usum_hiv8hiv4hi3 },
    &operand_data[2002],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1027 */
  {
    "vec_sel_widen_usum_hiv4siv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1385 },
#else
    { 0, 0, output_1385 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_sel_widen_usum_hiv4siv2si3 },
    &operand_data[2006],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1042 */
  {
    "widen_usumv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddw.u8\t%q0, %q2, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_widen_usumv8qi3 },
    &operand_data[2010],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1042 */
  {
    "widen_usumv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddw.u16\t%q0, %q2, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_widen_usumv4hi3 },
    &operand_data[2013],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1042 */
  {
    "widen_usumv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddw.u32\t%q0, %q2, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_widen_usumv2si3 },
    &operand_data[2016],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1058 */
  {
    "quad_halves_plusv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i32\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_plusv4si },
    &operand_data[2019],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1058 */
  {
    "quad_halves_sminv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.s32\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_sminv4si },
    &operand_data[2019],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1058 */
  {
    "quad_halves_smaxv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.s32\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_smaxv4si },
    &operand_data[2019],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1058 */
  {
    "quad_halves_uminv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.u32\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_uminv4si },
    &operand_data[2019],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1058 */
  {
    "quad_halves_umaxv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.u32\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_umaxv4si },
    &operand_data[2019],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1071 */
  {
    "quad_halves_plusv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.f32\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_plusv4sf },
    &operand_data[2021],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1071 */
  {
    "quad_halves_sminv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.f32\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_sminv4sf },
    &operand_data[2021],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1071 */
  {
    "quad_halves_smaxv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.f32\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_smaxv4sf },
    &operand_data[2021],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1084 */
  {
    "quad_halves_plusv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i16\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_plusv8hi },
    &operand_data[2023],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1084 */
  {
    "quad_halves_sminv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.s16\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_sminv8hi },
    &operand_data[2023],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1084 */
  {
    "quad_halves_smaxv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.s16\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_smaxv8hi },
    &operand_data[2023],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1084 */
  {
    "quad_halves_uminv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.u16\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_uminv8hi },
    &operand_data[2023],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1084 */
  {
    "quad_halves_umaxv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.u16\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_umaxv8hi },
    &operand_data[2023],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1099 */
  {
    "quad_halves_plusv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i8\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_plusv16qi },
    &operand_data[2025],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1099 */
  {
    "quad_halves_sminv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.s8\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_sminv16qi },
    &operand_data[2025],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1099 */
  {
    "quad_halves_smaxv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.s8\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_smaxv16qi },
    &operand_data[2025],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1099 */
  {
    "quad_halves_uminv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.u8\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_uminv16qi },
    &operand_data[2025],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1099 */
  {
    "quad_halves_umaxv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.u8\t%P0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_quad_halves_umaxv16qi },
    &operand_data[2025],
    2,
    2,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1168 */
  {
    "arm_reduc_plus_internal_v2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i64\t%e0, %e1, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_reduc_plus_internal_v2di },
    &operand_data[1837],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1282 */
  {
    "neon_vpadd_internalv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadd.i8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadd_internalv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1282 */
  {
    "neon_vpadd_internalv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadd.i16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadd_internalv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1282 */
  {
    "neon_vpadd_internalv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadd.i32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadd_internalv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1282 */
  {
    "neon_vpadd_internalv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadd.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadd_internalv2sf },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1296 */
  {
    "neon_vpaddv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadd.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddv4hf },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1307 */
  {
    "neon_vpsminv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.s8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpsminv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1307 */
  {
    "neon_vpsminv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.s16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpsminv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1307 */
  {
    "neon_vpsminv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.s32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpsminv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1307 */
  {
    "neon_vpsminv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpsminv2sf },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1320 */
  {
    "neon_vpsmaxv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.s8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpsmaxv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1320 */
  {
    "neon_vpsmaxv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.s16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpsmaxv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1320 */
  {
    "neon_vpsmaxv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.s32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpsmaxv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1320 */
  {
    "neon_vpsmaxv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpsmaxv2sf },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1333 */
  {
    "neon_vpuminv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.u8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpuminv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1333 */
  {
    "neon_vpuminv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.u16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpuminv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1333 */
  {
    "neon_vpuminv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.u32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpuminv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1343 */
  {
    "neon_vpumaxv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.u8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpumaxv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1343 */
  {
    "neon_vpumaxv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.u16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpumaxv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1343 */
  {
    "neon_vpumaxv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.u32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpumaxv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1361 */
  {
    "*ss_addv8qi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1361 */
  {
    "*ss_addv4hi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1361 */
  {
    "*ss_addv2si_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1361 */
  {
    "*ss_addv2sf_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1370 */
  {
    "*us_addv8qi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1370 */
  {
    "*us_addv4hi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1370 */
  {
    "*us_addv2si_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1370 */
  {
    "*us_addv2sf_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1379 */
  {
    "*ss_subv8qi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1379 */
  {
    "*ss_subv4hi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1379 */
  {
    "*ss_subv2si_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1379 */
  {
    "*ss_subv2sf_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1388 */
  {
    "*us_subv8qi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1388 */
  {
    "*us_subv4hi_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1388 */
  {
    "*us_subv2si_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1388 */
  {
    "*us_subv2sf_neon",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1486 */
  {
    "neon_vaddv2sf_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddv2sf_unspec },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1486 */
  {
    "neon_vaddv4sf_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddv4sf_unspec },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1499 */
  {
    "neon_vaddlsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddl.s%#8\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddlsv8qi },
    &operand_data[2027],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1499 */
  {
    "neon_vaddluv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddl.u%#8\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddluv8qi },
    &operand_data[2027],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1499 */
  {
    "neon_vaddlsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddl.s%#16\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddlsv4hi },
    &operand_data[2030],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1499 */
  {
    "neon_vaddluv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddl.u%#16\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddluv4hi },
    &operand_data[2030],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1499 */
  {
    "neon_vaddlsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddl.s%#32\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddlsv2si },
    &operand_data[2033],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1499 */
  {
    "neon_vaddluv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddl.u%#32\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddluv2si },
    &operand_data[2033],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1509 */
  {
    "neon_vaddwsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddw.s%#8\t%q0, %q1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddwsv8qi },
    &operand_data[2036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1509 */
  {
    "neon_vaddwuv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddw.u%#8\t%q0, %q1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddwuv8qi },
    &operand_data[2036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1509 */
  {
    "neon_vaddwsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddw.s%#16\t%q0, %q1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddwsv4hi },
    &operand_data[2039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1509 */
  {
    "neon_vaddwuv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddw.u%#16\t%q0, %q1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddwuv4hi },
    &operand_data[2039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1509 */
  {
    "neon_vaddwsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddw.s%#32\t%q0, %q1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddwsv2si },
    &operand_data[2042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1509 */
  {
    "neon_vaddwuv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddw.u%#32\t%q0, %q1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddwuv2si },
    &operand_data[2042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vrhaddsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.s%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrhaddsv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vrhadduv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrhadduv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vhaddsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.s%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhaddsv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vhadduv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhadduv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vrhaddsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrhaddsv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vrhadduv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrhadduv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vhaddsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhaddsv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vhadduv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhadduv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vrhaddsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.s%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrhaddsv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vrhadduv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrhadduv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vhaddsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.s%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhaddsv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vhadduv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhadduv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vrhaddsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrhaddsv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vrhadduv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrhadduv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vhaddsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhaddsv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vhadduv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhadduv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vrhaddsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.s%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrhaddsv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vrhadduv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrhadduv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vhaddsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.s%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhaddsv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vhadduv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhadduv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vrhaddsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrhaddsv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vrhadduv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrhadduv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vhaddsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhaddsv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1521 */
  {
    "neon_vhadduv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhadduv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqaddsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqaddsv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqadduv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqadduv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqaddsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqaddsv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqadduv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqadduv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqaddsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqaddsv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqadduv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqadduv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqaddsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqaddsv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqadduv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqadduv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqaddsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqaddsv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqadduv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqadduv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqaddsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqaddsv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqadduv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqadduv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqaddsdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s%#64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqaddsdi },
    &operand_data[2045],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqaddudi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u%#64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqaddudi },
    &operand_data[2045],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqaddsv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s%#64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqaddsv2di },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1531 */
  {
    "neon_vqadduv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u%#64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqadduv2di },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1541 */
  {
    "neon_vaddhnv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddhn.i16\t%P0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddhnv8hi },
    &operand_data[2048],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1541 */
  {
    "neon_vraddhnv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vraddhn.i16\t%P0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vraddhnv8hi },
    &operand_data[2048],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1541 */
  {
    "neon_vaddhnv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddhn.i32\t%P0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddhnv4si },
    &operand_data[2051],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1541 */
  {
    "neon_vraddhnv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vraddhn.i32\t%P0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vraddhnv4si },
    &operand_data[2051],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1541 */
  {
    "neon_vaddhnv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddhn.i64\t%P0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddhnv2di },
    &operand_data[2054],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1541 */
  {
    "neon_vraddhnv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vraddhn.i64\t%P0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vraddhnv2di },
    &operand_data[2054],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1552 */
  {
    "neon_vmulpv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.p%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmulpv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1552 */
  {
    "neon_vmulpv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.p%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmulpv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1552 */
  {
    "neon_vmulfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.f%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmulfv2sf },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1552 */
  {
    "neon_vmulfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.f%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmulfv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1565 */
  {
    "neon_vmulfv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmulfv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1565 */
  {
    "neon_vmulfv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmulfv4hf },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1662 */
  {
    "vfmal_lowv2sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfmal.f16\t%P0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmal_lowv2sf_intrinsic },
    &operand_data[2057],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1662 */
  {
    "vfmal_lowv4sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfmal.f16\t%q0, %e2, %e3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmal_lowv4sf_intrinsic },
    &operand_data[2063],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1679 */
  {
    "vfmsl_highv2sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfmsl.f16\t%P0, %p2, %p3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmsl_highv2sf_intrinsic },
    &operand_data[2069],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1679 */
  {
    "vfmsl_highv4sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfmsl.f16\t%q0, %f2, %f3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmsl_highv4sf_intrinsic },
    &operand_data[2075],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1697 */
  {
    "vfmal_highv2sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfmal.f16\t%P0, %p2, %p3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmal_highv2sf_intrinsic },
    &operand_data[2069],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1697 */
  {
    "vfmal_highv4sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfmal.f16\t%q0, %f2, %f3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmal_highv4sf_intrinsic },
    &operand_data[2075],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1714 */
  {
    "vfmsl_lowv2sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfmsl.f16\t%P0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmsl_lowv2sf_intrinsic },
    &operand_data[2057],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1714 */
  {
    "vfmsl_lowv4sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfmsl.f16\t%q0, %e2, %e3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmsl_lowv4sf_intrinsic },
    &operand_data[2063],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1751 */
  {
    "vfmal_lane_lowv2sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1517 },
#else
    { 0, 0, output_1517 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmal_lane_lowv2sf_intrinsic },
    &operand_data[2081],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1751 */
  {
    "vfmal_lane_lowv4sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1518 },
#else
    { 0, 0, output_1518 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmal_lane_lowv4sf_intrinsic },
    &operand_data[2087],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1807 */
  {
    "vfmal_lane_lowv8hfv2sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1519 },
#else
    { 0, 0, output_1519 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmal_lane_lowv8hfv2sf_intrinsic },
    &operand_data[2093],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1807 */
  {
    "vfmal_lane_lowv4hfv4sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1520 },
#else
    { 0, 0, output_1520 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmal_lane_lowv4hfv4sf_intrinsic },
    &operand_data[2099],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1844 */
  {
    "vfmal_lane_highv8hfv2sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1521 },
#else
    { 0, 0, output_1521 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmal_lane_highv8hfv2sf_intrinsic },
    &operand_data[2105],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1844 */
  {
    "vfmal_lane_highv4hfv4sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1522 },
#else
    { 0, 0, output_1522 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmal_lane_highv4hfv4sf_intrinsic },
    &operand_data[2111],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1873 */
  {
    "vfmal_lane_highv2sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1523 },
#else
    { 0, 0, output_1523 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmal_lane_highv2sf_intrinsic },
    &operand_data[2117],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1873 */
  {
    "vfmal_lane_highv4sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1524 },
#else
    { 0, 0, output_1524 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmal_lane_highv4sf_intrinsic },
    &operand_data[2123],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1903 */
  {
    "vfmsl_lane_lowv2sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1525 },
#else
    { 0, 0, output_1525 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmsl_lane_lowv2sf_intrinsic },
    &operand_data[2081],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1903 */
  {
    "vfmsl_lane_lowv4sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1526 },
#else
    { 0, 0, output_1526 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmsl_lane_lowv4sf_intrinsic },
    &operand_data[2087],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1941 */
  {
    "vfmsl_lane_lowv8hfv2sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1527 },
#else
    { 0, 0, output_1527 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmsl_lane_lowv8hfv2sf_intrinsic },
    &operand_data[2093],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1941 */
  {
    "vfmsl_lane_lowv4hfv4sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1528 },
#else
    { 0, 0, output_1528 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmsl_lane_lowv4hfv4sf_intrinsic },
    &operand_data[2099],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1979 */
  {
    "vfmsl_lane_highv8hfv2sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1529 },
#else
    { 0, 0, output_1529 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmsl_lane_highv8hfv2sf_intrinsic },
    &operand_data[2105],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1979 */
  {
    "vfmsl_lane_highv4hfv4sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1530 },
#else
    { 0, 0, output_1530 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmsl_lane_highv4hfv4sf_intrinsic },
    &operand_data[2111],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2009 */
  {
    "vfmsl_lane_highv2sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1531 },
#else
    { 0, 0, output_1531 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmsl_lane_highv2sf_intrinsic },
    &operand_data[2117],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2009 */
  {
    "vfmsl_lane_highv4sf_intrinsic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1532 },
#else
    { 0, 0, output_1532 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vfmsl_lane_highv4sf_intrinsic },
    &operand_data[2123],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2042 */
  {
    "neon_vmlav8qi_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.i8\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav8qi_unspec },
    &operand_data[1840],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2042 */
  {
    "neon_vmlav16qi_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.i8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav16qi_unspec },
    &operand_data[1844],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2042 */
  {
    "neon_vmlav4hi_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.i16\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav4hi_unspec },
    &operand_data[1848],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2042 */
  {
    "neon_vmlav8hi_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.i16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav8hi_unspec },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2042 */
  {
    "neon_vmlav2si_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.i32\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav2si_unspec },
    &operand_data[1856],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2042 */
  {
    "neon_vmlav4si_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.i32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav4si_unspec },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2042 */
  {
    "neon_vmlav2sf_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.f32\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav2sf_unspec },
    &operand_data[1864],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2042 */
  {
    "neon_vmlav4sf_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.f32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav4sf_unspec },
    &operand_data[1868],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2056 */
  {
    "neon_vmlalsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlal.s%#8\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlalsv8qi },
    &operand_data[2129],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2056 */
  {
    "neon_vmlaluv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlal.u%#8\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlaluv8qi },
    &operand_data[2129],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2056 */
  {
    "neon_vmlalsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlal.s%#16\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlalsv4hi },
    &operand_data[2133],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2056 */
  {
    "neon_vmlaluv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlal.u%#16\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlaluv4hi },
    &operand_data[2133],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2056 */
  {
    "neon_vmlalsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlal.s%#32\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlalsv2si },
    &operand_data[2137],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2056 */
  {
    "neon_vmlaluv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlal.u%#32\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlaluv2si },
    &operand_data[2137],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2085 */
  {
    "neon_vmlsv8qi_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.i8\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv8qi_unspec },
    &operand_data[1840],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2085 */
  {
    "neon_vmlsv16qi_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.i8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv16qi_unspec },
    &operand_data[1844],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2085 */
  {
    "neon_vmlsv4hi_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.i16\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv4hi_unspec },
    &operand_data[1848],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2085 */
  {
    "neon_vmlsv8hi_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.i16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv8hi_unspec },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2085 */
  {
    "neon_vmlsv2si_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.i32\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv2si_unspec },
    &operand_data[1856],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2085 */
  {
    "neon_vmlsv4si_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.i32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv4si_unspec },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2085 */
  {
    "neon_vmlsv2sf_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.f32\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv2sf_unspec },
    &operand_data[1864],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2085 */
  {
    "neon_vmlsv4sf_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls.f32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv4sf_unspec },
    &operand_data[1868],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2099 */
  {
    "neon_vmlslsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsl.s%#8\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlslsv8qi },
    &operand_data[2129],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2099 */
  {
    "neon_vmlsluv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsl.u%#8\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsluv8qi },
    &operand_data[2129],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2099 */
  {
    "neon_vmlslsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsl.s%#16\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlslsv4hi },
    &operand_data[2133],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2099 */
  {
    "neon_vmlsluv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsl.u%#16\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsluv4hi },
    &operand_data[2133],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2099 */
  {
    "neon_vmlslsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsl.s%#32\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlslsv2si },
    &operand_data[2137],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2099 */
  {
    "neon_vmlsluv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsl.u%#32\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsluv2si },
    &operand_data[2137],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2111 */
  {
    "neon_vqdmulhv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmulh.s16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmulhv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2111 */
  {
    "neon_vqrdmulhv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmulh.s16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmulhv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2111 */
  {
    "neon_vqdmulhv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmulh.s32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmulhv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2111 */
  {
    "neon_vqrdmulhv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmulh.s32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmulhv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2111 */
  {
    "neon_vqdmulhv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmulh.s16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmulhv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2111 */
  {
    "neon_vqrdmulhv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmulh.s16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmulhv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2111 */
  {
    "neon_vqdmulhv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmulh.s32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmulhv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2111 */
  {
    "neon_vqrdmulhv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmulh.s32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmulhv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2122 */
  {
    "neon_vqrdmlahv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlah.s16\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlahv4hi },
    &operand_data[1848],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2122 */
  {
    "neon_vqrdmlshv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlsh.s16\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlshv4hi },
    &operand_data[1848],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2122 */
  {
    "neon_vqrdmlahv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlah.s32\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlahv2si },
    &operand_data[1856],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2122 */
  {
    "neon_vqrdmlshv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlsh.s32\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlshv2si },
    &operand_data[1856],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2122 */
  {
    "neon_vqrdmlahv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlah.s16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlahv8hi },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2122 */
  {
    "neon_vqrdmlshv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlsh.s16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlshv8hi },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2122 */
  {
    "neon_vqrdmlahv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlah.s32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlahv4si },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2122 */
  {
    "neon_vqrdmlshv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlsh.s32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlshv4si },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2133 */
  {
    "neon_vqdmlalv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlal.s16\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmlalv4hi },
    &operand_data[2133],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2133 */
  {
    "neon_vqdmlalv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlal.s32\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmlalv2si },
    &operand_data[2137],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2144 */
  {
    "neon_vqdmlslv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlsl.s16\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmlslv4hi },
    &operand_data[2133],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2144 */
  {
    "neon_vqdmlslv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlsl.s32\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmlslv2si },
    &operand_data[2137],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2155 */
  {
    "neon_vmullsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.s%#8\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmullsv8qi },
    &operand_data[2027],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2155 */
  {
    "neon_vmulluv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.u%#8\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmulluv8qi },
    &operand_data[2027],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2155 */
  {
    "neon_vmullpv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.p%#8\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmullpv8qi },
    &operand_data[2027],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2155 */
  {
    "neon_vmullsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.s%#16\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmullsv4hi },
    &operand_data[2030],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2155 */
  {
    "neon_vmulluv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.u%#16\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmulluv4hi },
    &operand_data[2030],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2155 */
  {
    "neon_vmullpv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.p%#16\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmullpv4hi },
    &operand_data[2030],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2155 */
  {
    "neon_vmullsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.s%#32\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmullsv2si },
    &operand_data[2033],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2155 */
  {
    "neon_vmulluv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.u%#32\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmulluv2si },
    &operand_data[2033],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2155 */
  {
    "neon_vmullpv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.p%#32\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmullpv2si },
    &operand_data[2033],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2165 */
  {
    "neon_vqdmullv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmull.s16\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmullv4hi },
    &operand_data[2030],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2165 */
  {
    "neon_vqdmullv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmull.s32\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmullv2si },
    &operand_data[2033],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2191 */
  {
    "neon_vsubv2sf_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubv2sf_unspec },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2191 */
  {
    "neon_vsubv4sf_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubv4sf_unspec },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2204 */
  {
    "neon_vsublsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsubl.s%#8\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsublsv8qi },
    &operand_data[2027],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2204 */
  {
    "neon_vsubluv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsubl.u%#8\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubluv8qi },
    &operand_data[2027],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2204 */
  {
    "neon_vsublsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsubl.s%#16\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsublsv4hi },
    &operand_data[2030],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2204 */
  {
    "neon_vsubluv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsubl.u%#16\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubluv4hi },
    &operand_data[2030],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2204 */
  {
    "neon_vsublsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsubl.s%#32\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsublsv2si },
    &operand_data[2033],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2204 */
  {
    "neon_vsubluv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsubl.u%#32\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubluv2si },
    &operand_data[2033],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2214 */
  {
    "neon_vsubwsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsubw.s%#8\t%q0, %q1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubwsv8qi },
    &operand_data[2036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2214 */
  {
    "neon_vsubwuv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsubw.u%#8\t%q0, %q1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubwuv8qi },
    &operand_data[2036],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2214 */
  {
    "neon_vsubwsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsubw.s%#16\t%q0, %q1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubwsv4hi },
    &operand_data[2039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2214 */
  {
    "neon_vsubwuv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsubw.u%#16\t%q0, %q1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubwuv4hi },
    &operand_data[2039],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2214 */
  {
    "neon_vsubwsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsubw.s%#32\t%q0, %q1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubwsv2si },
    &operand_data[2042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2214 */
  {
    "neon_vsubwuv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsubw.u%#32\t%q0, %q1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubwuv2si },
    &operand_data[2042],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubsv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubuv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubuv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubsv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubuv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubuv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubsv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubuv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubuv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubsv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubuv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubuv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubsv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubuv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubuv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubsv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubuv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubuv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubsdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s%#64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubsdi },
    &operand_data[2045],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubudi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u%#64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubudi },
    &operand_data[2045],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubsv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s%#64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubsv2di },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2224 */
  {
    "neon_vqsubuv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u%#64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqsubuv2di },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2234 */
  {
    "neon_vhsubsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.s%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhsubsv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2234 */
  {
    "neon_vhsubuv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhsubuv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2234 */
  {
    "neon_vhsubsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhsubsv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2234 */
  {
    "neon_vhsubuv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhsubuv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2234 */
  {
    "neon_vhsubsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.s%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhsubsv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2234 */
  {
    "neon_vhsubuv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhsubuv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2234 */
  {
    "neon_vhsubsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhsubsv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2234 */
  {
    "neon_vhsubuv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhsubuv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2234 */
  {
    "neon_vhsubsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.s%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhsubsv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2234 */
  {
    "neon_vhsubuv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhsubuv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2234 */
  {
    "neon_vhsubsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhsubsv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2234 */
  {
    "neon_vhsubuv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vhsubuv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2244 */
  {
    "neon_vsubhnv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsubhn.i16\t%P0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubhnv8hi },
    &operand_data[2048],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2244 */
  {
    "neon_vrsubhnv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrsubhn.i16\t%P0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsubhnv8hi },
    &operand_data[2048],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2244 */
  {
    "neon_vsubhnv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsubhn.i32\t%P0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubhnv4si },
    &operand_data[2051],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2244 */
  {
    "neon_vrsubhnv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrsubhn.i32\t%P0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsubhnv4si },
    &operand_data[2051],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2244 */
  {
    "neon_vsubhnv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsubhn.i64\t%P0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubhnv2di },
    &operand_data[2054],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2244 */
  {
    "neon_vrsubhnv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrsubhn.i64\t%P0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsubhnv2di },
    &operand_data[2054],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vceqv8qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1640 },
#else
    { 0, 0, output_1640 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv8qi_insn },
    &operand_data[2141],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgtv8qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1641 },
#else
    { 0, 0, output_1641 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv8qi_insn },
    &operand_data[2141],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgev8qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1642 },
#else
    { 0, 0, output_1642 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev8qi_insn },
    &operand_data[2141],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vclev8qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1643 },
#else
    { 0, 0, output_1643 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev8qi_insn },
    &operand_data[2141],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcltv8qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1644 },
#else
    { 0, 0, output_1644 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv8qi_insn },
    &operand_data[2141],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vceqv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1645 },
#else
    { 0, 0, output_1645 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv16qi_insn },
    &operand_data[2144],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgtv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1646 },
#else
    { 0, 0, output_1646 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv16qi_insn },
    &operand_data[2144],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgev16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1647 },
#else
    { 0, 0, output_1647 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev16qi_insn },
    &operand_data[2144],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vclev16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1648 },
#else
    { 0, 0, output_1648 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev16qi_insn },
    &operand_data[2144],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcltv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1649 },
#else
    { 0, 0, output_1649 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv16qi_insn },
    &operand_data[2144],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vceqv4hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1650 },
#else
    { 0, 0, output_1650 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv4hi_insn },
    &operand_data[2147],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgtv4hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1651 },
#else
    { 0, 0, output_1651 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv4hi_insn },
    &operand_data[2147],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgev4hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1652 },
#else
    { 0, 0, output_1652 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev4hi_insn },
    &operand_data[2147],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vclev4hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1653 },
#else
    { 0, 0, output_1653 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev4hi_insn },
    &operand_data[2147],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcltv4hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1654 },
#else
    { 0, 0, output_1654 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv4hi_insn },
    &operand_data[2147],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vceqv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1655 },
#else
    { 0, 0, output_1655 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv8hi_insn },
    &operand_data[2150],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgtv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1656 },
#else
    { 0, 0, output_1656 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv8hi_insn },
    &operand_data[2150],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgev8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1657 },
#else
    { 0, 0, output_1657 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev8hi_insn },
    &operand_data[2150],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vclev8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1658 },
#else
    { 0, 0, output_1658 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev8hi_insn },
    &operand_data[2150],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcltv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1659 },
#else
    { 0, 0, output_1659 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv8hi_insn },
    &operand_data[2150],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vceqv2si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1660 },
#else
    { 0, 0, output_1660 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv2si_insn },
    &operand_data[2153],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgtv2si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1661 },
#else
    { 0, 0, output_1661 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv2si_insn },
    &operand_data[2153],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgev2si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1662 },
#else
    { 0, 0, output_1662 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev2si_insn },
    &operand_data[2153],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vclev2si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1663 },
#else
    { 0, 0, output_1663 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev2si_insn },
    &operand_data[2153],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcltv2si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1664 },
#else
    { 0, 0, output_1664 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv2si_insn },
    &operand_data[2153],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vceqv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1665 },
#else
    { 0, 0, output_1665 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv4si_insn },
    &operand_data[2156],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgtv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1666 },
#else
    { 0, 0, output_1666 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv4si_insn },
    &operand_data[2156],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgev4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1667 },
#else
    { 0, 0, output_1667 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev4si_insn },
    &operand_data[2156],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vclev4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1668 },
#else
    { 0, 0, output_1668 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev4si_insn },
    &operand_data[2156],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcltv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1669 },
#else
    { 0, 0, output_1669 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv4si_insn },
    &operand_data[2156],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vceqv2sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1670 },
#else
    { 0, 0, output_1670 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv2sf_insn },
    &operand_data[2159],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgtv2sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1671 },
#else
    { 0, 0, output_1671 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv2sf_insn },
    &operand_data[2159],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgev2sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1672 },
#else
    { 0, 0, output_1672 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev2sf_insn },
    &operand_data[2159],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vclev2sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1673 },
#else
    { 0, 0, output_1673 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev2sf_insn },
    &operand_data[2159],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcltv2sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1674 },
#else
    { 0, 0, output_1674 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv2sf_insn },
    &operand_data[2159],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vceqv4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1675 },
#else
    { 0, 0, output_1675 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv4sf_insn },
    &operand_data[2162],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgtv4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1676 },
#else
    { 0, 0, output_1676 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv4sf_insn },
    &operand_data[2162],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcgev4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1677 },
#else
    { 0, 0, output_1677 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev4sf_insn },
    &operand_data[2162],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vclev4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1678 },
#else
    { 0, 0, output_1678 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev4sf_insn },
    &operand_data[2162],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2296 */
  {
    "neon_vcltv4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1679 },
#else
    { 0, 0, output_1679 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv4sf_insn },
    &operand_data[2162],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2321 */
  {
    "neon_vceqv2sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1680 },
#else
    { 0, 0, output_1680 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv2sf_insn_unspec },
    &operand_data[2159],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2321 */
  {
    "neon_vcgtv2sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1681 },
#else
    { 0, 0, output_1681 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv2sf_insn_unspec },
    &operand_data[2159],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2321 */
  {
    "neon_vcgev2sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1682 },
#else
    { 0, 0, output_1682 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev2sf_insn_unspec },
    &operand_data[2159],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2321 */
  {
    "neon_vcltv2sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1683 },
#else
    { 0, 0, output_1683 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv2sf_insn_unspec },
    &operand_data[2159],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2321 */
  {
    "neon_vclev2sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1684 },
#else
    { 0, 0, output_1684 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev2sf_insn_unspec },
    &operand_data[2159],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2321 */
  {
    "neon_vceqv4sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1685 },
#else
    { 0, 0, output_1685 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv4sf_insn_unspec },
    &operand_data[2162],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2321 */
  {
    "neon_vcgtv4sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1686 },
#else
    { 0, 0, output_1686 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv4sf_insn_unspec },
    &operand_data[2162],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2321 */
  {
    "neon_vcgev4sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1687 },
#else
    { 0, 0, output_1687 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev4sf_insn_unspec },
    &operand_data[2162],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2321 */
  {
    "neon_vcltv4sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1688 },
#else
    { 0, 0, output_1688 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv4sf_insn_unspec },
    &operand_data[2162],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2321 */
  {
    "neon_vclev4sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1689 },
#else
    { 0, 0, output_1689 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev4sf_insn_unspec },
    &operand_data[2162],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2362 */
  {
    "neon_vceqv8hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1690 },
#else
    { 0, 0, output_1690 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv8hf_fp16insn },
    &operand_data[2165],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2362 */
  {
    "neon_vcgtv8hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1691 },
#else
    { 0, 0, output_1691 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv8hf_fp16insn },
    &operand_data[2165],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2362 */
  {
    "neon_vcgev8hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1692 },
#else
    { 0, 0, output_1692 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev8hf_fp16insn },
    &operand_data[2165],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2362 */
  {
    "neon_vclev8hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1693 },
#else
    { 0, 0, output_1693 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev8hf_fp16insn },
    &operand_data[2165],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2362 */
  {
    "neon_vcltv8hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1694 },
#else
    { 0, 0, output_1694 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv8hf_fp16insn },
    &operand_data[2165],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2362 */
  {
    "neon_vceqv4hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1695 },
#else
    { 0, 0, output_1695 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv4hf_fp16insn },
    &operand_data[2168],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2362 */
  {
    "neon_vcgtv4hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1696 },
#else
    { 0, 0, output_1696 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv4hf_fp16insn },
    &operand_data[2168],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2362 */
  {
    "neon_vcgev4hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1697 },
#else
    { 0, 0, output_1697 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev4hf_fp16insn },
    &operand_data[2168],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2362 */
  {
    "neon_vclev4hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1698 },
#else
    { 0, 0, output_1698 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev4hf_fp16insn },
    &operand_data[2168],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2362 */
  {
    "neon_vcltv4hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1699 },
#else
    { 0, 0, output_1699 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv4hf_fp16insn },
    &operand_data[2168],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2387 */
  {
    "neon_vceqv8hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1700 },
#else
    { 0, 0, output_1700 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv8hf_fp16insn_unspec },
    &operand_data[2165],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2387 */
  {
    "neon_vcgtv8hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1701 },
#else
    { 0, 0, output_1701 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv8hf_fp16insn_unspec },
    &operand_data[2165],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2387 */
  {
    "neon_vcgev8hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1702 },
#else
    { 0, 0, output_1702 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev8hf_fp16insn_unspec },
    &operand_data[2165],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2387 */
  {
    "neon_vcltv8hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1703 },
#else
    { 0, 0, output_1703 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv8hf_fp16insn_unspec },
    &operand_data[2165],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2387 */
  {
    "neon_vclev8hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1704 },
#else
    { 0, 0, output_1704 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev8hf_fp16insn_unspec },
    &operand_data[2165],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2387 */
  {
    "neon_vceqv4hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1705 },
#else
    { 0, 0, output_1705 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv4hf_fp16insn_unspec },
    &operand_data[2168],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2387 */
  {
    "neon_vcgtv4hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1706 },
#else
    { 0, 0, output_1706 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv4hf_fp16insn_unspec },
    &operand_data[2168],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2387 */
  {
    "neon_vcgev4hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1707 },
#else
    { 0, 0, output_1707 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev4hf_fp16insn_unspec },
    &operand_data[2168],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2387 */
  {
    "neon_vcltv4hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1708 },
#else
    { 0, 0, output_1708 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv4hf_fp16insn_unspec },
    &operand_data[2168],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2387 */
  {
    "neon_vclev4hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1709 },
#else
    { 0, 0, output_1709 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev4hf_fp16insn_unspec },
    &operand_data[2168],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2406 */
  {
    "neon_vcgtuv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcgt.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtuv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2406 */
  {
    "neon_vcgeuv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcge.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgeuv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2406 */
  {
    "neon_vcgtuv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcgt.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtuv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2406 */
  {
    "neon_vcgeuv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcge.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgeuv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2406 */
  {
    "neon_vcgtuv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcgt.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtuv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2406 */
  {
    "neon_vcgeuv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcge.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgeuv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2406 */
  {
    "neon_vcgtuv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcgt.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtuv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2406 */
  {
    "neon_vcgeuv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcge.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgeuv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2406 */
  {
    "neon_vcgtuv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcgt.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtuv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2406 */
  {
    "neon_vcgeuv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcge.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgeuv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2406 */
  {
    "neon_vcgtuv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcgt.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtuv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2406 */
  {
    "neon_vcgeuv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcge.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgeuv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2436 */
  {
    "neon_vcagtv2sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacgt.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagtv2sf_insn },
    &operand_data[2171],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2436 */
  {
    "neon_vcagev2sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacge.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagev2sf_insn },
    &operand_data[2171],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2436 */
  {
    "neon_vcaltv2sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaclt.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcaltv2sf_insn },
    &operand_data[2171],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2436 */
  {
    "neon_vcalev2sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacle.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcalev2sf_insn },
    &operand_data[2171],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2436 */
  {
    "neon_vcagtv4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacgt.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagtv4sf_insn },
    &operand_data[2174],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2436 */
  {
    "neon_vcagev4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacge.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagev4sf_insn },
    &operand_data[2174],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2436 */
  {
    "neon_vcaltv4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaclt.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcaltv4sf_insn },
    &operand_data[2174],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2436 */
  {
    "neon_vcalev4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacle.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcalev4sf_insn },
    &operand_data[2174],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2447 */
  {
    "neon_vcagev2sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacge.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagev2sf_insn_unspec },
    &operand_data[2171],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2447 */
  {
    "neon_vcagtv2sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacgt.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagtv2sf_insn_unspec },
    &operand_data[2171],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2447 */
  {
    "neon_vcalev2sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacle.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcalev2sf_insn_unspec },
    &operand_data[2171],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2447 */
  {
    "neon_vcaltv2sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaclt.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcaltv2sf_insn_unspec },
    &operand_data[2171],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2447 */
  {
    "neon_vcagev4sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacge.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagev4sf_insn_unspec },
    &operand_data[2174],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2447 */
  {
    "neon_vcagtv4sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacgt.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagtv4sf_insn_unspec },
    &operand_data[2174],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2447 */
  {
    "neon_vcalev4sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacle.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcalev4sf_insn_unspec },
    &operand_data[2174],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2447 */
  {
    "neon_vcaltv4sf_insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaclt.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcaltv4sf_insn_unspec },
    &operand_data[2174],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2475 */
  {
    "neon_vcagtv8hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacgt.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagtv8hf_fp16insn },
    &operand_data[2177],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2475 */
  {
    "neon_vcagev8hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacge.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagev8hf_fp16insn },
    &operand_data[2177],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2475 */
  {
    "neon_vcaltv8hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaclt.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcaltv8hf_fp16insn },
    &operand_data[2177],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2475 */
  {
    "neon_vcalev8hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacle.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcalev8hf_fp16insn },
    &operand_data[2177],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2475 */
  {
    "neon_vcagtv4hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacgt.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagtv4hf_fp16insn },
    &operand_data[2180],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2475 */
  {
    "neon_vcagev4hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacge.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagev4hf_fp16insn },
    &operand_data[2180],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2475 */
  {
    "neon_vcaltv4hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaclt.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcaltv4hf_fp16insn },
    &operand_data[2180],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2475 */
  {
    "neon_vcalev4hf_fp16insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacle.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcalev4hf_fp16insn },
    &operand_data[2180],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2487 */
  {
    "neon_vcagev8hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacge.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagev8hf_fp16insn_unspec },
    &operand_data[2177],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2487 */
  {
    "neon_vcagtv8hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacgt.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagtv8hf_fp16insn_unspec },
    &operand_data[2177],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2487 */
  {
    "neon_vcalev8hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacle.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcalev8hf_fp16insn_unspec },
    &operand_data[2177],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2487 */
  {
    "neon_vcaltv8hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaclt.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcaltv8hf_fp16insn_unspec },
    &operand_data[2177],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2487 */
  {
    "neon_vcagev4hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacge.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagev4hf_fp16insn_unspec },
    &operand_data[2180],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2487 */
  {
    "neon_vcagtv4hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacgt.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagtv4hf_fp16insn_unspec },
    &operand_data[2180],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2487 */
  {
    "neon_vcalev4hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vacle.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcalev4hf_fp16insn_unspec },
    &operand_data[2180],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2487 */
  {
    "neon_vcaltv4hf_fp16insn_unspec",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaclt.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcaltv4hf_fp16insn_unspec },
    &operand_data[2180],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2511 */
  {
    "neon_vtst_combinev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtst.8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtst_combinev8qi },
    &operand_data[2183],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2511 */
  {
    "neon_vtst_combinev16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtst.8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtst_combinev16qi },
    &operand_data[2188],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2511 */
  {
    "neon_vtst_combinev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtst.16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtst_combinev4hi },
    &operand_data[2193],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2511 */
  {
    "neon_vtst_combinev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtst.16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtst_combinev8hi },
    &operand_data[2198],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2511 */
  {
    "neon_vtst_combinev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtst.32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtst_combinev2si },
    &operand_data[2203],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2511 */
  {
    "neon_vtst_combinev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtst.32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtst_combinev4si },
    &operand_data[2208],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2524 */
  {
    "neon_vabdsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.s%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdsv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2524 */
  {
    "neon_vabduv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabduv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2524 */
  {
    "neon_vabdsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdsv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2524 */
  {
    "neon_vabduv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabduv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2524 */
  {
    "neon_vabdsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.s%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdsv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2524 */
  {
    "neon_vabduv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabduv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2524 */
  {
    "neon_vabdsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdsv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2524 */
  {
    "neon_vabduv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabduv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2524 */
  {
    "neon_vabdsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.s%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdsv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2524 */
  {
    "neon_vabduv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabduv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2524 */
  {
    "neon_vabdsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdsv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2524 */
  {
    "neon_vabduv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabduv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2534 */
  {
    "neon_vabdv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2534 */
  {
    "neon_vabdv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdv4hf },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2544 */
  {
    "neon_vabdfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdfv2sf },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2544 */
  {
    "neon_vabdfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdfv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2554 */
  {
    "neon_vabdlsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabdl.s%#8\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdlsv8qi },
    &operand_data[2027],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2554 */
  {
    "neon_vabdluv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabdl.u%#8\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdluv8qi },
    &operand_data[2027],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2554 */
  {
    "neon_vabdlsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabdl.s%#16\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdlsv4hi },
    &operand_data[2030],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2554 */
  {
    "neon_vabdluv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabdl.u%#16\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdluv4hi },
    &operand_data[2030],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2554 */
  {
    "neon_vabdlsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabdl.s%#32\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdlsv2si },
    &operand_data[2033],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2554 */
  {
    "neon_vabdluv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabdl.u%#32\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdluv2si },
    &operand_data[2033],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2564 */
  {
    "neon_vabasv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaba.s%#8\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabasv8qi },
    &operand_data[1840],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2564 */
  {
    "neon_vabauv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaba.u%#8\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabauv8qi },
    &operand_data[1840],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2564 */
  {
    "neon_vabasv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaba.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabasv16qi },
    &operand_data[1844],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2564 */
  {
    "neon_vabauv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaba.u%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabauv16qi },
    &operand_data[1844],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2564 */
  {
    "neon_vabasv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaba.s%#16\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabasv4hi },
    &operand_data[1848],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2564 */
  {
    "neon_vabauv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaba.u%#16\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabauv4hi },
    &operand_data[1848],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2564 */
  {
    "neon_vabasv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaba.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabasv8hi },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2564 */
  {
    "neon_vabauv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaba.u%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabauv8hi },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2564 */
  {
    "neon_vabasv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaba.s%#32\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabasv2si },
    &operand_data[1856],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2564 */
  {
    "neon_vabauv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaba.u%#32\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabauv2si },
    &operand_data[1856],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2564 */
  {
    "neon_vabasv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaba.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabasv4si },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2564 */
  {
    "neon_vabauv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaba.u%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabauv4si },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2575 */
  {
    "neon_vabalsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabal.s%#8\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabalsv8qi },
    &operand_data[2129],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2575 */
  {
    "neon_vabaluv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabal.u%#8\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabaluv8qi },
    &operand_data[2129],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2575 */
  {
    "neon_vabalsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabal.s%#16\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabalsv4hi },
    &operand_data[2133],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2575 */
  {
    "neon_vabaluv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabal.u%#16\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabaluv4hi },
    &operand_data[2133],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2575 */
  {
    "neon_vabalsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabal.s%#32\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabalsv2si },
    &operand_data[2137],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2575 */
  {
    "neon_vabaluv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabal.u%#32\t%q0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabaluv2si },
    &operand_data[2137],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vmaxsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.s%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxsv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vmaxuv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxuv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vminsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.s%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminsv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vminuv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminuv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vmaxsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxsv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vmaxuv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxuv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vminsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminsv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vminuv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminuv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vmaxsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.s%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxsv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vmaxuv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxuv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vminsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.s%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminsv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vminuv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminuv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vmaxsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxsv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vmaxuv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxuv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vminsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminsv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vminuv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminuv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vmaxsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.s%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxsv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vmaxuv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxuv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vminsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.s%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminsv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vminuv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminuv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vmaxsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxsv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vmaxuv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxuv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vminsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminsv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2612 */
  {
    "neon_vminuv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminuv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2622 */
  {
    "neon_vmaxfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxfv2sf },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2622 */
  {
    "neon_vminfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminfv2sf },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2622 */
  {
    "neon_vmaxfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxfv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2622 */
  {
    "neon_vminfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminfv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2632 */
  {
    "neon_vmaxfv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxfv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2632 */
  {
    "neon_vminfv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminfv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2632 */
  {
    "neon_vmaxfv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxfv4hf },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2632 */
  {
    "neon_vminfv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminfv4hf },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2643 */
  {
    "neon_vpmaxfv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpmaxfv4hf },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2643 */
  {
    "neon_vpminfv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpminfv4hf },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2654 */
  {
    "neon_vmaxnmv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnm.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxnmv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2654 */
  {
    "neon_vminnmv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnm.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminnmv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2654 */
  {
    "neon_vmaxnmv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnm.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxnmv4hf },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2654 */
  {
    "neon_vminnmv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnm.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminnmv4hf },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2667 */
  {
    "neon_vmaxnmv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnm.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxnmv2sf },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2667 */
  {
    "neon_vminnmv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnm.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminnmv2sf },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2667 */
  {
    "neon_vmaxnmv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnm.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmaxnmv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2667 */
  {
    "neon_vminnmv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnm.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vminnmv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2678 */
  {
    "fmaxv2sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnm.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmaxv2sf3 },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2678 */
  {
    "fminv2sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnm.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fminv2sf3 },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2678 */
  {
    "fmaxv4sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnm.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fmaxv4sf3 },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2678 */
  {
    "fminv4sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnm.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fminv4sf3 },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2699 */
  {
    "neon_vpaddlsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpaddl.s%#8\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddlsv8qi },
    &operand_data[2213],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2699 */
  {
    "neon_vpaddluv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpaddl.u%#8\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddluv8qi },
    &operand_data[2213],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2699 */
  {
    "neon_vpaddlsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpaddl.s%#8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddlsv16qi },
    &operand_data[2215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2699 */
  {
    "neon_vpaddluv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpaddl.u%#8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddluv16qi },
    &operand_data[2215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2699 */
  {
    "neon_vpaddlsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpaddl.s%#16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddlsv4hi },
    &operand_data[2217],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2699 */
  {
    "neon_vpaddluv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpaddl.u%#16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddluv4hi },
    &operand_data[2217],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2699 */
  {
    "neon_vpaddlsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpaddl.s%#16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddlsv8hi },
    &operand_data[2219],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2699 */
  {
    "neon_vpaddluv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpaddl.u%#16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddluv8hi },
    &operand_data[2219],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2699 */
  {
    "neon_vpaddlsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpaddl.s%#32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddlsv2si },
    &operand_data[2221],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2699 */
  {
    "neon_vpaddluv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpaddl.u%#32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddluv2si },
    &operand_data[2221],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2699 */
  {
    "neon_vpaddlsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpaddl.s%#32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddlsv4si },
    &operand_data[2223],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2699 */
  {
    "neon_vpaddluv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpaddl.u%#32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddluv4si },
    &operand_data[2223],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2708 */
  {
    "neon_vpadalsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadal.s%#8\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadalsv8qi },
    &operand_data[2225],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2708 */
  {
    "neon_vpadaluv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadal.u%#8\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadaluv8qi },
    &operand_data[2225],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2708 */
  {
    "neon_vpadalsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadal.s%#8\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadalsv16qi },
    &operand_data[2228],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2708 */
  {
    "neon_vpadaluv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadal.u%#8\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadaluv16qi },
    &operand_data[2228],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2708 */
  {
    "neon_vpadalsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadal.s%#16\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadalsv4hi },
    &operand_data[2231],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2708 */
  {
    "neon_vpadaluv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadal.u%#16\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadaluv4hi },
    &operand_data[2231],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2708 */
  {
    "neon_vpadalsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadal.s%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadalsv8hi },
    &operand_data[2234],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2708 */
  {
    "neon_vpadaluv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadal.u%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadaluv8hi },
    &operand_data[2234],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2708 */
  {
    "neon_vpadalsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadal.s%#32\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadalsv2si },
    &operand_data[2237],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2708 */
  {
    "neon_vpadaluv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadal.u%#32\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadaluv2si },
    &operand_data[2237],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2708 */
  {
    "neon_vpadalsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadal.s%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadalsv4si },
    &operand_data[2240],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2708 */
  {
    "neon_vpadaluv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpadal.u%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpadaluv4si },
    &operand_data[2240],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2718 */
  {
    "neon_vpmaxsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.s%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpmaxsv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2718 */
  {
    "neon_vpmaxuv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpmaxuv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2718 */
  {
    "neon_vpminsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.s%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpminsv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2718 */
  {
    "neon_vpminuv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpminuv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2718 */
  {
    "neon_vpmaxsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.s%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpmaxsv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2718 */
  {
    "neon_vpmaxuv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpmaxuv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2718 */
  {
    "neon_vpminsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.s%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpminsv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2718 */
  {
    "neon_vpminuv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpminuv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2718 */
  {
    "neon_vpmaxsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.s%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpmaxsv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2718 */
  {
    "neon_vpmaxuv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpmaxuv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2718 */
  {
    "neon_vpminsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.s%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpminsv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2718 */
  {
    "neon_vpminuv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpminuv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2728 */
  {
    "neon_vpmaxfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpmaxfv2sf },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2728 */
  {
    "neon_vpminfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpminfv2sf },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2728 */
  {
    "neon_vpmaxfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmax.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpmaxfv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2728 */
  {
    "neon_vpminfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpmin.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpminfv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2738 */
  {
    "neon_vrecpsv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrecps.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrecpsv2sf },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2738 */
  {
    "neon_vrecpsv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrecps.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrecpsv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2748 */
  {
    "neon_vrecpsv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrecps.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrecpsv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2748 */
  {
    "neon_vrecpsv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrecps.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrecpsv4hf },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2759 */
  {
    "neon_vrsqrtsv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrsqrts.f32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsqrtsv2sf },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2759 */
  {
    "neon_vrsqrtsv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrsqrts.f32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsqrtsv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2769 */
  {
    "neon_vrsqrtsv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrsqrts.f16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsqrtsv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2769 */
  {
    "neon_vrsqrtsv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrsqrts.f16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsqrtsv4hf },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2789 */
  {
    "neon_vqabsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqabs.s8\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqabsv8qi },
    &operand_data[1807],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2789 */
  {
    "neon_vqabsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqabs.s8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqabsv16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2789 */
  {
    "neon_vqabsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqabs.s16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqabsv4hi },
    &operand_data[1813],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2789 */
  {
    "neon_vqabsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqabs.s16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqabsv8hi },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2789 */
  {
    "neon_vqabsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqabs.s32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqabsv2si },
    &operand_data[1819],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2789 */
  {
    "neon_vqabsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqabs.s32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqabsv4si },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2798 */
  {
    "neon_bswapv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev16.8\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_bswapv4hi },
    &operand_data[2243],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2798 */
  {
    "neon_bswapv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev16.8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_bswapv8hi },
    &operand_data[2245],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2798 */
  {
    "neon_bswapv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev32.8\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_bswapv2si },
    &operand_data[2247],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2798 */
  {
    "neon_bswapv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev32.8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_bswapv4si },
    &operand_data[2249],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2798 */
  {
    "neon_bswapv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_bswapv2di },
    &operand_data[2251],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2822 */
  {
    "neon_vcadd90v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.f16\t%P0, %P1, %P2, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcadd90v4hf },
    &operand_data[1892],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2822 */
  {
    "neon_vcadd270v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.f16\t%P0, %P1, %P2, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcadd270v4hf },
    &operand_data[1892],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2822 */
  {
    "neon_vcadd90v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.f16\t%q0, %q1, %q2, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcadd90v8hf },
    &operand_data[1888],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2822 */
  {
    "neon_vcadd270v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.f16\t%q0, %q1, %q2, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcadd270v8hf },
    &operand_data[1888],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2822 */
  {
    "neon_vcadd90v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.f32\t%P0, %P1, %P2, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcadd90v2sf },
    &operand_data[1880],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2822 */
  {
    "neon_vcadd270v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.f32\t%P0, %P1, %P2, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcadd270v2sf },
    &operand_data[1880],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2822 */
  {
    "neon_vcadd90v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.f32\t%q0, %q1, %q2, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcadd90v4sf },
    &operand_data[1884],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2822 */
  {
    "neon_vcadd270v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.f32\t%q0, %q1, %q2, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcadd270v4sf },
    &operand_data[1884],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla0v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f16\t%P0, %P2, %P3, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla0v4hf },
    &operand_data[2253],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla90v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f16\t%P0, %P2, %P3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla90v4hf },
    &operand_data[2253],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla180v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f16\t%P0, %P2, %P3, #180",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla180v4hf },
    &operand_data[2253],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla270v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f16\t%P0, %P2, %P3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla270v4hf },
    &operand_data[2253],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla0v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f16\t%q0, %q2, %q3, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla0v8hf },
    &operand_data[2257],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla90v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f16\t%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla90v8hf },
    &operand_data[2257],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla180v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f16\t%q0, %q2, %q3, #180",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla180v8hf },
    &operand_data[2257],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla270v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f16\t%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla270v8hf },
    &operand_data[2257],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla0v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f32\t%P0, %P2, %P3, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla0v2sf },
    &operand_data[2261],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla90v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f32\t%P0, %P2, %P3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla90v2sf },
    &operand_data[2261],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla180v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f32\t%P0, %P2, %P3, #180",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla180v2sf },
    &operand_data[2261],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla270v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f32\t%P0, %P2, %P3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla270v2sf },
    &operand_data[2261],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla0v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f32\t%q0, %q2, %q3, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla0v4sf },
    &operand_data[2265],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla90v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f32\t%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla90v4sf },
    &operand_data[2265],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla180v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f32\t%q0, %q2, %q3, #180",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla180v4sf },
    &operand_data[2265],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2832 */
  {
    "neon_vcmla270v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmla.f32\t%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla270v4sf },
    &operand_data[2265],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane0v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1929 },
#else
    { 0, 0, output_1929 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane0v4hf },
    &operand_data[2269],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane90v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1930 },
#else
    { 0, 0, output_1930 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane90v4hf },
    &operand_data[2269],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane180v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1931 },
#else
    { 0, 0, output_1931 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane180v4hf },
    &operand_data[2269],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane270v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1932 },
#else
    { 0, 0, output_1932 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane270v4hf },
    &operand_data[2269],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane0v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1933 },
#else
    { 0, 0, output_1933 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane0v8hf },
    &operand_data[2274],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane90v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1934 },
#else
    { 0, 0, output_1934 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane90v8hf },
    &operand_data[2274],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane180v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1935 },
#else
    { 0, 0, output_1935 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane180v8hf },
    &operand_data[2274],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane270v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1936 },
#else
    { 0, 0, output_1936 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane270v8hf },
    &operand_data[2274],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane0v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1937 },
#else
    { 0, 0, output_1937 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane0v2sf },
    &operand_data[2279],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane90v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1938 },
#else
    { 0, 0, output_1938 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane90v2sf },
    &operand_data[2279],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane180v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1939 },
#else
    { 0, 0, output_1939 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane180v2sf },
    &operand_data[2279],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane270v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1940 },
#else
    { 0, 0, output_1940 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane270v2sf },
    &operand_data[2279],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane0v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1941 },
#else
    { 0, 0, output_1941 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane0v4sf },
    &operand_data[2284],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane90v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1942 },
#else
    { 0, 0, output_1942 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane90v4sf },
    &operand_data[2284],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane180v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1943 },
#else
    { 0, 0, output_1943 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane180v4sf },
    &operand_data[2284],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2843 */
  {
    "neon_vcmla_lane270v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1944 },
#else
    { 0, 0, output_1944 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_lane270v4sf },
    &operand_data[2284],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2858 */
  {
    "neon_vcmla_laneq0v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1945 },
#else
    { 0, 0, output_1945 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_laneq0v2sf },
    &operand_data[2289],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2858 */
  {
    "neon_vcmla_laneq90v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1946 },
#else
    { 0, 0, output_1946 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_laneq90v2sf },
    &operand_data[2289],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2858 */
  {
    "neon_vcmla_laneq180v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1947 },
#else
    { 0, 0, output_1947 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_laneq180v2sf },
    &operand_data[2289],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2858 */
  {
    "neon_vcmla_laneq270v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1948 },
#else
    { 0, 0, output_1948 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_laneq270v2sf },
    &operand_data[2289],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2858 */
  {
    "neon_vcmla_laneq0v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1949 },
#else
    { 0, 0, output_1949 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_laneq0v4hf },
    &operand_data[2294],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2858 */
  {
    "neon_vcmla_laneq90v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1950 },
#else
    { 0, 0, output_1950 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_laneq90v4hf },
    &operand_data[2294],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2858 */
  {
    "neon_vcmla_laneq180v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1951 },
#else
    { 0, 0, output_1951 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_laneq180v4hf },
    &operand_data[2294],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2858 */
  {
    "neon_vcmla_laneq270v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1952 },
#else
    { 0, 0, output_1952 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmla_laneq270v4hf },
    &operand_data[2294],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2873 */
  {
    "neon_vcmlaq_lane0v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1953 },
#else
    { 0, 0, output_1953 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmlaq_lane0v8hf },
    &operand_data[2299],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2873 */
  {
    "neon_vcmlaq_lane90v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1954 },
#else
    { 0, 0, output_1954 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmlaq_lane90v8hf },
    &operand_data[2299],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2873 */
  {
    "neon_vcmlaq_lane180v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1955 },
#else
    { 0, 0, output_1955 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmlaq_lane180v8hf },
    &operand_data[2299],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2873 */
  {
    "neon_vcmlaq_lane270v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1956 },
#else
    { 0, 0, output_1956 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmlaq_lane270v8hf },
    &operand_data[2299],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2873 */
  {
    "neon_vcmlaq_lane0v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1957 },
#else
    { 0, 0, output_1957 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmlaq_lane0v4sf },
    &operand_data[2304],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2873 */
  {
    "neon_vcmlaq_lane90v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1958 },
#else
    { 0, 0, output_1958 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmlaq_lane90v4sf },
    &operand_data[2304],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2873 */
  {
    "neon_vcmlaq_lane180v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1959 },
#else
    { 0, 0, output_1959 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmlaq_lane180v4sf },
    &operand_data[2304],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2873 */
  {
    "neon_vcmlaq_lane270v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1960 },
#else
    { 0, 0, output_1960 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcmlaq_lane270v4sf },
    &operand_data[2304],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2928 */
  {
    "sdot_prodv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsdot.s8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sdot_prodv8qi },
    &operand_data[2309],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2928 */
  {
    "udot_prodv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vudot.u8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_udot_prodv8qi },
    &operand_data[2309],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2928 */
  {
    "sdot_prodv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsdot.s8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sdot_prodv16qi },
    &operand_data[2313],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2928 */
  {
    "udot_prodv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vudot.u8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_udot_prodv16qi },
    &operand_data[2313],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2952 */
  {
    "neon_usdotv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vusdot.s8\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_usdotv8qi },
    &operand_data[2317],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2952 */
  {
    "neon_usdotv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vusdot.s8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_usdotv16qi },
    &operand_data[2321],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2967 */
  {
    "neon_sdot_lanev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsdot.s8\t%P0, %P2, %P3[%c4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_sdot_lanev8qi },
    &operand_data[2325],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2967 */
  {
    "neon_udot_lanev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vudot.u8\t%P0, %P2, %P3[%c4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_udot_lanev8qi },
    &operand_data[2325],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2967 */
  {
    "neon_sdot_lanev16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsdot.s8\t%q0, %q2, %P3[%c4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_sdot_lanev16qi },
    &operand_data[2330],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2967 */
  {
    "neon_udot_lanev16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vudot.u8\t%q0, %q2, %P3[%c4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_udot_lanev16qi },
    &operand_data[2330],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2982 */
  {
    "neon_sdot_laneqv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1971 },
#else
    { 0, 0, output_1971 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_sdot_laneqv8qi },
    &operand_data[2335],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2982 */
  {
    "neon_udot_laneqv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1972 },
#else
    { 0, 0, output_1972 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_udot_laneqv8qi },
    &operand_data[2335],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2982 */
  {
    "neon_sdot_laneqv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1973 },
#else
    { 0, 0, output_1973 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_sdot_laneqv16qi },
    &operand_data[2340],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2982 */
  {
    "neon_udot_laneqv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1974 },
#else
    { 0, 0, output_1974 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_udot_laneqv16qi },
    &operand_data[2340],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3009 */
  {
    "neon_usdot_lanev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vusdot.s8\t%P0, %P2, %P3[%c4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_usdot_lanev8qi },
    &operand_data[2325],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3009 */
  {
    "neon_sudot_lanev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsudot.u8\t%P0, %P2, %P3[%c4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_sudot_lanev8qi },
    &operand_data[2325],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3009 */
  {
    "neon_usdot_lanev16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vusdot.s8\t%q0, %q2, %P3[%c4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_usdot_lanev16qi },
    &operand_data[2330],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3009 */
  {
    "neon_sudot_lanev16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsudot.u8\t%q0, %q2, %P3[%c4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_sudot_lanev16qi },
    &operand_data[2330],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3025 */
  {
    "neon_usdot_laneqv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1979 },
#else
    { 0, 0, output_1979 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_usdot_laneqv8qi },
    &operand_data[2335],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3025 */
  {
    "neon_sudot_laneqv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1980 },
#else
    { 0, 0, output_1980 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_sudot_laneqv8qi },
    &operand_data[2335],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3025 */
  {
    "neon_usdot_laneqv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1981 },
#else
    { 0, 0, output_1981 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_usdot_laneqv16qi },
    &operand_data[2340],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3025 */
  {
    "neon_sudot_laneqv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_1982 },
#else
    { 0, 0, output_1982 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_sudot_laneqv16qi },
    &operand_data[2340],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3084 */
  {
    "neon_vqnegv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqneg.s8\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqnegv8qi },
    &operand_data[1807],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3084 */
  {
    "neon_vqnegv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqneg.s8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqnegv16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3084 */
  {
    "neon_vqnegv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqneg.s16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqnegv4hi },
    &operand_data[1813],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3084 */
  {
    "neon_vqnegv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqneg.s16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqnegv8hi },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3084 */
  {
    "neon_vqnegv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqneg.s32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqnegv2si },
    &operand_data[1819],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3084 */
  {
    "neon_vqnegv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqneg.s32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqnegv4si },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3093 */
  {
    "neon_vclsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcls.s8\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclsv8qi },
    &operand_data[1807],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3093 */
  {
    "neon_vclsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcls.s8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclsv16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3093 */
  {
    "neon_vclsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcls.s16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclsv4hi },
    &operand_data[1813],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3093 */
  {
    "neon_vclsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcls.s16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclsv8hi },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3093 */
  {
    "neon_vclsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcls.s32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclsv2si },
    &operand_data[1819],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3093 */
  {
    "neon_vclsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcls.s32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclsv4si },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3102 */
  {
    "neon_vclzv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vclz.i8\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclzv8qi },
    &operand_data[1807],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3102 */
  {
    "neon_vclzv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vclz.i8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclzv16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3102 */
  {
    "neon_vclzv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vclz.i16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclzv4hi },
    &operand_data[1813],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3102 */
  {
    "neon_vclzv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vclz.i16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclzv8hi },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3102 */
  {
    "neon_vclzv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vclz.i32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclzv2si },
    &operand_data[1819],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3102 */
  {
    "neon_vclzv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vclz.i32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclzv4si },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3110 */
  {
    "popcountv8qi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcnt.8\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_popcountv8qi2 },
    &operand_data[1807],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3110 */
  {
    "popcountv16qi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcnt.8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_popcountv16qi2 },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3127 */
  {
    "neon_vrecpev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrecpe.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrecpev8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3127 */
  {
    "neon_vrecpev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrecpe.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrecpev4hf },
    &operand_data[1825],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3136 */
  {
    "neon_vrecpev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrecpe.u32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrecpev2si },
    &operand_data[1819],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3136 */
  {
    "neon_vrecpev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrecpe.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrecpev2sf },
    &operand_data[1831],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3136 */
  {
    "neon_vrecpev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrecpe.u32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrecpev4si },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3136 */
  {
    "neon_vrecpev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrecpe.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrecpev4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3145 */
  {
    "neon_vrsqrtev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrsqrte.u32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsqrtev2si },
    &operand_data[1819],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3145 */
  {
    "neon_vrsqrtev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrsqrte.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsqrtev2sf },
    &operand_data[1831],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3145 */
  {
    "neon_vrsqrtev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrsqrte.u32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsqrtev4si },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3145 */
  {
    "neon_vrsqrtev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrsqrte.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsqrtev4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3163 */
  {
    "neon_vget_lanev8qi_sext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2013 },
#else
    { 0, 0, output_2013 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev8qi_sext_internal },
    &operand_data[2345],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3163 */
  {
    "neon_vget_lanev4hi_sext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2014 },
#else
    { 0, 0, output_2014 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev4hi_sext_internal },
    &operand_data[2348],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3163 */
  {
    "neon_vget_lanev2si_sext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2015 },
#else
    { 0, 0, output_2015 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev2si_sext_internal },
    &operand_data[2351],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3163 */
  {
    "neon_vget_lanev2sf_sext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2016 },
#else
    { 0, 0, output_2016 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev2sf_sext_internal },
    &operand_data[2354],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3182 */
  {
    "neon_vget_lanev8qi_zext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2017 },
#else
    { 0, 0, output_2017 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev8qi_zext_internal },
    &operand_data[2345],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3182 */
  {
    "neon_vget_lanev4hi_zext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2018 },
#else
    { 0, 0, output_2018 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev4hi_zext_internal },
    &operand_data[2348],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3182 */
  {
    "neon_vget_lanev2si_zext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2019 },
#else
    { 0, 0, output_2019 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev2si_zext_internal },
    &operand_data[2351],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3182 */
  {
    "neon_vget_lanev2sf_zext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2020 },
#else
    { 0, 0, output_2020 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev2sf_zext_internal },
    &operand_data[2354],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3201 */
  {
    "neon_vget_lanev16qi_sext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2021 },
#else
    { 0, 0, output_2021 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev16qi_sext_internal },
    &operand_data[2357],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3201 */
  {
    "neon_vget_lanev8hi_sext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2022 },
#else
    { 0, 0, output_2022 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev8hi_sext_internal },
    &operand_data[2360],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3201 */
  {
    "neon_vget_lanev8hf_sext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2023 },
#else
    { 0, 0, output_2023 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev8hf_sext_internal },
    &operand_data[2363],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3201 */
  {
    "neon_vget_lanev4si_sext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2024 },
#else
    { 0, 0, output_2024 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev4si_sext_internal },
    &operand_data[2366],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3201 */
  {
    "neon_vget_lanev4sf_sext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2025 },
#else
    { 0, 0, output_2025 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev4sf_sext_internal },
    &operand_data[2369],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3228 */
  {
    "neon_vget_lanev16qi_zext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2026 },
#else
    { 0, 0, output_2026 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev16qi_zext_internal },
    &operand_data[2357],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3228 */
  {
    "neon_vget_lanev8hi_zext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2027 },
#else
    { 0, 0, output_2027 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev8hi_zext_internal },
    &operand_data[2360],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3228 */
  {
    "neon_vget_lanev8hf_zext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2028 },
#else
    { 0, 0, output_2028 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev8hf_zext_internal },
    &operand_data[2363],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3228 */
  {
    "neon_vget_lanev4si_zext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2029 },
#else
    { 0, 0, output_2029 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev4si_zext_internal },
    &operand_data[2366],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3228 */
  {
    "neon_vget_lanev4sf_zext_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2030 },
#else
    { 0, 0, output_2030 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev4sf_zext_internal },
    &operand_data[2369],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3398 */
  {
    "neon_vdup_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.8\t%P0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_nv8qi },
    &operand_data[2372],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3398 */
  {
    "neon_vdup_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.16\t%P0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_nv4hi },
    &operand_data[2374],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3398 */
  {
    "neon_vdup_nv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.8\t%q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_nv16qi },
    &operand_data[2376],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3398 */
  {
    "neon_vdup_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.16\t%q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_nv8hi },
    &operand_data[2378],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3406 */
  {
    "neon_vdup_nv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.16\t%P0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_nv4hf },
    &operand_data[2380],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3414 */
  {
    "neon_vdup_nv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.16\t%q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_nv8hf },
    &operand_data[2382],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3422 */
  {
    "neon_vdup_nv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.16\t%P0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_nv4bf },
    &operand_data[2384],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3430 */
  {
    "neon_vdup_nv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.16\t%q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_nv8bf },
    &operand_data[2386],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3438 */
  {
    "neon_vdup_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2039 },
#else
    { 0, output_2039, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_nv2si },
    &operand_data[2388],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3438 */
  {
    "neon_vdup_nv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2040 },
#else
    { 0, output_2040, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_nv2sf },
    &operand_data[2390],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3438 */
  {
    "neon_vdup_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2041 },
#else
    { 0, output_2041, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_nv4si },
    &operand_data[2392],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3438 */
  {
    "neon_vdup_nv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2042 },
#else
    { 0, output_2042, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_nv4sf },
    &operand_data[2394],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3458 */
  {
    "neon_vdup_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2043 },
#else
    { 0, output_2043, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_nv2di },
    &operand_data[2396],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3469 */
  {
    "neon_vdup_lanev8qi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2044 },
#else
    { 0, 0, output_2044 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev8qi_internal },
    &operand_data[2398],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3469 */
  {
    "neon_vdup_lanev16qi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2045 },
#else
    { 0, 0, output_2045 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev16qi_internal },
    &operand_data[2401],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3469 */
  {
    "neon_vdup_lanev4hi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2046 },
#else
    { 0, 0, output_2046 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev4hi_internal },
    &operand_data[2404],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3469 */
  {
    "neon_vdup_lanev8hi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2047 },
#else
    { 0, 0, output_2047 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev8hi_internal },
    &operand_data[2407],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3469 */
  {
    "neon_vdup_lanev2si_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2048 },
#else
    { 0, 0, output_2048 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev2si_internal },
    &operand_data[2410],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3469 */
  {
    "neon_vdup_lanev4si_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2049 },
#else
    { 0, 0, output_2049 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev4si_internal },
    &operand_data[2413],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3469 */
  {
    "neon_vdup_lanev2sf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2050 },
#else
    { 0, 0, output_2050 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev2sf_internal },
    &operand_data[2416],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3469 */
  {
    "neon_vdup_lanev4sf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2051 },
#else
    { 0, 0, output_2051 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev4sf_internal },
    &operand_data[2419],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3491 */
  {
    "neon_vdup_lanev8hf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2052 },
#else
    { 0, 0, output_2052 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev8hf_internal },
    &operand_data[2422],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3491 */
  {
    "neon_vdup_lanev4hf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2053 },
#else
    { 0, 0, output_2053 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev4hf_internal },
    &operand_data[2425],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3491 */
  {
    "neon_vdup_lanev4bf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2054 },
#else
    { 0, 0, output_2054 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev4bf_internal },
    &operand_data[2428],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3491 */
  {
    "neon_vdup_lanev8bf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2055 },
#else
    { 0, 0, output_2055 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev8bf_internal },
    &operand_data[2431],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3575 */
  {
    "*neon_vswpv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vswp\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2434],
    2,
    2,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3575 */
  {
    "*neon_vswpv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vswp\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2436],
    2,
    2,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3575 */
  {
    "*neon_vswpv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vswp\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2438],
    2,
    2,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3575 */
  {
    "*neon_vswpv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vswp\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2440],
    2,
    2,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3575 */
  {
    "*neon_vswpv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vswp\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2442],
    2,
    2,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3575 */
  {
    "*neon_vswpv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vswp\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2444],
    2,
    2,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3575 */
  {
    "*neon_vswpv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vswp\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2446],
    2,
    2,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3575 */
  {
    "*neon_vswpv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vswp\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2448],
    2,
    2,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3575 */
  {
    "*neon_vswpv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vswp\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2450],
    2,
    2,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3575 */
  {
    "*neon_vswpv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vswp\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2452],
    2,
    2,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3575 */
  {
    "*neon_vswpv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vswp\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2454],
    2,
    2,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3575 */
  {
    "*neon_vswpv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vswp\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2456],
    2,
    2,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3575 */
  {
    "*neon_vswpdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vswp\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2458],
    2,
    2,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3575 */
  {
    "*neon_vswpv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vswp\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2460],
    2,
    2,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3591 */
  {
    "neon_vcombinev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcombinev8qi },
    &operand_data[2462],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3591 */
  {
    "neon_vcombinev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcombinev4hi },
    &operand_data[2465],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3591 */
  {
    "neon_vcombinev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcombinev4hf },
    &operand_data[2468],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3591 */
  {
    "neon_vcombinev4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcombinev4bf },
    &operand_data[2471],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3591 */
  {
    "neon_vcombinev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcombinev2si },
    &operand_data[2474],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3591 */
  {
    "neon_vcombinev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcombinev2sf },
    &operand_data[2477],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3591 */
  {
    "neon_vcombinedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcombinedi },
    &operand_data[2480],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3629 */
  {
    "floatv2siv2sf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f32.s32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_floatv2siv2sf2 },
    &operand_data[2483],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3629 */
  {
    "floatv4siv4sf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f32.s32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_floatv4siv4sf2 },
    &operand_data[2485],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3637 */
  {
    "floatunsv2siv2sf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f32.u32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_floatunsv2siv2sf2 },
    &operand_data[2483],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3637 */
  {
    "floatunsv4siv4sf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f32.u32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_floatunsv4siv4sf2 },
    &operand_data[2485],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3645 */
  {
    "fix_truncv2sfv2si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.s32.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fix_truncv2sfv2si2 },
    &operand_data[2171],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3645 */
  {
    "fix_truncv4sfv4si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.s32.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fix_truncv4sfv4si2 },
    &operand_data[2174],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3653 */
  {
    "fixuns_truncv2sfv2si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.u32.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fixuns_truncv2sfv2si2 },
    &operand_data[2171],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3653 */
  {
    "fixuns_truncv4sfv4si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.u32.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fixuns_truncv4sfv4si2 },
    &operand_data[2174],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3661 */
  {
    "neon_vcvtsv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.s%#32.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtsv2sf },
    &operand_data[2171],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3661 */
  {
    "neon_vcvtuv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.u%#32.f32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtuv2sf },
    &operand_data[2171],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3661 */
  {
    "neon_vcvtsv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.s%#32.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtsv4sf },
    &operand_data[2174],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3661 */
  {
    "neon_vcvtuv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.u%#32.f32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtuv4sf },
    &operand_data[2174],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3670 */
  {
    "neon_vcvtsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f32.s%#32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtsv2si },
    &operand_data[2483],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3670 */
  {
    "neon_vcvtuv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f32.u%#32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtuv2si },
    &operand_data[2483],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3670 */
  {
    "neon_vcvtsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f32.s%#32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtsv4si },
    &operand_data[2485],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3670 */
  {
    "neon_vcvtuv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f32.u%#32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtuv4si },
    &operand_data[2485],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3679 */
  {
    "neon_vcvtv4sfv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f32.f16\t%q0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtv4sfv4hf },
    &operand_data[2487],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3688 */
  {
    "neon_vcvtv4hfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f16.f32\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtv4hfv4sf },
    &operand_data[2489],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3697 */
  {
    "neon_vcvtsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f16.s%#16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtsv4hi },
    &operand_data[2491],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3697 */
  {
    "neon_vcvtuv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f16.u%#16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtuv4hi },
    &operand_data[2491],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3697 */
  {
    "neon_vcvtsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f16.s%#16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtsv8hi },
    &operand_data[2493],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3697 */
  {
    "neon_vcvtuv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f16.u%#16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtuv8hi },
    &operand_data[2493],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3708 */
  {
    "neon_vcvtsv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.s%#16.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtsv8hf },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3708 */
  {
    "neon_vcvtuv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.u%#16.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtuv8hf },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3708 */
  {
    "neon_vcvtsv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.s%#16.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtsv4hf },
    &operand_data[2180],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3708 */
  {
    "neon_vcvtuv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.u%#16.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtuv4hf },
    &operand_data[2180],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3719 */
  {
    "neon_vcvts_nv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2103 },
#else
    { 0, 0, output_2103 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvts_nv2sf },
    &operand_data[2495],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3719 */
  {
    "neon_vcvtu_nv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2104 },
#else
    { 0, 0, output_2104 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtu_nv2sf },
    &operand_data[2495],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3719 */
  {
    "neon_vcvts_nv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2105 },
#else
    { 0, 0, output_2105 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvts_nv4sf },
    &operand_data[2498],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3719 */
  {
    "neon_vcvtu_nv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2106 },
#else
    { 0, 0, output_2106 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtu_nv4sf },
    &operand_data[2498],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3732 */
  {
    "neon_vcvts_nv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2107 },
#else
    { 0, 0, output_2107 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvts_nv8hf },
    &operand_data[2501],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3732 */
  {
    "neon_vcvtu_nv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2108 },
#else
    { 0, 0, output_2108 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtu_nv8hf },
    &operand_data[2501],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3732 */
  {
    "neon_vcvts_nv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2109 },
#else
    { 0, 0, output_2109 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvts_nv4hf },
    &operand_data[2504],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3732 */
  {
    "neon_vcvtu_nv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2110 },
#else
    { 0, 0, output_2110 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtu_nv4hf },
    &operand_data[2504],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3746 */
  {
    "neon_vcvts_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2111 },
#else
    { 0, 0, output_2111 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvts_nv2si },
    &operand_data[2507],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3746 */
  {
    "neon_vcvtu_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2112 },
#else
    { 0, 0, output_2112 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtu_nv2si },
    &operand_data[2507],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3746 */
  {
    "neon_vcvts_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2113 },
#else
    { 0, 0, output_2113 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvts_nv4si },
    &operand_data[2510],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3746 */
  {
    "neon_vcvtu_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2114 },
#else
    { 0, 0, output_2114 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtu_nv4si },
    &operand_data[2510],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3759 */
  {
    "neon_vcvts_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2115 },
#else
    { 0, 0, output_2115 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvts_nv4hi },
    &operand_data[2513],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3759 */
  {
    "neon_vcvtu_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2116 },
#else
    { 0, 0, output_2116 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtu_nv4hi },
    &operand_data[2513],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3759 */
  {
    "neon_vcvts_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2117 },
#else
    { 0, 0, output_2117 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvts_nv8hi },
    &operand_data[2516],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3759 */
  {
    "neon_vcvtu_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2118 },
#else
    { 0, 0, output_2118 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtu_nv8hi },
    &operand_data[2516],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtasv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.s%#16.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtasv8hf },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtauv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.u%#16.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtauv8hf },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtmsv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.s%#16.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtmsv8hf },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtmuv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.u%#16.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtmuv8hf },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtnsv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtn.s%#16.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtnsv8hf },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtnuv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtn.u%#16.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtnuv8hf },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtpsv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.s%#16.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtpsv8hf },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtpuv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.u%#16.f16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtpuv8hf },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtasv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.s%#16.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtasv4hf },
    &operand_data[2180],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtauv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.u%#16.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtauv4hf },
    &operand_data[2180],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtmsv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.s%#16.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtmsv4hf },
    &operand_data[2180],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtmuv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.u%#16.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtmuv4hf },
    &operand_data[2180],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtnsv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtn.s%#16.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtnsv4hf },
    &operand_data[2180],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtnuv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtn.u%#16.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtnuv4hf },
    &operand_data[2180],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtpsv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.s%#16.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtpsv4hf },
    &operand_data[2180],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3773 */
  {
    "neon_vcvtpuv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.u%#16.f16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvtpuv4hf },
    &operand_data[2180],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3784 */
  {
    "neon_vmovnv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovn.i16\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmovnv8hi },
    &operand_data[2048],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3784 */
  {
    "neon_vmovnv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovn.i32\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmovnv4si },
    &operand_data[2051],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3784 */
  {
    "neon_vmovnv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovn.i64\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmovnv2di },
    &operand_data[2054],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3793 */
  {
    "neon_vqmovnsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovn.s%#16\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqmovnsv8hi },
    &operand_data[2048],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3793 */
  {
    "neon_vqmovnuv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovn.u%#16\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqmovnuv8hi },
    &operand_data[2048],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3793 */
  {
    "neon_vqmovnsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovn.s%#32\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqmovnsv4si },
    &operand_data[2051],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3793 */
  {
    "neon_vqmovnuv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovn.u%#32\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqmovnuv4si },
    &operand_data[2051],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3793 */
  {
    "neon_vqmovnsv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovn.s%#64\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqmovnsv2di },
    &operand_data[2054],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3793 */
  {
    "neon_vqmovnuv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovn.u%#64\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqmovnuv2di },
    &operand_data[2054],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3802 */
  {
    "neon_vqmovunv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovun.s16\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqmovunv8hi },
    &operand_data[2048],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3802 */
  {
    "neon_vqmovunv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovun.s32\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqmovunv4si },
    &operand_data[2051],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3802 */
  {
    "neon_vqmovunv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovun.s64\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqmovunv2di },
    &operand_data[2054],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3811 */
  {
    "neon_vmovlsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.s%#8\t%q0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmovlsv8qi },
    &operand_data[2027],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3811 */
  {
    "neon_vmovluv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.u%#8\t%q0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmovluv8qi },
    &operand_data[2027],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3811 */
  {
    "neon_vmovlsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.s%#16\t%q0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmovlsv4hi },
    &operand_data[2030],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3811 */
  {
    "neon_vmovluv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.u%#16\t%q0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmovluv4hi },
    &operand_data[2030],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3811 */
  {
    "neon_vmovlsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.s%#32\t%q0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmovlsv2si },
    &operand_data[2033],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3811 */
  {
    "neon_vmovluv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.u%#32\t%q0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmovluv2si },
    &operand_data[2033],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3820 */
  {
    "neon_vmul_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2153 },
#else
    { 0, 0, output_2153 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_lanev4hi },
    &operand_data[2519],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3820 */
  {
    "neon_vmul_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2154 },
#else
    { 0, 0, output_2154 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_lanev2si },
    &operand_data[2523],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3820 */
  {
    "neon_vmul_lanev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2155 },
#else
    { 0, 0, output_2155 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_lanev2sf },
    &operand_data[2527],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3837 */
  {
    "neon_vmul_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2156 },
#else
    { 0, 0, output_2156 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_lanev8hi },
    &operand_data[2531],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3837 */
  {
    "neon_vmul_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2157 },
#else
    { 0, 0, output_2157 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_lanev4si },
    &operand_data[2535],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3837 */
  {
    "neon_vmul_lanev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2158 },
#else
    { 0, 0, output_2158 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_lanev4sf },
    &operand_data[2539],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3854 */
  {
    "neon_vmul_lanev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.f16\t%q0, %q1, %P2[%c3]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_lanev8hf },
    &operand_data[2543],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3854 */
  {
    "neon_vmul_lanev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.f16\t%P0, %P1, %P2[%c3]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_lanev4hf },
    &operand_data[2547],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3866 */
  {
    "neon_vmulls_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2161 },
#else
    { 0, 0, output_2161 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmulls_lanev4hi },
    &operand_data[2551],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3866 */
  {
    "neon_vmullu_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2162 },
#else
    { 0, 0, output_2162 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmullu_lanev4hi },
    &operand_data[2551],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3866 */
  {
    "neon_vmulls_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2163 },
#else
    { 0, 0, output_2163 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmulls_lanev2si },
    &operand_data[2555],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3866 */
  {
    "neon_vmullu_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2164 },
#else
    { 0, 0, output_2164 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmullu_lanev2si },
    &operand_data[2555],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3880 */
  {
    "neon_vqdmull_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2165 },
#else
    { 0, 0, output_2165 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmull_lanev4hi },
    &operand_data[2551],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3880 */
  {
    "neon_vqdmull_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2166 },
#else
    { 0, 0, output_2166 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmull_lanev2si },
    &operand_data[2555],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3894 */
  {
    "neon_vqdmulh_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2167 },
#else
    { 0, 0, output_2167 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmulh_lanev8hi },
    &operand_data[2531],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3894 */
  {
    "neon_vqrdmulh_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2168 },
#else
    { 0, 0, output_2168 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmulh_lanev8hi },
    &operand_data[2531],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3894 */
  {
    "neon_vqdmulh_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2169 },
#else
    { 0, 0, output_2169 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmulh_lanev4si },
    &operand_data[2535],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3894 */
  {
    "neon_vqrdmulh_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2170 },
#else
    { 0, 0, output_2170 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmulh_lanev4si },
    &operand_data[2535],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3908 */
  {
    "neon_vqdmulh_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2171 },
#else
    { 0, 0, output_2171 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmulh_lanev4hi },
    &operand_data[2519],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3908 */
  {
    "neon_vqrdmulh_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2172 },
#else
    { 0, 0, output_2172 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmulh_lanev4hi },
    &operand_data[2519],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3908 */
  {
    "neon_vqdmulh_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2173 },
#else
    { 0, 0, output_2173 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmulh_lanev2si },
    &operand_data[2523],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3908 */
  {
    "neon_vqrdmulh_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2174 },
#else
    { 0, 0, output_2174 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmulh_lanev2si },
    &operand_data[2523],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3923 */
  {
    "neon_vqrdmlah_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2175 },
#else
    { 0, 0, output_2175 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlah_lanev8hi },
    &operand_data[2559],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3923 */
  {
    "neon_vqrdmlsh_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2176 },
#else
    { 0, 0, output_2176 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlsh_lanev8hi },
    &operand_data[2559],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3923 */
  {
    "neon_vqrdmlah_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2177 },
#else
    { 0, 0, output_2177 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlah_lanev4si },
    &operand_data[2564],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3923 */
  {
    "neon_vqrdmlsh_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2178 },
#else
    { 0, 0, output_2178 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlsh_lanev4si },
    &operand_data[2564],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3939 */
  {
    "neon_vqrdmlah_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2179 },
#else
    { 0, 0, output_2179 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlah_lanev4hi },
    &operand_data[2569],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3939 */
  {
    "neon_vqrdmlsh_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2180 },
#else
    { 0, 0, output_2180 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlsh_lanev4hi },
    &operand_data[2569],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3939 */
  {
    "neon_vqrdmlah_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2181 },
#else
    { 0, 0, output_2181 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlah_lanev2si },
    &operand_data[2574],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3939 */
  {
    "neon_vqrdmlsh_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2182 },
#else
    { 0, 0, output_2182 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmlsh_lanev2si },
    &operand_data[2574],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3955 */
  {
    "neon_vmla_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2183 },
#else
    { 0, 0, output_2183 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmla_lanev4hi },
    &operand_data[2569],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3955 */
  {
    "neon_vmla_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2184 },
#else
    { 0, 0, output_2184 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmla_lanev2si },
    &operand_data[2574],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3955 */
  {
    "neon_vmla_lanev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2185 },
#else
    { 0, 0, output_2185 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmla_lanev2sf },
    &operand_data[2579],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3973 */
  {
    "neon_vmla_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2186 },
#else
    { 0, 0, output_2186 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmla_lanev8hi },
    &operand_data[2559],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3973 */
  {
    "neon_vmla_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2187 },
#else
    { 0, 0, output_2187 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmla_lanev4si },
    &operand_data[2564],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3973 */
  {
    "neon_vmla_lanev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2188 },
#else
    { 0, 0, output_2188 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmla_lanev4sf },
    &operand_data[2584],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3991 */
  {
    "neon_vmlals_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2189 },
#else
    { 0, 0, output_2189 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlals_lanev4hi },
    &operand_data[2589],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3991 */
  {
    "neon_vmlalu_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2190 },
#else
    { 0, 0, output_2190 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlalu_lanev4hi },
    &operand_data[2589],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3991 */
  {
    "neon_vmlals_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2191 },
#else
    { 0, 0, output_2191 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlals_lanev2si },
    &operand_data[2594],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3991 */
  {
    "neon_vmlalu_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2192 },
#else
    { 0, 0, output_2192 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlalu_lanev2si },
    &operand_data[2594],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4006 */
  {
    "neon_vqdmlal_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2193 },
#else
    { 0, 0, output_2193 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmlal_lanev4hi },
    &operand_data[2589],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4006 */
  {
    "neon_vqdmlal_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2194 },
#else
    { 0, 0, output_2194 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmlal_lanev2si },
    &operand_data[2594],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4021 */
  {
    "neon_vmls_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2195 },
#else
    { 0, 0, output_2195 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmls_lanev4hi },
    &operand_data[2569],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4021 */
  {
    "neon_vmls_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2196 },
#else
    { 0, 0, output_2196 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmls_lanev2si },
    &operand_data[2574],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4021 */
  {
    "neon_vmls_lanev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2197 },
#else
    { 0, 0, output_2197 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmls_lanev2sf },
    &operand_data[2579],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4039 */
  {
    "neon_vmls_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2198 },
#else
    { 0, 0, output_2198 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmls_lanev8hi },
    &operand_data[2559],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4039 */
  {
    "neon_vmls_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2199 },
#else
    { 0, 0, output_2199 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmls_lanev4si },
    &operand_data[2564],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4039 */
  {
    "neon_vmls_lanev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2200 },
#else
    { 0, 0, output_2200 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmls_lanev4sf },
    &operand_data[2584],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4057 */
  {
    "neon_vmlsls_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2201 },
#else
    { 0, 0, output_2201 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsls_lanev4hi },
    &operand_data[2589],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4057 */
  {
    "neon_vmlslu_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2202 },
#else
    { 0, 0, output_2202 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlslu_lanev4hi },
    &operand_data[2589],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4057 */
  {
    "neon_vmlsls_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2203 },
#else
    { 0, 0, output_2203 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsls_lanev2si },
    &operand_data[2594],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4057 */
  {
    "neon_vmlslu_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2204 },
#else
    { 0, 0, output_2204 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlslu_lanev2si },
    &operand_data[2594],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4072 */
  {
    "neon_vqdmlsl_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2205 },
#else
    { 0, 0, output_2205 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmlsl_lanev4hi },
    &operand_data[2589],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4072 */
  {
    "neon_vqdmlsl_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2206 },
#else
    { 0, 0, output_2206 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmlsl_lanev2si },
    &operand_data[2594],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4364 */
  {
    "neon_vextv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2207 },
#else
    { 0, 0, output_2207 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vextv8qi },
    &operand_data[2599],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4364 */
  {
    "neon_vextv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2208 },
#else
    { 0, 0, output_2208 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vextv16qi },
    &operand_data[2603],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4364 */
  {
    "neon_vextv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2209 },
#else
    { 0, 0, output_2209 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vextv4hi },
    &operand_data[2607],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4364 */
  {
    "neon_vextv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2210 },
#else
    { 0, 0, output_2210 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vextv8hi },
    &operand_data[2611],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4364 */
  {
    "neon_vextv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2211 },
#else
    { 0, 0, output_2211 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vextv2si },
    &operand_data[2615],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4364 */
  {
    "neon_vextv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2212 },
#else
    { 0, 0, output_2212 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vextv4si },
    &operand_data[2619],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4364 */
  {
    "neon_vextv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2213 },
#else
    { 0, 0, output_2213 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vextv4hf },
    &operand_data[2623],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4364 */
  {
    "neon_vextv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2214 },
#else
    { 0, 0, output_2214 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vextv8hf },
    &operand_data[2627],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4364 */
  {
    "neon_vextv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2215 },
#else
    { 0, 0, output_2215 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vextv4bf },
    &operand_data[2631],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4364 */
  {
    "neon_vextv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2216 },
#else
    { 0, 0, output_2216 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vextv8bf },
    &operand_data[2635],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4364 */
  {
    "neon_vextv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2217 },
#else
    { 0, 0, output_2217 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vextv2sf },
    &operand_data[2639],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4364 */
  {
    "neon_vextv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2218 },
#else
    { 0, 0, output_2218 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vextv4sf },
    &operand_data[2643],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4364 */
  {
    "neon_vextdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2219 },
#else
    { 0, 0, output_2219 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vextdi },
    &operand_data[2647],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4364 */
  {
    "neon_vextv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2220 },
#else
    { 0, 0, output_2220 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vextv2di },
    &operand_data[2651],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4378 */
  {
    "neon_vrev64v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.8\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev64v8qi },
    &operand_data[1807],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4378 */
  {
    "neon_vrev64v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev64v16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4378 */
  {
    "neon_vrev64v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev64v4hi },
    &operand_data[1813],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4378 */
  {
    "neon_vrev64v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev64v8hi },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4378 */
  {
    "neon_vrev64v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev64v2si },
    &operand_data[1819],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4378 */
  {
    "neon_vrev64v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev64v4si },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4378 */
  {
    "neon_vrev64v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev64v4hf },
    &operand_data[1825],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4378 */
  {
    "neon_vrev64v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev64v8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4378 */
  {
    "neon_vrev64v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.32\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev64v2sf },
    &operand_data[1831],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4378 */
  {
    "neon_vrev64v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev64v4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4378 */
  {
    "neon_vrev64v2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.64\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev64v2di },
    &operand_data[1837],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4387 */
  {
    "neon_vrev32v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev32.8\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev32v8qi },
    &operand_data[1807],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4387 */
  {
    "neon_vrev32v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev32.16\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev32v4hi },
    &operand_data[1813],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4387 */
  {
    "neon_vrev32v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev32.8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev32v16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4387 */
  {
    "neon_vrev32v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev32.16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev32v8hi },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4396 */
  {
    "neon_vrev16v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev16.8\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev16v8qi },
    &operand_data[1807],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4396 */
  {
    "neon_vrev16v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev16.8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrev16v16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4413 */
  {
    "neon_vbslv8qi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2238 },
#else
    { 0, output_2238, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv8qi_internal },
    &operand_data[2655],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4413 */
  {
    "neon_vbslv16qi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2239 },
#else
    { 0, output_2239, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv16qi_internal },
    &operand_data[2659],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4413 */
  {
    "neon_vbslv4hi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2240 },
#else
    { 0, output_2240, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv4hi_internal },
    &operand_data[2663],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4413 */
  {
    "neon_vbslv8hi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2241 },
#else
    { 0, output_2241, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv8hi_internal },
    &operand_data[2667],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4413 */
  {
    "neon_vbslv2si_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2242 },
#else
    { 0, output_2242, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv2si_internal },
    &operand_data[2671],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4413 */
  {
    "neon_vbslv4si_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2243 },
#else
    { 0, output_2243, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv4si_internal },
    &operand_data[2675],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4413 */
  {
    "neon_vbslv4hf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2244 },
#else
    { 0, output_2244, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv4hf_internal },
    &operand_data[2679],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4413 */
  {
    "neon_vbslv8hf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2245 },
#else
    { 0, output_2245, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv8hf_internal },
    &operand_data[2683],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4413 */
  {
    "neon_vbslv4bf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2246 },
#else
    { 0, output_2246, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv4bf_internal },
    &operand_data[2687],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4413 */
  {
    "neon_vbslv8bf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2247 },
#else
    { 0, output_2247, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv8bf_internal },
    &operand_data[2691],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4413 */
  {
    "neon_vbslv2sf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2248 },
#else
    { 0, output_2248, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv2sf_internal },
    &operand_data[2695],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4413 */
  {
    "neon_vbslv4sf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2249 },
#else
    { 0, output_2249, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv4sf_internal },
    &operand_data[2699],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4413 */
  {
    "neon_vbsldi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2250 },
#else
    { 0, output_2250, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbsldi_internal },
    &operand_data[2703],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4413 */
  {
    "neon_vbslv2di_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2251 },
#else
    { 0, output_2251, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv2di_internal },
    &operand_data[2707],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshlsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshlsv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshluv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshluv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshlsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.s%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshlsv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshluv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshluv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshlsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshlsv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshluv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshluv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshlsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshlsv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshluv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshluv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshlsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshlsv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshluv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshluv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshlsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.s%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshlsv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshluv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshluv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshlsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshlsv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshluv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshluv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshlsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshlsv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshluv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshluv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshlsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshlsv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshluv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshluv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshlsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.s%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshlsv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshluv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshluv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshlsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshlsv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshluv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshluv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshlsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshlsv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshluv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshluv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshlsdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s%#64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshlsdi },
    &operand_data[2045],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshludi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u%#64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshludi },
    &operand_data[2045],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshlsdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.s%#64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshlsdi },
    &operand_data[2045],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshludi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.u%#64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshludi },
    &operand_data[2045],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshlsv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s%#64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshlsv2di },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vshluv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u%#64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshluv2di },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshlsv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.s%#64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshlsv2di },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4440 */
  {
    "neon_vrshluv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.u%#64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshluv2di },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshlsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlsv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshluv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshluv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshlsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.s%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshlsv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshluv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.u%#8\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshluv8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshlsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlsv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshluv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshluv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshlsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshlsv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshluv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshluv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshlsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlsv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshluv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshluv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshlsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.s%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshlsv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshluv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.u%#16\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshluv4hi },
    &operand_data[1813],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshlsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlsv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshluv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshluv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshlsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshlsv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshluv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshluv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshlsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlsv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshluv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshluv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshlsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.s%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshlsv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshluv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.u%#32\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshluv2si },
    &operand_data[1819],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshlsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlsv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshluv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshluv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshlsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshlsv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshluv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshluv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshlsdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlsdi },
    &operand_data[2045],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshludi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshludi },
    &operand_data[2045],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshlsdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.s%#64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshlsdi },
    &operand_data[2045],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshludi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.u%#64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshludi },
    &operand_data[2045],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshlsv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlsv2di },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqshluv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshluv2di },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshlsv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.s%#64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshlsv2di },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4451 */
  {
    "neon_vqrshluv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.u%#64\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshluv2di },
    &operand_data[1837],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshrs_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2316 },
#else
    { 0, 0, output_2316 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshrs_nv8qi },
    &operand_data[2398],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshru_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2317 },
#else
    { 0, 0, output_2317 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshru_nv8qi },
    &operand_data[2398],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshrs_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2318 },
#else
    { 0, 0, output_2318 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshrs_nv8qi },
    &operand_data[2398],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshru_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2319 },
#else
    { 0, 0, output_2319 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshru_nv8qi },
    &operand_data[2398],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshrs_nv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2320 },
#else
    { 0, 0, output_2320 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshrs_nv16qi },
    &operand_data[2711],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshru_nv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2321 },
#else
    { 0, 0, output_2321 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshru_nv16qi },
    &operand_data[2711],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshrs_nv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2322 },
#else
    { 0, 0, output_2322 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshrs_nv16qi },
    &operand_data[2711],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshru_nv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2323 },
#else
    { 0, 0, output_2323 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshru_nv16qi },
    &operand_data[2711],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshrs_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2324 },
#else
    { 0, 0, output_2324 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshrs_nv4hi },
    &operand_data[2404],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshru_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2325 },
#else
    { 0, 0, output_2325 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshru_nv4hi },
    &operand_data[2404],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshrs_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2326 },
#else
    { 0, 0, output_2326 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshrs_nv4hi },
    &operand_data[2404],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshru_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2327 },
#else
    { 0, 0, output_2327 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshru_nv4hi },
    &operand_data[2404],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshrs_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2328 },
#else
    { 0, 0, output_2328 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshrs_nv8hi },
    &operand_data[2714],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshru_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2329 },
#else
    { 0, 0, output_2329 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshru_nv8hi },
    &operand_data[2714],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshrs_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2330 },
#else
    { 0, 0, output_2330 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshrs_nv8hi },
    &operand_data[2714],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshru_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2331 },
#else
    { 0, 0, output_2331 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshru_nv8hi },
    &operand_data[2714],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshrs_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2332 },
#else
    { 0, 0, output_2332 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshrs_nv2si },
    &operand_data[2410],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshru_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2333 },
#else
    { 0, 0, output_2333 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshru_nv2si },
    &operand_data[2410],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshrs_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2334 },
#else
    { 0, 0, output_2334 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshrs_nv2si },
    &operand_data[2410],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshru_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2335 },
#else
    { 0, 0, output_2335 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshru_nv2si },
    &operand_data[2410],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshrs_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2336 },
#else
    { 0, 0, output_2336 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshrs_nv4si },
    &operand_data[2717],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshru_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2337 },
#else
    { 0, 0, output_2337 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshru_nv4si },
    &operand_data[2717],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshrs_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2338 },
#else
    { 0, 0, output_2338 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshrs_nv4si },
    &operand_data[2717],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshru_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2339 },
#else
    { 0, 0, output_2339 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshru_nv4si },
    &operand_data[2717],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshrs_ndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2340 },
#else
    { 0, 0, output_2340 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshrs_ndi },
    &operand_data[2720],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshru_ndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2341 },
#else
    { 0, 0, output_2341 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshru_ndi },
    &operand_data[2720],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshrs_ndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2342 },
#else
    { 0, 0, output_2342 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshrs_ndi },
    &operand_data[2720],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshru_ndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2343 },
#else
    { 0, 0, output_2343 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshru_ndi },
    &operand_data[2720],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshrs_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2344 },
#else
    { 0, 0, output_2344 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshrs_nv2di },
    &operand_data[2723],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vshru_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2345 },
#else
    { 0, 0, output_2345 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshru_nv2di },
    &operand_data[2723],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshrs_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2346 },
#else
    { 0, 0, output_2346 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshrs_nv2di },
    &operand_data[2723],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4462 */
  {
    "neon_vrshru_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2347 },
#else
    { 0, 0, output_2347 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshru_nv2di },
    &operand_data[2723],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4476 */
  {
    "neon_vshrn_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2348 },
#else
    { 0, 0, output_2348 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshrn_nv8hi },
    &operand_data[2726],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4476 */
  {
    "neon_vrshrn_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2349 },
#else
    { 0, 0, output_2349 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshrn_nv8hi },
    &operand_data[2726],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4476 */
  {
    "neon_vshrn_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2350 },
#else
    { 0, 0, output_2350 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshrn_nv4si },
    &operand_data[2729],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4476 */
  {
    "neon_vrshrn_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2351 },
#else
    { 0, 0, output_2351 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshrn_nv4si },
    &operand_data[2729],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4476 */
  {
    "neon_vshrn_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2352 },
#else
    { 0, 0, output_2352 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshrn_nv2di },
    &operand_data[2732],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4476 */
  {
    "neon_vrshrn_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2353 },
#else
    { 0, 0, output_2353 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrshrn_nv2di },
    &operand_data[2732],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4490 */
  {
    "neon_vqshrns_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2354 },
#else
    { 0, 0, output_2354 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshrns_nv8hi },
    &operand_data[2726],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4490 */
  {
    "neon_vqshrnu_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2355 },
#else
    { 0, 0, output_2355 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshrnu_nv8hi },
    &operand_data[2726],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4490 */
  {
    "neon_vqrshrns_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2356 },
#else
    { 0, 0, output_2356 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshrns_nv8hi },
    &operand_data[2726],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4490 */
  {
    "neon_vqrshrnu_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2357 },
#else
    { 0, 0, output_2357 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshrnu_nv8hi },
    &operand_data[2726],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4490 */
  {
    "neon_vqshrns_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2358 },
#else
    { 0, 0, output_2358 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshrns_nv4si },
    &operand_data[2729],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4490 */
  {
    "neon_vqshrnu_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2359 },
#else
    { 0, 0, output_2359 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshrnu_nv4si },
    &operand_data[2729],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4490 */
  {
    "neon_vqrshrns_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2360 },
#else
    { 0, 0, output_2360 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshrns_nv4si },
    &operand_data[2729],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4490 */
  {
    "neon_vqrshrnu_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2361 },
#else
    { 0, 0, output_2361 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshrnu_nv4si },
    &operand_data[2729],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4490 */
  {
    "neon_vqshrns_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2362 },
#else
    { 0, 0, output_2362 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshrns_nv2di },
    &operand_data[2732],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4490 */
  {
    "neon_vqshrnu_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2363 },
#else
    { 0, 0, output_2363 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshrnu_nv2di },
    &operand_data[2732],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4490 */
  {
    "neon_vqrshrns_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2364 },
#else
    { 0, 0, output_2364 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshrns_nv2di },
    &operand_data[2732],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4490 */
  {
    "neon_vqrshrnu_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2365 },
#else
    { 0, 0, output_2365 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshrnu_nv2di },
    &operand_data[2732],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4504 */
  {
    "neon_vqshrun_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2366 },
#else
    { 0, 0, output_2366 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshrun_nv8hi },
    &operand_data[2726],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4504 */
  {
    "neon_vqrshrun_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2367 },
#else
    { 0, 0, output_2367 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshrun_nv8hi },
    &operand_data[2726],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4504 */
  {
    "neon_vqshrun_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2368 },
#else
    { 0, 0, output_2368 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshrun_nv4si },
    &operand_data[2729],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4504 */
  {
    "neon_vqrshrun_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2369 },
#else
    { 0, 0, output_2369 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshrun_nv4si },
    &operand_data[2729],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4504 */
  {
    "neon_vqshrun_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2370 },
#else
    { 0, 0, output_2370 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshrun_nv2di },
    &operand_data[2732],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4504 */
  {
    "neon_vqrshrun_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2371 },
#else
    { 0, 0, output_2371 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrshrun_nv2di },
    &operand_data[2732],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4517 */
  {
    "neon_vshl_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2372 },
#else
    { 0, 0, output_2372 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshl_nv8qi },
    &operand_data[2398],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4517 */
  {
    "neon_vshl_nv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2373 },
#else
    { 0, 0, output_2373 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshl_nv16qi },
    &operand_data[2711],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4517 */
  {
    "neon_vshl_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2374 },
#else
    { 0, 0, output_2374 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshl_nv4hi },
    &operand_data[2404],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4517 */
  {
    "neon_vshl_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2375 },
#else
    { 0, 0, output_2375 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshl_nv8hi },
    &operand_data[2714],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4517 */
  {
    "neon_vshl_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2376 },
#else
    { 0, 0, output_2376 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshl_nv2si },
    &operand_data[2410],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4517 */
  {
    "neon_vshl_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2377 },
#else
    { 0, 0, output_2377 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshl_nv4si },
    &operand_data[2717],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4517 */
  {
    "neon_vshl_ndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2378 },
#else
    { 0, 0, output_2378 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshl_ndi },
    &operand_data[2720],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4517 */
  {
    "neon_vshl_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2379 },
#else
    { 0, 0, output_2379 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshl_nv2di },
    &operand_data[2723],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_s_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2380 },
#else
    { 0, 0, output_2380 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_s_nv8qi },
    &operand_data[2398],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_u_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2381 },
#else
    { 0, 0, output_2381 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_u_nv8qi },
    &operand_data[2398],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_s_nv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2382 },
#else
    { 0, 0, output_2382 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_s_nv16qi },
    &operand_data[2711],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_u_nv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2383 },
#else
    { 0, 0, output_2383 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_u_nv16qi },
    &operand_data[2711],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_s_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2384 },
#else
    { 0, 0, output_2384 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_s_nv4hi },
    &operand_data[2404],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_u_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2385 },
#else
    { 0, 0, output_2385 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_u_nv4hi },
    &operand_data[2404],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_s_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2386 },
#else
    { 0, 0, output_2386 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_s_nv8hi },
    &operand_data[2714],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_u_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2387 },
#else
    { 0, 0, output_2387 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_u_nv8hi },
    &operand_data[2714],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_s_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2388 },
#else
    { 0, 0, output_2388 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_s_nv2si },
    &operand_data[2410],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_u_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2389 },
#else
    { 0, 0, output_2389 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_u_nv2si },
    &operand_data[2410],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_s_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2390 },
#else
    { 0, 0, output_2390 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_s_nv4si },
    &operand_data[2717],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_u_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2391 },
#else
    { 0, 0, output_2391 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_u_nv4si },
    &operand_data[2717],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_s_ndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2392 },
#else
    { 0, 0, output_2392 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_s_ndi },
    &operand_data[2720],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_u_ndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2393 },
#else
    { 0, 0, output_2393 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_u_ndi },
    &operand_data[2720],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_s_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2394 },
#else
    { 0, 0, output_2394 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_s_nv2di },
    &operand_data[2723],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4530 */
  {
    "neon_vqshl_u_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2395 },
#else
    { 0, 0, output_2395 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshl_u_nv2di },
    &operand_data[2723],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4543 */
  {
    "neon_vqshlu_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2396 },
#else
    { 0, 0, output_2396 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlu_nv8qi },
    &operand_data[2398],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4543 */
  {
    "neon_vqshlu_nv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2397 },
#else
    { 0, 0, output_2397 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlu_nv16qi },
    &operand_data[2711],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4543 */
  {
    "neon_vqshlu_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2398 },
#else
    { 0, 0, output_2398 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlu_nv4hi },
    &operand_data[2404],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4543 */
  {
    "neon_vqshlu_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2399 },
#else
    { 0, 0, output_2399 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlu_nv8hi },
    &operand_data[2714],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4543 */
  {
    "neon_vqshlu_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2400 },
#else
    { 0, 0, output_2400 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlu_nv2si },
    &operand_data[2410],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4543 */
  {
    "neon_vqshlu_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2401 },
#else
    { 0, 0, output_2401 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlu_nv4si },
    &operand_data[2717],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4543 */
  {
    "neon_vqshlu_ndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2402 },
#else
    { 0, 0, output_2402 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlu_ndi },
    &operand_data[2720],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4543 */
  {
    "neon_vqshlu_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2403 },
#else
    { 0, 0, output_2403 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqshlu_nv2di },
    &operand_data[2723],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4556 */
  {
    "neon_vshlls_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2404 },
#else
    { 0, 0, output_2404 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshlls_nv8qi },
    &operand_data[2735],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4556 */
  {
    "neon_vshllu_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2405 },
#else
    { 0, 0, output_2405 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshllu_nv8qi },
    &operand_data[2735],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4556 */
  {
    "neon_vshlls_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2406 },
#else
    { 0, 0, output_2406 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshlls_nv4hi },
    &operand_data[2738],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4556 */
  {
    "neon_vshllu_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2407 },
#else
    { 0, 0, output_2407 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshllu_nv4hi },
    &operand_data[2738],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4556 */
  {
    "neon_vshlls_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2408 },
#else
    { 0, 0, output_2408 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshlls_nv2si },
    &operand_data[2741],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4556 */
  {
    "neon_vshllu_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2409 },
#else
    { 0, 0, output_2409 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vshllu_nv2si },
    &operand_data[2741],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsras_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2410 },
#else
    { 0, 0, output_2410 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsras_nv8qi },
    &operand_data[2744],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsrau_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2411 },
#else
    { 0, 0, output_2411 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsrau_nv8qi },
    &operand_data[2744],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsras_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2412 },
#else
    { 0, 0, output_2412 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsras_nv8qi },
    &operand_data[2744],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsrau_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2413 },
#else
    { 0, 0, output_2413 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsrau_nv8qi },
    &operand_data[2744],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsras_nv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2414 },
#else
    { 0, 0, output_2414 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsras_nv16qi },
    &operand_data[2748],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsrau_nv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2415 },
#else
    { 0, 0, output_2415 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsrau_nv16qi },
    &operand_data[2748],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsras_nv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2416 },
#else
    { 0, 0, output_2416 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsras_nv16qi },
    &operand_data[2748],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsrau_nv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2417 },
#else
    { 0, 0, output_2417 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsrau_nv16qi },
    &operand_data[2748],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsras_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2418 },
#else
    { 0, 0, output_2418 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsras_nv4hi },
    &operand_data[2752],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsrau_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2419 },
#else
    { 0, 0, output_2419 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsrau_nv4hi },
    &operand_data[2752],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsras_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2420 },
#else
    { 0, 0, output_2420 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsras_nv4hi },
    &operand_data[2752],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsrau_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2421 },
#else
    { 0, 0, output_2421 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsrau_nv4hi },
    &operand_data[2752],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsras_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2422 },
#else
    { 0, 0, output_2422 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsras_nv8hi },
    &operand_data[2756],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsrau_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2423 },
#else
    { 0, 0, output_2423 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsrau_nv8hi },
    &operand_data[2756],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsras_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2424 },
#else
    { 0, 0, output_2424 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsras_nv8hi },
    &operand_data[2756],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsrau_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2425 },
#else
    { 0, 0, output_2425 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsrau_nv8hi },
    &operand_data[2756],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsras_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2426 },
#else
    { 0, 0, output_2426 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsras_nv2si },
    &operand_data[2760],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsrau_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2427 },
#else
    { 0, 0, output_2427 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsrau_nv2si },
    &operand_data[2760],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsras_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2428 },
#else
    { 0, 0, output_2428 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsras_nv2si },
    &operand_data[2760],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsrau_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2429 },
#else
    { 0, 0, output_2429 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsrau_nv2si },
    &operand_data[2760],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsras_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2430 },
#else
    { 0, 0, output_2430 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsras_nv4si },
    &operand_data[2764],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsrau_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2431 },
#else
    { 0, 0, output_2431 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsrau_nv4si },
    &operand_data[2764],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsras_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2432 },
#else
    { 0, 0, output_2432 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsras_nv4si },
    &operand_data[2764],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsrau_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2433 },
#else
    { 0, 0, output_2433 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsrau_nv4si },
    &operand_data[2764],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsras_ndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2434 },
#else
    { 0, 0, output_2434 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsras_ndi },
    &operand_data[2768],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsrau_ndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2435 },
#else
    { 0, 0, output_2435 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsrau_ndi },
    &operand_data[2768],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsras_ndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2436 },
#else
    { 0, 0, output_2436 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsras_ndi },
    &operand_data[2768],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsrau_ndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2437 },
#else
    { 0, 0, output_2437 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsrau_ndi },
    &operand_data[2768],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsras_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2438 },
#else
    { 0, 0, output_2438 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsras_nv2di },
    &operand_data[2772],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vsrau_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2439 },
#else
    { 0, 0, output_2439 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsrau_nv2di },
    &operand_data[2772],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsras_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2440 },
#else
    { 0, 0, output_2440 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsras_nv2di },
    &operand_data[2772],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4571 */
  {
    "neon_vrsrau_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2441 },
#else
    { 0, 0, output_2441 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vrsrau_nv2di },
    &operand_data[2772],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4585 */
  {
    "neon_vsri_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2442 },
#else
    { 0, 0, output_2442 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsri_nv8qi },
    &operand_data[2744],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4585 */
  {
    "neon_vsri_nv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2443 },
#else
    { 0, 0, output_2443 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsri_nv16qi },
    &operand_data[2748],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4585 */
  {
    "neon_vsri_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2444 },
#else
    { 0, 0, output_2444 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsri_nv4hi },
    &operand_data[2752],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4585 */
  {
    "neon_vsri_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2445 },
#else
    { 0, 0, output_2445 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsri_nv8hi },
    &operand_data[2756],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4585 */
  {
    "neon_vsri_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2446 },
#else
    { 0, 0, output_2446 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsri_nv2si },
    &operand_data[2760],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4585 */
  {
    "neon_vsri_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2447 },
#else
    { 0, 0, output_2447 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsri_nv4si },
    &operand_data[2764],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4585 */
  {
    "neon_vsri_ndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2448 },
#else
    { 0, 0, output_2448 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsri_ndi },
    &operand_data[2768],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4585 */
  {
    "neon_vsri_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2449 },
#else
    { 0, 0, output_2449 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsri_nv2di },
    &operand_data[2772],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4599 */
  {
    "neon_vsli_nv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2450 },
#else
    { 0, 0, output_2450 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsli_nv8qi },
    &operand_data[2744],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4599 */
  {
    "neon_vsli_nv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2451 },
#else
    { 0, 0, output_2451 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsli_nv16qi },
    &operand_data[2748],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4599 */
  {
    "neon_vsli_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2452 },
#else
    { 0, 0, output_2452 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsli_nv4hi },
    &operand_data[2752],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4599 */
  {
    "neon_vsli_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2453 },
#else
    { 0, 0, output_2453 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsli_nv8hi },
    &operand_data[2756],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4599 */
  {
    "neon_vsli_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2454 },
#else
    { 0, 0, output_2454 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsli_nv2si },
    &operand_data[2760],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4599 */
  {
    "neon_vsli_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2455 },
#else
    { 0, 0, output_2455 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsli_nv4si },
    &operand_data[2764],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4599 */
  {
    "neon_vsli_ndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2456 },
#else
    { 0, 0, output_2456 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsli_ndi },
    &operand_data[2768],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4599 */
  {
    "neon_vsli_nv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2457 },
#else
    { 0, 0, output_2457 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsli_nv2di },
    &operand_data[2772],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4613 */
  {
    "neon_vtbl1v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtbl.8\t%P0, {%P1}, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtbl1v8qi },
    &operand_data[1807],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4623 */
  {
    "neon_vtbl2v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2459 },
#else
    { 0, 0, output_2459 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtbl2v8qi },
    &operand_data[2776],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4644 */
  {
    "neon_vtbl3v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2460 },
#else
    { 0, 0, output_2460 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtbl3v8qi },
    &operand_data[2779],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4666 */
  {
    "neon_vtbl4v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2461 },
#else
    { 0, 0, output_2461 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtbl4v8qi },
    &operand_data[2782],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4690 */
  {
    "neon_vtbl1v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtbl1v16qi },
    &operand_data[2785],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4721 */
  {
    "neon_vtbl2v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtbl2v16qi },
    &operand_data[2788],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4756 */
  {
    "neon_vcombinev16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcombinev16qi },
    &operand_data[2791],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4772 */
  {
    "neon_vtbx1v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtbx.8\t%P0, {%P2}, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtbx1v8qi },
    &operand_data[1840],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4783 */
  {
    "neon_vtbx2v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2466 },
#else
    { 0, 0, output_2466 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtbx2v8qi },
    &operand_data[2794],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4805 */
  {
    "neon_vtbx3v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2467 },
#else
    { 0, 0, output_2467 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtbx3v8qi },
    &operand_data[2798],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4828 */
  {
    "neon_vtbx4v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2468 },
#else
    { 0, 0, output_2468 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtbx4v8qi },
    &operand_data[2802],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4865 */
  {
    "*neon_vtrnv8qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtrn.8\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2806],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4865 */
  {
    "*neon_vtrnv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtrn.8\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2810],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4865 */
  {
    "*neon_vtrnv4hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtrn.16\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2814],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4865 */
  {
    "*neon_vtrnv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtrn.16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2818],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4865 */
  {
    "*neon_vtrnv2si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtrn.32\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2822],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4865 */
  {
    "*neon_vtrnv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtrn.32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2826],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4865 */
  {
    "*neon_vtrnv2sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtrn.32\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2830],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4865 */
  {
    "*neon_vtrnv4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtrn.32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2834],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4865 */
  {
    "*neon_vtrnv8hf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtrn.16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2838],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4865 */
  {
    "*neon_vtrnv4hf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vtrn.16\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2842],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4891 */
  {
    "*neon_vzipv8qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vzip.8\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2806],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4891 */
  {
    "*neon_vzipv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vzip.8\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2810],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4891 */
  {
    "*neon_vzipv4hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vzip.16\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2814],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4891 */
  {
    "*neon_vzipv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vzip.16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2818],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4891 */
  {
    "*neon_vzipv2si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vzip.32\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2822],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4891 */
  {
    "*neon_vzipv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vzip.32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2826],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4891 */
  {
    "*neon_vzipv2sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vzip.32\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2830],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4891 */
  {
    "*neon_vzipv4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vzip.32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2834],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4891 */
  {
    "*neon_vzipv8hf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vzip.16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2838],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4891 */
  {
    "*neon_vzipv4hf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vzip.16\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2842],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4917 */
  {
    "*neon_vuzpv8qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vuzp.8\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2806],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4917 */
  {
    "*neon_vuzpv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vuzp.8\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2810],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4917 */
  {
    "*neon_vuzpv4hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vuzp.16\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2814],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4917 */
  {
    "*neon_vuzpv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vuzp.16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2818],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4917 */
  {
    "*neon_vuzpv2si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vuzp.32\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2822],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4917 */
  {
    "*neon_vuzpv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vuzp.32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2826],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4917 */
  {
    "*neon_vuzpv2sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vuzp.32\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2830],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4917 */
  {
    "*neon_vuzpv4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vuzp.32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2834],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4917 */
  {
    "*neon_vuzpv8hf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vuzp.16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2838],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4917 */
  {
    "*neon_vuzpv4hf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vuzp.16\t%P0, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2842],
    4,
    4,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4936 */
  {
    "neon_vld1v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.8\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1v8qi },
    &operand_data[2846],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4936 */
  {
    "neon_vld1v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.8\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1v16qi },
    &operand_data[2848],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4936 */
  {
    "neon_vld1v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.16\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1v4hi },
    &operand_data[2850],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4936 */
  {
    "neon_vld1v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.16\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1v8hi },
    &operand_data[2852],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4936 */
  {
    "neon_vld1v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.32\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1v2si },
    &operand_data[2854],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4936 */
  {
    "neon_vld1v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.32\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1v4si },
    &operand_data[2856],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4936 */
  {
    "neon_vld1v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.16\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1v4hf },
    &operand_data[2858],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4936 */
  {
    "neon_vld1v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.16\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1v8hf },
    &operand_data[2860],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4936 */
  {
    "neon_vld1v4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.16\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1v4bf },
    &operand_data[2862],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4936 */
  {
    "neon_vld1v8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.16\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1v8bf },
    &operand_data[2864],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4936 */
  {
    "neon_vld1v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.32\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1v2sf },
    &operand_data[2866],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4936 */
  {
    "neon_vld1v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.32\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1v4sf },
    &operand_data[2868],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4936 */
  {
    "neon_vld1di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.64\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1di },
    &operand_data[2870],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4936 */
  {
    "neon_vld1v2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.64\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1v2di },
    &operand_data[2872],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4948 */
  {
    "neon_vld1_lanev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2513 },
#else
    { 0, 0, output_2513 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_lanev8qi },
    &operand_data[2874],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4948 */
  {
    "neon_vld1_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2514 },
#else
    { 0, 0, output_2514 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_lanev4hi },
    &operand_data[2878],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4948 */
  {
    "neon_vld1_lanev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2515 },
#else
    { 0, 0, output_2515 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_lanev4hf },
    &operand_data[2882],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4948 */
  {
    "neon_vld1_lanev4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2516 },
#else
    { 0, 0, output_2516 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_lanev4bf },
    &operand_data[2886],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4948 */
  {
    "neon_vld1_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2517 },
#else
    { 0, 0, output_2517 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_lanev2si },
    &operand_data[2890],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4948 */
  {
    "neon_vld1_lanev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2518 },
#else
    { 0, 0, output_2518 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_lanev2sf },
    &operand_data[2894],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4948 */
  {
    "neon_vld1_lanedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2519 },
#else
    { 0, 0, output_2519 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_lanedi },
    &operand_data[2898],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4969 */
  {
    "neon_vld1_lanev16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2520 },
#else
    { 0, 0, output_2520 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_lanev16qi },
    &operand_data[2902],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4969 */
  {
    "neon_vld1_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2521 },
#else
    { 0, 0, output_2521 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_lanev8hi },
    &operand_data[2906],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4969 */
  {
    "neon_vld1_lanev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2522 },
#else
    { 0, 0, output_2522 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_lanev8hf },
    &operand_data[2910],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4969 */
  {
    "neon_vld1_lanev8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2523 },
#else
    { 0, 0, output_2523 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_lanev8bf },
    &operand_data[2914],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4969 */
  {
    "neon_vld1_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2524 },
#else
    { 0, 0, output_2524 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_lanev4si },
    &operand_data[2918],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4969 */
  {
    "neon_vld1_lanev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2525 },
#else
    { 0, 0, output_2525 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_lanev4sf },
    &operand_data[2922],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4969 */
  {
    "neon_vld1_lanev2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2526 },
#else
    { 0, 0, output_2526 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_lanev2di },
    &operand_data[2926],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4996 */
  {
    "neon_vld1_dupv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.8\t{%P0[]}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_dupv8qi },
    &operand_data[2874],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4996 */
  {
    "neon_vld1_dupv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.16\t{%P0[]}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_dupv4hi },
    &operand_data[2878],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4996 */
  {
    "neon_vld1_dupv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.16\t{%P0[]}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_dupv4hf },
    &operand_data[2882],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4996 */
  {
    "neon_vld1_dupv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.16\t{%P0[]}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_dupv4bf },
    &operand_data[2886],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4996 */
  {
    "neon_vld1_dupv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.32\t{%P0[]}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_dupv2si },
    &operand_data[2890],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4996 */
  {
    "neon_vld1_dupv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.32\t{%P0[]}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_dupv2sf },
    &operand_data[2894],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5013 */
  {
    "neon_vld1_dupv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2533 },
#else
    { 0, 0, output_2533 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_dupv16qi },
    &operand_data[2902],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5013 */
  {
    "neon_vld1_dupv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2534 },
#else
    { 0, 0, output_2534 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_dupv8hi },
    &operand_data[2906],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5013 */
  {
    "neon_vld1_dupv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2535 },
#else
    { 0, 0, output_2535 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_dupv8hf },
    &operand_data[2910],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5013 */
  {
    "neon_vld1_dupv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2536 },
#else
    { 0, 0, output_2536 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_dupv4si },
    &operand_data[2918],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5013 */
  {
    "neon_vld1_dupv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2537 },
#else
    { 0, 0, output_2537 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_dupv4sf },
    &operand_data[2922],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5023 */
  {
    "neon_vld1_dupv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_dupv2di },
    &operand_data[2926],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5046 */
  {
    "neon_vst1v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.8\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1v8qi },
    &operand_data[2930],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5046 */
  {
    "neon_vst1v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.8\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1v16qi },
    &operand_data[2932],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5046 */
  {
    "neon_vst1v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.16\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1v4hi },
    &operand_data[2934],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5046 */
  {
    "neon_vst1v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.16\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1v8hi },
    &operand_data[2936],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5046 */
  {
    "neon_vst1v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.32\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1v2si },
    &operand_data[2938],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5046 */
  {
    "neon_vst1v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.32\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1v4si },
    &operand_data[2940],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5046 */
  {
    "neon_vst1v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.16\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1v4hf },
    &operand_data[2942],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5046 */
  {
    "neon_vst1v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.16\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1v8hf },
    &operand_data[2944],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5046 */
  {
    "neon_vst1v4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.16\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1v4bf },
    &operand_data[2946],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5046 */
  {
    "neon_vst1v8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.16\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1v8bf },
    &operand_data[2948],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5046 */
  {
    "neon_vst1v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.32\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1v2sf },
    &operand_data[2950],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5046 */
  {
    "neon_vst1v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.32\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1v4sf },
    &operand_data[2952],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5046 */
  {
    "neon_vst1di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.64\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1di },
    &operand_data[2954],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5046 */
  {
    "neon_vst1v2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst1.64\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1v2di },
    &operand_data[2956],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5056 */
  {
    "neon_vst1_lanev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2553 },
#else
    { 0, 0, output_2553 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1_lanev8qi },
    &operand_data[2958],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5056 */
  {
    "neon_vst1_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2554 },
#else
    { 0, 0, output_2554 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1_lanev4hi },
    &operand_data[2961],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5056 */
  {
    "neon_vst1_lanev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2555 },
#else
    { 0, 0, output_2555 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1_lanev4hf },
    &operand_data[2964],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5056 */
  {
    "neon_vst1_lanev4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2556 },
#else
    { 0, 0, output_2556 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1_lanev4bf },
    &operand_data[2967],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5056 */
  {
    "neon_vst1_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2557 },
#else
    { 0, 0, output_2557 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1_lanev2si },
    &operand_data[2970],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5056 */
  {
    "neon_vst1_lanev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2558 },
#else
    { 0, 0, output_2558 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1_lanev2sf },
    &operand_data[2973],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5056 */
  {
    "neon_vst1_lanedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2559 },
#else
    { 0, 0, output_2559 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1_lanedi },
    &operand_data[2976],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5077 */
  {
    "neon_vst1_lanev16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2560 },
#else
    { 0, 0, output_2560 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1_lanev16qi },
    &operand_data[2979],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5077 */
  {
    "neon_vst1_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2561 },
#else
    { 0, 0, output_2561 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1_lanev8hi },
    &operand_data[2982],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5077 */
  {
    "neon_vst1_lanev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2562 },
#else
    { 0, 0, output_2562 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1_lanev8hf },
    &operand_data[2985],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5077 */
  {
    "neon_vst1_lanev8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2563 },
#else
    { 0, 0, output_2563 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1_lanev8bf },
    &operand_data[2988],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5077 */
  {
    "neon_vst1_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2564 },
#else
    { 0, 0, output_2564 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1_lanev4si },
    &operand_data[2991],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5077 */
  {
    "neon_vst1_lanev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2565 },
#else
    { 0, 0, output_2565 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1_lanev4sf },
    &operand_data[2994],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5077 */
  {
    "neon_vst1_lanev2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2566 },
#else
    { 0, 0, output_2566 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst1_lanev2di },
    &operand_data[2997],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5110 */
  {
    "neon_vld2v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2567 },
#else
    { 0, 0, output_2567 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2v8qi },
    &operand_data[3000],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5110 */
  {
    "neon_vld2v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2568 },
#else
    { 0, 0, output_2568 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2v4hi },
    &operand_data[3000],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5110 */
  {
    "neon_vld2v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2569 },
#else
    { 0, 0, output_2569 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2v4hf },
    &operand_data[3000],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5110 */
  {
    "neon_vld2v4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2570 },
#else
    { 0, 0, output_2570 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2v4bf },
    &operand_data[3000],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5110 */
  {
    "neon_vld2v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2571 },
#else
    { 0, 0, output_2571 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2v2si },
    &operand_data[3000],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5110 */
  {
    "neon_vld2v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2572 },
#else
    { 0, 0, output_2572 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2v2sf },
    &operand_data[3000],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5110 */
  {
    "neon_vld2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2573 },
#else
    { 0, 0, output_2573 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2di },
    &operand_data[3000],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5128 */
  {
    "neon_vld2v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld2.8\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2v16qi },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5128 */
  {
    "neon_vld2v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld2.16\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2v8hi },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5128 */
  {
    "neon_vld2v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld2.16\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2v8hf },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5128 */
  {
    "neon_vld2v8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld2.16\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2v8bf },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5128 */
  {
    "neon_vld2v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld2.32\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2v4si },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5128 */
  {
    "neon_vld2v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld2.32\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2v4sf },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5139 */
  {
    "neon_vld2_lanev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2580 },
#else
    { 0, 0, output_2580 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_lanev8qi },
    &operand_data[3004],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5139 */
  {
    "neon_vld2_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2581 },
#else
    { 0, 0, output_2581 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_lanev4hi },
    &operand_data[3008],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5139 */
  {
    "neon_vld2_lanev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2582 },
#else
    { 0, 0, output_2582 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_lanev4hf },
    &operand_data[3012],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5139 */
  {
    "neon_vld2_lanev4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2583 },
#else
    { 0, 0, output_2583 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_lanev4bf },
    &operand_data[3016],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5139 */
  {
    "neon_vld2_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2584 },
#else
    { 0, 0, output_2584 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_lanev2si },
    &operand_data[3020],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5139 */
  {
    "neon_vld2_lanev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2585 },
#else
    { 0, 0, output_2585 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_lanev2sf },
    &operand_data[3024],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5163 */
  {
    "neon_vld2_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2586 },
#else
    { 0, 0, output_2586 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_lanev8hi },
    &operand_data[3028],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5163 */
  {
    "neon_vld2_lanev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2587 },
#else
    { 0, 0, output_2587 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_lanev8hf },
    &operand_data[3032],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5163 */
  {
    "neon_vld2_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2588 },
#else
    { 0, 0, output_2588 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_lanev4si },
    &operand_data[3036],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5163 */
  {
    "neon_vld2_lanev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2589 },
#else
    { 0, 0, output_2589 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_lanev4sf },
    &operand_data[3040],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5163 */
  {
    "neon_vld2_lanev8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2590 },
#else
    { 0, 0, output_2590 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_lanev8bf },
    &operand_data[3044],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5191 */
  {
    "neon_vld2_dupv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2591 },
#else
    { 0, 0, output_2591 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_dupv8qi },
    &operand_data[3004],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5191 */
  {
    "neon_vld2_dupv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2592 },
#else
    { 0, 0, output_2592 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_dupv4hi },
    &operand_data[3008],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5191 */
  {
    "neon_vld2_dupv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2593 },
#else
    { 0, 0, output_2593 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_dupv4hf },
    &operand_data[3012],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5191 */
  {
    "neon_vld2_dupv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2594 },
#else
    { 0, 0, output_2594 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_dupv4bf },
    &operand_data[3016],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5191 */
  {
    "neon_vld2_dupv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2595 },
#else
    { 0, 0, output_2595 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_dupv2si },
    &operand_data[3020],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5191 */
  {
    "neon_vld2_dupv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2596 },
#else
    { 0, 0, output_2596 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_dupv2sf },
    &operand_data[3024],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5191 */
  {
    "neon_vld2_dupdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2597 },
#else
    { 0, 0, output_2597 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_dupdi },
    &operand_data[3048],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5209 */
  {
    "neon_vld2_dupv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2598 },
#else
    { 0, 0, output_2598 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld2_dupv8bf },
    &operand_data[3050],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5237 */
  {
    "neon_vst2v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2599 },
#else
    { 0, 0, output_2599 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2v8qi },
    &operand_data[3052],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5237 */
  {
    "neon_vst2v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2600 },
#else
    { 0, 0, output_2600 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2v4hi },
    &operand_data[3052],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5237 */
  {
    "neon_vst2v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2601 },
#else
    { 0, 0, output_2601 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2v4hf },
    &operand_data[3052],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5237 */
  {
    "neon_vst2v4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2602 },
#else
    { 0, 0, output_2602 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2v4bf },
    &operand_data[3052],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5237 */
  {
    "neon_vst2v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2603 },
#else
    { 0, 0, output_2603 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2v2si },
    &operand_data[3052],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5237 */
  {
    "neon_vst2v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2604 },
#else
    { 0, 0, output_2604 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2v2sf },
    &operand_data[3052],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5237 */
  {
    "neon_vst2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2605 },
#else
    { 0, 0, output_2605 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2di },
    &operand_data[3052],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5255 */
  {
    "neon_vst2v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst2.8\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2v16qi },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5255 */
  {
    "neon_vst2v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst2.16\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2v8hi },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5255 */
  {
    "neon_vst2v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst2.16\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2v8hf },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5255 */
  {
    "neon_vst2v8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst2.16\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2v8bf },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5255 */
  {
    "neon_vst2v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst2.32\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2v4si },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5255 */
  {
    "neon_vst2v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vst2.32\t%h1, %A0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2v4sf },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5267 */
  {
    "neon_vst2_lanev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2612 },
#else
    { 0, 0, output_2612 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2_lanev8qi },
    &operand_data[3056],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5267 */
  {
    "neon_vst2_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2613 },
#else
    { 0, 0, output_2613 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2_lanev4hi },
    &operand_data[3059],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5267 */
  {
    "neon_vst2_lanev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2614 },
#else
    { 0, 0, output_2614 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2_lanev4hf },
    &operand_data[3062],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5267 */
  {
    "neon_vst2_lanev4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2615 },
#else
    { 0, 0, output_2615 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2_lanev4bf },
    &operand_data[3065],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5267 */
  {
    "neon_vst2_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2616 },
#else
    { 0, 0, output_2616 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2_lanev2si },
    &operand_data[3068],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5267 */
  {
    "neon_vst2_lanev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2617 },
#else
    { 0, 0, output_2617 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2_lanev2sf },
    &operand_data[3071],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5291 */
  {
    "neon_vst2_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2618 },
#else
    { 0, 0, output_2618 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2_lanev8hi },
    &operand_data[3074],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5291 */
  {
    "neon_vst2_lanev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2619 },
#else
    { 0, 0, output_2619 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2_lanev8hf },
    &operand_data[3077],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5291 */
  {
    "neon_vst2_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2620 },
#else
    { 0, 0, output_2620 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2_lanev4si },
    &operand_data[3080],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5291 */
  {
    "neon_vst2_lanev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2621 },
#else
    { 0, 0, output_2621 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2_lanev4sf },
    &operand_data[3083],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5291 */
  {
    "neon_vst2_lanev8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2622 },
#else
    { 0, 0, output_2622 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst2_lanev8bf },
    &operand_data[3086],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5326 */
  {
    "neon_vld3v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2623 },
#else
    { 0, 0, output_2623 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3v8qi },
    &operand_data[3089],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5326 */
  {
    "neon_vld3v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2624 },
#else
    { 0, 0, output_2624 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3v4hi },
    &operand_data[3089],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5326 */
  {
    "neon_vld3v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2625 },
#else
    { 0, 0, output_2625 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3v4hf },
    &operand_data[3089],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5326 */
  {
    "neon_vld3v4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2626 },
#else
    { 0, 0, output_2626 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3v4bf },
    &operand_data[3089],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5326 */
  {
    "neon_vld3v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2627 },
#else
    { 0, 0, output_2627 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3v2si },
    &operand_data[3089],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5326 */
  {
    "neon_vld3v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2628 },
#else
    { 0, 0, output_2628 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3v2sf },
    &operand_data[3089],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5326 */
  {
    "neon_vld3di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2629 },
#else
    { 0, 0, output_2629 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3di },
    &operand_data[3089],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5369 */
  {
    "neon_vld3qav16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2630 },
#else
    { 0, 0, output_2630 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3qav16qi },
    &operand_data[3091],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5369 */
  {
    "neon_vld3qav8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2631 },
#else
    { 0, 0, output_2631 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3qav8hi },
    &operand_data[3091],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5369 */
  {
    "neon_vld3qav8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2632 },
#else
    { 0, 0, output_2632 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3qav8hf },
    &operand_data[3091],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5369 */
  {
    "neon_vld3qav8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2633 },
#else
    { 0, 0, output_2633 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3qav8bf },
    &operand_data[3091],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5369 */
  {
    "neon_vld3qav4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2634 },
#else
    { 0, 0, output_2634 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3qav4si },
    &operand_data[3091],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5369 */
  {
    "neon_vld3qav4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2635 },
#else
    { 0, 0, output_2635 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3qav4sf },
    &operand_data[3091],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5388 */
  {
    "neon_vld3qbv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2636 },
#else
    { 0, 0, output_2636 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3qbv16qi },
    &operand_data[3091],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5388 */
  {
    "neon_vld3qbv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2637 },
#else
    { 0, 0, output_2637 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3qbv8hi },
    &operand_data[3091],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5388 */
  {
    "neon_vld3qbv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2638 },
#else
    { 0, 0, output_2638 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3qbv8hf },
    &operand_data[3091],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5388 */
  {
    "neon_vld3qbv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2639 },
#else
    { 0, 0, output_2639 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3qbv8bf },
    &operand_data[3091],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5388 */
  {
    "neon_vld3qbv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2640 },
#else
    { 0, 0, output_2640 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3qbv4si },
    &operand_data[3091],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5388 */
  {
    "neon_vld3qbv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2641 },
#else
    { 0, 0, output_2641 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3qbv4sf },
    &operand_data[3091],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5410 */
  {
    "neon_vld3_lanev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2642 },
#else
    { 0, 0, output_2642 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_lanev8qi },
    &operand_data[3094],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5410 */
  {
    "neon_vld3_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2643 },
#else
    { 0, 0, output_2643 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_lanev4hi },
    &operand_data[3094],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5410 */
  {
    "neon_vld3_lanev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2644 },
#else
    { 0, 0, output_2644 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_lanev4hf },
    &operand_data[3094],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5410 */
  {
    "neon_vld3_lanev4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2645 },
#else
    { 0, 0, output_2645 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_lanev4bf },
    &operand_data[3094],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5410 */
  {
    "neon_vld3_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2646 },
#else
    { 0, 0, output_2646 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_lanev2si },
    &operand_data[3094],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5410 */
  {
    "neon_vld3_lanev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2647 },
#else
    { 0, 0, output_2647 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_lanev2sf },
    &operand_data[3094],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5436 */
  {
    "neon_vld3_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2648 },
#else
    { 0, 0, output_2648 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_lanev8hi },
    &operand_data[3098],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5436 */
  {
    "neon_vld3_lanev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2649 },
#else
    { 0, 0, output_2649 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_lanev8hf },
    &operand_data[3098],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5436 */
  {
    "neon_vld3_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2650 },
#else
    { 0, 0, output_2650 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_lanev4si },
    &operand_data[3098],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5436 */
  {
    "neon_vld3_lanev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2651 },
#else
    { 0, 0, output_2651 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_lanev4sf },
    &operand_data[3098],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5436 */
  {
    "neon_vld3_lanev8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2652 },
#else
    { 0, 0, output_2652 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_lanev8bf },
    &operand_data[3098],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5466 */
  {
    "neon_vld3_dupv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2653 },
#else
    { 0, 0, output_2653 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_dupv8qi },
    &operand_data[3094],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5466 */
  {
    "neon_vld3_dupv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2654 },
#else
    { 0, 0, output_2654 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_dupv4hi },
    &operand_data[3094],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5466 */
  {
    "neon_vld3_dupv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2655 },
#else
    { 0, 0, output_2655 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_dupv4hf },
    &operand_data[3094],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5466 */
  {
    "neon_vld3_dupv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2656 },
#else
    { 0, 0, output_2656 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_dupv4bf },
    &operand_data[3094],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5466 */
  {
    "neon_vld3_dupv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2657 },
#else
    { 0, 0, output_2657 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_dupv2si },
    &operand_data[3094],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5466 */
  {
    "neon_vld3_dupv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2658 },
#else
    { 0, 0, output_2658 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_dupv2sf },
    &operand_data[3094],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5466 */
  {
    "neon_vld3_dupdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2659 },
#else
    { 0, 0, output_2659 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_dupdi },
    &operand_data[3089],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5492 */
  {
    "neon_vld3_dupv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2660 },
#else
    { 0, 0, output_2660 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3_dupv8bf },
    &operand_data[3102],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5519 */
  {
    "neon_vst3v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2661 },
#else
    { 0, 0, output_2661 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3v8qi },
    &operand_data[3104],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5519 */
  {
    "neon_vst3v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2662 },
#else
    { 0, 0, output_2662 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3v4hi },
    &operand_data[3104],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5519 */
  {
    "neon_vst3v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2663 },
#else
    { 0, 0, output_2663 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3v4hf },
    &operand_data[3104],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5519 */
  {
    "neon_vst3v4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2664 },
#else
    { 0, 0, output_2664 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3v4bf },
    &operand_data[3104],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5519 */
  {
    "neon_vst3v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2665 },
#else
    { 0, 0, output_2665 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3v2si },
    &operand_data[3104],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5519 */
  {
    "neon_vst3v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2666 },
#else
    { 0, 0, output_2666 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3v2sf },
    &operand_data[3104],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5519 */
  {
    "neon_vst3di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2667 },
#else
    { 0, 0, output_2667 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3di },
    &operand_data[3104],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5561 */
  {
    "neon_vst3qav16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2668 },
#else
    { 0, 0, output_2668 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3qav16qi },
    &operand_data[3106],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5561 */
  {
    "neon_vst3qav8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2669 },
#else
    { 0, 0, output_2669 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3qav8hi },
    &operand_data[3106],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5561 */
  {
    "neon_vst3qav8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2670 },
#else
    { 0, 0, output_2670 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3qav8hf },
    &operand_data[3106],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5561 */
  {
    "neon_vst3qav8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2671 },
#else
    { 0, 0, output_2671 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3qav8bf },
    &operand_data[3106],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5561 */
  {
    "neon_vst3qav4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2672 },
#else
    { 0, 0, output_2672 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3qav4si },
    &operand_data[3106],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5561 */
  {
    "neon_vst3qav4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2673 },
#else
    { 0, 0, output_2673 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3qav4sf },
    &operand_data[3106],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5580 */
  {
    "neon_vst3qbv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2674 },
#else
    { 0, 0, output_2674 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3qbv16qi },
    &operand_data[3106],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5580 */
  {
    "neon_vst3qbv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2675 },
#else
    { 0, 0, output_2675 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3qbv8hi },
    &operand_data[3106],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5580 */
  {
    "neon_vst3qbv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2676 },
#else
    { 0, 0, output_2676 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3qbv8hf },
    &operand_data[3106],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5580 */
  {
    "neon_vst3qbv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2677 },
#else
    { 0, 0, output_2677 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3qbv8bf },
    &operand_data[3106],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5580 */
  {
    "neon_vst3qbv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2678 },
#else
    { 0, 0, output_2678 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3qbv4si },
    &operand_data[3106],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5580 */
  {
    "neon_vst3qbv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2679 },
#else
    { 0, 0, output_2679 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3qbv4sf },
    &operand_data[3106],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5601 */
  {
    "neon_vst3_lanev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2680 },
#else
    { 0, 0, output_2680 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3_lanev8qi },
    &operand_data[3108],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5601 */
  {
    "neon_vst3_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2681 },
#else
    { 0, 0, output_2681 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3_lanev4hi },
    &operand_data[3108],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5601 */
  {
    "neon_vst3_lanev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2682 },
#else
    { 0, 0, output_2682 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3_lanev4hf },
    &operand_data[3108],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5601 */
  {
    "neon_vst3_lanev4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2683 },
#else
    { 0, 0, output_2683 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3_lanev4bf },
    &operand_data[3108],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5601 */
  {
    "neon_vst3_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2684 },
#else
    { 0, 0, output_2684 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3_lanev2si },
    &operand_data[3108],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5601 */
  {
    "neon_vst3_lanev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2685 },
#else
    { 0, 0, output_2685 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3_lanev2sf },
    &operand_data[3108],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5627 */
  {
    "neon_vst3_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2686 },
#else
    { 0, 0, output_2686 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3_lanev8hi },
    &operand_data[3111],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5627 */
  {
    "neon_vst3_lanev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2687 },
#else
    { 0, 0, output_2687 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3_lanev8hf },
    &operand_data[3111],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5627 */
  {
    "neon_vst3_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2688 },
#else
    { 0, 0, output_2688 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3_lanev4si },
    &operand_data[3111],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5627 */
  {
    "neon_vst3_lanev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2689 },
#else
    { 0, 0, output_2689 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3_lanev4sf },
    &operand_data[3111],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5627 */
  {
    "neon_vst3_lanev8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2690 },
#else
    { 0, 0, output_2690 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3_lanev8bf },
    &operand_data[3111],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5664 */
  {
    "neon_vld4v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2691 },
#else
    { 0, 0, output_2691 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4v8qi },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5664 */
  {
    "neon_vld4v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2692 },
#else
    { 0, 0, output_2692 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4v4hi },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5664 */
  {
    "neon_vld4v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2693 },
#else
    { 0, 0, output_2693 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4v4hf },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5664 */
  {
    "neon_vld4v4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2694 },
#else
    { 0, 0, output_2694 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4v4bf },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5664 */
  {
    "neon_vld4v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2695 },
#else
    { 0, 0, output_2695 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4v2si },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5664 */
  {
    "neon_vld4v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2696 },
#else
    { 0, 0, output_2696 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4v2sf },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5664 */
  {
    "neon_vld4di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2697 },
#else
    { 0, 0, output_2697 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4di },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5697 */
  {
    "neon_vld4qav16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2698 },
#else
    { 0, 0, output_2698 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4qav16qi },
    &operand_data[3114],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5697 */
  {
    "neon_vld4qav8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2699 },
#else
    { 0, 0, output_2699 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4qav8hi },
    &operand_data[3114],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5697 */
  {
    "neon_vld4qav8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2700 },
#else
    { 0, 0, output_2700 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4qav8hf },
    &operand_data[3114],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5697 */
  {
    "neon_vld4qav8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2701 },
#else
    { 0, 0, output_2701 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4qav8bf },
    &operand_data[3114],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5697 */
  {
    "neon_vld4qav4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2702 },
#else
    { 0, 0, output_2702 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4qav4si },
    &operand_data[3114],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5697 */
  {
    "neon_vld4qav4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2703 },
#else
    { 0, 0, output_2703 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4qav4sf },
    &operand_data[3114],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5717 */
  {
    "neon_vld4qbv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2704 },
#else
    { 0, 0, output_2704 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4qbv16qi },
    &operand_data[3114],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5717 */
  {
    "neon_vld4qbv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2705 },
#else
    { 0, 0, output_2705 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4qbv8hi },
    &operand_data[3114],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5717 */
  {
    "neon_vld4qbv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2706 },
#else
    { 0, 0, output_2706 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4qbv8hf },
    &operand_data[3114],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5717 */
  {
    "neon_vld4qbv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2707 },
#else
    { 0, 0, output_2707 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4qbv8bf },
    &operand_data[3114],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5717 */
  {
    "neon_vld4qbv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2708 },
#else
    { 0, 0, output_2708 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4qbv4si },
    &operand_data[3114],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5717 */
  {
    "neon_vld4qbv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2709 },
#else
    { 0, 0, output_2709 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4qbv4sf },
    &operand_data[3114],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5740 */
  {
    "neon_vld4_lanev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2710 },
#else
    { 0, 0, output_2710 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_lanev8qi },
    &operand_data[3028],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5740 */
  {
    "neon_vld4_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2711 },
#else
    { 0, 0, output_2711 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_lanev4hi },
    &operand_data[3117],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5740 */
  {
    "neon_vld4_lanev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2712 },
#else
    { 0, 0, output_2712 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_lanev4hf },
    &operand_data[3121],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5740 */
  {
    "neon_vld4_lanev4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2713 },
#else
    { 0, 0, output_2713 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_lanev4bf },
    &operand_data[3125],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5740 */
  {
    "neon_vld4_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2714 },
#else
    { 0, 0, output_2714 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_lanev2si },
    &operand_data[3129],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5740 */
  {
    "neon_vld4_lanev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2715 },
#else
    { 0, 0, output_2715 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_lanev2sf },
    &operand_data[3133],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5767 */
  {
    "neon_vld4_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2716 },
#else
    { 0, 0, output_2716 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_lanev8hi },
    &operand_data[3137],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5767 */
  {
    "neon_vld4_lanev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2717 },
#else
    { 0, 0, output_2717 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_lanev8hf },
    &operand_data[3141],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5767 */
  {
    "neon_vld4_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2718 },
#else
    { 0, 0, output_2718 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_lanev4si },
    &operand_data[3145],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5767 */
  {
    "neon_vld4_lanev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2719 },
#else
    { 0, 0, output_2719 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_lanev4sf },
    &operand_data[3149],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5767 */
  {
    "neon_vld4_lanev8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2720 },
#else
    { 0, 0, output_2720 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_lanev8bf },
    &operand_data[3153],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5798 */
  {
    "neon_vld4_dupv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2721 },
#else
    { 0, 0, output_2721 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_dupv8qi },
    &operand_data[3028],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5798 */
  {
    "neon_vld4_dupv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2722 },
#else
    { 0, 0, output_2722 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_dupv4hi },
    &operand_data[3117],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5798 */
  {
    "neon_vld4_dupv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2723 },
#else
    { 0, 0, output_2723 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_dupv4hf },
    &operand_data[3121],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5798 */
  {
    "neon_vld4_dupv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2724 },
#else
    { 0, 0, output_2724 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_dupv4bf },
    &operand_data[3125],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5798 */
  {
    "neon_vld4_dupv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2725 },
#else
    { 0, 0, output_2725 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_dupv2si },
    &operand_data[3129],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5798 */
  {
    "neon_vld4_dupv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2726 },
#else
    { 0, 0, output_2726 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_dupv2sf },
    &operand_data[3133],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5798 */
  {
    "neon_vld4_dupdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2727 },
#else
    { 0, 0, output_2727 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_dupdi },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5827 */
  {
    "neon_vld4_dupv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2728 },
#else
    { 0, 0, output_2728 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4_dupv8bf },
    &operand_data[3157],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5855 */
  {
    "neon_vst4v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2729 },
#else
    { 0, 0, output_2729 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4v8qi },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5855 */
  {
    "neon_vst4v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2730 },
#else
    { 0, 0, output_2730 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4v4hi },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5855 */
  {
    "neon_vst4v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2731 },
#else
    { 0, 0, output_2731 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4v4hf },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5855 */
  {
    "neon_vst4v4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2732 },
#else
    { 0, 0, output_2732 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4v4bf },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5855 */
  {
    "neon_vst4v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2733 },
#else
    { 0, 0, output_2733 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4v2si },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5855 */
  {
    "neon_vst4v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2734 },
#else
    { 0, 0, output_2734 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4v2sf },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5855 */
  {
    "neon_vst4di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2735 },
#else
    { 0, 0, output_2735 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4di },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5888 */
  {
    "neon_vst4qav16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2736 },
#else
    { 0, 0, output_2736 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4qav16qi },
    &operand_data[3159],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5888 */
  {
    "neon_vst4qav8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2737 },
#else
    { 0, 0, output_2737 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4qav8hi },
    &operand_data[3159],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5888 */
  {
    "neon_vst4qav8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2738 },
#else
    { 0, 0, output_2738 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4qav8hf },
    &operand_data[3159],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5888 */
  {
    "neon_vst4qav8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2739 },
#else
    { 0, 0, output_2739 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4qav8bf },
    &operand_data[3159],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5888 */
  {
    "neon_vst4qav4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2740 },
#else
    { 0, 0, output_2740 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4qav4si },
    &operand_data[3159],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5888 */
  {
    "neon_vst4qav4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2741 },
#else
    { 0, 0, output_2741 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4qav4sf },
    &operand_data[3159],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5908 */
  {
    "neon_vst4qbv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2742 },
#else
    { 0, 0, output_2742 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4qbv16qi },
    &operand_data[3159],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5908 */
  {
    "neon_vst4qbv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2743 },
#else
    { 0, 0, output_2743 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4qbv8hi },
    &operand_data[3159],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5908 */
  {
    "neon_vst4qbv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2744 },
#else
    { 0, 0, output_2744 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4qbv8hf },
    &operand_data[3159],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5908 */
  {
    "neon_vst4qbv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2745 },
#else
    { 0, 0, output_2745 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4qbv8bf },
    &operand_data[3159],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5908 */
  {
    "neon_vst4qbv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2746 },
#else
    { 0, 0, output_2746 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4qbv4si },
    &operand_data[3159],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5908 */
  {
    "neon_vst4qbv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2747 },
#else
    { 0, 0, output_2747 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4qbv4sf },
    &operand_data[3159],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5930 */
  {
    "neon_vst4_lanev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2748 },
#else
    { 0, 0, output_2748 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4_lanev8qi },
    &operand_data[3074],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5930 */
  {
    "neon_vst4_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2749 },
#else
    { 0, 0, output_2749 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4_lanev4hi },
    &operand_data[3161],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5930 */
  {
    "neon_vst4_lanev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2750 },
#else
    { 0, 0, output_2750 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4_lanev4hf },
    &operand_data[3164],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5930 */
  {
    "neon_vst4_lanev4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2751 },
#else
    { 0, 0, output_2751 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4_lanev4bf },
    &operand_data[3167],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5930 */
  {
    "neon_vst4_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2752 },
#else
    { 0, 0, output_2752 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4_lanev2si },
    &operand_data[3170],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5930 */
  {
    "neon_vst4_lanev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2753 },
#else
    { 0, 0, output_2753 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4_lanev2sf },
    &operand_data[3173],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5957 */
  {
    "neon_vst4_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2754 },
#else
    { 0, 0, output_2754 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4_lanev8hi },
    &operand_data[3176],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5957 */
  {
    "neon_vst4_lanev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2755 },
#else
    { 0, 0, output_2755 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4_lanev8hf },
    &operand_data[3179],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5957 */
  {
    "neon_vst4_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2756 },
#else
    { 0, 0, output_2756 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4_lanev4si },
    &operand_data[3182],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5957 */
  {
    "neon_vst4_lanev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2757 },
#else
    { 0, 0, output_2757 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4_lanev4sf },
    &operand_data[3185],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5957 */
  {
    "neon_vst4_lanev8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2758 },
#else
    { 0, 0, output_2758 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4_lanev8bf },
    &operand_data[3188],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5988 */
  {
    "neon_vec_unpacks_lo_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.s8 %q0, %e1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_unpacks_lo_v16qi },
    &operand_data[3191],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5988 */
  {
    "neon_vec_unpacku_lo_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.u8 %q0, %e1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_unpacku_lo_v16qi },
    &operand_data[3191],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5988 */
  {
    "neon_vec_unpacks_lo_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.s16 %q0, %e1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_unpacks_lo_v8hi },
    &operand_data[3194],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5988 */
  {
    "neon_vec_unpacku_lo_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.u16 %q0, %e1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_unpacku_lo_v8hi },
    &operand_data[3194],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5988 */
  {
    "neon_vec_unpacks_lo_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.s32 %q0, %e1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_unpacks_lo_v4si },
    &operand_data[3197],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5988 */
  {
    "neon_vec_unpacku_lo_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.u32 %q0, %e1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_unpacku_lo_v4si },
    &operand_data[3197],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5998 */
  {
    "neon_vec_unpacks_hi_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.s8 %q0, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_unpacks_hi_v16qi },
    &operand_data[3200],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5998 */
  {
    "neon_vec_unpacku_hi_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.u8 %q0, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_unpacku_hi_v16qi },
    &operand_data[3200],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5998 */
  {
    "neon_vec_unpacks_hi_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.s16 %q0, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_unpacks_hi_v8hi },
    &operand_data[3203],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5998 */
  {
    "neon_vec_unpacku_hi_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.u16 %q0, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_unpacku_hi_v8hi },
    &operand_data[3203],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5998 */
  {
    "neon_vec_unpacks_hi_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.s32 %q0, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_unpacks_hi_v4si },
    &operand_data[3206],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5998 */
  {
    "neon_vec_unpacku_hi_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.u32 %q0, %f1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_unpacku_hi_v4si },
    &operand_data[3206],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6045 */
  {
    "neon_vec_smult_lo_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.s8 %q0, %e1, %e3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_smult_lo_v16qi },
    &operand_data[3209],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6045 */
  {
    "neon_vec_umult_lo_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.u8 %q0, %e1, %e3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_umult_lo_v16qi },
    &operand_data[3209],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6045 */
  {
    "neon_vec_smult_lo_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.s16 %q0, %e1, %e3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_smult_lo_v8hi },
    &operand_data[3213],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6045 */
  {
    "neon_vec_umult_lo_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.u16 %q0, %e1, %e3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_umult_lo_v8hi },
    &operand_data[3213],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6045 */
  {
    "neon_vec_smult_lo_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.s32 %q0, %e1, %e3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_smult_lo_v4si },
    &operand_data[3217],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6045 */
  {
    "neon_vec_umult_lo_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.u32 %q0, %e1, %e3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_umult_lo_v4si },
    &operand_data[3217],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6079 */
  {
    "neon_vec_smult_hi_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.s8 %q0, %f1, %f3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_smult_hi_v16qi },
    &operand_data[3221],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6079 */
  {
    "neon_vec_umult_hi_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.u8 %q0, %f1, %f3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_umult_hi_v16qi },
    &operand_data[3221],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6079 */
  {
    "neon_vec_smult_hi_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.s16 %q0, %f1, %f3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_smult_hi_v8hi },
    &operand_data[3225],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6079 */
  {
    "neon_vec_umult_hi_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.u16 %q0, %f1, %f3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_umult_hi_v8hi },
    &operand_data[3225],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6079 */
  {
    "neon_vec_smult_hi_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.s32 %q0, %f1, %f3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_smult_hi_v4si },
    &operand_data[3229],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6079 */
  {
    "neon_vec_umult_hi_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.u32 %q0, %f1, %f3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_umult_hi_v4si },
    &operand_data[3229],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6114 */
  {
    "neon_vec_sshiftl_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2783 },
#else
    { 0, 0, output_2783 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_sshiftl_v8qi },
    &operand_data[3233],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6114 */
  {
    "neon_vec_ushiftl_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2784 },
#else
    { 0, 0, output_2784 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_ushiftl_v8qi },
    &operand_data[3233],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6114 */
  {
    "neon_vec_sshiftl_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2785 },
#else
    { 0, 0, output_2785 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_sshiftl_v4hi },
    &operand_data[3236],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6114 */
  {
    "neon_vec_ushiftl_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2786 },
#else
    { 0, 0, output_2786 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_ushiftl_v4hi },
    &operand_data[3236],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6114 */
  {
    "neon_vec_sshiftl_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2787 },
#else
    { 0, 0, output_2787 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_sshiftl_v2si },
    &operand_data[3239],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6114 */
  {
    "neon_vec_ushiftl_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2788 },
#else
    { 0, 0, output_2788 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_ushiftl_v2si },
    &operand_data[3239],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6153 */
  {
    "neon_unpacks_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.s8 %q0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_unpacks_v8qi },
    &operand_data[3233],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6153 */
  {
    "neon_unpacku_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.u8 %q0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_unpacku_v8qi },
    &operand_data[3233],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6153 */
  {
    "neon_unpacks_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.s16 %q0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_unpacks_v4hi },
    &operand_data[3236],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6153 */
  {
    "neon_unpacku_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.u16 %q0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_unpacku_v4hi },
    &operand_data[3236],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6153 */
  {
    "neon_unpacks_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.s32 %q0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_unpacks_v2si },
    &operand_data[3239],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6153 */
  {
    "neon_unpacku_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovl.u32 %q0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_unpacku_v2si },
    &operand_data[3239],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6187 */
  {
    "neon_vec_smult_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.s8 %q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_smult_v8qi },
    &operand_data[3242],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6187 */
  {
    "neon_vec_umult_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.u8 %q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_umult_v8qi },
    &operand_data[3242],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6187 */
  {
    "neon_vec_smult_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.s16 %q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_smult_v4hi },
    &operand_data[3245],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6187 */
  {
    "neon_vec_umult_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.u16 %q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_umult_v4hi },
    &operand_data[3245],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6187 */
  {
    "neon_vec_smult_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.s32 %q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_smult_v2si },
    &operand_data[3248],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6187 */
  {
    "neon_vec_umult_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.u32 %q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_umult_v2si },
    &operand_data[3248],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6260 */
  {
    "vec_pack_trunc_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovn.i16\t%e0, %q1\n\tvmovn.i16\t%f0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_v8hi },
    &operand_data[3251],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6260 */
  {
    "vec_pack_trunc_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovn.i32\t%e0, %q1\n\tvmovn.i32\t%f0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_v4si },
    &operand_data[3254],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6260 */
  {
    "vec_pack_trunc_v2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovn.i64\t%e0, %q1\n\tvmovn.i64\t%f0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_v2di },
    &operand_data[3257],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6274 */
  {
    "neon_vec_pack_trunc_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovn.i16\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_pack_trunc_v8hi },
    &operand_data[3260],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6274 */
  {
    "neon_vec_pack_trunc_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovn.i32\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_pack_trunc_v4si },
    &operand_data[3262],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6274 */
  {
    "neon_vec_pack_trunc_v2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovn.i64\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vec_pack_trunc_v2di },
    &operand_data[3264],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6296 */
  {
    "neon_vabdv4hf_2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.f16 %P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdv4hf_2 },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6296 */
  {
    "neon_vabdv8hf_2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.f16 %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdv8hf_2 },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6296 */
  {
    "neon_vabdv2sf_2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.f32 %P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdv2sf_2 },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6296 */
  {
    "neon_vabdv4sf_2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.f32 %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdv4sf_2 },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6305 */
  {
    "neon_vabdv4hf_3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.f16 %P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdv4hf_3 },
    &operand_data[1825],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6305 */
  {
    "neon_vabdv8hf_3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.f16 %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdv8hf_3 },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6305 */
  {
    "neon_vabdv2sf_3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.f32 %P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdv2sf_3 },
    &operand_data[1831],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6305 */
  {
    "neon_vabdv4sf_3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.f32 %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabdv4sf_3 },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6315 */
  {
    "neon_smmlav16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsmmla.s8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_smmlav16qi },
    &operand_data[2321],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6315 */
  {
    "neon_ummlav16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vummla.u8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_ummlav16qi },
    &operand_data[2321],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6315 */
  {
    "neon_usmmlav16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vusmmla.s8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_usmmlav16qi },
    &operand_data[2321],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6326 */
  {
    "neon_vbfdotv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdot.bf16\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfdotv2sf },
    &operand_data[3266],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6326 */
  {
    "neon_vbfdotv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdot.bf16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfdotv4sf },
    &operand_data[3270],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6338 */
  {
    "neon_vbfdot_lanev4bfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdot.bf16\t%P0, %P2, %P3[%c4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfdot_lanev4bfv2sf },
    &operand_data[3274],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6338 */
  {
    "neon_vbfdot_lanev4bfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdot.bf16\t%q0, %q2, %P3[%c4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfdot_lanev4bfv4sf },
    &operand_data[3279],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6351 */
  {
    "neon_vbfdot_lanev8bfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2822 },
#else
    { 0, 0, output_2822 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfdot_lanev8bfv2sf },
    &operand_data[3284],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6351 */
  {
    "neon_vbfdot_lanev8bfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2823 },
#else
    { 0, 0, output_2823 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfdot_lanev8bfv4sf },
    &operand_data[3289],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6374 */
  {
    "neon_vbfcvtv4sfv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.bf16.f32\t%P0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfcvtv4sfv4bf },
    &operand_data[3294],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6374 */
  {
    "neon_vbfcvtv4sfv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.bf16.f32\t%e0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfcvtv4sfv8bf },
    &operand_data[3296],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6383 */
  {
    "neon_vbfcvtv4sf_highv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.bf16.f32\t%f0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfcvtv4sf_highv8bf },
    &operand_data[3298],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6393 */
  {
    "neon_vbfcvtsf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtb.bf16.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfcvtsf },
    &operand_data[3301],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6402 */
  {
    "neon_vbfcvtv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshll.u32\t%q0, %P1, #16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfcvtv4bf },
    &operand_data[3303],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6402 */
  {
    "neon_vbfcvtv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshll.u32\t%q0, %e1, #16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfcvtv8bf },
    &operand_data[3305],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6411 */
  {
    "neon_vbfcvt_highv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshll.u32\t%q0, %f1, #16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfcvt_highv8bf },
    &operand_data[3305],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6443 */
  {
    "neon_vbfcvtbf_cvtmodev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfcvtbf_cvtmodev2si },
    &operand_data[3307],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6443 */
  {
    "neon_vbfcvtbf_cvtmodesf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfcvtbf_cvtmodesf },
    &operand_data[3309],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6451 */
  {
    "neon_vmmlav8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmmla.bf16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmmlav8bf },
    &operand_data[3270],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6462 */
  {
    "neon_vfmabv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfmab.bf16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmabv8bf },
    &operand_data[3270],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6462 */
  {
    "neon_vfmatv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfmat.bf16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmatv8bf },
    &operand_data[3270],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6473 */
  {
    "neon_vfmab_lanev8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfmab.bf16\t%q0, %q2, %P3[%c4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmab_lanev8bf },
    &operand_data[3311],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6473 */
  {
    "neon_vfmat_lanev8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfmat.bf16\t%q0, %q2, %P3[%c4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmat_lanev8bf },
    &operand_data[3311],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:22 */
  {
    "crypto_aesmc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "aesmc.8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_aesmc },
    &operand_data[3316],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:22 */
  {
    "crypto_aesimc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "aesimc.8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_aesimc },
    &operand_data[3316],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:53 */
  {
    "*crypto_aesd_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "aesd.8\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3318],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:53 */
  {
    "*crypto_aese_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "aese.8\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3318],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:71 */
  {
    "aes_op_protect",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2842 },
#else
    { 0, 0, output_2842 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_aes_op_protect },
    &operand_data[3321],
    2,
    2,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:93 */
  {
    "*aes_op_protect_misalign_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.8\t%{q0}, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[1709],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:106 */
  {
    "aes_op_protect_neon_vld1v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vld1.8\t%h0, %A1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_aes_op_protect_neon_vld1v16qi },
    &operand_data[2848],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:119 */
  {
    "*crypto_aesmc_protected",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "aesmc.8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3316],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:119 */
  {
    "*crypto_aesimc_protected",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "aesimc.8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3316],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:136 */
  {
    "*aarch32_crypto_aese_fused",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "aese.8\t%q0, %q2\n\taesmc.8\t%q0, %q0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3318],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:153 */
  {
    "*aarch32_crypto_aese_fused_protected",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "aese.8\t%q0, %q2\n\taesmc.8\t%q0, %q0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3318],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:175 */
  {
    "*aarch32_crypto_aesd_fused",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "aesd.8\t%q0, %q2\n\taesimc.8\t%q0, %q0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3318],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:190 */
  {
    "*aarch32_crypto_aesd_fused_protected",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "aesd.8\t%q0, %q2\n\taesimc.8\t%q0, %q0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3318],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:207 */
  {
    "crypto_sha1su1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sha1su1.32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_sha1su1 },
    &operand_data[3323],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:207 */
  {
    "crypto_sha256su0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sha256su0.32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_sha256su0 },
    &operand_data[3323],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:218 */
  {
    "crypto_sha1su0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sha1su0.32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_sha1su0 },
    &operand_data[3323],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:218 */
  {
    "crypto_sha256h",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sha256h.32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_sha256h },
    &operand_data[3323],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:218 */
  {
    "crypto_sha256h2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sha256h2.32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_sha256h2 },
    &operand_data[3323],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:218 */
  {
    "crypto_sha256su1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sha256su1.32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_sha256su1 },
    &operand_data[3323],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:245 */
  {
    "crypto_sha1h_lb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sha1h.32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_sha1h_lb },
    &operand_data[3327],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:257 */
  {
    "crypto_vmullp64",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmull.p64\t%q0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_vmullp64 },
    &operand_data[3330],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:286 */
  {
    "crypto_sha1c_lb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sha1c.32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_sha1c_lb },
    &operand_data[3333],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:286 */
  {
    "crypto_sha1m_lb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sha1m.32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_sha1m_lb },
    &operand_data[3333],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:286 */
  {
    "crypto_sha1p_lb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sha1p.32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_sha1p_lb },
    &operand_data[3333],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:46 */
  {
    "*memory_barrier",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2862 },
#else
    { 0, 0, output_2862 },
#endif
    { 0 },
    &operand_data[3338],
    1,
    1,
    1,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:65 */
  {
    "atomic_loadqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2863 },
#else
    { 0, 0, output_2863 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_loadqi },
    &operand_data[3339],
    3,
    3,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:65 */
  {
    "atomic_loadhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2864 },
#else
    { 0, 0, output_2864 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_loadhi },
    &operand_data[3342],
    3,
    3,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:65 */
  {
    "atomic_loadsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2865 },
#else
    { 0, 0, output_2865 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_loadsi },
    &operand_data[3345],
    3,
    3,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:91 */
  {
    "atomic_storeqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2866 },
#else
    { 0, 0, output_2866 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_storeqi },
    &operand_data[3348],
    3,
    3,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:91 */
  {
    "atomic_storehi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2867 },
#else
    { 0, 0, output_2867 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_storehi },
    &operand_data[3351],
    3,
    3,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:91 */
  {
    "atomic_storesi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2868 },
#else
    { 0, 0, output_2868 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_storesi },
    &operand_data[3354],
    3,
    3,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:119 */
  {
    "arm_atomic_loaddi2_ldrd",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldrd%?\t%0, %H0, %C1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_atomic_loaddi2_ldrd },
    &operand_data[3357],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:189 */
  {
    "atomic_compare_and_swap32qi_1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swap32qi_1 },
    &operand_data[3359],
    8,
    9,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:189 */
  {
    "atomic_compare_and_swap32hi_1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swap32hi_1 },
    &operand_data[3368],
    8,
    9,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:189 */
  {
    "atomic_compare_and_swapt1qi_1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swapt1qi_1 },
    &operand_data[3377],
    8,
    9,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:189 */
  {
    "atomic_compare_and_swapt1hi_1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swapt1hi_1 },
    &operand_data[3386],
    8,
    9,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:221 */
  {
    "atomic_compare_and_swap32si_1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swap32si_1 },
    &operand_data[3395],
    8,
    9,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:221 */
  {
    "atomic_compare_and_swap32di_1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swap32di_1 },
    &operand_data[3404],
    8,
    9,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:221 */
  {
    "atomic_compare_and_swapt1si_1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swapt1si_1 },
    &operand_data[3413],
    8,
    9,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:221 */
  {
    "atomic_compare_and_swapt1di_1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swapt1di_1 },
    &operand_data[3422],
    8,
    9,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:245 */
  {
    "atomic_exchangeqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_exchangeqi },
    &operand_data[3431],
    4,
    5,
    1,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:245 */
  {
    "atomic_exchangehi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_exchangehi },
    &operand_data[3436],
    4,
    5,
    1,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:245 */
  {
    "atomic_exchangesi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_exchangesi },
    &operand_data[3441],
    4,
    5,
    1,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:245 */
  {
    "atomic_exchangedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_exchangedi },
    &operand_data[3446],
    4,
    5,
    1,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_addqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_addqi },
    &operand_data[3451],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_subqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_subqi },
    &operand_data[3456],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_orqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_orqi },
    &operand_data[3461],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_xorqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_xorqi },
    &operand_data[3461],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_andqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_andqi },
    &operand_data[3461],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_addhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_addhi },
    &operand_data[3466],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_subhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_subhi },
    &operand_data[3471],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_orhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_orhi },
    &operand_data[3476],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_xorhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_xorhi },
    &operand_data[3476],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_andhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_andhi },
    &operand_data[3476],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_addsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_addsi },
    &operand_data[3481],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_subsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_subsi },
    &operand_data[3486],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_orsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_orsi },
    &operand_data[3491],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_xorsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_xorsi },
    &operand_data[3491],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_andsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_andsi },
    &operand_data[3491],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_adddi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_adddi },
    &operand_data[3496],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_subdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_subdi },
    &operand_data[3501],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_ordi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_ordi },
    &operand_data[3506],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_xordi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_xordi },
    &operand_data[3506],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:286 */
  {
    "atomic_anddi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_anddi },
    &operand_data[3506],
    3,
    5,
    1,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:309 */
  {
    "atomic_nandqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_nandqi },
    &operand_data[3511],
    3,
    5,
    1,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:309 */
  {
    "atomic_nandhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_nandhi },
    &operand_data[3516],
    3,
    5,
    1,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:309 */
  {
    "atomic_nandsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_nandsi },
    &operand_data[3521],
    3,
    5,
    1,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:309 */
  {
    "atomic_nanddi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_nanddi },
    &operand_data[3526],
    3,
    5,
    1,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_addqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_addqi },
    &operand_data[3531],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_subqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_subqi },
    &operand_data[3537],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_orqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_orqi },
    &operand_data[3543],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_xorqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_xorqi },
    &operand_data[3543],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_andqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_andqi },
    &operand_data[3543],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_addhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_addhi },
    &operand_data[3549],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_subhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_subhi },
    &operand_data[3555],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_orhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_orhi },
    &operand_data[3561],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_xorhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_xorhi },
    &operand_data[3561],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_andhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_andhi },
    &operand_data[3561],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_addsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_addsi },
    &operand_data[3567],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_subsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_subsi },
    &operand_data[3573],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_orsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_orsi },
    &operand_data[3579],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_xorsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_xorsi },
    &operand_data[3579],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_andsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_andsi },
    &operand_data[3579],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_adddi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_adddi },
    &operand_data[3585],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_subdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_subdi },
    &operand_data[3591],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_ordi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_ordi },
    &operand_data[3597],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_xordi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_xordi },
    &operand_data[3597],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:348 */
  {
    "atomic_fetch_anddi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_anddi },
    &operand_data[3597],
    4,
    6,
    2,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:373 */
  {
    "atomic_fetch_nandqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_nandqi },
    &operand_data[3603],
    4,
    6,
    2,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:373 */
  {
    "atomic_fetch_nandhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_nandhi },
    &operand_data[3609],
    4,
    6,
    2,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:373 */
  {
    "atomic_fetch_nandsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_nandsi },
    &operand_data[3615],
    4,
    6,
    2,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:373 */
  {
    "atomic_fetch_nanddi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_fetch_nanddi },
    &operand_data[3621],
    4,
    6,
    2,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_add_fetchqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_add_fetchqi },
    &operand_data[3627],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_sub_fetchqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_sub_fetchqi },
    &operand_data[3632],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_or_fetchqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_or_fetchqi },
    &operand_data[3637],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_xor_fetchqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_xor_fetchqi },
    &operand_data[3637],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_and_fetchqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_and_fetchqi },
    &operand_data[3637],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_add_fetchhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_add_fetchhi },
    &operand_data[3642],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_sub_fetchhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_sub_fetchhi },
    &operand_data[3647],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_or_fetchhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_or_fetchhi },
    &operand_data[3652],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_xor_fetchhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_xor_fetchhi },
    &operand_data[3652],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_and_fetchhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_and_fetchhi },
    &operand_data[3652],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_add_fetchsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_add_fetchsi },
    &operand_data[3657],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_sub_fetchsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_sub_fetchsi },
    &operand_data[3662],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_or_fetchsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_or_fetchsi },
    &operand_data[3667],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_xor_fetchsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_xor_fetchsi },
    &operand_data[3667],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_and_fetchsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_and_fetchsi },
    &operand_data[3667],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_add_fetchdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_add_fetchdi },
    &operand_data[3672],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_sub_fetchdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_sub_fetchdi },
    &operand_data[3677],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_or_fetchdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_or_fetchdi },
    &operand_data[3682],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_xor_fetchdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_xor_fetchdi },
    &operand_data[3682],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:399 */
  {
    "atomic_and_fetchdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_and_fetchdi },
    &operand_data[3682],
    4,
    5,
    3,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:424 */
  {
    "atomic_nand_fetchqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_nand_fetchqi },
    &operand_data[3687],
    4,
    5,
    3,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:424 */
  {
    "atomic_nand_fetchhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_nand_fetchhi },
    &operand_data[3692],
    4,
    5,
    3,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:424 */
  {
    "atomic_nand_fetchsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_nand_fetchsi },
    &operand_data[3697],
    4,
    5,
    3,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:424 */
  {
    "atomic_nand_fetchdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_nand_fetchdi },
    &operand_data[3702],
    4,
    5,
    3,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:448 */
  {
    "arm_load_exclusiveqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2954 },
#else
    { 0, output_2954, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_load_exclusiveqi },
    &operand_data[3707],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:448 */
  {
    "arm_load_exclusivehi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2955 },
#else
    { 0, output_2955, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_load_exclusivehi },
    &operand_data[3709],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:461 */
  {
    "arm_load_acquire_exclusiveqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2956 },
#else
    { 0, output_2956, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_load_acquire_exclusiveqi },
    &operand_data[3707],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:461 */
  {
    "arm_load_acquire_exclusivehi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2957 },
#else
    { 0, output_2957, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_load_acquire_exclusivehi },
    &operand_data[3709],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:474 */
  {
    "arm_load_exclusivesi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2958 },
#else
    { 0, output_2958, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_load_exclusivesi },
    &operand_data[3711],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:486 */
  {
    "arm_load_acquire_exclusivesi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2959 },
#else
    { 0, output_2959, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_load_acquire_exclusivesi },
    &operand_data[3711],
    2,
    2,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:498 */
  {
    "arm_load_exclusivedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldrexd%?\t%0, %H0, %C1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_load_exclusivedi },
    &operand_data[3713],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:507 */
  {
    "arm_load_acquire_exclusivedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldaexd%?\t%0, %H0, %C1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_load_acquire_exclusivedi },
    &operand_data[3713],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:516 */
  {
    "arm_store_exclusiveqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2962 },
#else
    { 0, 0, output_2962 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_store_exclusiveqi },
    &operand_data[3715],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:516 */
  {
    "arm_store_exclusivehi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2963 },
#else
    { 0, 0, output_2963 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_store_exclusivehi },
    &operand_data[3718],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:516 */
  {
    "arm_store_exclusivesi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2964 },
#else
    { 0, 0, output_2964 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_store_exclusivesi },
    &operand_data[3721],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:516 */
  {
    "arm_store_exclusivedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2965 },
#else
    { 0, 0, output_2965 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_store_exclusivedi },
    &operand_data[3724],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:542 */
  {
    "arm_store_release_exclusivedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_2966 },
#else
    { 0, 0, output_2966 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_store_release_exclusivedi },
    &operand_data[3724],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:557 */
  {
    "arm_store_release_exclusiveqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2967 },
#else
    { 0, output_2967, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_store_release_exclusiveqi },
    &operand_data[3727],
    3,
    3,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:557 */
  {
    "arm_store_release_exclusivehi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2968 },
#else
    { 0, output_2968, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_store_release_exclusivehi },
    &operand_data[3730],
    3,
    3,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:557 */
  {
    "arm_store_release_exclusivesi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_2969 },
#else
    { 0, output_2969, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_store_release_exclusivesi },
    &operand_data[3733],
    3,
    3,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "addqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addqq3 },
    &operand_data[3736],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "addhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addhq3 },
    &operand_data[3739],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "addsq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsq3 },
    &operand_data[3742],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "adduqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_adduqq3 },
    &operand_data[3745],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "adduhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_adduhq3 },
    &operand_data[3748],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "addusq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addusq3 },
    &operand_data[3751],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "addha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addha3 },
    &operand_data[3754],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "addsa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsa3 },
    &operand_data[3757],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "adduha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_adduha3 },
    &operand_data[3760],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "addusa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addusa3 },
    &operand_data[3763],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:42 */
  {
    "*arm_addv4qq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3766],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:42 */
  {
    "*arm_addv2hq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3769],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:42 */
  {
    "*arm_addv2ha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3772],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:51 */
  {
    "usaddv4uqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usaddv4uqq3 },
    &operand_data[3775],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:51 */
  {
    "usaddv2uhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usaddv2uhq3 },
    &operand_data[3778],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:51 */
  {
    "usadduqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usadduqq3 },
    &operand_data[3781],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:51 */
  {
    "usadduhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usadduhq3 },
    &operand_data[3784],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:51 */
  {
    "usaddv2uha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usaddv2uha3 },
    &operand_data[3787],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:51 */
  {
    "usadduha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usadduha3 },
    &operand_data[3790],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*arm_ssaddv4qq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3766],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*arm_ssaddv2hq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3769],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*arm_ssaddqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3793],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*arm_ssaddhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3796],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*arm_ssaddv2ha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3772],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*arm_ssaddha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3799],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*arm_ssaddsq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3802],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*arm_ssaddsa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3805],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "subqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subqq3 },
    &operand_data[3736],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "subhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subhq3 },
    &operand_data[3739],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "subsq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subsq3 },
    &operand_data[3742],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "subuqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subuqq3 },
    &operand_data[3745],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "subuhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subuhq3 },
    &operand_data[3748],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "subusq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subusq3 },
    &operand_data[3751],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "subha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subha3 },
    &operand_data[3754],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "subsa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subsa3 },
    &operand_data[3757],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "subuha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subuha3 },
    &operand_data[3760],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "subusa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subusa3 },
    &operand_data[3763],
    3,
    3,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:101 */
  {
    "*arm_subv4qq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3766],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:101 */
  {
    "*arm_subv2hq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3769],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:101 */
  {
    "*arm_subv2ha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3772],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:110 */
  {
    "ussubv4uqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ussubv4uqq3 },
    &operand_data[3775],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:110 */
  {
    "ussubv2uhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ussubv2uhq3 },
    &operand_data[3778],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:110 */
  {
    "ussubuqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ussubuqq3 },
    &operand_data[3781],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:110 */
  {
    "ussubuhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ussubuhq3 },
    &operand_data[3784],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:110 */
  {
    "ussubv2uha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ussubv2uha3 },
    &operand_data[3787],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:110 */
  {
    "ussubuha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ussubuha3 },
    &operand_data[3790],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*arm_sssubv4qq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3766],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*arm_sssubv2hq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3769],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*arm_sssubqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3793],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*arm_sssubhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3796],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*arm_sssubv2ha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3772],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*arm_sssubha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3799],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*arm_sssubsq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3802],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*arm_sssubsa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3805],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:257 */
  {
    "*arm_ssmulsa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3024 },
#else
    { 0, 0, output_3024 },
#endif
    { 0 },
    &operand_data[3805],
    3,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:329 */
  {
    "*arm_usmulusa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3025 },
#else
    { 0, 0, output_3025 },
#endif
    { 0 },
    &operand_data[3810],
    3,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:476 */
  {
    "arm_ssatsihi_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssat%?\t%0, #16, %2%S1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_ssatsihi_shift },
    &operand_data[3815],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:487 */
  {
    "arm_usatsihi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usat%?\t%0, #16, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_usatsihi },
    &operand_data[3819],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:20 */
  {
    "*mve_movv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3028 },
#else
    { 0, 0, output_3028 },
#endif
    { 0 },
    &operand_data[3821],
    2,
    2,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:20 */
  {
    "*mve_movv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3029 },
#else
    { 0, 0, output_3029 },
#endif
    { 0 },
    &operand_data[3823],
    2,
    2,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:20 */
  {
    "*mve_movv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3030 },
#else
    { 0, 0, output_3030 },
#endif
    { 0 },
    &operand_data[3825],
    2,
    2,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:20 */
  {
    "*mve_movv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3031 },
#else
    { 0, 0, output_3031 },
#endif
    { 0 },
    &operand_data[3827],
    2,
    2,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:20 */
  {
    "*mve_movti",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3032 },
#else
    { 0, 0, output_3032 },
#endif
    { 0 },
    &operand_data[3829],
    2,
    2,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:20 */
  {
    "*mve_movv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3033 },
#else
    { 0, 0, output_3033 },
#endif
    { 0 },
    &operand_data[3831],
    2,
    2,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:20 */
  {
    "*mve_movv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3034 },
#else
    { 0, 0, output_3034 },
#endif
    { 0 },
    &operand_data[3833],
    2,
    2,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:20 */
  {
    "*mve_movv2df",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3035 },
#else
    { 0, 0, output_3035 },
#endif
    { 0 },
    &operand_data[3835],
    2,
    2,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:82 */
  {
    "*mve_vdupv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.8\t%q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2376],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:82 */
  {
    "*mve_vdupv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.16\t%q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2378],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:82 */
  {
    "*mve_vdupv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.32\t%q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3837],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:82 */
  {
    "*mve_vdupv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.64\t%q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3839],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:82 */
  {
    "*mve_vdupv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.16\t%q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[2382],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:82 */
  {
    "*mve_vdupv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.32\t%q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3841],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:82 */
  {
    "*mve_vdupv2df",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.<V_sz_elem>\t%q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[3843],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:94 */
  {
    "mve_vst4qv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3043 },
#else
    { 0, 0, output_3043 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst4qv16qi },
    &operand_data[3845],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:94 */
  {
    "mve_vst4qv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3044 },
#else
    { 0, 0, output_3044 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst4qv8hi },
    &operand_data[3845],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:94 */
  {
    "mve_vst4qv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3045 },
#else
    { 0, 0, output_3045 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst4qv4si },
    &operand_data[3845],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:94 */
  {
    "mve_vst4qv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3046 },
#else
    { 0, 0, output_3046 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst4qv8hf },
    &operand_data[3845],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:94 */
  {
    "mve_vst4qv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3047 },
#else
    { 0, 0, output_3047 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst4qv4sf },
    &operand_data[3845],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:128 */
  {
    "mve_vrndq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrintzt.f%#16 %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndq_m_fv8hf },
    &operand_data[3847],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:128 */
  {
    "mve_vrndq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrintzt.f%#32 %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndq_m_fv4sf },
    &operand_data[3851],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:144 */
  {
    "mve_vrndxq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintx.f%#16	%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndxq_fv8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:144 */
  {
    "mve_vrndxq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintx.f%#32	%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndxq_fv4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:158 */
  {
    "mve_vrndq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintz.f%#16	%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndq_fv8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:158 */
  {
    "mve_vrndq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintz.f%#32	%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndq_fv4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:172 */
  {
    "mve_vrndpq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintp.f%#16	%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndpq_fv8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:172 */
  {
    "mve_vrndpq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintp.f%#32	%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndpq_fv4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:186 */
  {
    "mve_vrndnq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintn.f%#16	%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndnq_fv8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:186 */
  {
    "mve_vrndnq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintn.f%#32	%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndnq_fv4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:200 */
  {
    "mve_vrndmq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintm.f%#16	%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndmq_fv8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:200 */
  {
    "mve_vrndmq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintm.f%#32	%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndmq_fv4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:214 */
  {
    "mve_vrndaq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrinta.f%#16	%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndaq_fv8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:214 */
  {
    "mve_vrndaq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrinta.f%#32	%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndaq_fv4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:228 */
  {
    "mve_vrev64q_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.%#16 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_fv8hf },
    &operand_data[3855],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:228 */
  {
    "mve_vrev64q_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.%#32 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_fv4sf },
    &operand_data[3857],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:242 */
  {
    "mve_vnegq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.f%#16  %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vnegq_fv8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:242 */
  {
    "mve_vnegq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.f%#32  %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vnegq_fv4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:255 */
  {
    "mve_vdupq_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.%#16   %q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_n_fv8hf },
    &operand_data[2382],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:255 */
  {
    "mve_vdupq_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.%#32   %q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_n_fv4sf },
    &operand_data[3841],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:269 */
  {
    "mve_vabsq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.f%#16  %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabsq_fv8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:269 */
  {
    "mve_vabsq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.f%#32  %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabsq_fv4sf },
    &operand_data[1834],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:282 */
  {
    "mve_vrev32q_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev32.16 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev32q_fv8hf },
    &operand_data[1828],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:295 */
  {
    "mve_vcvttq_f32_f16v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtt.f32.f16 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvttq_f32_f16v4sf },
    &operand_data[3859],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:309 */
  {
    "mve_vcvtbq_f32_f16v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtb.f32.f16 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtbq_f32_f16v4sf },
    &operand_data[3859],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:323 */
  {
    "mve_vcvtq_to_f_sv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f%#16.s%#16       %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_to_f_sv8hf },
    &operand_data[2493],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:323 */
  {
    "mve_vcvtq_to_f_uv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f%#16.u%#16       %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_to_f_uv8hf },
    &operand_data[2493],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:323 */
  {
    "mve_vcvtq_to_f_sv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f%#32.s%#32       %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_to_f_sv4sf },
    &operand_data[2485],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:323 */
  {
    "mve_vcvtq_to_f_uv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f%#32.u%#32       %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_to_f_uv4sf },
    &operand_data[2485],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:337 */
  {
    "mve_vrev64q_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.%#8 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_sv16qi },
    &operand_data[2785],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:337 */
  {
    "mve_vrev64q_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.%#8 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_uv16qi },
    &operand_data[2785],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:337 */
  {
    "mve_vrev64q_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.%#16 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_sv8hi },
    &operand_data[3861],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:337 */
  {
    "mve_vrev64q_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.%#16 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_uv8hi },
    &operand_data[3861],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:337 */
  {
    "mve_vrev64q_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.%#32 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_sv4si },
    &operand_data[3863],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:337 */
  {
    "mve_vrev64q_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev64.%#32 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_uv4si },
    &operand_data[3863],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:351 */
  {
    "mve_vcvtq_from_f_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.s%#16.f%#16       %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_from_f_sv8hi },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:351 */
  {
    "mve_vcvtq_from_f_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.u%#16.f%#16       %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_from_f_uv8hi },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:351 */
  {
    "mve_vcvtq_from_f_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.s%#32.f%#32       %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_from_f_sv4si },
    &operand_data[2174],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:351 */
  {
    "mve_vcvtq_from_f_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.u%#32.f%#32       %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_from_f_uv4si },
    &operand_data[2174],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:363 */
  {
    "mve_vqnegq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqneg.s%#8 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqnegq_sv16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:363 */
  {
    "mve_vqnegq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqneg.s%#16 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqnegq_sv8hi },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:363 */
  {
    "mve_vqnegq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqneg.s%#32 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqnegq_sv4si },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:377 */
  {
    "mve_vqabsq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqabs.s%#8 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqabsq_sv16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:377 */
  {
    "mve_vqabsq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqabs.s%#16 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqabsq_sv8hi },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:377 */
  {
    "mve_vqabsq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqabs.s%#32 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqabsq_sv4si },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:391 */
  {
    "mve_vnegq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.s%#8  %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vnegq_sv16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:391 */
  {
    "mve_vnegq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.s%#16  %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vnegq_sv8hi },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:391 */
  {
    "mve_vnegq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vneg.s%#32  %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vnegq_sv4si },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:404 */
  {
    "mve_vmvnq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_uv16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:404 */
  {
    "mve_vmvnq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_uv8hi },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:404 */
  {
    "mve_vmvnq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_uv4si },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:424 */
  {
    "mve_vdupq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.%#8   %q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_n_uv16qi },
    &operand_data[2376],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:424 */
  {
    "mve_vdupq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.%#8   %q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_n_sv16qi },
    &operand_data[2376],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:424 */
  {
    "mve_vdupq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.%#16   %q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_n_uv8hi },
    &operand_data[2378],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:424 */
  {
    "mve_vdupq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.%#16   %q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_n_sv8hi },
    &operand_data[2378],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:424 */
  {
    "mve_vdupq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.%#32   %q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_n_uv4si },
    &operand_data[3837],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:424 */
  {
    "mve_vdupq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdup.%#32   %q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_n_sv4si },
    &operand_data[3837],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:438 */
  {
    "mve_vclzq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vclz.i%#8  %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclzq_sv16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:438 */
  {
    "mve_vclzq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vclz.i%#16  %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclzq_sv8hi },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:438 */
  {
    "mve_vclzq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vclz.i%#32  %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclzq_sv4si },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:458 */
  {
    "mve_vclsq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcls.s%#8  %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclsq_sv16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:458 */
  {
    "mve_vclsq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcls.s%#16  %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclsq_sv8hi },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:458 */
  {
    "mve_vclsq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcls.s%#32  %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclsq_sv4si },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:472 */
  {
    "mve_vaddvq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddv.u%#8\t%0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvq_uv16qi },
    &operand_data[3865],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:472 */
  {
    "mve_vaddvq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddv.s%#8\t%0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvq_sv16qi },
    &operand_data[3865],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:472 */
  {
    "mve_vaddvq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddv.u%#16\t%0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvq_uv8hi },
    &operand_data[3867],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:472 */
  {
    "mve_vaddvq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddv.s%#16\t%0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvq_sv8hi },
    &operand_data[3867],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:472 */
  {
    "mve_vaddvq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddv.u%#32\t%0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvq_uv4si },
    &operand_data[3869],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:472 */
  {
    "mve_vaddvq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddv.s%#32\t%0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvq_sv4si },
    &operand_data[3869],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:486 */
  {
    "mve_vabsq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.s%#8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabsq_sv16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:486 */
  {
    "mve_vabsq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.s%#16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabsq_sv8hi },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:486 */
  {
    "mve_vabsq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs.s%#32\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabsq_sv4si },
    &operand_data[1822],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:499 */
  {
    "mve_vrev32q_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev32.%#8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev32q_uv16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:499 */
  {
    "mve_vrev32q_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev32.%#8\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev32q_sv16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:499 */
  {
    "mve_vrev32q_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev32.%#16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev32q_uv8hi },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:499 */
  {
    "mve_vrev32q_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev32.%#16\t%q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev32q_sv8hi },
    &operand_data[1816],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:513 */
  {
    "mve_vmovltq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovlt.u%#8   %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovltq_uv16qi },
    &operand_data[2215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:513 */
  {
    "mve_vmovltq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovlt.s%#8   %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovltq_sv16qi },
    &operand_data[2215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:513 */
  {
    "mve_vmovltq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovlt.u%#16   %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovltq_uv8hi },
    &operand_data[2219],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:513 */
  {
    "mve_vmovltq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovlt.s%#16   %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovltq_sv8hi },
    &operand_data[2219],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:527 */
  {
    "mve_vmovlbq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovlb.s%#8   %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovlbq_sv16qi },
    &operand_data[2215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:527 */
  {
    "mve_vmovlbq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovlb.u%#8   %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovlbq_uv16qi },
    &operand_data[2215],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:527 */
  {
    "mve_vmovlbq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovlb.s%#16   %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovlbq_sv8hi },
    &operand_data[2219],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:527 */
  {
    "mve_vmovlbq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovlb.u%#16   %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovlbq_uv8hi },
    &operand_data[2219],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:541 */
  {
    "mve_vcvtpq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.s%#16.f%#16      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtpq_sv8hi },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:541 */
  {
    "mve_vcvtpq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.u%#16.f%#16      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtpq_uv8hi },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:541 */
  {
    "mve_vcvtpq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.s%#32.f%#32      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtpq_sv4si },
    &operand_data[2174],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:541 */
  {
    "mve_vcvtpq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtp.u%#32.f%#32      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtpq_uv4si },
    &operand_data[2174],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:555 */
  {
    "mve_vcvtnq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtn.s%#16.f%#16      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtnq_sv8hi },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:555 */
  {
    "mve_vcvtnq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtn.u%#16.f%#16      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtnq_uv8hi },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:555 */
  {
    "mve_vcvtnq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtn.s%#32.f%#32      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtnq_sv4si },
    &operand_data[2174],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:555 */
  {
    "mve_vcvtnq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtn.u%#32.f%#32      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtnq_uv4si },
    &operand_data[2174],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:569 */
  {
    "mve_vcvtmq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.s%#16.f%#16      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtmq_sv8hi },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:569 */
  {
    "mve_vcvtmq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.u%#16.f%#16      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtmq_uv8hi },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:569 */
  {
    "mve_vcvtmq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.s%#32.f%#32      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtmq_sv4si },
    &operand_data[2174],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:569 */
  {
    "mve_vcvtmq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtm.u%#32.f%#32      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtmq_uv4si },
    &operand_data[2174],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:583 */
  {
    "mve_vcvtaq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.u%#16.f%#16      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtaq_uv8hi },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:583 */
  {
    "mve_vcvtaq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.s%#16.f%#16      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtaq_sv8hi },
    &operand_data[2177],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:583 */
  {
    "mve_vcvtaq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.u%#32.f%#32      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtaq_uv4si },
    &operand_data[2174],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:583 */
  {
    "mve_vcvtaq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvta.s%#32.f%#32      %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtaq_sv4si },
    &operand_data[2174],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:597 */
  {
    "mve_vmvnq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn.i%#16  %q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_n_uv8hi },
    &operand_data[3871],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:597 */
  {
    "mve_vmvnq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn.i%#16  %q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_n_sv8hi },
    &operand_data[3871],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:597 */
  {
    "mve_vmvnq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn.i%#32  %q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_n_uv4si },
    &operand_data[3873],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:597 */
  {
    "mve_vmvnq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmvn.i%#32  %q0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_n_sv4si },
    &operand_data[3873],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:611 */
  {
    "mve_vrev16q_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev16.8 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev16q_uv16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:611 */
  {
    "mve_vrev16q_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrev16.8 %q0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev16q_sv16qi },
    &operand_data[1810],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:625 */
  {
    "mve_vaddlvq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddlv.u32 %Q0, %R0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddlvq_uv4si },
    &operand_data[3875],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:625 */
  {
    "mve_vaddlvq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddlv.s32 %Q0, %R0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddlvq_sv4si },
    &operand_data[3875],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:639 */
  {
    "mve_vctp8qhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vctp.8 %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vctp8qhi },
    &operand_data[3877],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:639 */
  {
    "mve_vctp16qhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vctp.16 %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vctp16qhi },
    &operand_data[3877],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:639 */
  {
    "mve_vctp32qhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vctp.32 %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vctp32qhi },
    &operand_data[3877],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:639 */
  {
    "mve_vctp64qhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vctp.64 %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vctp64qhi },
    &operand_data[3877],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:653 */
  {
    "mve_vpnothi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpnot",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vpnothi },
    &operand_data[3879],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:667 */
  {
    "mve_vsubq_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.f16  %q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_n_fv8hf },
    &operand_data[3881],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:667 */
  {
    "mve_vsubq_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.f32  %q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_n_fv4sf },
    &operand_data[3884],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:682 */
  {
    "mve_vbrsrq_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbrsr.16  %q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_n_fv8hf },
    &operand_data[3887],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:682 */
  {
    "mve_vbrsrq_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbrsr.32  %q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_n_fv4sf },
    &operand_data[3890],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:697 */
  {
    "mve_vcvtq_n_to_f_sv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f16.s16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_n_to_f_sv8hf },
    &operand_data[3893],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:697 */
  {
    "mve_vcvtq_n_to_f_uv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f16.u16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_n_to_f_uv8hf },
    &operand_data[3893],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:697 */
  {
    "mve_vcvtq_n_to_f_sv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f32.s32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_n_to_f_sv4sf },
    &operand_data[3896],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:697 */
  {
    "mve_vcvtq_n_to_f_uv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.f32.u32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_n_to_f_uv4sf },
    &operand_data[3896],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:711 */
  {
    "mve_vcreateq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmov %q0[2], %q0[0], %Q2, %Q1\n\tvmov %q0[3], %q0[1], %R2, %R1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcreateq_fv8hf },
    &operand_data[3899],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:711 */
  {
    "mve_vcreateq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmov %q0[2], %q0[0], %Q2, %Q1\n\tvmov %q0[3], %q0[1], %R2, %R1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcreateq_fv4sf },
    &operand_data[3902],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:726 */
  {
    "mve_vcreateq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmov %q0[2], %q0[0], %Q2, %Q1\n\tvmov %q0[3], %q0[1], %R2, %R1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcreateq_uv16qi },
    &operand_data[3905],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:726 */
  {
    "mve_vcreateq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmov %q0[2], %q0[0], %Q2, %Q1\n\tvmov %q0[3], %q0[1], %R2, %R1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcreateq_sv16qi },
    &operand_data[3905],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:726 */
  {
    "mve_vcreateq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmov %q0[2], %q0[0], %Q2, %Q1\n\tvmov %q0[3], %q0[1], %R2, %R1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcreateq_uv8hi },
    &operand_data[3908],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:726 */
  {
    "mve_vcreateq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmov %q0[2], %q0[0], %Q2, %Q1\n\tvmov %q0[3], %q0[1], %R2, %R1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcreateq_sv8hi },
    &operand_data[3908],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:726 */
  {
    "mve_vcreateq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmov %q0[2], %q0[0], %Q2, %Q1\n\tvmov %q0[3], %q0[1], %R2, %R1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcreateq_uv4si },
    &operand_data[3911],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:726 */
  {
    "mve_vcreateq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmov %q0[2], %q0[0], %Q2, %Q1\n\tvmov %q0[3], %q0[1], %R2, %R1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcreateq_sv4si },
    &operand_data[3911],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:726 */
  {
    "mve_vcreateq_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmov %q0[2], %q0[0], %Q2, %Q1\n\tvmov %q0[3], %q0[1], %R2, %R1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcreateq_uv2di },
    &operand_data[3914],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:726 */
  {
    "mve_vcreateq_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmov %q0[2], %q0[0], %Q2, %Q1\n\tvmov %q0[3], %q0[1], %R2, %R1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcreateq_sv2di },
    &operand_data[3914],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:742 */
  {
    "mve_vshrq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshr.s8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_n_sv16qi },
    &operand_data[3917],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:742 */
  {
    "mve_vshrq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshr.u8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_n_uv16qi },
    &operand_data[3917],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:742 */
  {
    "mve_vshrq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshr.s16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_n_sv8hi },
    &operand_data[3920],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:742 */
  {
    "mve_vshrq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshr.u16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_n_uv8hi },
    &operand_data[3920],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:742 */
  {
    "mve_vshrq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshr.s32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_n_sv4si },
    &operand_data[3923],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:742 */
  {
    "mve_vshrq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshr.u32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_n_uv4si },
    &operand_data[3923],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:756 */
  {
    "mve_vshrq_n_sv16qi_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3185 },
#else
    { 0, 0, output_3185 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_n_sv16qi_imm },
    &operand_data[3926],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:756 */
  {
    "mve_vshrq_n_sv8hi_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3186 },
#else
    { 0, 0, output_3186 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_n_sv8hi_imm },
    &operand_data[3929],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:756 */
  {
    "mve_vshrq_n_sv4si_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3187 },
#else
    { 0, 0, output_3187 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_n_sv4si_imm },
    &operand_data[3932],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:771 */
  {
    "mve_vshrq_n_uv16qi_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3188 },
#else
    { 0, 0, output_3188 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_n_uv16qi_imm },
    &operand_data[3926],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:771 */
  {
    "mve_vshrq_n_uv8hi_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3189 },
#else
    { 0, 0, output_3189 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_n_uv8hi_imm },
    &operand_data[3929],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:771 */
  {
    "mve_vshrq_n_uv4si_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3190 },
#else
    { 0, 0, output_3190 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_n_uv4si_imm },
    &operand_data[3932],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:790 */
  {
    "mve_vcvtq_n_from_f_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.s16.f16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_n_from_f_sv8hi },
    &operand_data[3935],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:790 */
  {
    "mve_vcvtq_n_from_f_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.u16.f16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_n_from_f_uv8hi },
    &operand_data[3935],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:790 */
  {
    "mve_vcvtq_n_from_f_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.s32.f32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_n_from_f_sv4si },
    &operand_data[3938],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:790 */
  {
    "mve_vcvtq_n_from_f_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt.u32.f32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_n_from_f_uv4si },
    &operand_data[3938],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:805 */
  {
    "mve_vaddlvq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddlvt.s32 %Q0, %R0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddlvq_p_sv4si },
    &operand_data[3941],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:805 */
  {
    "mve_vaddlvq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddlvt.u32 %Q0, %R0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddlvq_p_uv4si },
    &operand_data[3941],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpeqq_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.i%#8  eq, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_v16qi },
    &operand_data[3944],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpgeq_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#8  ge, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_v16qi },
    &operand_data[3944],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpcsq_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.u%#8  cs, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpcsq_v16qi },
    &operand_data[3944],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpgtq_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#8  gt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_v16qi },
    &operand_data[3944],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmphiq_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.u%#8  hi, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmphiq_v16qi },
    &operand_data[3944],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpleq_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#8  le, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_v16qi },
    &operand_data[3944],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpltq_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#8  lt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_v16qi },
    &operand_data[3944],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpneq_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.i%#8  ne, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_v16qi },
    &operand_data[3944],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpeqq_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.i%#16  eq, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_v8hi },
    &operand_data[3947],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpgeq_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#16  ge, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_v8hi },
    &operand_data[3947],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpcsq_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.u%#16  cs, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpcsq_v8hi },
    &operand_data[3947],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpgtq_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#16  gt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_v8hi },
    &operand_data[3947],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmphiq_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.u%#16  hi, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmphiq_v8hi },
    &operand_data[3947],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpleq_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#16  le, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_v8hi },
    &operand_data[3947],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpltq_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#16  lt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_v8hi },
    &operand_data[3947],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpneq_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.i%#16  ne, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_v8hi },
    &operand_data[3947],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpeqq_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.i%#32  eq, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_v4si },
    &operand_data[3950],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpgeq_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#32  ge, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_v4si },
    &operand_data[3950],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpcsq_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.u%#32  cs, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpcsq_v4si },
    &operand_data[3950],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpgtq_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#32  gt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_v4si },
    &operand_data[3950],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmphiq_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.u%#32  hi, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmphiq_v4si },
    &operand_data[3950],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpleq_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#32  le, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_v4si },
    &operand_data[3950],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpltq_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#32  lt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_v4si },
    &operand_data[3950],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:820 */
  {
    "mve_vcmpneq_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.i%#32  ne, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_v4si },
    &operand_data[3950],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpeqq_n_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.i%#8	eq, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_n_v16qi },
    &operand_data[3953],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpgeq_n_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#8	ge, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_n_v16qi },
    &operand_data[3953],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpcsq_n_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.u%#8	cs, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpcsq_n_v16qi },
    &operand_data[3953],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpgtq_n_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#8	gt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_n_v16qi },
    &operand_data[3953],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmphiq_n_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.u%#8	hi, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmphiq_n_v16qi },
    &operand_data[3953],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpleq_n_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#8	le, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_n_v16qi },
    &operand_data[3953],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpltq_n_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#8	lt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_n_v16qi },
    &operand_data[3953],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpneq_n_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.i%#8	ne, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_n_v16qi },
    &operand_data[3953],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpeqq_n_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.i%#16	eq, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_n_v8hi },
    &operand_data[3956],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpgeq_n_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#16	ge, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_n_v8hi },
    &operand_data[3956],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpcsq_n_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.u%#16	cs, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpcsq_n_v8hi },
    &operand_data[3956],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpgtq_n_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#16	gt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_n_v8hi },
    &operand_data[3956],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmphiq_n_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.u%#16	hi, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmphiq_n_v8hi },
    &operand_data[3956],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpleq_n_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#16	le, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_n_v8hi },
    &operand_data[3956],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpltq_n_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#16	lt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_n_v8hi },
    &operand_data[3956],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpneq_n_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.i%#16	ne, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_n_v8hi },
    &operand_data[3956],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpeqq_n_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.i%#32	eq, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_n_v4si },
    &operand_data[3959],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpgeq_n_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#32	ge, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_n_v4si },
    &operand_data[3959],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpcsq_n_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.u%#32	cs, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpcsq_n_v4si },
    &operand_data[3959],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpgtq_n_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#32	gt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_n_v4si },
    &operand_data[3959],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmphiq_n_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.u%#32	hi, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmphiq_n_v4si },
    &operand_data[3959],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpleq_n_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#32	le, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_n_v4si },
    &operand_data[3959],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpltq_n_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.s%#32	lt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_n_v4si },
    &operand_data[3959],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:834 */
  {
    "mve_vcmpneq_n_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.i%#32	ne, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_n_v4si },
    &operand_data[3959],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:852 */
  {
    "mve_vabdq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.s%#8	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:852 */
  {
    "mve_vabdq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.u%#8	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:852 */
  {
    "mve_vabdq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.s%#16	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:852 */
  {
    "mve_vabdq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.u%#16	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:852 */
  {
    "mve_vabdq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.s%#32	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:852 */
  {
    "mve_vabdq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.u%#32	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:867 */
  {
    "mve_vaddq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i%#8	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_n_sv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:867 */
  {
    "mve_vaddq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i%#8	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_n_uv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:867 */
  {
    "mve_vaddq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i%#16	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_n_sv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:867 */
  {
    "mve_vaddq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i%#16	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_n_uv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:867 */
  {
    "mve_vaddq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i%#32	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_n_sv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:867 */
  {
    "mve_vaddq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i%#32	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_n_uv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:882 */
  {
    "mve_vaddvaq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddva.s%#8	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvaq_sv16qi },
    &operand_data[3971],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:882 */
  {
    "mve_vaddvaq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddva.u%#8	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvaq_uv16qi },
    &operand_data[3971],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:882 */
  {
    "mve_vaddvaq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddva.s%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvaq_sv8hi },
    &operand_data[3974],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:882 */
  {
    "mve_vaddvaq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddva.u%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvaq_uv8hi },
    &operand_data[3974],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:882 */
  {
    "mve_vaddvaq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddva.s%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvaq_sv4si },
    &operand_data[3977],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:882 */
  {
    "mve_vaddvaq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddva.u%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvaq_uv4si },
    &operand_data[3977],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:897 */
  {
    "mve_vaddvq_p_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddvt.u%#8	%0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvq_p_uv16qi },
    &operand_data[3980],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:897 */
  {
    "mve_vaddvq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddvt.s%#8	%0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvq_p_sv16qi },
    &operand_data[3980],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:897 */
  {
    "mve_vaddvq_p_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddvt.u%#16	%0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvq_p_uv8hi },
    &operand_data[3983],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:897 */
  {
    "mve_vaddvq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddvt.s%#16	%0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvq_p_sv8hi },
    &operand_data[3983],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:897 */
  {
    "mve_vaddvq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddvt.u%#32	%0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvq_p_uv4si },
    &operand_data[3986],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:897 */
  {
    "mve_vaddvq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddvt.s%#32	%0, %q1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvq_p_sv4si },
    &operand_data[3986],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:916 */
  {
    "mve_vandq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3269 },
#else
    { 0, 0, output_3269 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_uv16qi },
    &operand_data[1936],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:916 */
  {
    "mve_vandq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3270 },
#else
    { 0, 0, output_3270 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_uv8hi },
    &operand_data[1942],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:916 */
  {
    "mve_vandq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3271 },
#else
    { 0, 0, output_3271 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_uv4si },
    &operand_data[1948],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:940 */
  {
    "mve_vbicq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:940 */
  {
    "mve_vbicq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:940 */
  {
    "mve_vbicq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:963 */
  {
    "mve_vbrsrq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbrsr.%#8	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_n_uv16qi },
    &operand_data[3989],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:963 */
  {
    "mve_vbrsrq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbrsr.%#8	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_n_sv16qi },
    &operand_data[3989],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:963 */
  {
    "mve_vbrsrq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbrsr.%#16	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_n_uv8hi },
    &operand_data[3992],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:963 */
  {
    "mve_vbrsrq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbrsr.%#16	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_n_sv8hi },
    &operand_data[3992],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:963 */
  {
    "mve_vbrsrq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbrsr.%#32	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_n_uv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:963 */
  {
    "mve_vbrsrq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbrsr.%#32	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_n_sv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:978 */
  {
    "mve_vcaddq_rot90v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.i%#8	%q0, %q1, %q2, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot90v16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:978 */
  {
    "mve_vcaddq_rot270v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.i%#8	%q0, %q1, %q2, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot270v16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:978 */
  {
    "mve_vcaddq_rot90v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.i%#16	%q0, %q1, %q2, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot90v8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:978 */
  {
    "mve_vcaddq_rot270v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.i%#16	%q0, %q1, %q2, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot270v8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:978 */
  {
    "mve_vcaddq_rot90v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.i%#32	%q0, %q1, %q2, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot90v4si },
    &operand_data[3995],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:978 */
  {
    "mve_vcaddq_rot270v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.i%#32	%q0, %q1, %q2, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot270v4si },
    &operand_data[3995],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1002 */
  {
    "mve_veorq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1002 */
  {
    "mve_veorq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1002 */
  {
    "mve_veorq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1024 */
  {
    "mve_vhaddq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.u%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_n_uv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1024 */
  {
    "mve_vhaddq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.s%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_n_sv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1024 */
  {
    "mve_vhaddq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.u%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_n_uv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1024 */
  {
    "mve_vhaddq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.s%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_n_sv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1024 */
  {
    "mve_vhaddq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.u%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_n_uv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1024 */
  {
    "mve_vhaddq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.s%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_n_sv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1039 */
  {
    "mve_vhaddq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1039 */
  {
    "mve_vhaddq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1039 */
  {
    "mve_vhaddq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1039 */
  {
    "mve_vhaddq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1039 */
  {
    "mve_vhaddq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1039 */
  {
    "mve_vhaddq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhadd.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1054 */
  {
    "mve_vhcaddq_rot270_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhcadd.s%#8\t%q0, %q1, %q2, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhcaddq_rot270_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1054 */
  {
    "mve_vhcaddq_rot270_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhcadd.s%#16\t%q0, %q1, %q2, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhcaddq_rot270_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1054 */
  {
    "mve_vhcaddq_rot270_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhcadd.s%#32\t%q0, %q1, %q2, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhcaddq_rot270_sv4si },
    &operand_data[3995],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1069 */
  {
    "mve_vhcaddq_rot90_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhcadd.s%#8\t%q0, %q1, %q2, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhcaddq_rot90_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1069 */
  {
    "mve_vhcaddq_rot90_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhcadd.s%#16\t%q0, %q1, %q2, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhcaddq_rot90_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1069 */
  {
    "mve_vhcaddq_rot90_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhcadd.s%#32\t%q0, %q1, %q2, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhcaddq_rot90_sv4si },
    &operand_data[3995],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1084 */
  {
    "mve_vhsubq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.u%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_n_uv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1084 */
  {
    "mve_vhsubq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.s%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_n_sv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1084 */
  {
    "mve_vhsubq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.u%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_n_uv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1084 */
  {
    "mve_vhsubq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.s%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_n_sv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1084 */
  {
    "mve_vhsubq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.u%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_n_uv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1084 */
  {
    "mve_vhsubq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.s%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_n_sv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1099 */
  {
    "mve_vhsubq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1099 */
  {
    "mve_vhsubq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1099 */
  {
    "mve_vhsubq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1099 */
  {
    "mve_vhsubq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1099 */
  {
    "mve_vhsubq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1099 */
  {
    "mve_vhsubq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vhsub.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1114 */
  {
    "mve_vmaxaq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxa.s%#8	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxaq_sv16qi },
    &operand_data[1844],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1114 */
  {
    "mve_vmaxaq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxa.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxaq_sv8hi },
    &operand_data[1852],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1114 */
  {
    "mve_vmaxaq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxa.s%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxaq_sv4si },
    &operand_data[1860],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1129 */
  {
    "mve_vmaxavq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxav.s%#8\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxavq_sv16qi },
    &operand_data[3998],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1129 */
  {
    "mve_vmaxavq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxav.s%#16\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxavq_sv8hi },
    &operand_data[4001],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1129 */
  {
    "mve_vmaxavq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxav.s%#32\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxavq_sv4si },
    &operand_data[4004],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1144 */
  {
    "mve_vmaxq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.%#s8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1144 */
  {
    "mve_vmaxq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.%#s16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1144 */
  {
    "mve_vmaxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.%#s32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1155 */
  {
    "mve_vmaxq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.%#u8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1155 */
  {
    "mve_vmaxq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.%#u16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1155 */
  {
    "mve_vmaxq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmax.%#u32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1169 */
  {
    "mve_vmaxvq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxv.u%#8\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxvq_uv16qi },
    &operand_data[3998],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1169 */
  {
    "mve_vmaxvq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxv.s%#8\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxvq_sv16qi },
    &operand_data[3998],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1169 */
  {
    "mve_vmaxvq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxv.u%#16\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxvq_uv8hi },
    &operand_data[4001],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1169 */
  {
    "mve_vmaxvq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxv.s%#16\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxvq_sv8hi },
    &operand_data[4001],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1169 */
  {
    "mve_vmaxvq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxv.u%#32\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxvq_uv4si },
    &operand_data[4004],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1169 */
  {
    "mve_vmaxvq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxv.s%#32\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxvq_sv4si },
    &operand_data[4004],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1184 */
  {
    "mve_vminaq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmina.s%#8\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminaq_sv16qi },
    &operand_data[1844],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1184 */
  {
    "mve_vminaq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmina.s%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminaq_sv8hi },
    &operand_data[1852],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1184 */
  {
    "mve_vminaq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmina.s%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminaq_sv4si },
    &operand_data[1860],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1199 */
  {
    "mve_vminavq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminav.s%#8\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminavq_sv16qi },
    &operand_data[3998],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1199 */
  {
    "mve_vminavq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminav.s%#16\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminavq_sv8hi },
    &operand_data[4001],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1199 */
  {
    "mve_vminavq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminav.s%#32\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminavq_sv4si },
    &operand_data[4004],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1214 */
  {
    "mve_vminq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.%#s8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1214 */
  {
    "mve_vminq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.%#s16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1214 */
  {
    "mve_vminq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.%#s32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1225 */
  {
    "mve_vminq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.%#u8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1225 */
  {
    "mve_vminq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.%#u16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1225 */
  {
    "mve_vminq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmin.%#u32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1239 */
  {
    "mve_vminvq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminv.u%#8\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminvq_uv16qi },
    &operand_data[3998],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1239 */
  {
    "mve_vminvq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminv.s%#8\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminvq_sv16qi },
    &operand_data[3998],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1239 */
  {
    "mve_vminvq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminv.u%#16\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminvq_uv8hi },
    &operand_data[4001],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1239 */
  {
    "mve_vminvq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminv.s%#16\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminvq_sv8hi },
    &operand_data[4001],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1239 */
  {
    "mve_vminvq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminv.u%#32\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminvq_uv4si },
    &operand_data[4004],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1239 */
  {
    "mve_vminvq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminv.s%#32\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminvq_sv4si },
    &operand_data[4004],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1254 */
  {
    "mve_vmladavq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladav.u%#8\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavq_uv16qi },
    &operand_data[4007],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1254 */
  {
    "mve_vmladavq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladav.s%#8\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavq_sv16qi },
    &operand_data[4007],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1254 */
  {
    "mve_vmladavq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladav.u%#16\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavq_uv8hi },
    &operand_data[4010],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1254 */
  {
    "mve_vmladavq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladav.s%#16\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavq_sv8hi },
    &operand_data[4010],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1254 */
  {
    "mve_vmladavq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladav.u%#32\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavq_uv4si },
    &operand_data[4013],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1254 */
  {
    "mve_vmladavq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladav.s%#32\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavq_sv4si },
    &operand_data[4013],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1269 */
  {
    "mve_vmladavxq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladavx.s%#8\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavxq_sv16qi },
    &operand_data[4007],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1269 */
  {
    "mve_vmladavxq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladavx.s%#16\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavxq_sv8hi },
    &operand_data[4010],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1269 */
  {
    "mve_vmladavxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladavx.s%#32\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavxq_sv4si },
    &operand_data[4013],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1284 */
  {
    "mve_vmlsdavq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsdav.s%#8\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavq_sv16qi },
    &operand_data[4007],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1284 */
  {
    "mve_vmlsdavq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsdav.s%#16\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavq_sv8hi },
    &operand_data[4010],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1284 */
  {
    "mve_vmlsdavq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsdav.s%#32\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavq_sv4si },
    &operand_data[4013],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1299 */
  {
    "mve_vmlsdavxq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsdavx.s%#8\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavxq_sv16qi },
    &operand_data[4007],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1299 */
  {
    "mve_vmlsdavxq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsdavx.s%#16\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavxq_sv8hi },
    &operand_data[4010],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1299 */
  {
    "mve_vmlsdavxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsdavx.s%#32\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavxq_sv4si },
    &operand_data[4013],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1314 */
  {
    "mve_vmulhq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmulh.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulhq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1314 */
  {
    "mve_vmulhq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmulh.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulhq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1314 */
  {
    "mve_vmulhq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmulh.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulhq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1314 */
  {
    "mve_vmulhq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmulh.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulhq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1314 */
  {
    "mve_vmulhq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmulh.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulhq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1314 */
  {
    "mve_vmulhq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmulh.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulhq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1329 */
  {
    "mve_vmullbq_int_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullb.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_int_uv16qi },
    &operand_data[4016],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1329 */
  {
    "mve_vmullbq_int_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullb.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_int_sv16qi },
    &operand_data[4016],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1329 */
  {
    "mve_vmullbq_int_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullb.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_int_uv8hi },
    &operand_data[4019],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1329 */
  {
    "mve_vmullbq_int_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullb.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_int_sv8hi },
    &operand_data[4019],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1329 */
  {
    "mve_vmullbq_int_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullb.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_int_uv4si },
    &operand_data[4022],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1329 */
  {
    "mve_vmullbq_int_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullb.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_int_sv4si },
    &operand_data[4022],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1344 */
  {
    "mve_vmulltq_int_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullt.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_int_uv16qi },
    &operand_data[4016],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1344 */
  {
    "mve_vmulltq_int_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullt.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_int_sv16qi },
    &operand_data[4016],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1344 */
  {
    "mve_vmulltq_int_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullt.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_int_uv8hi },
    &operand_data[4019],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1344 */
  {
    "mve_vmulltq_int_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullt.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_int_sv8hi },
    &operand_data[4019],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1344 */
  {
    "mve_vmulltq_int_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullt.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_int_uv4si },
    &operand_data[4022],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1344 */
  {
    "mve_vmulltq_int_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullt.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_int_sv4si },
    &operand_data[4022],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1359 */
  {
    "mve_vmulq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_n_uv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1359 */
  {
    "mve_vmulq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_n_sv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1359 */
  {
    "mve_vmulq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_n_uv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1359 */
  {
    "mve_vmulq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_n_sv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1359 */
  {
    "mve_vmulq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_n_uv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1359 */
  {
    "mve_vmulq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_n_sv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1374 */
  {
    "mve_vmulq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1374 */
  {
    "mve_vmulq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1374 */
  {
    "mve_vmulq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1374 */
  {
    "mve_vmulq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1374 */
  {
    "mve_vmulq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1374 */
  {
    "mve_vmulq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1386 */
  {
    "mve_vmulqv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulqv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1386 */
  {
    "mve_vmulqv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulqv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1386 */
  {
    "mve_vmulqv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.i%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulqv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1400 */
  {
    "mve_vornq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1400 */
  {
    "mve_vornq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1400 */
  {
    "mve_vornq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1427 */
  {
    "mve_vorrq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3407 },
#else
    { 0, 0, output_3407 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_sv16qi },
    &operand_data[1903],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1427 */
  {
    "mve_vorrq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3408 },
#else
    { 0, 0, output_3408 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_sv8hi },
    &operand_data[1909],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1427 */
  {
    "mve_vorrq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_3409 },
#else
    { 0, 0, output_3409 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_sv4si },
    &operand_data[1915],
    3,
    3,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1451 */
  {
    "mve_vqaddq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_n_sv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1451 */
  {
    "mve_vqaddq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_n_uv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1451 */
  {
    "mve_vqaddq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_n_sv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1451 */
  {
    "mve_vqaddq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_n_uv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1451 */
  {
    "mve_vqaddq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_n_sv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1451 */
  {
    "mve_vqaddq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_n_uv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1466 */
  {
    "mve_vqaddq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1466 */
  {
    "mve_vqaddq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1466 */
  {
    "mve_vqaddq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1466 */
  {
    "mve_vqaddq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1466 */
  {
    "mve_vqaddq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1466 */
  {
    "mve_vqaddq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqadd.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1481 */
  {
    "mve_vqdmulhq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmulh.s%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulhq_n_sv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1481 */
  {
    "mve_vqdmulhq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmulh.s%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulhq_n_sv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1481 */
  {
    "mve_vqdmulhq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmulh.s%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulhq_n_sv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1496 */
  {
    "mve_vqdmulhq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmulh.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulhq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1496 */
  {
    "mve_vqdmulhq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmulh.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulhq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1496 */
  {
    "mve_vqdmulhq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmulh.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulhq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1511 */
  {
    "mve_vqrdmulhq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmulh.s%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmulhq_n_sv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1511 */
  {
    "mve_vqrdmulhq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmulh.s%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmulhq_n_sv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1511 */
  {
    "mve_vqrdmulhq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmulh.s%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmulhq_n_sv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1526 */
  {
    "mve_vqrdmulhq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmulh.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmulhq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1526 */
  {
    "mve_vqrdmulhq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmulh.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmulhq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1526 */
  {
    "mve_vqrdmulhq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmulh.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmulhq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1541 */
  {
    "mve_vqrshlq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.s%#8\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_n_sv16qi },
    &operand_data[4025],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1541 */
  {
    "mve_vqrshlq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.u%#8\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_n_uv16qi },
    &operand_data[4025],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1541 */
  {
    "mve_vqrshlq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.s%#16\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_n_sv8hi },
    &operand_data[4028],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1541 */
  {
    "mve_vqrshlq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.u%#16\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_n_uv8hi },
    &operand_data[4028],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1541 */
  {
    "mve_vqrshlq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.s%#32\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_n_sv4si },
    &operand_data[4031],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1541 */
  {
    "mve_vqrshlq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.u%#32\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_n_uv4si },
    &operand_data[4031],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1556 */
  {
    "mve_vqrshlq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1556 */
  {
    "mve_vqrshlq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1556 */
  {
    "mve_vqrshlq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1556 */
  {
    "mve_vqrshlq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1556 */
  {
    "mve_vqrshlq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1556 */
  {
    "mve_vqrshlq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshl.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1571 */
  {
    "mve_vqshlq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_n_sv16qi },
    &operand_data[2711],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1571 */
  {
    "mve_vqshlq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_n_uv16qi },
    &operand_data[2711],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1571 */
  {
    "mve_vqshlq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_n_sv8hi },
    &operand_data[2714],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1571 */
  {
    "mve_vqshlq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_n_uv8hi },
    &operand_data[2714],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1571 */
  {
    "mve_vqshlq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_n_sv4si },
    &operand_data[2717],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1571 */
  {
    "mve_vqshlq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_n_uv4si },
    &operand_data[2717],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1586 */
  {
    "mve_vqshlq_r_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#8\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_r_uv16qi },
    &operand_data[4025],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1586 */
  {
    "mve_vqshlq_r_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#8\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_r_sv16qi },
    &operand_data[4025],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1586 */
  {
    "mve_vqshlq_r_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#16\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_r_uv8hi },
    &operand_data[4028],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1586 */
  {
    "mve_vqshlq_r_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#16\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_r_sv8hi },
    &operand_data[4028],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1586 */
  {
    "mve_vqshlq_r_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#32\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_r_uv4si },
    &operand_data[4031],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1586 */
  {
    "mve_vqshlq_r_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#32\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_r_sv4si },
    &operand_data[4031],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1601 */
  {
    "mve_vqshlq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1601 */
  {
    "mve_vqshlq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1601 */
  {
    "mve_vqshlq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1601 */
  {
    "mve_vqshlq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1601 */
  {
    "mve_vqshlq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1601 */
  {
    "mve_vqshlq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshl.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1616 */
  {
    "mve_vqshluq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshlu.s%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshluq_n_sv16qi },
    &operand_data[4034],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1616 */
  {
    "mve_vqshluq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshlu.s%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshluq_n_sv8hi },
    &operand_data[4037],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1616 */
  {
    "mve_vqshluq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshlu.s%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshluq_n_sv4si },
    &operand_data[4040],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1631 */
  {
    "mve_vqsubq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_n_sv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1631 */
  {
    "mve_vqsubq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_n_uv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1631 */
  {
    "mve_vqsubq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_n_sv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1631 */
  {
    "mve_vqsubq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_n_uv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1631 */
  {
    "mve_vqsubq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_n_sv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1631 */
  {
    "mve_vqsubq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_n_uv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1646 */
  {
    "mve_vqsubq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1646 */
  {
    "mve_vqsubq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1646 */
  {
    "mve_vqsubq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1646 */
  {
    "mve_vqsubq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1646 */
  {
    "mve_vqsubq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1646 */
  {
    "mve_vqsubq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqsub.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1661 */
  {
    "mve_vrhaddq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrhaddq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1661 */
  {
    "mve_vrhaddq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrhaddq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1661 */
  {
    "mve_vrhaddq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrhaddq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1661 */
  {
    "mve_vrhaddq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrhaddq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1661 */
  {
    "mve_vrhaddq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrhaddq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1661 */
  {
    "mve_vrhaddq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrhadd.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrhaddq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1676 */
  {
    "mve_vrmulhq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmulh.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmulhq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1676 */
  {
    "mve_vrmulhq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmulh.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmulhq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1676 */
  {
    "mve_vrmulhq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmulh.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmulhq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1676 */
  {
    "mve_vrmulhq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmulh.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmulhq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1676 */
  {
    "mve_vrmulhq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmulh.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmulhq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1676 */
  {
    "mve_vrmulhq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmulh.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmulhq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1691 */
  {
    "mve_vrshlq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.u%#8\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_n_uv16qi },
    &operand_data[4025],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1691 */
  {
    "mve_vrshlq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.s%#8\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_n_sv16qi },
    &operand_data[4025],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1691 */
  {
    "mve_vrshlq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.u%#16\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_n_uv8hi },
    &operand_data[4028],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1691 */
  {
    "mve_vrshlq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.s%#16\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_n_sv8hi },
    &operand_data[4028],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1691 */
  {
    "mve_vrshlq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.u%#32\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_n_uv4si },
    &operand_data[4031],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1691 */
  {
    "mve_vrshlq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.s%#32\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_n_sv4si },
    &operand_data[4031],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1706 */
  {
    "mve_vrshlq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.s%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1706 */
  {
    "mve_vrshlq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.u%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1706 */
  {
    "mve_vrshlq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.s%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1706 */
  {
    "mve_vrshlq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.u%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1706 */
  {
    "mve_vrshlq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.s%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1706 */
  {
    "mve_vrshlq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshl.u%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1721 */
  {
    "mve_vrshrq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshr.s%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrq_n_sv16qi },
    &operand_data[3917],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1721 */
  {
    "mve_vrshrq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshr.u%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrq_n_uv16qi },
    &operand_data[3917],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1721 */
  {
    "mve_vrshrq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshr.s%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrq_n_sv8hi },
    &operand_data[3920],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1721 */
  {
    "mve_vrshrq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshr.u%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrq_n_uv8hi },
    &operand_data[3920],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1721 */
  {
    "mve_vrshrq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshr.s%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrq_n_sv4si },
    &operand_data[3923],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1721 */
  {
    "mve_vrshrq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshr.u%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrq_n_uv4si },
    &operand_data[3923],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1736 */
  {
    "mve_vshlq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_n_uv16qi },
    &operand_data[2711],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1736 */
  {
    "mve_vshlq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_n_sv16qi },
    &operand_data[2711],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1736 */
  {
    "mve_vshlq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_n_uv8hi },
    &operand_data[2714],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1736 */
  {
    "mve_vshlq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_n_sv8hi },
    &operand_data[2714],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1736 */
  {
    "mve_vshlq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_n_uv4si },
    &operand_data[2717],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1736 */
  {
    "mve_vshlq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_n_sv4si },
    &operand_data[2717],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1751 */
  {
    "mve_vshlq_r_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s%#8\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_r_sv16qi },
    &operand_data[4025],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1751 */
  {
    "mve_vshlq_r_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u%#8\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_r_uv16qi },
    &operand_data[4025],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1751 */
  {
    "mve_vshlq_r_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s%#16\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_r_sv8hi },
    &operand_data[4028],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1751 */
  {
    "mve_vshlq_r_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u%#16\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_r_uv8hi },
    &operand_data[4028],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1751 */
  {
    "mve_vshlq_r_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.s%#32\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_r_sv4si },
    &operand_data[4031],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1751 */
  {
    "mve_vshlq_r_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshl.u%#32\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_r_uv4si },
    &operand_data[4031],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1766 */
  {
    "mve_vsubq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_n_sv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1766 */
  {
    "mve_vsubq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_n_uv16qi },
    &operand_data[3962],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1766 */
  {
    "mve_vsubq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_n_sv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1766 */
  {
    "mve_vsubq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_n_uv8hi },
    &operand_data[3965],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1766 */
  {
    "mve_vsubq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_n_sv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1766 */
  {
    "mve_vsubq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i%#32\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_n_uv4si },
    &operand_data[3968],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1781 */
  {
    "mve_vsubq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_sv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1781 */
  {
    "mve_vsubq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_uv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1781 */
  {
    "mve_vsubq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_sv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1781 */
  {
    "mve_vsubq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_uv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1781 */
  {
    "mve_vsubq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1781 */
  {
    "mve_vsubq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1793 */
  {
    "mve_vsubqv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubqv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1793 */
  {
    "mve_vsubqv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubqv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1793 */
  {
    "mve_vsubqv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.i%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubqv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1807 */
  {
    "mve_vabdq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.f%#16	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_fv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1807 */
  {
    "mve_vabdq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabd.f%#32	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_fv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1822 */
  {
    "mve_vaddlvaq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddlva.s32 %Q0, %R0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddlvaq_sv4si },
    &operand_data[4043],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1822 */
  {
    "mve_vaddlvaq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vaddlva.u32 %Q0, %R0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddlvaq_uv4si },
    &operand_data[4043],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1837 */
  {
    "mve_vaddq_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.f%#16	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_n_fv8hf },
    &operand_data[3881],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1837 */
  {
    "mve_vaddq_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.f%#32	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_n_fv4sf },
    &operand_data[3884],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1852 */
  {
    "mve_vandq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vand %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_fv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1852 */
  {
    "mve_vandq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vand %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_fv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1866 */
  {
    "mve_vbicq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_fv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1866 */
  {
    "mve_vbicq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_fv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1880 */
  {
    "mve_vbicq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic.i%#16	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_n_sv8hi },
    &operand_data[4046],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1880 */
  {
    "mve_vbicq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic.i%#16	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_n_uv8hi },
    &operand_data[4046],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1880 */
  {
    "mve_vbicq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic.i%#32	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_n_sv4si },
    &operand_data[4049],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1880 */
  {
    "mve_vbicq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vbic.i%#32	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_n_uv4si },
    &operand_data[4049],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1895 */
  {
    "mve_vcaddq_rot90v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.f%#16	%q0, %q1, %q2, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot90v8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1895 */
  {
    "mve_vcaddq_rot270v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.f%#16	%q0, %q1, %q2, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot270v8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1895 */
  {
    "mve_vcaddq_rot90v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.f%#32	%q0, %q1, %q2, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot90v4sf },
    &operand_data[4052],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1895 */
  {
    "mve_vcaddq_rot270v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcadd.f%#32	%q0, %q1, %q2, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot270v4sf },
    &operand_data[4052],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1910 */
  {
    "mve_vcmpeqq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#16	eq, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_fv8hf },
    &operand_data[4055],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1910 */
  {
    "mve_vcmpgeq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#16	ge, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_fv8hf },
    &operand_data[4055],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1910 */
  {
    "mve_vcmpgtq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#16	gt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_fv8hf },
    &operand_data[4055],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1910 */
  {
    "mve_vcmpleq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#16	le, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_fv8hf },
    &operand_data[4055],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1910 */
  {
    "mve_vcmpltq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#16	lt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_fv8hf },
    &operand_data[4055],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1910 */
  {
    "mve_vcmpneq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#16	ne, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_fv8hf },
    &operand_data[4055],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1910 */
  {
    "mve_vcmpeqq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#32	eq, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_fv4sf },
    &operand_data[4058],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1910 */
  {
    "mve_vcmpgeq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#32	ge, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_fv4sf },
    &operand_data[4058],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1910 */
  {
    "mve_vcmpgtq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#32	gt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_fv4sf },
    &operand_data[4058],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1910 */
  {
    "mve_vcmpleq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#32	le, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_fv4sf },
    &operand_data[4058],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1910 */
  {
    "mve_vcmpltq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#32	lt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_fv4sf },
    &operand_data[4058],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1910 */
  {
    "mve_vcmpneq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#32	ne, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_fv4sf },
    &operand_data[4058],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1924 */
  {
    "mve_vcmpeqq_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#16	eq, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_n_fv8hf },
    &operand_data[4061],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1924 */
  {
    "mve_vcmpgeq_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#16	ge, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_n_fv8hf },
    &operand_data[4061],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1924 */
  {
    "mve_vcmpgtq_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#16	gt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_n_fv8hf },
    &operand_data[4061],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1924 */
  {
    "mve_vcmpleq_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#16	le, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_n_fv8hf },
    &operand_data[4061],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1924 */
  {
    "mve_vcmpltq_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#16	lt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_n_fv8hf },
    &operand_data[4061],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1924 */
  {
    "mve_vcmpneq_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#16	ne, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_n_fv8hf },
    &operand_data[4061],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1924 */
  {
    "mve_vcmpeqq_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#32	eq, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_n_fv4sf },
    &operand_data[4064],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1924 */
  {
    "mve_vcmpgeq_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#32	ge, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_n_fv4sf },
    &operand_data[4064],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1924 */
  {
    "mve_vcmpgtq_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#32	gt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_n_fv4sf },
    &operand_data[4064],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1924 */
  {
    "mve_vcmpleq_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#32	le, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_n_fv4sf },
    &operand_data[4064],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1924 */
  {
    "mve_vcmpltq_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#32	lt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_n_fv4sf },
    &operand_data[4064],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1924 */
  {
    "mve_vcmpneq_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmp.f%#32	ne, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_n_fv4sf },
    &operand_data[4064],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1938 */
  {
    "mve_vcmulqv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmul.f%#16	%q0, %q1, %q2, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulqv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1938 */
  {
    "mve_vcmulq_rot90v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmul.f%#16	%q0, %q1, %q2, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulq_rot90v8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1938 */
  {
    "mve_vcmulq_rot180v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmul.f%#16	%q0, %q1, %q2, #180",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulq_rot180v8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1938 */
  {
    "mve_vcmulq_rot270v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmul.f%#16	%q0, %q1, %q2, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulq_rot270v8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1938 */
  {
    "mve_vcmulqv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmul.f%#32	%q0, %q1, %q2, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulqv4sf },
    &operand_data[4052],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1938 */
  {
    "mve_vcmulq_rot90v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmul.f%#32	%q0, %q1, %q2, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulq_rot90v4sf },
    &operand_data[4052],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1938 */
  {
    "mve_vcmulq_rot180v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmul.f%#32	%q0, %q1, %q2, #180",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulq_rot180v4sf },
    &operand_data[4052],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1938 */
  {
    "mve_vcmulq_rot270v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcmul.f%#32	%q0, %q1, %q2, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulq_rot270v4sf },
    &operand_data[4052],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1953 */
  {
    "mve_vctp8q_mhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvctpt.8 %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vctp8q_mhi },
    &operand_data[4067],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1953 */
  {
    "mve_vctp16q_mhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvctpt.16 %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vctp16q_mhi },
    &operand_data[4067],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1953 */
  {
    "mve_vctp32q_mhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvctpt.32 %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vctp32q_mhi },
    &operand_data[4067],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1953 */
  {
    "mve_vctp64q_mhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvctpt.64 %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vctp64q_mhi },
    &operand_data[4067],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1968 */
  {
    "mve_vcvtbq_f16_f32v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtb.f16.f32 %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtbq_f16_f32v8hf },
    &operand_data[4070],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1983 */
  {
    "mve_vcvttq_f16_f32v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtt.f16.f32 %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvttq_f16_f32v8hf },
    &operand_data[4070],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1998 */
  {
    "mve_veorq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_fv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1998 */
  {
    "mve_veorq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "veor %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_fv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2012 */
  {
    "mve_vmaxnmaq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnma.f%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmaq_fv8hf },
    &operand_data[1872],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2012 */
  {
    "mve_vmaxnmaq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnma.f%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmaq_fv4sf },
    &operand_data[1868],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2027 */
  {
    "mve_vmaxnmavq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnmav.f%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmavq_fv8hf },
    &operand_data[4073],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2027 */
  {
    "mve_vmaxnmavq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnmav.f%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmavq_fv4sf },
    &operand_data[4076],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2042 */
  {
    "mve_vmaxnmq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnm.f%#16	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmq_fv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2042 */
  {
    "mve_vmaxnmq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnm.f%#32	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmq_fv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2056 */
  {
    "mve_vmaxnmvq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnmv.f%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmvq_fv8hf },
    &operand_data[4073],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2056 */
  {
    "mve_vmaxnmvq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmaxnmv.f%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmvq_fv4sf },
    &operand_data[4076],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2071 */
  {
    "mve_vminnmaq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnma.f%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmaq_fv8hf },
    &operand_data[1872],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2071 */
  {
    "mve_vminnmaq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnma.f%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmaq_fv4sf },
    &operand_data[1868],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2086 */
  {
    "mve_vminnmavq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnmav.f%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmavq_fv8hf },
    &operand_data[4073],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2086 */
  {
    "mve_vminnmavq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnmav.f%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmavq_fv4sf },
    &operand_data[4076],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2101 */
  {
    "mve_vminnmq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnm.f%#16	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmq_fv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2101 */
  {
    "mve_vminnmq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnm.f%#32	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmq_fv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2115 */
  {
    "mve_vminnmvq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnmv.f%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmvq_fv8hf },
    &operand_data[4073],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2115 */
  {
    "mve_vminnmvq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vminnmv.f%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmvq_fv4sf },
    &operand_data[4076],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2130 */
  {
    "mve_vmlaldavq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlaldav.u%#16	%Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavq_uv8hi },
    &operand_data[4079],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2130 */
  {
    "mve_vmlaldavq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlaldav.s%#16	%Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavq_sv8hi },
    &operand_data[4079],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2130 */
  {
    "mve_vmlaldavq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlaldav.u%#32	%Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavq_uv4si },
    &operand_data[4082],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2130 */
  {
    "mve_vmlaldavq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlaldav.s%#32	%Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavq_sv4si },
    &operand_data[4082],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2145 */
  {
    "mve_vmlaldavxq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlaldavx.s%#16 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavxq_sv8hi },
    &operand_data[4079],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2145 */
  {
    "mve_vmlaldavxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlaldavx.s%#32 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavxq_sv4si },
    &operand_data[4082],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2160 */
  {
    "mve_vmlsldavq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsldav.s%#16 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavq_sv8hi },
    &operand_data[4079],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2160 */
  {
    "mve_vmlsldavq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsldav.s%#32 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavq_sv4si },
    &operand_data[4082],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2175 */
  {
    "mve_vmlsldavxq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsldavx.s%#16 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavxq_sv8hi },
    &operand_data[4079],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2175 */
  {
    "mve_vmlsldavxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsldavx.s%#32 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavxq_sv4si },
    &operand_data[4082],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2190 */
  {
    "mve_vmovnbq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovnb.i%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovnbq_uv8hi },
    &operand_data[4085],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2190 */
  {
    "mve_vmovnbq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovnb.i%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovnbq_sv8hi },
    &operand_data[4085],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2190 */
  {
    "mve_vmovnbq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovnb.i%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovnbq_uv4si },
    &operand_data[4088],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2190 */
  {
    "mve_vmovnbq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovnb.i%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovnbq_sv4si },
    &operand_data[4088],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2205 */
  {
    "mve_vmovntq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovnt.i%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovntq_sv8hi },
    &operand_data[4085],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2205 */
  {
    "mve_vmovntq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovnt.i%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovntq_uv8hi },
    &operand_data[4085],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2205 */
  {
    "mve_vmovntq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovnt.i%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovntq_sv4si },
    &operand_data[4088],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2205 */
  {
    "mve_vmovntq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmovnt.i%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovntq_uv4si },
    &operand_data[4088],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2220 */
  {
    "mve_vmulq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.f%#16	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_fv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2220 */
  {
    "mve_vmulq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.f%#32	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_fv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2234 */
  {
    "mve_vmulq_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.f%#16	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_n_fv8hf },
    &operand_data[3881],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2234 */
  {
    "mve_vmulq_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul.f%#32	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_n_fv4sf },
    &operand_data[3884],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2249 */
  {
    "mve_vornq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_fv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2249 */
  {
    "mve_vornq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorn %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_fv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2263 */
  {
    "mve_vorrq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorr %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_fv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2263 */
  {
    "mve_vorrq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorr %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_fv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2277 */
  {
    "mve_vorrq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorr.i%#16	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_n_uv8hi },
    &operand_data[4046],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2277 */
  {
    "mve_vorrq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorr.i%#16	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_n_sv8hi },
    &operand_data[4046],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2277 */
  {
    "mve_vorrq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorr.i%#32	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_n_uv4si },
    &operand_data[4049],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2277 */
  {
    "mve_vorrq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vorr.i%#32	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_n_sv4si },
    &operand_data[4049],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2292 */
  {
    "mve_vqdmullbq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmullb.s%#16	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmullbq_n_sv8hi },
    &operand_data[4091],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2292 */
  {
    "mve_vqdmullbq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmullb.s%#32	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmullbq_n_sv4si },
    &operand_data[4094],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2307 */
  {
    "mve_vqdmullbq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmullb.s%#16	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmullbq_sv8hi },
    &operand_data[4019],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2307 */
  {
    "mve_vqdmullbq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmullb.s%#32	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmullbq_sv4si },
    &operand_data[4022],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2322 */
  {
    "mve_vqdmulltq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmullt.s%#16	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulltq_n_sv8hi },
    &operand_data[4091],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2322 */
  {
    "mve_vqdmulltq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmullt.s%#32	%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulltq_n_sv4si },
    &operand_data[4094],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2337 */
  {
    "mve_vqdmulltq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmullt.s%#16	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulltq_sv8hi },
    &operand_data[4019],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2337 */
  {
    "mve_vqdmulltq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmullt.s%#32	%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulltq_sv4si },
    &operand_data[4022],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2352 */
  {
    "mve_vqmovnbq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovnb.u%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovnbq_uv8hi },
    &operand_data[4085],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2352 */
  {
    "mve_vqmovnbq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovnb.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovnbq_sv8hi },
    &operand_data[4085],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2352 */
  {
    "mve_vqmovnbq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovnb.u%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovnbq_uv4si },
    &operand_data[4088],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2352 */
  {
    "mve_vqmovnbq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovnb.s%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovnbq_sv4si },
    &operand_data[4088],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2367 */
  {
    "mve_vqmovntq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovnt.u%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovntq_uv8hi },
    &operand_data[4085],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2367 */
  {
    "mve_vqmovntq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovnt.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovntq_sv8hi },
    &operand_data[4085],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2367 */
  {
    "mve_vqmovntq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovnt.u%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovntq_uv4si },
    &operand_data[4088],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2367 */
  {
    "mve_vqmovntq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovnt.s%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovntq_sv4si },
    &operand_data[4088],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2382 */
  {
    "mve_vqmovunbq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovunb.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovunbq_sv8hi },
    &operand_data[4085],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2382 */
  {
    "mve_vqmovunbq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovunb.s%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovunbq_sv4si },
    &operand_data[4088],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2397 */
  {
    "mve_vqmovuntq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovunt.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovuntq_sv8hi },
    &operand_data[4085],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2397 */
  {
    "mve_vqmovuntq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqmovunt.s%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovuntq_sv4si },
    &operand_data[4088],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2412 */
  {
    "mve_vrmlaldavhxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmlaldavhx.s32 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlaldavhxq_sv4si },
    &operand_data[4082],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2427 */
  {
    "mve_vrmlsldavhq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmlsldavh.s32\t%Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlsldavhq_sv4si },
    &operand_data[4082],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2442 */
  {
    "mve_vrmlsldavhxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmlsldavhx.s32\t%Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlsldavhxq_sv4si },
    &operand_data[4082],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2457 */
  {
    "mve_vshllbq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshllb.s%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshllbq_n_sv16qi },
    &operand_data[4097],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2457 */
  {
    "mve_vshllbq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshllb.u%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshllbq_n_uv16qi },
    &operand_data[4097],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2457 */
  {
    "mve_vshllbq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshllb.s%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshllbq_n_sv8hi },
    &operand_data[4100],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2457 */
  {
    "mve_vshllbq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshllb.u%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshllbq_n_uv8hi },
    &operand_data[4100],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2472 */
  {
    "mve_vshlltq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshllt.u%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlltq_n_uv16qi },
    &operand_data[4097],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2472 */
  {
    "mve_vshlltq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshllt.s%#8\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlltq_n_sv16qi },
    &operand_data[4097],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2472 */
  {
    "mve_vshlltq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshllt.u%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlltq_n_uv8hi },
    &operand_data[4100],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2472 */
  {
    "mve_vshlltq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshllt.s%#16\t%q0, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlltq_n_sv8hi },
    &operand_data[4100],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2487 */
  {
    "mve_vsubq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.f%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_fv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2487 */
  {
    "mve_vsubq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub.f%#32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_fv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2501 */
  {
    "mve_vmulltq_poly_pv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullt.p%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_poly_pv16qi },
    &operand_data[4016],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2501 */
  {
    "mve_vmulltq_poly_pv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullt.p%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_poly_pv8hi },
    &operand_data[4019],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2516 */
  {
    "mve_vmullbq_poly_pv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullb.p%#8\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_poly_pv16qi },
    &operand_data[4016],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2516 */
  {
    "mve_vmullbq_poly_pv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmullb.p%#16\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_poly_pv8hi },
    &operand_data[4019],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2531 */
  {
    "mve_vrmlaldavhq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmlaldavh.u32 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlaldavhq_uv4si },
    &operand_data[4082],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2531 */
  {
    "mve_vrmlaldavhq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmlaldavh.s32 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlaldavhq_sv4si },
    &operand_data[4082],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2546 */
  {
    "mve_vbicq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbict.i%#16	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_m_n_sv8hi },
    &operand_data[4103],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2546 */
  {
    "mve_vbicq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbict.i%#16	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_m_n_uv8hi },
    &operand_data[4103],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2546 */
  {
    "mve_vbicq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbict.i%#32	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_m_n_sv4si },
    &operand_data[4107],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2546 */
  {
    "mve_vbicq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbict.i%#32	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_m_n_uv4si },
    &operand_data[4107],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2561 */
  {
    "mve_vcmpeqq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#16	eq, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_fv8hf },
    &operand_data[4111],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2561 */
  {
    "mve_vcmpeqq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#32	eq, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_fv4sf },
    &operand_data[4115],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2576 */
  {
    "mve_vcvtaq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtat.s%#16.f%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtaq_m_sv8hi },
    &operand_data[4119],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2576 */
  {
    "mve_vcvtaq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtat.u%#16.f%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtaq_m_uv8hi },
    &operand_data[4119],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2576 */
  {
    "mve_vcvtaq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtat.s%#32.f%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtaq_m_sv4si },
    &operand_data[4123],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2576 */
  {
    "mve_vcvtaq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtat.u%#32.f%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtaq_m_uv4si },
    &operand_data[4123],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2591 */
  {
    "mve_vcvtq_m_to_f_sv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.f%#16.s%#16	 %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_to_f_sv8hf },
    &operand_data[4127],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2591 */
  {
    "mve_vcvtq_m_to_f_uv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.f%#16.u%#16	 %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_to_f_uv8hf },
    &operand_data[4127],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2591 */
  {
    "mve_vcvtq_m_to_f_sv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.f%#32.s%#32	 %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_to_f_sv4sf },
    &operand_data[4131],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2591 */
  {
    "mve_vcvtq_m_to_f_uv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.f%#32.u%#32	 %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_to_f_uv4sf },
    &operand_data[4131],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2606 */
  {
    "mve_vqrshrnbq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshrnb.u%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrnbq_n_uv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2606 */
  {
    "mve_vqrshrnbq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshrnb.s%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrnbq_n_sv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2606 */
  {
    "mve_vqrshrnbq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshrnb.u%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrnbq_n_uv4si },
    &operand_data[4139],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2606 */
  {
    "mve_vqrshrnbq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshrnb.s%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrnbq_n_sv4si },
    &operand_data[4139],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2621 */
  {
    "mve_vqrshrunbq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshrunb.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrunbq_n_sv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2621 */
  {
    "mve_vqrshrunbq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshrunb.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrunbq_n_sv4si },
    &operand_data[4139],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2636 */
  {
    "mve_vrmlaldavhaq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmlaldavha.s32 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlaldavhaq_sv4si },
    &operand_data[4143],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2636 */
  {
    "mve_vrmlaldavhaq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmlaldavha.u32 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlaldavhaq_uv4si },
    &operand_data[4143],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2652 */
  {
    "mve_vabavq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabav.s%#8\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabavq_sv16qi },
    &operand_data[4147],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2652 */
  {
    "mve_vabavq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabav.u%#8\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabavq_uv16qi },
    &operand_data[4147],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2652 */
  {
    "mve_vabavq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabav.s%#16\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabavq_sv8hi },
    &operand_data[4151],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2652 */
  {
    "mve_vabavq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabav.u%#16\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabavq_uv8hi },
    &operand_data[4151],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2652 */
  {
    "mve_vabavq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabav.s%#32\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabavq_sv4si },
    &operand_data[4155],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2652 */
  {
    "mve_vabavq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabav.u%#32\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabavq_uv4si },
    &operand_data[4155],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2696 */
  {
    "mve_vshlcq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshlc %q0, %1, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_sv16qi },
    &operand_data[4159],
    5,
    5,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2696 */
  {
    "mve_vshlcq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshlc %q0, %1, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_uv16qi },
    &operand_data[4159],
    5,
    5,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2696 */
  {
    "mve_vshlcq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshlc %q0, %1, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_sv8hi },
    &operand_data[4164],
    5,
    5,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2696 */
  {
    "mve_vshlcq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshlc %q0, %1, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_uv8hi },
    &operand_data[4164],
    5,
    5,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2696 */
  {
    "mve_vshlcq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshlc %q0, %1, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_sv4si },
    &operand_data[4169],
    5,
    5,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2696 */
  {
    "mve_vshlcq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshlc %q0, %1, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_uv4si },
    &operand_data[4169],
    5,
    5,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2713 */
  {
    "mve_vabsq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabst.s%#8	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabsq_m_sv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2713 */
  {
    "mve_vabsq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabst.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabsq_m_sv8hi },
    &operand_data[4178],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2713 */
  {
    "mve_vabsq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabst.s%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabsq_m_sv4si },
    &operand_data[4182],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2729 */
  {
    "mve_vaddvaq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddvat.s%#8	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvaq_p_sv16qi },
    &operand_data[4186],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2729 */
  {
    "mve_vaddvaq_p_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddvat.u%#8	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvaq_p_uv16qi },
    &operand_data[4186],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2729 */
  {
    "mve_vaddvaq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddvat.s%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvaq_p_sv8hi },
    &operand_data[4190],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2729 */
  {
    "mve_vaddvaq_p_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddvat.u%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvaq_p_uv8hi },
    &operand_data[4190],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2729 */
  {
    "mve_vaddvaq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddvat.s%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvaq_p_sv4si },
    &operand_data[4194],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2729 */
  {
    "mve_vaddvaq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddvat.u%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddvaq_p_uv4si },
    &operand_data[4194],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2745 */
  {
    "mve_vclsq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvclst.s%#8	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclsq_m_sv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2745 */
  {
    "mve_vclsq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvclst.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclsq_m_sv8hi },
    &operand_data[4178],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2745 */
  {
    "mve_vclsq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvclst.s%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclsq_m_sv4si },
    &operand_data[4182],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2761 */
  {
    "mve_vclzq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvclzt.i%#8	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclzq_m_sv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2761 */
  {
    "mve_vclzq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvclzt.i%#8	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclzq_m_uv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2761 */
  {
    "mve_vclzq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvclzt.i%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclzq_m_sv8hi },
    &operand_data[4178],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2761 */
  {
    "mve_vclzq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvclzt.i%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclzq_m_uv8hi },
    &operand_data[4178],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2761 */
  {
    "mve_vclzq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvclzt.i%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclzq_m_sv4si },
    &operand_data[4182],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2761 */
  {
    "mve_vclzq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvclzt.i%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclzq_m_uv4si },
    &operand_data[4182],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2777 */
  {
    "mve_vcmpcsq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.u%#8	cs, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpcsq_m_n_uv16qi },
    &operand_data[4198],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2777 */
  {
    "mve_vcmpcsq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.u%#16	cs, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpcsq_m_n_uv8hi },
    &operand_data[4202],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2777 */
  {
    "mve_vcmpcsq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.u%#32	cs, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpcsq_m_n_uv4si },
    &operand_data[4206],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2793 */
  {
    "mve_vcmpcsq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.u%#8	cs, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpcsq_m_uv16qi },
    &operand_data[4210],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2793 */
  {
    "mve_vcmpcsq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.u%#16	cs, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpcsq_m_uv8hi },
    &operand_data[4214],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2793 */
  {
    "mve_vcmpcsq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.u%#32	cs, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpcsq_m_uv4si },
    &operand_data[4218],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2809 */
  {
    "mve_vcmpeqq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#8	eq, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_n_sv16qi },
    &operand_data[4198],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2809 */
  {
    "mve_vcmpeqq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#8	eq, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_n_uv16qi },
    &operand_data[4198],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2809 */
  {
    "mve_vcmpeqq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#16	eq, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_n_sv8hi },
    &operand_data[4202],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2809 */
  {
    "mve_vcmpeqq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#16	eq, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_n_uv8hi },
    &operand_data[4202],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2809 */
  {
    "mve_vcmpeqq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#32	eq, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_n_sv4si },
    &operand_data[4206],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2809 */
  {
    "mve_vcmpeqq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#32	eq, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_n_uv4si },
    &operand_data[4206],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2825 */
  {
    "mve_vcmpeqq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#8	eq, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_sv16qi },
    &operand_data[4210],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2825 */
  {
    "mve_vcmpeqq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#8	eq, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_uv16qi },
    &operand_data[4210],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2825 */
  {
    "mve_vcmpeqq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#16	eq, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_sv8hi },
    &operand_data[4214],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2825 */
  {
    "mve_vcmpeqq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#16	eq, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_uv8hi },
    &operand_data[4214],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2825 */
  {
    "mve_vcmpeqq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#32	eq, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_sv4si },
    &operand_data[4218],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2825 */
  {
    "mve_vcmpeqq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#32	eq, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_uv4si },
    &operand_data[4218],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2841 */
  {
    "mve_vcmpgeq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#8	ge, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_m_n_sv16qi },
    &operand_data[4198],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2841 */
  {
    "mve_vcmpgeq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#16	ge, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_m_n_sv8hi },
    &operand_data[4202],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2841 */
  {
    "mve_vcmpgeq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#32	ge, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_m_n_sv4si },
    &operand_data[4206],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2857 */
  {
    "mve_vcmpgeq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#8	ge, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_m_sv16qi },
    &operand_data[4210],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2857 */
  {
    "mve_vcmpgeq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#16	ge, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_m_sv8hi },
    &operand_data[4214],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2857 */
  {
    "mve_vcmpgeq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#32	ge, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_m_sv4si },
    &operand_data[4218],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2873 */
  {
    "mve_vcmpgtq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#8	gt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_m_n_sv16qi },
    &operand_data[4198],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2873 */
  {
    "mve_vcmpgtq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#16	gt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_m_n_sv8hi },
    &operand_data[4202],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2873 */
  {
    "mve_vcmpgtq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#32	gt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_m_n_sv4si },
    &operand_data[4206],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2889 */
  {
    "mve_vcmpgtq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#8	gt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_m_sv16qi },
    &operand_data[4210],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2889 */
  {
    "mve_vcmpgtq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#16	gt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_m_sv8hi },
    &operand_data[4214],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2889 */
  {
    "mve_vcmpgtq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#32	gt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_m_sv4si },
    &operand_data[4218],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2905 */
  {
    "mve_vcmphiq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.u%#8	hi, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmphiq_m_n_uv16qi },
    &operand_data[4198],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2905 */
  {
    "mve_vcmphiq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.u%#16	hi, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmphiq_m_n_uv8hi },
    &operand_data[4202],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2905 */
  {
    "mve_vcmphiq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.u%#32	hi, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmphiq_m_n_uv4si },
    &operand_data[4206],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2921 */
  {
    "mve_vcmphiq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.u%#8	hi, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmphiq_m_uv16qi },
    &operand_data[4210],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2921 */
  {
    "mve_vcmphiq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.u%#16	hi, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmphiq_m_uv8hi },
    &operand_data[4214],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2921 */
  {
    "mve_vcmphiq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.u%#32	hi, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmphiq_m_uv4si },
    &operand_data[4218],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2937 */
  {
    "mve_vcmpleq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#8	le, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_m_n_sv16qi },
    &operand_data[4198],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2937 */
  {
    "mve_vcmpleq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#16	le, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_m_n_sv8hi },
    &operand_data[4202],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2937 */
  {
    "mve_vcmpleq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#32	le, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_m_n_sv4si },
    &operand_data[4206],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2953 */
  {
    "mve_vcmpleq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#8	le, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_m_sv16qi },
    &operand_data[4210],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2953 */
  {
    "mve_vcmpleq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#16	le, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_m_sv8hi },
    &operand_data[4214],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2953 */
  {
    "mve_vcmpleq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#32	le, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_m_sv4si },
    &operand_data[4218],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2969 */
  {
    "mve_vcmpltq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#8	lt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_m_n_sv16qi },
    &operand_data[4198],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2969 */
  {
    "mve_vcmpltq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#16	lt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_m_n_sv8hi },
    &operand_data[4202],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2969 */
  {
    "mve_vcmpltq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#32	lt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_m_n_sv4si },
    &operand_data[4206],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2985 */
  {
    "mve_vcmpltq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#8	lt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_m_sv16qi },
    &operand_data[4210],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2985 */
  {
    "mve_vcmpltq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#16	lt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_m_sv8hi },
    &operand_data[4214],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2985 */
  {
    "mve_vcmpltq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.s%#32	lt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_m_sv4si },
    &operand_data[4218],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3001 */
  {
    "mve_vcmpneq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#8	ne, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_n_sv16qi },
    &operand_data[4198],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3001 */
  {
    "mve_vcmpneq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#8	ne, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_n_uv16qi },
    &operand_data[4198],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3001 */
  {
    "mve_vcmpneq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#16	ne, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_n_sv8hi },
    &operand_data[4202],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3001 */
  {
    "mve_vcmpneq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#16	ne, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_n_uv8hi },
    &operand_data[4202],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3001 */
  {
    "mve_vcmpneq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#32	ne, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_n_sv4si },
    &operand_data[4206],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3001 */
  {
    "mve_vcmpneq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#32	ne, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_n_uv4si },
    &operand_data[4206],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3017 */
  {
    "mve_vcmpneq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#8	ne, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_sv16qi },
    &operand_data[4210],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3017 */
  {
    "mve_vcmpneq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#8	ne, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_uv16qi },
    &operand_data[4210],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3017 */
  {
    "mve_vcmpneq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#16	ne, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_sv8hi },
    &operand_data[4214],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3017 */
  {
    "mve_vcmpneq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#16	ne, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_uv8hi },
    &operand_data[4214],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3017 */
  {
    "mve_vcmpneq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#32	ne, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_sv4si },
    &operand_data[4218],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3017 */
  {
    "mve_vcmpneq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.i%#32	ne, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_uv4si },
    &operand_data[4218],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3033 */
  {
    "mve_vdupq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvdupt.%#8	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_m_n_sv16qi },
    &operand_data[4222],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3033 */
  {
    "mve_vdupq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvdupt.%#8	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_m_n_uv16qi },
    &operand_data[4222],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3033 */
  {
    "mve_vdupq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvdupt.%#16	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_m_n_sv8hi },
    &operand_data[4226],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3033 */
  {
    "mve_vdupq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvdupt.%#16	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_m_n_uv8hi },
    &operand_data[4226],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3033 */
  {
    "mve_vdupq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvdupt.%#32	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_m_n_sv4si },
    &operand_data[4230],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3033 */
  {
    "mve_vdupq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvdupt.%#32	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_m_n_uv4si },
    &operand_data[4230],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3049 */
  {
    "mve_vmaxaq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxat.s%#8	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxaq_m_sv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3049 */
  {
    "mve_vmaxaq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxat.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxaq_m_sv8hi },
    &operand_data[4178],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3049 */
  {
    "mve_vmaxaq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxat.s%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxaq_m_sv4si },
    &operand_data[4182],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3065 */
  {
    "mve_vmaxavq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxavt.s%#8	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxavq_p_sv16qi },
    &operand_data[4234],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3065 */
  {
    "mve_vmaxavq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxavt.s%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxavq_p_sv8hi },
    &operand_data[4238],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3065 */
  {
    "mve_vmaxavq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxavt.s%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxavq_p_sv4si },
    &operand_data[4242],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3081 */
  {
    "mve_vmaxvq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxvt.s%#8	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxvq_p_sv16qi },
    &operand_data[4234],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3081 */
  {
    "mve_vmaxvq_p_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxvt.u%#8	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxvq_p_uv16qi },
    &operand_data[4234],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3081 */
  {
    "mve_vmaxvq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxvt.s%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxvq_p_sv8hi },
    &operand_data[4238],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3081 */
  {
    "mve_vmaxvq_p_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxvt.u%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxvq_p_uv8hi },
    &operand_data[4238],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3081 */
  {
    "mve_vmaxvq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxvt.s%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxvq_p_sv4si },
    &operand_data[4242],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3081 */
  {
    "mve_vmaxvq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxvt.u%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxvq_p_uv4si },
    &operand_data[4242],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3097 */
  {
    "mve_vminaq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminat.s%#8	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminaq_m_sv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3097 */
  {
    "mve_vminaq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminat.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminaq_m_sv8hi },
    &operand_data[4178],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3097 */
  {
    "mve_vminaq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminat.s%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminaq_m_sv4si },
    &operand_data[4182],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3113 */
  {
    "mve_vminavq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminavt.s%#8	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminavq_p_sv16qi },
    &operand_data[4234],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3113 */
  {
    "mve_vminavq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminavt.s%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminavq_p_sv8hi },
    &operand_data[4238],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3113 */
  {
    "mve_vminavq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminavt.s%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminavq_p_sv4si },
    &operand_data[4242],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3129 */
  {
    "mve_vminvq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminvt.s%#8\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminvq_p_sv16qi },
    &operand_data[4234],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3129 */
  {
    "mve_vminvq_p_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminvt.u%#8\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminvq_p_uv16qi },
    &operand_data[4234],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3129 */
  {
    "mve_vminvq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminvt.s%#16\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminvq_p_sv8hi },
    &operand_data[4238],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3129 */
  {
    "mve_vminvq_p_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminvt.u%#16\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminvq_p_uv8hi },
    &operand_data[4238],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3129 */
  {
    "mve_vminvq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminvt.s%#32\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminvq_p_sv4si },
    &operand_data[4242],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3129 */
  {
    "mve_vminvq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminvt.u%#32\t%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminvq_p_uv4si },
    &operand_data[4242],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3145 */
  {
    "mve_vmladavaq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladava.s%#8	%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaq_sv16qi },
    &operand_data[4246],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3145 */
  {
    "mve_vmladavaq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladava.u%#8	%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaq_uv16qi },
    &operand_data[4246],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3145 */
  {
    "mve_vmladavaq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladava.s%#16	%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaq_sv8hi },
    &operand_data[4250],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3145 */
  {
    "mve_vmladavaq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladava.u%#16	%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaq_uv8hi },
    &operand_data[4250],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3145 */
  {
    "mve_vmladavaq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladava.s%#32	%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaq_sv4si },
    &operand_data[4254],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3145 */
  {
    "mve_vmladavaq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladava.u%#32	%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaq_uv4si },
    &operand_data[4254],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3161 */
  {
    "mve_vmladavq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavt.s%#8\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavq_p_sv16qi },
    &operand_data[4258],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3161 */
  {
    "mve_vmladavq_p_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavt.u%#8\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavq_p_uv16qi },
    &operand_data[4258],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3161 */
  {
    "mve_vmladavq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavt.s%#16\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavq_p_sv8hi },
    &operand_data[4262],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3161 */
  {
    "mve_vmladavq_p_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavt.u%#16\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavq_p_uv8hi },
    &operand_data[4262],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3161 */
  {
    "mve_vmladavq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavt.s%#32\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavq_p_sv4si },
    &operand_data[4266],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3161 */
  {
    "mve_vmladavq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavt.u%#32\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavq_p_uv4si },
    &operand_data[4266],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3177 */
  {
    "mve_vmladavxq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavxt.s%#8\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavxq_p_sv16qi },
    &operand_data[4258],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3177 */
  {
    "mve_vmladavxq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavxt.s%#16\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavxq_p_sv8hi },
    &operand_data[4262],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3177 */
  {
    "mve_vmladavxq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavxt.s%#32\t%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavxq_p_sv4si },
    &operand_data[4266],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3193 */
  {
    "mve_vmlaq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaq_n_sv16qi },
    &operand_data[4270],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3193 */
  {
    "mve_vmlaq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.u%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaq_n_uv16qi },
    &operand_data[4270],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3193 */
  {
    "mve_vmlaq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaq_n_sv8hi },
    &operand_data[4274],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3193 */
  {
    "mve_vmlaq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.u%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaq_n_uv8hi },
    &operand_data[4274],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3193 */
  {
    "mve_vmlaq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaq_n_sv4si },
    &operand_data[4278],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3193 */
  {
    "mve_vmlaq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla.u%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaq_n_uv4si },
    &operand_data[4278],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3209 */
  {
    "mve_vmlasq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlas.s%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlasq_n_sv16qi },
    &operand_data[4270],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3209 */
  {
    "mve_vmlasq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlas.u%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlasq_n_uv16qi },
    &operand_data[4270],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3209 */
  {
    "mve_vmlasq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlas.s%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlasq_n_sv8hi },
    &operand_data[4274],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3209 */
  {
    "mve_vmlasq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlas.u%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlasq_n_uv8hi },
    &operand_data[4274],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3209 */
  {
    "mve_vmlasq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlas.s%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlasq_n_sv4si },
    &operand_data[4278],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3209 */
  {
    "mve_vmlasq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlas.u%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlasq_n_uv4si },
    &operand_data[4278],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3225 */
  {
    "mve_vmlsdavq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsdavt.s%#8	%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavq_p_sv16qi },
    &operand_data[4258],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3225 */
  {
    "mve_vmlsdavq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsdavt.s%#16	%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavq_p_sv8hi },
    &operand_data[4262],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3225 */
  {
    "mve_vmlsdavq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsdavt.s%#32	%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavq_p_sv4si },
    &operand_data[4266],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3241 */
  {
    "mve_vmlsdavxq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsdavxt.s%#8	%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavxq_p_sv16qi },
    &operand_data[4258],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3241 */
  {
    "mve_vmlsdavxq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsdavxt.s%#16	%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavxq_p_sv8hi },
    &operand_data[4262],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3241 */
  {
    "mve_vmlsdavxq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsdavxt.s%#32	%0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavxq_p_sv4si },
    &operand_data[4266],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3257 */
  {
    "mve_vmvnq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmvnt %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_m_sv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3257 */
  {
    "mve_vmvnq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmvnt %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_m_uv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3257 */
  {
    "mve_vmvnq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmvnt %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_m_sv8hi },
    &operand_data[4178],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3257 */
  {
    "mve_vmvnq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmvnt %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_m_uv8hi },
    &operand_data[4178],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3257 */
  {
    "mve_vmvnq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmvnt %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_m_sv4si },
    &operand_data[4182],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3257 */
  {
    "mve_vmvnq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmvnt %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_m_uv4si },
    &operand_data[4182],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3273 */
  {
    "mve_vnegq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvnegt.s%#8\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vnegq_m_sv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3273 */
  {
    "mve_vnegq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvnegt.s%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vnegq_m_sv8hi },
    &operand_data[4178],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3273 */
  {
    "mve_vnegq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvnegt.s%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vnegq_m_sv4si },
    &operand_data[4182],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3289 */
  {
    "mve_vpselq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpsel %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vpselq_sv16qi },
    &operand_data[4282],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3289 */
  {
    "mve_vpselq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpsel %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vpselq_uv16qi },
    &operand_data[4282],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3289 */
  {
    "mve_vpselq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpsel %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vpselq_sv8hi },
    &operand_data[4286],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3289 */
  {
    "mve_vpselq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpsel %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vpselq_uv8hi },
    &operand_data[4286],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3289 */
  {
    "mve_vpselq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpsel %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vpselq_sv4si },
    &operand_data[4290],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3289 */
  {
    "mve_vpselq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpsel %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vpselq_uv4si },
    &operand_data[4290],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3289 */
  {
    "mve_vpselq_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpsel %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vpselq_sv2di },
    &operand_data[4294],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3289 */
  {
    "mve_vpselq_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpsel %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vpselq_uv2di },
    &operand_data[4294],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3305 */
  {
    "mve_vqabsq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqabst.s%#8\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqabsq_m_sv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3305 */
  {
    "mve_vqabsq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqabst.s%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqabsq_m_sv8hi },
    &operand_data[4178],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3305 */
  {
    "mve_vqabsq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqabst.s%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqabsq_m_sv4si },
    &operand_data[4182],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3321 */
  {
    "mve_vqdmlahq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlah.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlahq_n_sv16qi },
    &operand_data[4270],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3321 */
  {
    "mve_vqdmlahq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlah.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlahq_n_sv8hi },
    &operand_data[4274],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3321 */
  {
    "mve_vqdmlahq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlah.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlahq_n_sv4si },
    &operand_data[4278],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3337 */
  {
    "mve_vqdmlashq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlash.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlashq_n_sv16qi },
    &operand_data[4270],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3337 */
  {
    "mve_vqdmlashq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlash.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlashq_n_sv8hi },
    &operand_data[4274],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3337 */
  {
    "mve_vqdmlashq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlash.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlashq_n_sv4si },
    &operand_data[4278],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3353 */
  {
    "mve_vqnegq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqnegt.s%#8	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqnegq_m_sv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3353 */
  {
    "mve_vqnegq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqnegt.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqnegq_m_sv8hi },
    &operand_data[4178],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3353 */
  {
    "mve_vqnegq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqnegt.s%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqnegq_m_sv4si },
    &operand_data[4182],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3369 */
  {
    "mve_vqrdmladhq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmladh.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmladhq_sv16qi },
    &operand_data[1844],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3369 */
  {
    "mve_vqrdmladhq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmladh.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmladhq_sv8hi },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3369 */
  {
    "mve_vqrdmladhq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmladh.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmladhq_sv4si },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3385 */
  {
    "mve_vqrdmladhxq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmladhx.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmladhxq_sv16qi },
    &operand_data[1844],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3385 */
  {
    "mve_vqrdmladhxq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmladhx.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmladhxq_sv8hi },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3385 */
  {
    "mve_vqrdmladhxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmladhx.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmladhxq_sv4si },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3401 */
  {
    "mve_vqrdmlahq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlah.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlahq_n_sv16qi },
    &operand_data[4270],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3401 */
  {
    "mve_vqrdmlahq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlah.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlahq_n_sv8hi },
    &operand_data[4274],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3401 */
  {
    "mve_vqrdmlahq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlah.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlahq_n_sv4si },
    &operand_data[4278],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3417 */
  {
    "mve_vqrdmlashq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlash.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlashq_n_sv16qi },
    &operand_data[4270],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3417 */
  {
    "mve_vqrdmlashq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlash.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlashq_n_sv8hi },
    &operand_data[4274],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3417 */
  {
    "mve_vqrdmlashq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlash.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlashq_n_sv4si },
    &operand_data[4278],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3433 */
  {
    "mve_vqrdmlsdhq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlsdh.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlsdhq_sv16qi },
    &operand_data[1844],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3433 */
  {
    "mve_vqrdmlsdhq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlsdh.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlsdhq_sv8hi },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3433 */
  {
    "mve_vqrdmlsdhq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlsdh.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlsdhq_sv4si },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3449 */
  {
    "mve_vqrdmlsdhxq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlsdhx.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlsdhxq_sv16qi },
    &operand_data[1844],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3449 */
  {
    "mve_vqrdmlsdhxq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlsdhx.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlsdhxq_sv8hi },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3449 */
  {
    "mve_vqrdmlsdhxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrdmlsdhx.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlsdhxq_sv4si },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3465 */
  {
    "mve_vqrshlq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshlt.s%#8	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_m_n_sv16qi },
    &operand_data[4298],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3465 */
  {
    "mve_vqrshlq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshlt.u%#8	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_m_n_uv16qi },
    &operand_data[4298],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3465 */
  {
    "mve_vqrshlq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshlt.s%#16	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_m_n_sv8hi },
    &operand_data[4302],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3465 */
  {
    "mve_vqrshlq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshlt.u%#16	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_m_n_uv8hi },
    &operand_data[4302],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3465 */
  {
    "mve_vqrshlq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshlt.s%#32	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_m_n_sv4si },
    &operand_data[4230],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3465 */
  {
    "mve_vqrshlq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshlt.u%#32	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_m_n_uv4si },
    &operand_data[4230],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3481 */
  {
    "mve_vqshlq_m_r_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.s%#8\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_r_sv16qi },
    &operand_data[4298],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3481 */
  {
    "mve_vqshlq_m_r_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.u%#8\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_r_uv16qi },
    &operand_data[4298],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3481 */
  {
    "mve_vqshlq_m_r_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.s%#16\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_r_sv8hi },
    &operand_data[4302],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3481 */
  {
    "mve_vqshlq_m_r_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.u%#16\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_r_uv8hi },
    &operand_data[4302],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3481 */
  {
    "mve_vqshlq_m_r_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.s%#32\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_r_sv4si },
    &operand_data[4230],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3481 */
  {
    "mve_vqshlq_m_r_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.u%#32\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_r_uv4si },
    &operand_data[4230],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3497 */
  {
    "mve_vrev64q_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrev64t.%#8\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_m_sv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3497 */
  {
    "mve_vrev64q_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrev64t.%#8\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_m_uv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3497 */
  {
    "mve_vrev64q_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrev64t.%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_m_sv8hi },
    &operand_data[4178],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3497 */
  {
    "mve_vrev64q_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrev64t.%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_m_uv8hi },
    &operand_data[4178],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3497 */
  {
    "mve_vrev64q_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrev64t.%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_m_sv4si },
    &operand_data[4182],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3497 */
  {
    "mve_vrev64q_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrev64t.%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_m_uv4si },
    &operand_data[4182],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3513 */
  {
    "mve_vrshlq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshlt.s%#8\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_m_n_sv16qi },
    &operand_data[4298],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3513 */
  {
    "mve_vrshlq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshlt.u%#8\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_m_n_uv16qi },
    &operand_data[4298],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3513 */
  {
    "mve_vrshlq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshlt.s%#16\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_m_n_sv8hi },
    &operand_data[4302],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3513 */
  {
    "mve_vrshlq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshlt.u%#16\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_m_n_uv8hi },
    &operand_data[4302],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3513 */
  {
    "mve_vrshlq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshlt.s%#32\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_m_n_sv4si },
    &operand_data[4230],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3513 */
  {
    "mve_vrshlq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshlt.u%#32\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_m_n_uv4si },
    &operand_data[4230],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3529 */
  {
    "mve_vshlq_m_r_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.s%#8\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_r_sv16qi },
    &operand_data[4298],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3529 */
  {
    "mve_vshlq_m_r_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.u%#8\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_r_uv16qi },
    &operand_data[4298],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3529 */
  {
    "mve_vshlq_m_r_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.s%#16\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_r_sv8hi },
    &operand_data[4302],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3529 */
  {
    "mve_vshlq_m_r_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.u%#16\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_r_uv8hi },
    &operand_data[4302],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3529 */
  {
    "mve_vshlq_m_r_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.s%#32\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_r_sv4si },
    &operand_data[4230],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3529 */
  {
    "mve_vshlq_m_r_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.u%#32\t%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_r_uv4si },
    &operand_data[4230],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3545 */
  {
    "mve_vsliq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsli.%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsliq_n_sv16qi },
    &operand_data[4306],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3545 */
  {
    "mve_vsliq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsli.%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsliq_n_uv16qi },
    &operand_data[4306],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3545 */
  {
    "mve_vsliq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsli.%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsliq_n_sv8hi },
    &operand_data[4310],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3545 */
  {
    "mve_vsliq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsli.%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsliq_n_uv8hi },
    &operand_data[4310],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3545 */
  {
    "mve_vsliq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsli.%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsliq_n_sv4si },
    &operand_data[4314],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3545 */
  {
    "mve_vsliq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsli.%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsliq_n_uv4si },
    &operand_data[4314],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3561 */
  {
    "mve_vsriq_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsri.%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsriq_n_sv16qi },
    &operand_data[4318],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3561 */
  {
    "mve_vsriq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsri.%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsriq_n_uv16qi },
    &operand_data[4318],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3561 */
  {
    "mve_vsriq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsri.%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsriq_n_sv8hi },
    &operand_data[4322],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3561 */
  {
    "mve_vsriq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsri.%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsriq_n_uv8hi },
    &operand_data[4322],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3561 */
  {
    "mve_vsriq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsri.%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsriq_n_sv4si },
    &operand_data[4326],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3561 */
  {
    "mve_vsriq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsri.%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsriq_n_uv4si },
    &operand_data[4326],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3577 */
  {
    "mve_vqdmlsdhxq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlsdhx.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlsdhxq_sv16qi },
    &operand_data[1844],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3577 */
  {
    "mve_vqdmlsdhxq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlsdhx.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlsdhxq_sv8hi },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3577 */
  {
    "mve_vqdmlsdhxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlsdhx.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlsdhxq_sv4si },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3593 */
  {
    "mve_vqdmlsdhq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlsdh.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlsdhq_sv16qi },
    &operand_data[1844],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3593 */
  {
    "mve_vqdmlsdhq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlsdh.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlsdhq_sv8hi },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3593 */
  {
    "mve_vqdmlsdhq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmlsdh.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlsdhq_sv4si },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3609 */
  {
    "mve_vqdmladhxq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmladhx.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmladhxq_sv16qi },
    &operand_data[1844],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3609 */
  {
    "mve_vqdmladhxq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmladhx.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmladhxq_sv8hi },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3609 */
  {
    "mve_vqdmladhxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmladhx.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmladhxq_sv4si },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3625 */
  {
    "mve_vqdmladhq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmladh.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmladhq_sv16qi },
    &operand_data[1844],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3625 */
  {
    "mve_vqdmladhq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmladh.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmladhq_sv8hi },
    &operand_data[1852],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3625 */
  {
    "mve_vqdmladhq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqdmladh.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmladhq_sv4si },
    &operand_data[1860],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3641 */
  {
    "mve_vmlsdavaxq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsdavax.s%#8\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavaxq_sv16qi },
    &operand_data[4246],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3641 */
  {
    "mve_vmlsdavaxq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsdavax.s%#16\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavaxq_sv8hi },
    &operand_data[4250],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3641 */
  {
    "mve_vmlsdavaxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsdavax.s%#32\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavaxq_sv4si },
    &operand_data[4254],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3657 */
  {
    "mve_vmlsdavaq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsdava.s%#8\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavaq_sv16qi },
    &operand_data[4246],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3657 */
  {
    "mve_vmlsdavaq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsdava.s%#16\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavaq_sv8hi },
    &operand_data[4250],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3657 */
  {
    "mve_vmlsdavaq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsdava.s%#32\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavaq_sv4si },
    &operand_data[4254],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3673 */
  {
    "mve_vmladavaxq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladavax.s%#8\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaxq_sv16qi },
    &operand_data[4246],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3673 */
  {
    "mve_vmladavaxq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladavax.s%#16\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaxq_sv8hi },
    &operand_data[4250],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3673 */
  {
    "mve_vmladavaxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmladavax.s%#32\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaxq_sv4si },
    &operand_data[4254],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3688 */
  {
    "mve_vabsq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabst.f%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabsq_m_fv8hf },
    &operand_data[3847],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3688 */
  {
    "mve_vabsq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabst.f%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabsq_m_fv4sf },
    &operand_data[3851],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3704 */
  {
    "mve_vaddlvaq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddlvat.u32 %Q0, %R0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddlvaq_p_uv4si },
    &operand_data[4330],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3704 */
  {
    "mve_vaddlvaq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddlvat.s32 %Q0, %R0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddlvaq_p_sv4si },
    &operand_data[4330],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3719 */
  {
    "mve_vcmlaqv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_3968 },
#else
    { 0, output_3968, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaqv8hf },
    &operand_data[4334],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3719 */
  {
    "mve_vcmlaq_rot90v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_3969 },
#else
    { 0, output_3969, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaq_rot90v8hf },
    &operand_data[4334],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3719 */
  {
    "mve_vcmlaq_rot180v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_3970 },
#else
    { 0, output_3970, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaq_rot180v8hf },
    &operand_data[4334],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3719 */
  {
    "mve_vcmlaq_rot270v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_3971 },
#else
    { 0, output_3971, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaq_rot270v8hf },
    &operand_data[4334],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3719 */
  {
    "mve_vcmlaqv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_3972 },
#else
    { 0, output_3972, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaqv4sf },
    &operand_data[4338],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3719 */
  {
    "mve_vcmlaq_rot90v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_3973 },
#else
    { 0, output_3973, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaq_rot90v4sf },
    &operand_data[4338],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3719 */
  {
    "mve_vcmlaq_rot180v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_3974 },
#else
    { 0, output_3974, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaq_rot180v4sf },
    &operand_data[4338],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3719 */
  {
    "mve_vcmlaq_rot270v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_3975 },
#else
    { 0, output_3975, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaq_rot270v4sf },
    &operand_data[4338],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3738 */
  {
    "mve_vcmpeqq_m_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#16	eq, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_n_fv8hf },
    &operand_data[4342],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3738 */
  {
    "mve_vcmpeqq_m_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#32	eq, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpeqq_m_n_fv4sf },
    &operand_data[4346],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3754 */
  {
    "mve_vcmpgeq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#16	ge, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_m_fv8hf },
    &operand_data[4111],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3754 */
  {
    "mve_vcmpgeq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#32	ge, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_m_fv4sf },
    &operand_data[4115],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3770 */
  {
    "mve_vcmpgeq_m_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#16	ge, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_m_n_fv8hf },
    &operand_data[4342],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3770 */
  {
    "mve_vcmpgeq_m_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#32	ge, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgeq_m_n_fv4sf },
    &operand_data[4346],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3786 */
  {
    "mve_vcmpgtq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#16	gt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_m_fv8hf },
    &operand_data[4111],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3786 */
  {
    "mve_vcmpgtq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#32	gt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_m_fv4sf },
    &operand_data[4115],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3802 */
  {
    "mve_vcmpgtq_m_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#16	gt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_m_n_fv8hf },
    &operand_data[4342],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3802 */
  {
    "mve_vcmpgtq_m_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#32	gt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpgtq_m_n_fv4sf },
    &operand_data[4346],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3818 */
  {
    "mve_vcmpleq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#16	le, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_m_fv8hf },
    &operand_data[4111],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3818 */
  {
    "mve_vcmpleq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#32	le, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_m_fv4sf },
    &operand_data[4115],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3834 */
  {
    "mve_vcmpleq_m_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#16	le, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_m_n_fv8hf },
    &operand_data[4342],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3834 */
  {
    "mve_vcmpleq_m_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#32	le, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpleq_m_n_fv4sf },
    &operand_data[4346],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3850 */
  {
    "mve_vcmpltq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#16	lt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_m_fv8hf },
    &operand_data[4111],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3850 */
  {
    "mve_vcmpltq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#32	lt, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_m_fv4sf },
    &operand_data[4115],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3866 */
  {
    "mve_vcmpltq_m_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#16	lt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_m_n_fv8hf },
    &operand_data[4342],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3866 */
  {
    "mve_vcmpltq_m_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#32	lt, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpltq_m_n_fv4sf },
    &operand_data[4346],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3882 */
  {
    "mve_vcmpneq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#16	ne, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_fv8hf },
    &operand_data[4111],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3882 */
  {
    "mve_vcmpneq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#32	ne, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_fv4sf },
    &operand_data[4115],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3898 */
  {
    "mve_vcmpneq_m_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#16	ne, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_n_fv8hf },
    &operand_data[4342],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3898 */
  {
    "mve_vcmpneq_m_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmpt.f%#32	ne, %q1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmpneq_m_n_fv4sf },
    &operand_data[4346],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3914 */
  {
    "mve_vcvtbq_m_f16_f32v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtbt.f16.f32 %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtbq_m_f16_f32v8hf },
    &operand_data[4350],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3930 */
  {
    "mve_vcvtbq_m_f32_f16v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtbt.f32.f16 %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtbq_m_f32_f16v4sf },
    &operand_data[4354],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3946 */
  {
    "mve_vcvttq_m_f16_f32v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvttt.f16.f32 %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvttq_m_f16_f32v8hf },
    &operand_data[4350],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3962 */
  {
    "mve_vcvttq_m_f32_f16v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvttt.f32.f16 %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvttq_m_f32_f16v4sf },
    &operand_data[4354],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3978 */
  {
    "mve_vdupq_m_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvdupt.%#16	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_m_n_fv8hf },
    &operand_data[4358],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3978 */
  {
    "mve_vdupq_m_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvdupt.%#32	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdupq_m_n_fv4sf },
    &operand_data[4362],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3994 */
  {
    "mve_vfmaq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfma.f%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmaq_fv8hf },
    &operand_data[1872],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:3994 */
  {
    "mve_vfmaq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfma.f%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmaq_fv4sf },
    &operand_data[1868],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4010 */
  {
    "mve_vfmaq_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfma.f%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmaq_n_fv8hf },
    &operand_data[4366],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4010 */
  {
    "mve_vfmaq_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfma.f%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmaq_n_fv4sf },
    &operand_data[4370],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4026 */
  {
    "mve_vfmasq_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfmas.f%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmasq_n_fv8hf },
    &operand_data[4366],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4026 */
  {
    "mve_vfmasq_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfmas.f%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmasq_n_fv4sf },
    &operand_data[4370],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4041 */
  {
    "mve_vfmsq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfms.f%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmsq_fv8hf },
    &operand_data[1872],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4041 */
  {
    "mve_vfmsq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfms.f%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmsq_fv4sf },
    &operand_data[1868],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4057 */
  {
    "mve_vmaxnmaq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxnmat.f%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmaq_m_fv8hf },
    &operand_data[3847],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4057 */
  {
    "mve_vmaxnmaq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxnmat.f%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmaq_m_fv4sf },
    &operand_data[3851],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4072 */
  {
    "mve_vmaxnmavq_p_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxnmavt.f%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmavq_p_fv8hf },
    &operand_data[4374],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4072 */
  {
    "mve_vmaxnmavq_p_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxnmavt.f%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmavq_p_fv4sf },
    &operand_data[4378],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4088 */
  {
    "mve_vmaxnmvq_p_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxnmvt.f%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmvq_p_fv8hf },
    &operand_data[4374],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4088 */
  {
    "mve_vmaxnmvq_p_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxnmvt.f%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmvq_p_fv4sf },
    &operand_data[4378],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4103 */
  {
    "mve_vminnmaq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminnmat.f%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmaq_m_fv8hf },
    &operand_data[3847],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4103 */
  {
    "mve_vminnmaq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminnmat.f%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmaq_m_fv4sf },
    &operand_data[3851],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4119 */
  {
    "mve_vminnmavq_p_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminnmavt.f%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmavq_p_fv8hf },
    &operand_data[4374],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4119 */
  {
    "mve_vminnmavq_p_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminnmavt.f%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmavq_p_fv4sf },
    &operand_data[4378],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4134 */
  {
    "mve_vminnmvq_p_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminnmvt.f%#16	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmvq_p_fv8hf },
    &operand_data[4374],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4134 */
  {
    "mve_vminnmvq_p_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminnmvt.f%#32	%0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmvq_p_fv4sf },
    &operand_data[4378],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4150 */
  {
    "mve_vmlaldavaq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlaldava.s%#16 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavaq_sv8hi },
    &operand_data[4382],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4150 */
  {
    "mve_vmlaldavaq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlaldava.u%#16 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavaq_uv8hi },
    &operand_data[4382],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4150 */
  {
    "mve_vmlaldavaq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlaldava.s%#32 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavaq_sv4si },
    &operand_data[4143],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4150 */
  {
    "mve_vmlaldavaq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlaldava.u%#32 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavaq_uv4si },
    &operand_data[4143],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4166 */
  {
    "mve_vmlaldavaxq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlaldavax.s%#16 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavaxq_sv8hi },
    &operand_data[4382],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4166 */
  {
    "mve_vmlaldavaxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlaldavax.s%#32 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavaxq_sv4si },
    &operand_data[4143],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4182 */
  {
    "mve_vmlaldavq_p_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlaldavt.u%#16 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavq_p_uv8hi },
    &operand_data[4386],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4182 */
  {
    "mve_vmlaldavq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlaldavt.s%#16 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavq_p_sv8hi },
    &operand_data[4386],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4182 */
  {
    "mve_vmlaldavq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlaldavt.u%#32 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavq_p_uv4si },
    &operand_data[4390],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4182 */
  {
    "mve_vmlaldavq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlaldavt.s%#32 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavq_p_sv4si },
    &operand_data[4390],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4198 */
  {
    "mve_vmlaldavxq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlaldavxt.s%#16\t%Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavxq_p_sv8hi },
    &operand_data[4386],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4198 */
  {
    "mve_vmlaldavxq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlaldavxt.s%#32\t%Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavxq_p_sv4si },
    &operand_data[4390],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4213 */
  {
    "mve_vmlsldavaq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsldava.s%#16 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavaq_sv8hi },
    &operand_data[4382],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4213 */
  {
    "mve_vmlsldavaq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsldava.s%#32 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavaq_sv4si },
    &operand_data[4143],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4229 */
  {
    "mve_vmlsldavaxq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsldavax.s%#16 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavaxq_sv8hi },
    &operand_data[4382],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4229 */
  {
    "mve_vmlsldavaxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmlsldavax.s%#32 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavaxq_sv4si },
    &operand_data[4143],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4245 */
  {
    "mve_vmlsldavq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsldavt.s%#16 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavq_p_sv8hi },
    &operand_data[4386],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4245 */
  {
    "mve_vmlsldavq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsldavt.s%#32 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavq_p_sv4si },
    &operand_data[4390],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4261 */
  {
    "mve_vmlsldavxq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsldavxt.s%#16 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavxq_p_sv8hi },
    &operand_data[4386],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4261 */
  {
    "mve_vmlsldavxq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsldavxt.s%#32 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavxq_p_sv4si },
    &operand_data[4390],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4276 */
  {
    "mve_vmovlbq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovlbt.u%#8	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovlbq_m_uv16qi },
    &operand_data[4394],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4276 */
  {
    "mve_vmovlbq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovlbt.s%#8	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovlbq_m_sv16qi },
    &operand_data[4394],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4276 */
  {
    "mve_vmovlbq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovlbt.u%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovlbq_m_uv8hi },
    &operand_data[4398],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4276 */
  {
    "mve_vmovlbq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovlbt.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovlbq_m_sv8hi },
    &operand_data[4398],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4291 */
  {
    "mve_vmovltq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovltt.u%#8	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovltq_m_uv16qi },
    &operand_data[4394],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4291 */
  {
    "mve_vmovltq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovltt.s%#8	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovltq_m_sv16qi },
    &operand_data[4394],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4291 */
  {
    "mve_vmovltq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovltt.u%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovltq_m_uv8hi },
    &operand_data[4398],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4291 */
  {
    "mve_vmovltq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovltt.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovltq_m_sv8hi },
    &operand_data[4398],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4306 */
  {
    "mve_vmovnbq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovnbt.i%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovnbq_m_uv8hi },
    &operand_data[4402],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4306 */
  {
    "mve_vmovnbq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovnbt.i%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovnbq_m_sv8hi },
    &operand_data[4402],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4306 */
  {
    "mve_vmovnbq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovnbt.i%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovnbq_m_uv4si },
    &operand_data[4406],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4306 */
  {
    "mve_vmovnbq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovnbt.i%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovnbq_m_sv4si },
    &operand_data[4406],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4322 */
  {
    "mve_vmovntq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovntt.i%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovntq_m_uv8hi },
    &operand_data[4402],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4322 */
  {
    "mve_vmovntq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovntt.i%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovntq_m_sv8hi },
    &operand_data[4402],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4322 */
  {
    "mve_vmovntq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovntt.i%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovntq_m_uv4si },
    &operand_data[4406],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4322 */
  {
    "mve_vmovntq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmovntt.i%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmovntq_m_sv4si },
    &operand_data[4406],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4338 */
  {
    "mve_vmvnq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmvnt.i%#16	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_m_n_uv8hi },
    &operand_data[4103],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4338 */
  {
    "mve_vmvnq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmvnt.i%#16	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_m_n_sv8hi },
    &operand_data[4103],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4338 */
  {
    "mve_vmvnq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmvnt.i%#32	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_m_n_uv4si },
    &operand_data[4107],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4338 */
  {
    "mve_vmvnq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmvnt.i%#32	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_m_n_sv4si },
    &operand_data[4107],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4353 */
  {
    "mve_vnegq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvnegt.f%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vnegq_m_fv8hf },
    &operand_data[3847],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4353 */
  {
    "mve_vnegq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvnegt.f%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vnegq_m_fv4sf },
    &operand_data[3851],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4369 */
  {
    "mve_vorrq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvorrt.i%#16	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_m_n_sv8hi },
    &operand_data[4103],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4369 */
  {
    "mve_vorrq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvorrt.i%#16	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_m_n_uv8hi },
    &operand_data[4103],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4369 */
  {
    "mve_vorrq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvorrt.i%#32	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_m_n_sv4si },
    &operand_data[4107],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4369 */
  {
    "mve_vorrq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvorrt.i%#32	%q0, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_m_n_uv4si },
    &operand_data[4107],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4384 */
  {
    "mve_vpselq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpsel %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vpselq_fv8hf },
    &operand_data[4410],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4384 */
  {
    "mve_vpselq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpsel %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vpselq_fv4sf },
    &operand_data[4414],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4400 */
  {
    "mve_vqmovnbq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqmovnbt.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovnbq_m_sv8hi },
    &operand_data[4402],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4400 */
  {
    "mve_vqmovnbq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqmovnbt.u%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovnbq_m_uv8hi },
    &operand_data[4402],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4400 */
  {
    "mve_vqmovnbq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqmovnbt.s%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovnbq_m_sv4si },
    &operand_data[4406],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4400 */
  {
    "mve_vqmovnbq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqmovnbt.u%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovnbq_m_uv4si },
    &operand_data[4406],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4416 */
  {
    "mve_vqmovntq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqmovntt.u%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovntq_m_uv8hi },
    &operand_data[4402],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4416 */
  {
    "mve_vqmovntq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqmovntt.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovntq_m_sv8hi },
    &operand_data[4402],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4416 */
  {
    "mve_vqmovntq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqmovntt.u%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovntq_m_uv4si },
    &operand_data[4406],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4416 */
  {
    "mve_vqmovntq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqmovntt.s%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovntq_m_sv4si },
    &operand_data[4406],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4432 */
  {
    "mve_vqmovunbq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqmovunbt.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovunbq_m_sv8hi },
    &operand_data[4402],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4432 */
  {
    "mve_vqmovunbq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqmovunbt.s%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovunbq_m_sv4si },
    &operand_data[4406],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4448 */
  {
    "mve_vqmovuntq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqmovuntt.s%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovuntq_m_sv8hi },
    &operand_data[4402],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4448 */
  {
    "mve_vqmovuntq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqmovuntt.s%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqmovuntq_m_sv4si },
    &operand_data[4406],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4464 */
  {
    "mve_vqrshrntq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshrnt.u%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrntq_n_uv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4464 */
  {
    "mve_vqrshrntq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshrnt.s%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrntq_n_sv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4464 */
  {
    "mve_vqrshrntq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshrnt.u%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrntq_n_uv4si },
    &operand_data[4139],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4464 */
  {
    "mve_vqrshrntq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshrnt.s%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrntq_n_sv4si },
    &operand_data[4139],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4480 */
  {
    "mve_vqrshruntq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshrunt.s%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshruntq_n_sv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4480 */
  {
    "mve_vqrshruntq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqrshrunt.s%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshruntq_n_sv4si },
    &operand_data[4139],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4496 */
  {
    "mve_vqshrnbq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshrnb.u%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrnbq_n_uv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4496 */
  {
    "mve_vqshrnbq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshrnb.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrnbq_n_sv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4496 */
  {
    "mve_vqshrnbq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshrnb.u%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrnbq_n_uv4si },
    &operand_data[4418],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4496 */
  {
    "mve_vqshrnbq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshrnb.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrnbq_n_sv4si },
    &operand_data[4418],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4512 */
  {
    "mve_vqshrntq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshrnt.u%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrntq_n_uv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4512 */
  {
    "mve_vqshrntq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshrnt.s%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrntq_n_sv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4512 */
  {
    "mve_vqshrntq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshrnt.u%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrntq_n_uv4si },
    &operand_data[4418],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4512 */
  {
    "mve_vqshrntq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshrnt.s%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrntq_n_sv4si },
    &operand_data[4418],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4528 */
  {
    "mve_vqshrunbq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshrunb.s%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrunbq_n_sv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4528 */
  {
    "mve_vqshrunbq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshrunb.s%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrunbq_n_sv4si },
    &operand_data[4418],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4544 */
  {
    "mve_vqshruntq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshrunt.s%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshruntq_n_sv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4544 */
  {
    "mve_vqshruntq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vqshrunt.s%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshruntq_n_sv4si },
    &operand_data[4418],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4560 */
  {
    "mve_vrev32q_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrev32t.16 %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev32q_m_fv8hf },
    &operand_data[3847],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4576 */
  {
    "mve_vrev32q_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrev32t.%#8	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev32q_m_sv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4576 */
  {
    "mve_vrev32q_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrev32t.%#8	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev32q_m_uv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4576 */
  {
    "mve_vrev32q_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrev32t.%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev32q_m_sv8hi },
    &operand_data[4178],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4576 */
  {
    "mve_vrev32q_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrev32t.%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev32q_m_uv8hi },
    &operand_data[4178],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4592 */
  {
    "mve_vrev64q_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrev64t.%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_m_fv8hf },
    &operand_data[3847],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4592 */
  {
    "mve_vrev64q_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrev64t.%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev64q_m_fv4sf },
    &operand_data[3851],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4608 */
  {
    "mve_vrmlaldavhaxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmlaldavhax.s32 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlaldavhaxq_sv4si },
    &operand_data[4143],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4624 */
  {
    "mve_vrmlaldavhxq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmlaldavhxt.s32 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlaldavhxq_p_sv4si },
    &operand_data[4422],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4640 */
  {
    "mve_vrmlsldavhaxq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmlsldavhax.s32 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlsldavhaxq_sv4si },
    &operand_data[4143],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4656 */
  {
    "mve_vrmlsldavhq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmlsldavht.s32 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlsldavhq_p_sv4si },
    &operand_data[4422],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4672 */
  {
    "mve_vrmlsldavhxq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmlsldavhxt.s32 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlsldavhxq_p_sv4si },
    &operand_data[4422],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4688 */
  {
    "mve_vrndaq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrintat.f%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndaq_m_fv8hf },
    &operand_data[3847],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4688 */
  {
    "mve_vrndaq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrintat.f%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndaq_m_fv4sf },
    &operand_data[3851],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4704 */
  {
    "mve_vrndmq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrintmt.f%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndmq_m_fv8hf },
    &operand_data[3847],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4704 */
  {
    "mve_vrndmq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrintmt.f%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndmq_m_fv4sf },
    &operand_data[3851],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4720 */
  {
    "mve_vrndnq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrintnt.f%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndnq_m_fv8hf },
    &operand_data[3847],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4720 */
  {
    "mve_vrndnq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrintnt.f%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndnq_m_fv4sf },
    &operand_data[3851],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4736 */
  {
    "mve_vrndpq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrintpt.f%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndpq_m_fv8hf },
    &operand_data[3847],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4736 */
  {
    "mve_vrndpq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrintpt.f%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndpq_m_fv4sf },
    &operand_data[3851],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4752 */
  {
    "mve_vrndxq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrintxt.f%#16	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndxq_m_fv8hf },
    &operand_data[3847],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4752 */
  {
    "mve_vrndxq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrintxt.f%#32	%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrndxq_m_fv4sf },
    &operand_data[3851],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4768 */
  {
    "mve_vrshrnbq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshrnb.i%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrnbq_n_sv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4768 */
  {
    "mve_vrshrnbq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshrnb.i%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrnbq_n_uv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4768 */
  {
    "mve_vrshrnbq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshrnb.i%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrnbq_n_sv4si },
    &operand_data[4139],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4768 */
  {
    "mve_vrshrnbq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshrnb.i%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrnbq_n_uv4si },
    &operand_data[4139],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4784 */
  {
    "mve_vrshrntq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshrnt.i%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrntq_n_uv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4784 */
  {
    "mve_vrshrntq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshrnt.i%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrntq_n_sv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4784 */
  {
    "mve_vrshrntq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshrnt.i%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrntq_n_uv4si },
    &operand_data[4139],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4784 */
  {
    "mve_vrshrntq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrshrnt.i%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrntq_n_sv4si },
    &operand_data[4139],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4800 */
  {
    "mve_vshrnbq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshrnb.i%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrnbq_n_uv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4800 */
  {
    "mve_vshrnbq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshrnb.i%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrnbq_n_sv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4800 */
  {
    "mve_vshrnbq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshrnb.i%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrnbq_n_uv4si },
    &operand_data[4418],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4800 */
  {
    "mve_vshrnbq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshrnb.i%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrnbq_n_sv4si },
    &operand_data[4418],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4816 */
  {
    "mve_vshrntq_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshrnt.i%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrntq_n_sv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4816 */
  {
    "mve_vshrntq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshrnt.i%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrntq_n_uv8hi },
    &operand_data[4135],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4816 */
  {
    "mve_vshrntq_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshrnt.i%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrntq_n_sv4si },
    &operand_data[4418],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4816 */
  {
    "mve_vshrntq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vshrnt.i%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrntq_n_uv4si },
    &operand_data[4418],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4832 */
  {
    "mve_vcvtmq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtmt.s%#16.f%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtmq_m_sv8hi },
    &operand_data[4119],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4832 */
  {
    "mve_vcvtmq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtmt.u%#16.f%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtmq_m_uv8hi },
    &operand_data[4119],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4832 */
  {
    "mve_vcvtmq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtmt.s%#32.f%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtmq_m_sv4si },
    &operand_data[4123],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4832 */
  {
    "mve_vcvtmq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtmt.u%#32.f%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtmq_m_uv4si },
    &operand_data[4123],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4848 */
  {
    "mve_vcvtpq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtpt.s%#16.f%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtpq_m_sv8hi },
    &operand_data[4119],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4848 */
  {
    "mve_vcvtpq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtpt.u%#16.f%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtpq_m_uv8hi },
    &operand_data[4119],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4848 */
  {
    "mve_vcvtpq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtpt.s%#32.f%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtpq_m_sv4si },
    &operand_data[4123],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4848 */
  {
    "mve_vcvtpq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtpt.u%#32.f%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtpq_m_uv4si },
    &operand_data[4123],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4864 */
  {
    "mve_vcvtnq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtnt.s%#16.f%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtnq_m_sv8hi },
    &operand_data[4119],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4864 */
  {
    "mve_vcvtnq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtnt.u%#16.f%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtnq_m_uv8hi },
    &operand_data[4119],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4864 */
  {
    "mve_vcvtnq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtnt.s%#32.f%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtnq_m_sv4si },
    &operand_data[4123],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4864 */
  {
    "mve_vcvtnq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtnt.u%#32.f%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtnq_m_uv4si },
    &operand_data[4123],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4880 */
  {
    "mve_vcvtq_m_n_from_f_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.s%#16.f%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_n_from_f_sv8hi },
    &operand_data[4426],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4880 */
  {
    "mve_vcvtq_m_n_from_f_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.u%#16.f%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_n_from_f_uv8hi },
    &operand_data[4426],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4880 */
  {
    "mve_vcvtq_m_n_from_f_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.s%#32.f%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_n_from_f_sv4si },
    &operand_data[4431],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4880 */
  {
    "mve_vcvtq_m_n_from_f_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.u%#32.f%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_n_from_f_uv4si },
    &operand_data[4431],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4897 */
  {
    "mve_vrev16q_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrev16t.8 %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev16q_m_sv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4897 */
  {
    "mve_vrev16q_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrev16t.8 %q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrev16q_m_uv16qi },
    &operand_data[4174],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4913 */
  {
    "mve_vcvtq_m_from_f_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.u%#16.f%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_from_f_uv8hi },
    &operand_data[4119],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4913 */
  {
    "mve_vcvtq_m_from_f_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.s%#16.f%#16\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_from_f_sv8hi },
    &operand_data[4119],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4913 */
  {
    "mve_vcvtq_m_from_f_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.u%#32.f%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_from_f_uv4si },
    &operand_data[4123],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4913 */
  {
    "mve_vcvtq_m_from_f_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.s%#32.f%#32\t%q0, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_from_f_sv4si },
    &operand_data[4123],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4929 */
  {
    "mve_vrmlaldavhq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmlaldavht.s32 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlaldavhq_p_sv4si },
    &operand_data[4390],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4929 */
  {
    "mve_vrmlaldavhq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmlaldavht.u32 %Q0, %R0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlaldavhq_p_uv4si },
    &operand_data[4390],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4945 */
  {
    "mve_vrmlsldavhaq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrmlsldavha.s32 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlsldavhaq_sv4si },
    &operand_data[4143],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4961 */
  {
    "mve_vabavq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabavt.s%#8\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabavq_p_sv16qi },
    &operand_data[4436],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4961 */
  {
    "mve_vabavq_p_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabavt.u%#8\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabavq_p_uv16qi },
    &operand_data[4436],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4961 */
  {
    "mve_vabavq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabavt.s%#16\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabavq_p_sv8hi },
    &operand_data[4441],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4961 */
  {
    "mve_vabavq_p_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabavt.u%#16\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabavq_p_uv8hi },
    &operand_data[4441],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4961 */
  {
    "mve_vabavq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabavt.s%#32\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabavq_p_sv4si },
    &operand_data[4446],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4961 */
  {
    "mve_vabavq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabavt.u%#32\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabavq_p_uv4si },
    &operand_data[4446],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4978 */
  {
    "mve_vqshluq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlut.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshluq_m_n_sv16qi },
    &operand_data[4451],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4978 */
  {
    "mve_vqshluq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlut.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshluq_m_n_sv8hi },
    &operand_data[4456],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4978 */
  {
    "mve_vqshluq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlut.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshluq_m_n_sv4si },
    &operand_data[4461],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4994 */
  {
    "mve_vshlq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4994 */
  {
    "mve_vshlq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.u%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4994 */
  {
    "mve_vshlq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4994 */
  {
    "mve_vshlq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.u%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4994 */
  {
    "mve_vshlq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:4994 */
  {
    "mve_vshlq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.u%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5010 */
  {
    "mve_vsriq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsrit.%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsriq_m_n_sv16qi },
    &operand_data[4481],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5010 */
  {
    "mve_vsriq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsrit.%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsriq_m_n_uv16qi },
    &operand_data[4481],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5010 */
  {
    "mve_vsriq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsrit.%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsriq_m_n_sv8hi },
    &operand_data[4486],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5010 */
  {
    "mve_vsriq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsrit.%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsriq_m_n_uv8hi },
    &operand_data[4486],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5010 */
  {
    "mve_vsriq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsrit.%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsriq_m_n_sv4si },
    &operand_data[4491],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5010 */
  {
    "mve_vsriq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsrit.%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsriq_m_n_uv4si },
    &operand_data[4491],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5026 */
  {
    "mve_vsubq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.i%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5026 */
  {
    "mve_vsubq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.i%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5026 */
  {
    "mve_vsubq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.i%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5026 */
  {
    "mve_vsubq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.i%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5026 */
  {
    "mve_vsubq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.i%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5026 */
  {
    "mve_vsubq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.i%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5042 */
  {
    "mve_vcvtq_m_n_to_f_uv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.f%#16.u%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_n_to_f_uv8hf },
    &operand_data[4496],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5042 */
  {
    "mve_vcvtq_m_n_to_f_sv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.f%#16.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_n_to_f_sv8hf },
    &operand_data[4496],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5042 */
  {
    "mve_vcvtq_m_n_to_f_uv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.f%#32.u%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_n_to_f_uv4sf },
    &operand_data[4501],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5042 */
  {
    "mve_vcvtq_m_n_to_f_sv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcvtt.f%#32.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcvtq_m_n_to_f_sv4sf },
    &operand_data[4501],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5058 */
  {
    "mve_vabdq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabdt.s%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5058 */
  {
    "mve_vabdq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabdt.u%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5058 */
  {
    "mve_vabdq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabdt.s%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5058 */
  {
    "mve_vabdq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabdt.u%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5058 */
  {
    "mve_vabdq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabdt.s%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5058 */
  {
    "mve_vabdq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabdt.u%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5075 */
  {
    "mve_vaddq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.i%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_n_sv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5075 */
  {
    "mve_vaddq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.i%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_n_uv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5075 */
  {
    "mve_vaddq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.i%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_n_sv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5075 */
  {
    "mve_vaddq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.i%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_n_uv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5075 */
  {
    "mve_vaddq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.i%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5075 */
  {
    "mve_vaddq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.i%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_n_uv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5092 */
  {
    "mve_vaddq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.i%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5092 */
  {
    "mve_vaddq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.i%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5092 */
  {
    "mve_vaddq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.i%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5092 */
  {
    "mve_vaddq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.i%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5092 */
  {
    "mve_vaddq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.i%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5092 */
  {
    "mve_vaddq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.i%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5109 */
  {
    "mve_vandq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvandt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5109 */
  {
    "mve_vandq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvandt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5109 */
  {
    "mve_vandq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvandt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5109 */
  {
    "mve_vandq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvandt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5109 */
  {
    "mve_vandq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvandt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5109 */
  {
    "mve_vandq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvandt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5126 */
  {
    "mve_vbicq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbict %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5126 */
  {
    "mve_vbicq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbict %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5126 */
  {
    "mve_vbicq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbict %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5126 */
  {
    "mve_vbicq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbict %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5126 */
  {
    "mve_vbicq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbict %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5126 */
  {
    "mve_vbicq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbict %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5143 */
  {
    "mve_vbrsrq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbrsrt.%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_m_n_uv16qi },
    &operand_data[4521],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5143 */
  {
    "mve_vbrsrq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbrsrt.%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_m_n_sv16qi },
    &operand_data[4521],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5143 */
  {
    "mve_vbrsrq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbrsrt.%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_m_n_uv8hi },
    &operand_data[4526],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5143 */
  {
    "mve_vbrsrq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbrsrt.%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_m_n_sv8hi },
    &operand_data[4526],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5143 */
  {
    "mve_vbrsrq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbrsrt.%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_m_n_uv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5143 */
  {
    "mve_vbrsrq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbrsrt.%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5160 */
  {
    "mve_vcaddq_rot270_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.i%#8	%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot270_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5160 */
  {
    "mve_vcaddq_rot270_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.i%#8	%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot270_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5160 */
  {
    "mve_vcaddq_rot270_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.i%#16	%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot270_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5160 */
  {
    "mve_vcaddq_rot270_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.i%#16	%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot270_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5160 */
  {
    "mve_vcaddq_rot270_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.i%#32	%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot270_m_uv4si },
    &operand_data[4531],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5160 */
  {
    "mve_vcaddq_rot270_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.i%#32	%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot270_m_sv4si },
    &operand_data[4531],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5177 */
  {
    "mve_vcaddq_rot90_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.i%#8	%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot90_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5177 */
  {
    "mve_vcaddq_rot90_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.i%#8	%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot90_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5177 */
  {
    "mve_vcaddq_rot90_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.i%#16	%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot90_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5177 */
  {
    "mve_vcaddq_rot90_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.i%#16	%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot90_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5177 */
  {
    "mve_vcaddq_rot90_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.i%#32	%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot90_m_uv4si },
    &operand_data[4531],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5177 */
  {
    "mve_vcaddq_rot90_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.i%#32	%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot90_m_sv4si },
    &operand_data[4531],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5194 */
  {
    "mve_veorq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tveort %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5194 */
  {
    "mve_veorq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tveort %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5194 */
  {
    "mve_veorq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tveort %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5194 */
  {
    "mve_veorq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tveort %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5194 */
  {
    "mve_veorq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tveort %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5194 */
  {
    "mve_veorq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tveort %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5211 */
  {
    "mve_vhaddq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhaddt.s%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_m_n_sv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5211 */
  {
    "mve_vhaddq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhaddt.u%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_m_n_uv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5211 */
  {
    "mve_vhaddq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhaddt.s%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_m_n_sv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5211 */
  {
    "mve_vhaddq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhaddt.u%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_m_n_uv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5211 */
  {
    "mve_vhaddq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhaddt.s%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5211 */
  {
    "mve_vhaddq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhaddt.u%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_m_n_uv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5228 */
  {
    "mve_vhaddq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhaddt.s%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5228 */
  {
    "mve_vhaddq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhaddt.u%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5228 */
  {
    "mve_vhaddq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhaddt.s%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5228 */
  {
    "mve_vhaddq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhaddt.u%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5228 */
  {
    "mve_vhaddq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhaddt.s%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5228 */
  {
    "mve_vhaddq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhaddt.u%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhaddq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5245 */
  {
    "mve_vhsubq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhsubt.s%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_m_n_sv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5245 */
  {
    "mve_vhsubq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhsubt.u%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_m_n_uv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5245 */
  {
    "mve_vhsubq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhsubt.s%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_m_n_sv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5245 */
  {
    "mve_vhsubq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhsubt.u%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_m_n_uv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5245 */
  {
    "mve_vhsubq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhsubt.s%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5245 */
  {
    "mve_vhsubq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhsubt.u%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_m_n_uv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5262 */
  {
    "mve_vhsubq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhsubt.s%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5262 */
  {
    "mve_vhsubq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhsubt.u%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5262 */
  {
    "mve_vhsubq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhsubt.s%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5262 */
  {
    "mve_vhsubq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhsubt.u%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5262 */
  {
    "mve_vhsubq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhsubt.s%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5262 */
  {
    "mve_vhsubq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhsubt.u%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhsubq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5279 */
  {
    "mve_vmaxq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxt.s%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5279 */
  {
    "mve_vmaxq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxt.u%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5279 */
  {
    "mve_vmaxq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxt.s%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5279 */
  {
    "mve_vmaxq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxt.u%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5279 */
  {
    "mve_vmaxq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxt.s%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5279 */
  {
    "mve_vmaxq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxt.u%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5296 */
  {
    "mve_vminq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmint.s%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5296 */
  {
    "mve_vminq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmint.u%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5296 */
  {
    "mve_vminq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmint.s%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5296 */
  {
    "mve_vminq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmint.u%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5296 */
  {
    "mve_vminq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmint.s%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5296 */
  {
    "mve_vminq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmint.u%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5313 */
  {
    "mve_vmladavaq_p_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavat.u%#8	%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaq_p_uv16qi },
    &operand_data[4536],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5313 */
  {
    "mve_vmladavaq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavat.s%#8	%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaq_p_sv16qi },
    &operand_data[4536],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5313 */
  {
    "mve_vmladavaq_p_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavat.u%#16	%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaq_p_uv8hi },
    &operand_data[4541],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5313 */
  {
    "mve_vmladavaq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavat.s%#16	%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaq_p_sv8hi },
    &operand_data[4541],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5313 */
  {
    "mve_vmladavaq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavat.u%#32	%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaq_p_uv4si },
    &operand_data[4546],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5313 */
  {
    "mve_vmladavaq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavat.s%#32	%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaq_p_sv4si },
    &operand_data[4546],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5330 */
  {
    "mve_vmlaq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlat.s%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaq_m_n_sv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5330 */
  {
    "mve_vmlaq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlat.u%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaq_m_n_uv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5330 */
  {
    "mve_vmlaq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlat.s%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaq_m_n_sv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5330 */
  {
    "mve_vmlaq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlat.u%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaq_m_n_uv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5330 */
  {
    "mve_vmlaq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlat.s%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5330 */
  {
    "mve_vmlaq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlat.u%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaq_m_n_uv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5347 */
  {
    "mve_vmlasq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlast.u%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlasq_m_n_uv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5347 */
  {
    "mve_vmlasq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlast.s%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlasq_m_n_sv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5347 */
  {
    "mve_vmlasq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlast.u%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlasq_m_n_uv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5347 */
  {
    "mve_vmlasq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlast.s%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlasq_m_n_sv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5347 */
  {
    "mve_vmlasq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlast.u%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlasq_m_n_uv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5347 */
  {
    "mve_vmlasq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlast.s%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlasq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5364 */
  {
    "mve_vmulhq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmulht.s%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulhq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5364 */
  {
    "mve_vmulhq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmulht.u%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulhq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5364 */
  {
    "mve_vmulhq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmulht.s%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulhq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5364 */
  {
    "mve_vmulhq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmulht.u%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulhq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5364 */
  {
    "mve_vmulhq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmulht.s%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulhq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5364 */
  {
    "mve_vmulhq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmulht.u%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulhq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5381 */
  {
    "mve_vmullbq_int_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmullbt.u%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_int_m_uv16qi },
    &operand_data[4551],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5381 */
  {
    "mve_vmullbq_int_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmullbt.s%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_int_m_sv16qi },
    &operand_data[4551],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5381 */
  {
    "mve_vmullbq_int_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmullbt.u%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_int_m_uv8hi },
    &operand_data[4556],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5381 */
  {
    "mve_vmullbq_int_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmullbt.s%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_int_m_sv8hi },
    &operand_data[4556],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5381 */
  {
    "mve_vmullbq_int_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmullbt.u%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_int_m_uv4si },
    &operand_data[4561],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5381 */
  {
    "mve_vmullbq_int_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmullbt.s%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_int_m_sv4si },
    &operand_data[4561],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5398 */
  {
    "mve_vmulltq_int_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmulltt.s%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_int_m_sv16qi },
    &operand_data[4551],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5398 */
  {
    "mve_vmulltq_int_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmulltt.u%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_int_m_uv16qi },
    &operand_data[4551],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5398 */
  {
    "mve_vmulltq_int_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmulltt.s%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_int_m_sv8hi },
    &operand_data[4556],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5398 */
  {
    "mve_vmulltq_int_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmulltt.u%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_int_m_uv8hi },
    &operand_data[4556],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5398 */
  {
    "mve_vmulltq_int_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmulltt.s%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_int_m_sv4si },
    &operand_data[4561],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5398 */
  {
    "mve_vmulltq_int_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmulltt.u%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_int_m_uv4si },
    &operand_data[4561],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5415 */
  {
    "mve_vmulq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.i%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_n_uv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5415 */
  {
    "mve_vmulq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.i%#8	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_n_sv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5415 */
  {
    "mve_vmulq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.i%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_n_uv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5415 */
  {
    "mve_vmulq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.i%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_n_sv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5415 */
  {
    "mve_vmulq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.i%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_n_uv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5415 */
  {
    "mve_vmulq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.i%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5432 */
  {
    "mve_vmulq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.i%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5432 */
  {
    "mve_vmulq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.i%#8	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5432 */
  {
    "mve_vmulq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.i%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5432 */
  {
    "mve_vmulq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.i%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5432 */
  {
    "mve_vmulq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.i%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5432 */
  {
    "mve_vmulq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.i%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5449 */
  {
    "mve_vornq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvornt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5449 */
  {
    "mve_vornq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvornt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5449 */
  {
    "mve_vornq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvornt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5449 */
  {
    "mve_vornq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvornt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5449 */
  {
    "mve_vornq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvornt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5449 */
  {
    "mve_vornq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvornt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5466 */
  {
    "mve_vorrq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvorrt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5466 */
  {
    "mve_vorrq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvorrt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5466 */
  {
    "mve_vorrq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvorrt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5466 */
  {
    "mve_vorrq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvorrt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5466 */
  {
    "mve_vorrq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvorrt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5466 */
  {
    "mve_vorrq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvorrt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5483 */
  {
    "mve_vqaddq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqaddt.u%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_m_n_uv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5483 */
  {
    "mve_vqaddq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqaddt.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_m_n_sv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5483 */
  {
    "mve_vqaddq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqaddt.u%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_m_n_uv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5483 */
  {
    "mve_vqaddq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqaddt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_m_n_sv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5483 */
  {
    "mve_vqaddq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqaddt.u%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_m_n_uv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5483 */
  {
    "mve_vqaddq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqaddt.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5500 */
  {
    "mve_vqaddq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqaddt.u%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5500 */
  {
    "mve_vqaddq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqaddt.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5500 */
  {
    "mve_vqaddq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqaddt.u%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5500 */
  {
    "mve_vqaddq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqaddt.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5500 */
  {
    "mve_vqaddq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqaddt.u%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5500 */
  {
    "mve_vqaddq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqaddt.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqaddq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5517 */
  {
    "mve_vqdmlahq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmlaht.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlahq_m_n_sv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5517 */
  {
    "mve_vqdmlahq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmlaht.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlahq_m_n_sv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5517 */
  {
    "mve_vqdmlahq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmlaht.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlahq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5534 */
  {
    "mve_vqdmlashq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmlasht.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlashq_m_n_sv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5534 */
  {
    "mve_vqdmlashq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmlasht.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlashq_m_n_sv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5534 */
  {
    "mve_vqdmlashq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmlasht.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlashq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5551 */
  {
    "mve_vqrdmlahq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmlaht.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlahq_m_n_sv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5551 */
  {
    "mve_vqrdmlahq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmlaht.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlahq_m_n_sv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5551 */
  {
    "mve_vqrdmlahq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmlaht.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlahq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5568 */
  {
    "mve_vqrdmlashq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmlasht.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlashq_m_n_sv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5568 */
  {
    "mve_vqrdmlashq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmlasht.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlashq_m_n_sv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5568 */
  {
    "mve_vqrdmlashq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmlasht.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlashq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5585 */
  {
    "mve_vqrshlq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshlt.u%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5585 */
  {
    "mve_vqrshlq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshlt.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5585 */
  {
    "mve_vqrshlq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshlt.u%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5585 */
  {
    "mve_vqrshlq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshlt.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5585 */
  {
    "mve_vqrshlq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshlt.u%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5585 */
  {
    "mve_vqrshlq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshlt.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshlq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5602 */
  {
    "mve_vqshlq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_n_sv16qi },
    &operand_data[4566],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5602 */
  {
    "mve_vqshlq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.u%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_n_uv16qi },
    &operand_data[4566],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5602 */
  {
    "mve_vqshlq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_n_sv8hi },
    &operand_data[4571],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5602 */
  {
    "mve_vqshlq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.u%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_n_uv8hi },
    &operand_data[4571],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5602 */
  {
    "mve_vqshlq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_n_sv4si },
    &operand_data[4576],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5602 */
  {
    "mve_vqshlq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.u%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_n_uv4si },
    &operand_data[4576],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5619 */
  {
    "mve_vqshlq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.u%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5619 */
  {
    "mve_vqshlq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5619 */
  {
    "mve_vqshlq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.u%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5619 */
  {
    "mve_vqshlq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5619 */
  {
    "mve_vqshlq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.u%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5619 */
  {
    "mve_vqshlq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshlt.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshlq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5636 */
  {
    "mve_vqsubq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqsubt.u%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_m_n_uv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5636 */
  {
    "mve_vqsubq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqsubt.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_m_n_sv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5636 */
  {
    "mve_vqsubq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqsubt.u%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_m_n_uv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5636 */
  {
    "mve_vqsubq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqsubt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_m_n_sv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5636 */
  {
    "mve_vqsubq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqsubt.u%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_m_n_uv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5636 */
  {
    "mve_vqsubq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqsubt.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5653 */
  {
    "mve_vqsubq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqsubt.u%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5653 */
  {
    "mve_vqsubq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqsubt.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5653 */
  {
    "mve_vqsubq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqsubt.u%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5653 */
  {
    "mve_vqsubq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqsubt.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5653 */
  {
    "mve_vqsubq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqsubt.u%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5653 */
  {
    "mve_vqsubq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqsubt.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqsubq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5670 */
  {
    "mve_vrhaddq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrhaddt.u%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrhaddq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5670 */
  {
    "mve_vrhaddq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrhaddt.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrhaddq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5670 */
  {
    "mve_vrhaddq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrhaddt.u%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrhaddq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5670 */
  {
    "mve_vrhaddq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrhaddt.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrhaddq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5670 */
  {
    "mve_vrhaddq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrhaddt.u%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrhaddq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5670 */
  {
    "mve_vrhaddq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrhaddt.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrhaddq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5687 */
  {
    "mve_vrmulhq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmulht.u%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmulhq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5687 */
  {
    "mve_vrmulhq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmulht.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmulhq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5687 */
  {
    "mve_vrmulhq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmulht.u%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmulhq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5687 */
  {
    "mve_vrmulhq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmulht.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmulhq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5687 */
  {
    "mve_vrmulhq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmulht.u%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmulhq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5687 */
  {
    "mve_vrmulhq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmulht.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmulhq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5704 */
  {
    "mve_vrshlq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshlt.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5704 */
  {
    "mve_vrshlq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshlt.u%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_m_uv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5704 */
  {
    "mve_vrshlq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshlt.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5704 */
  {
    "mve_vrshlq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshlt.u%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_m_uv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5704 */
  {
    "mve_vrshlq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshlt.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5704 */
  {
    "mve_vrshlq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshlt.u%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshlq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5721 */
  {
    "mve_vrshrq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshrt.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrq_m_n_sv16qi },
    &operand_data[4581],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5721 */
  {
    "mve_vrshrq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshrt.u%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrq_m_n_uv16qi },
    &operand_data[4581],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5721 */
  {
    "mve_vrshrq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshrt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrq_m_n_sv8hi },
    &operand_data[4586],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5721 */
  {
    "mve_vrshrq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshrt.u%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrq_m_n_uv8hi },
    &operand_data[4586],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5721 */
  {
    "mve_vrshrq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshrt.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrq_m_n_sv4si },
    &operand_data[4591],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5721 */
  {
    "mve_vrshrq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshrt.u%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrq_m_n_uv4si },
    &operand_data[4591],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5738 */
  {
    "mve_vshlq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_n_sv16qi },
    &operand_data[4566],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5738 */
  {
    "mve_vshlq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.u%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_n_uv16qi },
    &operand_data[4566],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5738 */
  {
    "mve_vshlq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_n_sv8hi },
    &operand_data[4571],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5738 */
  {
    "mve_vshlq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.u%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_n_uv8hi },
    &operand_data[4571],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5738 */
  {
    "mve_vshlq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_n_sv4si },
    &operand_data[4576],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5738 */
  {
    "mve_vshlq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlt.u%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlq_m_n_uv4si },
    &operand_data[4576],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5755 */
  {
    "mve_vshrq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshrt.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_m_n_sv16qi },
    &operand_data[4581],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5755 */
  {
    "mve_vshrq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshrt.u%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_m_n_uv16qi },
    &operand_data[4581],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5755 */
  {
    "mve_vshrq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshrt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_m_n_sv8hi },
    &operand_data[4586],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5755 */
  {
    "mve_vshrq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshrt.u%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_m_n_uv8hi },
    &operand_data[4586],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5755 */
  {
    "mve_vshrq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshrt.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_m_n_sv4si },
    &operand_data[4591],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5755 */
  {
    "mve_vshrq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshrt.u%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrq_m_n_uv4si },
    &operand_data[4591],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5772 */
  {
    "mve_vsliq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvslit.%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsliq_m_n_uv16qi },
    &operand_data[4451],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5772 */
  {
    "mve_vsliq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvslit.%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsliq_m_n_sv16qi },
    &operand_data[4451],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5772 */
  {
    "mve_vsliq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvslit.%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsliq_m_n_uv8hi },
    &operand_data[4596],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5772 */
  {
    "mve_vsliq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvslit.%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsliq_m_n_sv8hi },
    &operand_data[4596],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5772 */
  {
    "mve_vsliq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvslit.%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsliq_m_n_uv4si },
    &operand_data[4601],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5772 */
  {
    "mve_vsliq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvslit.%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsliq_m_n_sv4si },
    &operand_data[4601],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5789 */
  {
    "mve_vsubq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.i%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_n_sv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5789 */
  {
    "mve_vsubq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.i%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_n_uv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5789 */
  {
    "mve_vsubq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.i%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_n_sv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5789 */
  {
    "mve_vsubq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.i%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_n_uv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5789 */
  {
    "mve_vsubq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.i%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5789 */
  {
    "mve_vsubq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.i%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_n_uv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5806 */
  {
    "mve_vhcaddq_rot270_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhcaddt.s%#8\t%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhcaddq_rot270_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5806 */
  {
    "mve_vhcaddq_rot270_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhcaddt.s%#16\t%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhcaddq_rot270_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5806 */
  {
    "mve_vhcaddq_rot270_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhcaddt.s%#32\t%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhcaddq_rot270_m_sv4si },
    &operand_data[4531],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5823 */
  {
    "mve_vhcaddq_rot90_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhcaddt.s%#8\t%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhcaddq_rot90_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5823 */
  {
    "mve_vhcaddq_rot90_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhcaddt.s%#16\t%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhcaddq_rot90_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5823 */
  {
    "mve_vhcaddq_rot90_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvhcaddt.s%#32\t%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vhcaddq_rot90_m_sv4si },
    &operand_data[4531],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5840 */
  {
    "mve_vmladavaxq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavaxt.s%#8\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaxq_p_sv16qi },
    &operand_data[4536],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5840 */
  {
    "mve_vmladavaxq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavaxt.s%#16\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaxq_p_sv8hi },
    &operand_data[4541],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5840 */
  {
    "mve_vmladavaxq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmladavaxt.s%#32\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmladavaxq_p_sv4si },
    &operand_data[4546],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5857 */
  {
    "mve_vmlsdavaq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsdavat.s%#8\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavaq_p_sv16qi },
    &operand_data[4536],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5857 */
  {
    "mve_vmlsdavaq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsdavat.s%#16\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavaq_p_sv8hi },
    &operand_data[4541],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5857 */
  {
    "mve_vmlsdavaq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsdavat.s%#32\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavaq_p_sv4si },
    &operand_data[4546],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5874 */
  {
    "mve_vmlsdavaxq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsdavaxt.s%#8\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavaxq_p_sv16qi },
    &operand_data[4536],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5874 */
  {
    "mve_vmlsdavaxq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsdavaxt.s%#16\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavaxq_p_sv8hi },
    &operand_data[4541],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5874 */
  {
    "mve_vmlsdavaxq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsdavaxt.s%#32\t%0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsdavaxq_p_sv4si },
    &operand_data[4546],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5891 */
  {
    "mve_vqdmladhq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmladht.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmladhq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5891 */
  {
    "mve_vqdmladhq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmladht.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmladhq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5891 */
  {
    "mve_vqdmladhq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmladht.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmladhq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5908 */
  {
    "mve_vqdmladhxq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmladhxt.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmladhxq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5908 */
  {
    "mve_vqdmladhxq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmladhxt.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmladhxq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5908 */
  {
    "mve_vqdmladhxq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmladhxt.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmladhxq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5925 */
  {
    "mve_vqdmlsdhq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmlsdht.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlsdhq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5925 */
  {
    "mve_vqdmlsdhq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmlsdht.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlsdhq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5925 */
  {
    "mve_vqdmlsdhq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmlsdht.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlsdhq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5942 */
  {
    "mve_vqdmlsdhxq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmlsdhxt.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlsdhxq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5942 */
  {
    "mve_vqdmlsdhxq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmlsdhxt.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlsdhxq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5942 */
  {
    "mve_vqdmlsdhxq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmlsdhxt.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmlsdhxq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5959 */
  {
    "mve_vqdmulhq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmulht.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulhq_m_n_sv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5959 */
  {
    "mve_vqdmulhq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmulht.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulhq_m_n_sv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5959 */
  {
    "mve_vqdmulhq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmulht.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulhq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5976 */
  {
    "mve_vqdmulhq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmulht.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulhq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5976 */
  {
    "mve_vqdmulhq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmulht.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulhq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5976 */
  {
    "mve_vqdmulhq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmulht.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulhq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5993 */
  {
    "mve_vqrdmladhq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmladht.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmladhq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5993 */
  {
    "mve_vqrdmladhq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmladht.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmladhq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:5993 */
  {
    "mve_vqrdmladhq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmladht.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmladhq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6010 */
  {
    "mve_vqrdmladhxq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmladhxt.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmladhxq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6010 */
  {
    "mve_vqrdmladhxq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmladhxt.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmladhxq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6010 */
  {
    "mve_vqrdmladhxq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmladhxt.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmladhxq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6027 */
  {
    "mve_vqrdmlsdhq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmlsdht.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlsdhq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6027 */
  {
    "mve_vqrdmlsdhq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmlsdht.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlsdhq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6027 */
  {
    "mve_vqrdmlsdhq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmlsdht.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlsdhq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6044 */
  {
    "mve_vqrdmlsdhxq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmlsdhxt.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlsdhxq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6044 */
  {
    "mve_vqrdmlsdhxq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmlsdhxt.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlsdhxq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6044 */
  {
    "mve_vqrdmlsdhxq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmlsdhxt.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmlsdhxq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6061 */
  {
    "mve_vqrdmulhq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmulht.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmulhq_m_n_sv16qi },
    &operand_data[4506],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6061 */
  {
    "mve_vqrdmulhq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmulht.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmulhq_m_n_sv8hi },
    &operand_data[4511],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6061 */
  {
    "mve_vqrdmulhq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmulht.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmulhq_m_n_sv4si },
    &operand_data[4516],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6078 */
  {
    "mve_vqrdmulhq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmulht.s%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmulhq_m_sv16qi },
    &operand_data[4466],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6078 */
  {
    "mve_vqrdmulhq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmulht.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmulhq_m_sv8hi },
    &operand_data[4471],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6078 */
  {
    "mve_vqrdmulhq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrdmulht.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrdmulhq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6095 */
  {
    "mve_vmlaldavaq_p_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlaldavat.u%#16	%Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavaq_p_uv8hi },
    &operand_data[4606],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6095 */
  {
    "mve_vmlaldavaq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlaldavat.s%#16	%Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavaq_p_sv8hi },
    &operand_data[4606],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6095 */
  {
    "mve_vmlaldavaq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlaldavat.u%#32	%Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavaq_p_uv4si },
    &operand_data[4611],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6095 */
  {
    "mve_vmlaldavaq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlaldavat.s%#32	%Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavaq_p_sv4si },
    &operand_data[4611],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6112 */
  {
    "mve_vmlaldavaxq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlaldavaxt.s%#16 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavaxq_p_sv8hi },
    &operand_data[4606],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6112 */
  {
    "mve_vmlaldavaxq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlaldavaxt.s%#32 %Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlaldavaxq_p_sv4si },
    &operand_data[4611],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6129 */
  {
    "mve_vqrshrnbq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshrnbt.u%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrnbq_m_n_uv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6129 */
  {
    "mve_vqrshrnbq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshrnbt.s%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrnbq_m_n_sv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6129 */
  {
    "mve_vqrshrnbq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshrnbt.u%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrnbq_m_n_uv4si },
    &operand_data[4621],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6129 */
  {
    "mve_vqrshrnbq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshrnbt.s%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrnbq_m_n_sv4si },
    &operand_data[4621],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6146 */
  {
    "mve_vqrshrntq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshrntt.s%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrntq_m_n_sv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6146 */
  {
    "mve_vqrshrntq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshrntt.u%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrntq_m_n_uv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6146 */
  {
    "mve_vqrshrntq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshrntt.s%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrntq_m_n_sv4si },
    &operand_data[4621],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6146 */
  {
    "mve_vqrshrntq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshrntt.u%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrntq_m_n_uv4si },
    &operand_data[4621],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6163 */
  {
    "mve_vqshrnbq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshrnbt.u%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrnbq_m_n_uv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6163 */
  {
    "mve_vqshrnbq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshrnbt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrnbq_m_n_sv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6163 */
  {
    "mve_vqshrnbq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshrnbt.u%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrnbq_m_n_uv4si },
    &operand_data[4626],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6163 */
  {
    "mve_vqshrnbq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshrnbt.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrnbq_m_n_sv4si },
    &operand_data[4626],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6180 */
  {
    "mve_vqshrntq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshrntt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrntq_m_n_sv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6180 */
  {
    "mve_vqshrntq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshrntt.u%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrntq_m_n_uv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6180 */
  {
    "mve_vqshrntq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshrntt.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrntq_m_n_sv4si },
    &operand_data[4626],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6180 */
  {
    "mve_vqshrntq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshrntt.u%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrntq_m_n_uv4si },
    &operand_data[4626],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6197 */
  {
    "mve_vrmlaldavhaq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmlaldavhat.s32\t%Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlaldavhaq_p_sv4si },
    &operand_data[4631],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6214 */
  {
    "mve_vrshrnbq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshrnbt.i%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrnbq_m_n_uv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6214 */
  {
    "mve_vrshrnbq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshrnbt.i%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrnbq_m_n_sv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6214 */
  {
    "mve_vrshrnbq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshrnbt.i%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrnbq_m_n_uv4si },
    &operand_data[4621],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6214 */
  {
    "mve_vrshrnbq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshrnbt.i%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrnbq_m_n_sv4si },
    &operand_data[4621],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6231 */
  {
    "mve_vrshrntq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshrntt.i%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrntq_m_n_uv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6231 */
  {
    "mve_vrshrntq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshrntt.i%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrntq_m_n_sv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6231 */
  {
    "mve_vrshrntq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshrntt.i%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrntq_m_n_uv4si },
    &operand_data[4621],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6231 */
  {
    "mve_vrshrntq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrshrntt.i%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrshrntq_m_n_sv4si },
    &operand_data[4621],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6248 */
  {
    "mve_vshllbq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshllbt.u%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshllbq_m_n_uv16qi },
    &operand_data[4636],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6248 */
  {
    "mve_vshllbq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshllbt.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshllbq_m_n_sv16qi },
    &operand_data[4636],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6248 */
  {
    "mve_vshllbq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshllbt.u%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshllbq_m_n_uv8hi },
    &operand_data[4641],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6248 */
  {
    "mve_vshllbq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshllbt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshllbq_m_n_sv8hi },
    &operand_data[4641],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6265 */
  {
    "mve_vshlltq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlltt.u%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlltq_m_n_uv16qi },
    &operand_data[4636],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6265 */
  {
    "mve_vshlltq_m_n_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlltt.s%#8\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlltq_m_n_sv16qi },
    &operand_data[4636],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6265 */
  {
    "mve_vshlltq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlltt.u%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlltq_m_n_uv8hi },
    &operand_data[4641],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6265 */
  {
    "mve_vshlltq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlltt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlltq_m_n_sv8hi },
    &operand_data[4641],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6282 */
  {
    "mve_vshrnbq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshrnbt.i%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrnbq_m_n_sv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6282 */
  {
    "mve_vshrnbq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshrnbt.i%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrnbq_m_n_uv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6282 */
  {
    "mve_vshrnbq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshrnbt.i%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrnbq_m_n_sv4si },
    &operand_data[4626],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6282 */
  {
    "mve_vshrnbq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshrnbt.i%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrnbq_m_n_uv4si },
    &operand_data[4626],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6299 */
  {
    "mve_vshrntq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshrntt.i%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrntq_m_n_sv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6299 */
  {
    "mve_vshrntq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshrntt.i%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrntq_m_n_uv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6299 */
  {
    "mve_vshrntq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshrntt.i%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrntq_m_n_sv4si },
    &operand_data[4626],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6299 */
  {
    "mve_vshrntq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshrntt.i%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshrntq_m_n_uv4si },
    &operand_data[4626],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6316 */
  {
    "mve_vmlsldavaq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsldavat.s%#16\t%Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavaq_p_sv8hi },
    &operand_data[4606],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6316 */
  {
    "mve_vmlsldavaq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsldavat.s%#32\t%Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavaq_p_sv4si },
    &operand_data[4611],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6333 */
  {
    "mve_vmlsldavaxq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsldavaxt.s%#16\t%Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavaxq_p_sv8hi },
    &operand_data[4606],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6333 */
  {
    "mve_vmlsldavaxq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmlsldavaxt.s%#32\t%Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmlsldavaxq_p_sv4si },
    &operand_data[4611],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6350 */
  {
    "mve_vmullbq_poly_m_pv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmullbt.p%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_poly_m_pv16qi },
    &operand_data[4551],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6350 */
  {
    "mve_vmullbq_poly_m_pv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmullbt.p%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmullbq_poly_m_pv8hi },
    &operand_data[4556],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6367 */
  {
    "mve_vmulltq_poly_m_pv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmulltt.p%#8\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_poly_m_pv16qi },
    &operand_data[4551],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6367 */
  {
    "mve_vmulltq_poly_m_pv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmulltt.p%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulltq_poly_m_pv8hi },
    &operand_data[4556],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6384 */
  {
    "mve_vqdmullbq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmullbt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmullbq_m_n_sv8hi },
    &operand_data[4646],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6384 */
  {
    "mve_vqdmullbq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmullbt.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmullbq_m_n_sv4si },
    &operand_data[4651],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6401 */
  {
    "mve_vqdmullbq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmullbt.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmullbq_m_sv8hi },
    &operand_data[4556],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6401 */
  {
    "mve_vqdmullbq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmullbt.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmullbq_m_sv4si },
    &operand_data[4561],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6418 */
  {
    "mve_vqdmulltq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmulltt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulltq_m_n_sv8hi },
    &operand_data[4646],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6418 */
  {
    "mve_vqdmulltq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmulltt.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulltq_m_n_sv4si },
    &operand_data[4651],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6435 */
  {
    "mve_vqdmulltq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmulltt.s%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulltq_m_sv8hi },
    &operand_data[4556],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6435 */
  {
    "mve_vqdmulltq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqdmulltt.s%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqdmulltq_m_sv4si },
    &operand_data[4561],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6452 */
  {
    "mve_vqrshrunbq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshrunbt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrunbq_m_n_sv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6452 */
  {
    "mve_vqrshrunbq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshrunbt.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshrunbq_m_n_sv4si },
    &operand_data[4621],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6469 */
  {
    "mve_vqrshruntq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshruntt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshruntq_m_n_sv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6469 */
  {
    "mve_vqrshruntq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqrshruntt.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqrshruntq_m_n_sv4si },
    &operand_data[4626],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6486 */
  {
    "mve_vqshrunbq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshrunbt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrunbq_m_n_sv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6486 */
  {
    "mve_vqshrunbq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshrunbt.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshrunbq_m_n_sv4si },
    &operand_data[4626],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6503 */
  {
    "mve_vqshruntq_m_n_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshruntt.s%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshruntq_m_n_sv8hi },
    &operand_data[4616],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6503 */
  {
    "mve_vqshruntq_m_n_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvqshruntt.s%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vqshruntq_m_n_sv4si },
    &operand_data[4626],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6520 */
  {
    "mve_vrmlaldavhaq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmlaldavhat.u32\t%Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlaldavhaq_p_uv4si },
    &operand_data[4631],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6537 */
  {
    "mve_vrmlaldavhaxq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmlaldavhaxt.s32\t%Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlaldavhaxq_p_sv4si },
    &operand_data[4631],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6554 */
  {
    "mve_vrmlsldavhaq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmlsldavhat.s32\t%Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlsldavhaq_p_sv4si },
    &operand_data[4631],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6571 */
  {
    "mve_vrmlsldavhaxq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvrmlsldavhaxt.s32\t%Q0, %R0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vrmlsldavhaxq_p_sv4si },
    &operand_data[4631],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6587 */
  {
    "mve_vabdq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabdt.f%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6587 */
  {
    "mve_vabdq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvabdt.f%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vabdq_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6604 */
  {
    "mve_vaddq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.f%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6604 */
  {
    "mve_vaddq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.f%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6621 */
  {
    "mve_vaddq_m_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.f%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_n_fv8hf },
    &operand_data[4666],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6621 */
  {
    "mve_vaddq_m_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvaddt.f%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_m_n_fv4sf },
    &operand_data[4671],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6638 */
  {
    "mve_vandq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvandt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6638 */
  {
    "mve_vandq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvandt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6655 */
  {
    "mve_vbicq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbict %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6655 */
  {
    "mve_vbicq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbict %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6672 */
  {
    "mve_vbrsrq_m_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbrsrt.%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_m_n_fv8hf },
    &operand_data[4676],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6672 */
  {
    "mve_vbrsrq_m_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvbrsrt.%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbrsrq_m_n_fv4sf },
    &operand_data[4681],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6689 */
  {
    "mve_vcaddq_rot270_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.f%#16	%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot270_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6689 */
  {
    "mve_vcaddq_rot270_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.f%#32	%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot270_m_fv4sf },
    &operand_data[4686],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6706 */
  {
    "mve_vcaddq_rot90_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.f%#16	%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot90_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6706 */
  {
    "mve_vcaddq_rot90_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcaddt.f%#32	%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcaddq_rot90_m_fv4sf },
    &operand_data[4686],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6723 */
  {
    "mve_vcmlaq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmlat.f%#16	%q0, %q2, %q3, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaq_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6723 */
  {
    "mve_vcmlaq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmlat.f%#32	%q0, %q2, %q3, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaq_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6740 */
  {
    "mve_vcmlaq_rot180_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmlat.f%#16	%q0, %q2, %q3, #180",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaq_rot180_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6740 */
  {
    "mve_vcmlaq_rot180_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmlat.f%#32	%q0, %q2, %q3, #180",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaq_rot180_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6757 */
  {
    "mve_vcmlaq_rot270_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmlat.f%#16	%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaq_rot270_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6757 */
  {
    "mve_vcmlaq_rot270_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmlat.f%#32	%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaq_rot270_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6774 */
  {
    "mve_vcmlaq_rot90_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmlat.f%#16	%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaq_rot90_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6774 */
  {
    "mve_vcmlaq_rot90_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmlat.f%#32	%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmlaq_rot90_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6791 */
  {
    "mve_vcmulq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmult.f%#16	%q0, %q2, %q3, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulq_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6791 */
  {
    "mve_vcmulq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmult.f%#32	%q0, %q2, %q3, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulq_m_fv4sf },
    &operand_data[4686],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6808 */
  {
    "mve_vcmulq_rot180_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmult.f%#16	%q0, %q2, %q3, #180",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulq_rot180_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6808 */
  {
    "mve_vcmulq_rot180_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmult.f%#32	%q0, %q2, %q3, #180",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulq_rot180_m_fv4sf },
    &operand_data[4686],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6825 */
  {
    "mve_vcmulq_rot270_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmult.f%#16	%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulq_rot270_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6825 */
  {
    "mve_vcmulq_rot270_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmult.f%#32	%q0, %q2, %q3, #270",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulq_rot270_m_fv4sf },
    &operand_data[4686],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6842 */
  {
    "mve_vcmulq_rot90_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmult.f%#16	%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulq_rot90_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6842 */
  {
    "mve_vcmulq_rot90_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcmult.f%#32	%q0, %q2, %q3, #90",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vcmulq_rot90_m_fv4sf },
    &operand_data[4686],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6859 */
  {
    "mve_veorq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tveort %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6859 */
  {
    "mve_veorq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tveort %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6876 */
  {
    "mve_vfmaq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvfmat.f%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmaq_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6876 */
  {
    "mve_vfmaq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvfmat.f%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmaq_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6893 */
  {
    "mve_vfmaq_m_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvfmat.f%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmaq_m_n_fv8hf },
    &operand_data[4666],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6893 */
  {
    "mve_vfmaq_m_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvfmat.f%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmaq_m_n_fv4sf },
    &operand_data[4671],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6910 */
  {
    "mve_vfmasq_m_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvfmast.f%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmasq_m_n_fv8hf },
    &operand_data[4666],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6910 */
  {
    "mve_vfmasq_m_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvfmast.f%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmasq_m_n_fv4sf },
    &operand_data[4671],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6927 */
  {
    "mve_vfmsq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvfmst.f%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmsq_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6927 */
  {
    "mve_vfmsq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvfmst.f%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vfmsq_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6944 */
  {
    "mve_vmaxnmq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxnmt.f%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmq_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6944 */
  {
    "mve_vmaxnmq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmaxnmt.f%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmaxnmq_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6961 */
  {
    "mve_vminnmq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminnmt.f%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmq_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6961 */
  {
    "mve_vminnmq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvminnmt.f%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vminnmq_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6978 */
  {
    "mve_vmulq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.f%#16	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6978 */
  {
    "mve_vmulq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.f%#32	%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6995 */
  {
    "mve_vmulq_m_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.f%#16	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_n_fv8hf },
    &operand_data[4666],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:6995 */
  {
    "mve_vmulq_m_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvmult.f%#32	%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmulq_m_n_fv4sf },
    &operand_data[4671],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7012 */
  {
    "mve_vornq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvornt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7012 */
  {
    "mve_vornq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvornt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7029 */
  {
    "mve_vorrq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvorrt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7029 */
  {
    "mve_vorrq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvorrt %q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7046 */
  {
    "mve_vsubq_m_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.f%#16\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_fv8hf },
    &operand_data[4656],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7046 */
  {
    "mve_vsubq_m_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.f%#32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_fv4sf },
    &operand_data[4661],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7063 */
  {
    "mve_vsubq_m_n_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.f%#16\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_n_fv8hf },
    &operand_data[4666],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7063 */
  {
    "mve_vsubq_m_n_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsubt.f%#32\t%q0, %q2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsubq_m_n_fv4sf },
    &operand_data[4671],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7080 */
  {
    "mve_vstrbq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4632 },
#else
    { 0, 0, output_4632 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_sv16qi },
    &operand_data[4691],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7080 */
  {
    "mve_vstrbq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4633 },
#else
    { 0, 0, output_4633 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_uv16qi },
    &operand_data[4691],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7080 */
  {
    "mve_vstrbq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4634 },
#else
    { 0, 0, output_4634 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_sv8hi },
    &operand_data[4693],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7080 */
  {
    "mve_vstrbq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4635 },
#else
    { 0, 0, output_4635 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_uv8hi },
    &operand_data[4693],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7080 */
  {
    "mve_vstrbq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4636 },
#else
    { 0, 0, output_4636 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_sv4si },
    &operand_data[4695],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7080 */
  {
    "mve_vstrbq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4637 },
#else
    { 0, 0, output_4637 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_uv4si },
    &operand_data[4695],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7113 */
  {
    "mve_vstrbq_scatter_offset_sv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrb.8\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_sv16qi_insn },
    &operand_data[4697],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7113 */
  {
    "mve_vstrbq_scatter_offset_uv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrb.8\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_uv16qi_insn },
    &operand_data[4697],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7113 */
  {
    "mve_vstrbq_scatter_offset_sv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrb.16\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_sv8hi_insn },
    &operand_data[4700],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7113 */
  {
    "mve_vstrbq_scatter_offset_uv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrb.16\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_uv8hi_insn },
    &operand_data[4700],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7113 */
  {
    "mve_vstrbq_scatter_offset_sv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrb.32\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_sv4si_insn },
    &operand_data[4703],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7113 */
  {
    "mve_vstrbq_scatter_offset_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrb.32\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_uv4si_insn },
    &operand_data[4703],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7127 */
  {
    "mve_vstrwq_scatter_base_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4644 },
#else
    { 0, 0, output_4644 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_base_sv4si },
    &operand_data[4705],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7127 */
  {
    "mve_vstrwq_scatter_base_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4645 },
#else
    { 0, 0, output_4645 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_base_uv4si },
    &operand_data[4705],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7149 */
  {
    "mve_vldrbq_gather_offset_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4646 },
#else
    { 0, 0, output_4646 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_gather_offset_sv16qi },
    &operand_data[4708],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7149 */
  {
    "mve_vldrbq_gather_offset_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4647 },
#else
    { 0, 0, output_4647 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_gather_offset_uv16qi },
    &operand_data[4708],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7149 */
  {
    "mve_vldrbq_gather_offset_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4648 },
#else
    { 0, 0, output_4648 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_gather_offset_sv8hi },
    &operand_data[4711],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7149 */
  {
    "mve_vldrbq_gather_offset_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4649 },
#else
    { 0, 0, output_4649 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_gather_offset_uv8hi },
    &operand_data[4711],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7149 */
  {
    "mve_vldrbq_gather_offset_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4650 },
#else
    { 0, 0, output_4650 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_gather_offset_sv4si },
    &operand_data[4714],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7149 */
  {
    "mve_vldrbq_gather_offset_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4651 },
#else
    { 0, 0, output_4651 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_gather_offset_uv4si },
    &operand_data[4714],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7172 */
  {
    "mve_vldrbq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4652 },
#else
    { 0, 0, output_4652 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_sv16qi },
    &operand_data[4717],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7172 */
  {
    "mve_vldrbq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4653 },
#else
    { 0, 0, output_4653 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_uv16qi },
    &operand_data[4717],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7172 */
  {
    "mve_vldrbq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4654 },
#else
    { 0, 0, output_4654 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_sv8hi },
    &operand_data[4719],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7172 */
  {
    "mve_vldrbq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4655 },
#else
    { 0, 0, output_4655 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_uv8hi },
    &operand_data[4719],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7172 */
  {
    "mve_vldrbq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4656 },
#else
    { 0, 0, output_4656 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_sv4si },
    &operand_data[4721],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7172 */
  {
    "mve_vldrbq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4657 },
#else
    { 0, 0, output_4657 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_uv4si },
    &operand_data[4721],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7194 */
  {
    "mve_vldrwq_gather_base_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4658 },
#else
    { 0, 0, output_4658 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_sv4si },
    &operand_data[4723],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7194 */
  {
    "mve_vldrwq_gather_base_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4659 },
#else
    { 0, 0, output_4659 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_uv4si },
    &operand_data[4723],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7231 */
  {
    "mve_vstrbq_scatter_offset_p_sv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrbt.8\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_p_sv16qi_insn },
    &operand_data[4726],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7231 */
  {
    "mve_vstrbq_scatter_offset_p_uv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrbt.8\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_p_uv16qi_insn },
    &operand_data[4726],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7231 */
  {
    "mve_vstrbq_scatter_offset_p_sv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrbt.16\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_p_sv8hi_insn },
    &operand_data[4730],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7231 */
  {
    "mve_vstrbq_scatter_offset_p_uv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrbt.16\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_p_uv8hi_insn },
    &operand_data[4730],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7231 */
  {
    "mve_vstrbq_scatter_offset_p_sv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrbt.32\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_p_sv4si_insn },
    &operand_data[4734],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7231 */
  {
    "mve_vstrbq_scatter_offset_p_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrbt.32\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_p_uv4si_insn },
    &operand_data[4734],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7246 */
  {
    "mve_vstrwq_scatter_base_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4666 },
#else
    { 0, 0, output_4666 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_base_p_sv4si },
    &operand_data[4738],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7246 */
  {
    "mve_vstrwq_scatter_base_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4667 },
#else
    { 0, 0, output_4667 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_base_p_uv4si },
    &operand_data[4738],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7269 */
  {
    "mve_vstrbq_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4668 },
#else
    { 0, 0, output_4668 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_p_sv16qi },
    &operand_data[4742],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7269 */
  {
    "mve_vstrbq_p_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4669 },
#else
    { 0, 0, output_4669 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_p_uv16qi },
    &operand_data[4742],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7269 */
  {
    "mve_vstrbq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4670 },
#else
    { 0, 0, output_4670 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_p_sv8hi },
    &operand_data[4745],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7269 */
  {
    "mve_vstrbq_p_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4671 },
#else
    { 0, 0, output_4671 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_p_uv8hi },
    &operand_data[4745],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7269 */
  {
    "mve_vstrbq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4672 },
#else
    { 0, 0, output_4672 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_p_sv4si },
    &operand_data[4748],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7269 */
  {
    "mve_vstrbq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4673 },
#else
    { 0, 0, output_4673 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_p_uv4si },
    &operand_data[4748],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7289 */
  {
    "mve_vldrbq_gather_offset_z_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4674 },
#else
    { 0, 0, output_4674 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_gather_offset_z_sv16qi },
    &operand_data[4751],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7289 */
  {
    "mve_vldrbq_gather_offset_z_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4675 },
#else
    { 0, 0, output_4675 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_gather_offset_z_uv16qi },
    &operand_data[4751],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7289 */
  {
    "mve_vldrbq_gather_offset_z_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4676 },
#else
    { 0, 0, output_4676 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_gather_offset_z_sv8hi },
    &operand_data[4755],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7289 */
  {
    "mve_vldrbq_gather_offset_z_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4677 },
#else
    { 0, 0, output_4677 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_gather_offset_z_uv8hi },
    &operand_data[4755],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7289 */
  {
    "mve_vldrbq_gather_offset_z_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4678 },
#else
    { 0, 0, output_4678 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_gather_offset_z_sv4si },
    &operand_data[4759],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7289 */
  {
    "mve_vldrbq_gather_offset_z_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4679 },
#else
    { 0, 0, output_4679 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_gather_offset_z_uv4si },
    &operand_data[4759],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7314 */
  {
    "mve_vldrbq_z_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4680 },
#else
    { 0, 0, output_4680 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_z_sv16qi },
    &operand_data[4763],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7314 */
  {
    "mve_vldrbq_z_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4681 },
#else
    { 0, 0, output_4681 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_z_uv16qi },
    &operand_data[4763],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7314 */
  {
    "mve_vldrbq_z_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4682 },
#else
    { 0, 0, output_4682 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_z_sv8hi },
    &operand_data[4766],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7314 */
  {
    "mve_vldrbq_z_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4683 },
#else
    { 0, 0, output_4683 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_z_uv8hi },
    &operand_data[4766],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7314 */
  {
    "mve_vldrbq_z_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4684 },
#else
    { 0, 0, output_4684 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_z_sv4si },
    &operand_data[4769],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7314 */
  {
    "mve_vldrbq_z_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4685 },
#else
    { 0, 0, output_4685 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrbq_z_uv4si },
    &operand_data[4769],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7337 */
  {
    "mve_vldrwq_gather_base_z_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4686 },
#else
    { 0, 0, output_4686 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_z_sv4si },
    &operand_data[4772],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7337 */
  {
    "mve_vldrwq_gather_base_z_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4687 },
#else
    { 0, 0, output_4687 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_z_uv4si },
    &operand_data[4772],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7358 */
  {
    "mve_vldrhq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4688 },
#else
    { 0, 0, output_4688 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_fv8hf },
    &operand_data[4776],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7377 */
  {
    "mve_vldrhq_gather_offset_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4689 },
#else
    { 0, 0, output_4689 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_offset_sv8hi },
    &operand_data[4778],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7377 */
  {
    "mve_vldrhq_gather_offset_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4690 },
#else
    { 0, 0, output_4690 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_offset_uv8hi },
    &operand_data[4778],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7377 */
  {
    "mve_vldrhq_gather_offset_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4691 },
#else
    { 0, 0, output_4691 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_offset_sv4si },
    &operand_data[4781],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7377 */
  {
    "mve_vldrhq_gather_offset_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4692 },
#else
    { 0, 0, output_4692 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_offset_uv4si },
    &operand_data[4781],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7400 */
  {
    "mve_vldrhq_gather_offset_z_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4693 },
#else
    { 0, 0, output_4693 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_offset_z_sv8hi },
    &operand_data[4784],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7400 */
  {
    "mve_vldrhq_gather_offset_z_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4694 },
#else
    { 0, 0, output_4694 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_offset_z_uv8hi },
    &operand_data[4784],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7400 */
  {
    "mve_vldrhq_gather_offset_z_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4695 },
#else
    { 0, 0, output_4695 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_offset_z_sv4si },
    &operand_data[4788],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7400 */
  {
    "mve_vldrhq_gather_offset_z_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4696 },
#else
    { 0, 0, output_4696 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_offset_z_uv4si },
    &operand_data[4788],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7425 */
  {
    "mve_vldrhq_gather_shifted_offset_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4697 },
#else
    { 0, 0, output_4697 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_shifted_offset_sv8hi },
    &operand_data[4778],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7425 */
  {
    "mve_vldrhq_gather_shifted_offset_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4698 },
#else
    { 0, 0, output_4698 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_shifted_offset_uv8hi },
    &operand_data[4778],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7425 */
  {
    "mve_vldrhq_gather_shifted_offset_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4699 },
#else
    { 0, 0, output_4699 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_shifted_offset_sv4si },
    &operand_data[4781],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7425 */
  {
    "mve_vldrhq_gather_shifted_offset_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4700 },
#else
    { 0, 0, output_4700 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_shifted_offset_uv4si },
    &operand_data[4781],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7448 */
  {
    "mve_vldrhq_gather_shifted_offset_z_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4701 },
#else
    { 0, 0, output_4701 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_shifted_offset_z_sv8hi },
    &operand_data[4784],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7448 */
  {
    "mve_vldrhq_gather_shifted_offset_z_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4702 },
#else
    { 0, 0, output_4702 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_shifted_offset_z_uv8hi },
    &operand_data[4784],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7448 */
  {
    "mve_vldrhq_gather_shifted_offset_z_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4703 },
#else
    { 0, 0, output_4703 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_shifted_offset_z_sv4si },
    &operand_data[4788],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7448 */
  {
    "mve_vldrhq_gather_shifted_offset_z_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4704 },
#else
    { 0, 0, output_4704 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_shifted_offset_z_uv4si },
    &operand_data[4788],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7473 */
  {
    "mve_vldrhq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4705 },
#else
    { 0, 0, output_4705 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_sv8hi },
    &operand_data[4792],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7473 */
  {
    "mve_vldrhq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4706 },
#else
    { 0, 0, output_4706 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_uv8hi },
    &operand_data[4792],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7473 */
  {
    "mve_vldrhq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4707 },
#else
    { 0, 0, output_4707 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_sv4si },
    &operand_data[4794],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7473 */
  {
    "mve_vldrhq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4708 },
#else
    { 0, 0, output_4708 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_uv4si },
    &operand_data[4794],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7495 */
  {
    "mve_vldrhq_z_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4709 },
#else
    { 0, 0, output_4709 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_z_fv8hf },
    &operand_data[4796],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7515 */
  {
    "mve_vldrhq_z_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4710 },
#else
    { 0, 0, output_4710 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_z_sv8hi },
    &operand_data[4799],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7515 */
  {
    "mve_vldrhq_z_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4711 },
#else
    { 0, 0, output_4711 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_z_uv8hi },
    &operand_data[4799],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7515 */
  {
    "mve_vldrhq_z_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4712 },
#else
    { 0, 0, output_4712 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_z_sv4si },
    &operand_data[4802],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7515 */
  {
    "mve_vldrhq_z_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4713 },
#else
    { 0, 0, output_4713 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_z_uv4si },
    &operand_data[4802],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7538 */
  {
    "mve_vldrwq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4714 },
#else
    { 0, 0, output_4714 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_fv4sf },
    &operand_data[4805],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7557 */
  {
    "mve_vldrwq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4715 },
#else
    { 0, 0, output_4715 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_sv4si },
    &operand_data[4807],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7557 */
  {
    "mve_vldrwq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4716 },
#else
    { 0, 0, output_4716 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_uv4si },
    &operand_data[4807],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7576 */
  {
    "mve_vldrwq_z_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4717 },
#else
    { 0, 0, output_4717 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_z_fv4sf },
    &operand_data[4809],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7596 */
  {
    "mve_vldrwq_z_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4718 },
#else
    { 0, 0, output_4718 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_z_sv4si },
    &operand_data[4812],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7596 */
  {
    "mve_vldrwq_z_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4719 },
#else
    { 0, 0, output_4719 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_z_uv4si },
    &operand_data[4812],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7636 */
  {
    "mve_vldrdq_gather_base_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4720 },
#else
    { 0, 0, output_4720 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_sv2di },
    &operand_data[4815],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7636 */
  {
    "mve_vldrdq_gather_base_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4721 },
#else
    { 0, 0, output_4721 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_uv2di },
    &operand_data[4815],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7656 */
  {
    "mve_vldrdq_gather_base_z_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4722 },
#else
    { 0, 0, output_4722 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_z_sv2di },
    &operand_data[4815],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7656 */
  {
    "mve_vldrdq_gather_base_z_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4723 },
#else
    { 0, 0, output_4723 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_z_uv2di },
    &operand_data[4815],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7677 */
  {
    "mve_vldrdq_gather_offset_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4724 },
#else
    { 0, 0, output_4724 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_offset_sv2di },
    &operand_data[4819],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7677 */
  {
    "mve_vldrdq_gather_offset_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4725 },
#else
    { 0, 0, output_4725 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_offset_uv2di },
    &operand_data[4819],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7697 */
  {
    "mve_vldrdq_gather_offset_z_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4726 },
#else
    { 0, 0, output_4726 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_offset_z_sv2di },
    &operand_data[4819],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7697 */
  {
    "mve_vldrdq_gather_offset_z_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4727 },
#else
    { 0, 0, output_4727 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_offset_z_uv2di },
    &operand_data[4819],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7718 */
  {
    "mve_vldrdq_gather_shifted_offset_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4728 },
#else
    { 0, 0, output_4728 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_shifted_offset_sv2di },
    &operand_data[4819],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7718 */
  {
    "mve_vldrdq_gather_shifted_offset_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4729 },
#else
    { 0, 0, output_4729 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_shifted_offset_uv2di },
    &operand_data[4819],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7738 */
  {
    "mve_vldrdq_gather_shifted_offset_z_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4730 },
#else
    { 0, 0, output_4730 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_shifted_offset_z_sv2di },
    &operand_data[4819],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7738 */
  {
    "mve_vldrdq_gather_shifted_offset_z_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4731 },
#else
    { 0, 0, output_4731 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_shifted_offset_z_uv2di },
    &operand_data[4819],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7759 */
  {
    "mve_vldrhq_gather_offset_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4732 },
#else
    { 0, 0, output_4732 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_offset_fv8hf },
    &operand_data[4823],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7779 */
  {
    "mve_vldrhq_gather_offset_z_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4733 },
#else
    { 0, 0, output_4733 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_offset_z_fv8hf },
    &operand_data[4823],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7801 */
  {
    "mve_vldrhq_gather_shifted_offset_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4734 },
#else
    { 0, 0, output_4734 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_shifted_offset_fv8hf },
    &operand_data[4823],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7821 */
  {
    "mve_vldrhq_gather_shifted_offset_z_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4735 },
#else
    { 0, 0, output_4735 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrhq_gather_shifted_offset_z_fv8hf },
    &operand_data[4823],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7843 */
  {
    "mve_vldrwq_gather_base_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4736 },
#else
    { 0, 0, output_4736 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_fv4sf },
    &operand_data[4827],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7863 */
  {
    "mve_vldrwq_gather_base_z_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4737 },
#else
    { 0, 0, output_4737 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_z_fv4sf },
    &operand_data[4827],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7884 */
  {
    "mve_vldrwq_gather_offset_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4738 },
#else
    { 0, 0, output_4738 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_offset_fv4sf },
    &operand_data[4831],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7904 */
  {
    "mve_vldrwq_gather_offset_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4739 },
#else
    { 0, 0, output_4739 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_offset_sv4si },
    &operand_data[4834],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7904 */
  {
    "mve_vldrwq_gather_offset_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4740 },
#else
    { 0, 0, output_4740 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_offset_uv4si },
    &operand_data[4834],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7924 */
  {
    "mve_vldrwq_gather_offset_z_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4741 },
#else
    { 0, 0, output_4741 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_offset_z_fv4sf },
    &operand_data[4837],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7946 */
  {
    "mve_vldrwq_gather_offset_z_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4742 },
#else
    { 0, 0, output_4742 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_offset_z_sv4si },
    &operand_data[4841],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7946 */
  {
    "mve_vldrwq_gather_offset_z_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4743 },
#else
    { 0, 0, output_4743 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_offset_z_uv4si },
    &operand_data[4841],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7968 */
  {
    "mve_vldrwq_gather_shifted_offset_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4744 },
#else
    { 0, 0, output_4744 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_shifted_offset_fv4sf },
    &operand_data[4831],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7988 */
  {
    "mve_vldrwq_gather_shifted_offset_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4745 },
#else
    { 0, 0, output_4745 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_shifted_offset_sv4si },
    &operand_data[4834],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7988 */
  {
    "mve_vldrwq_gather_shifted_offset_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4746 },
#else
    { 0, 0, output_4746 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_shifted_offset_uv4si },
    &operand_data[4834],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8008 */
  {
    "mve_vldrwq_gather_shifted_offset_z_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4747 },
#else
    { 0, 0, output_4747 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_shifted_offset_z_fv4sf },
    &operand_data[4837],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8030 */
  {
    "mve_vldrwq_gather_shifted_offset_z_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4748 },
#else
    { 0, 0, output_4748 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_shifted_offset_z_sv4si },
    &operand_data[4841],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8030 */
  {
    "mve_vldrwq_gather_shifted_offset_z_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4749 },
#else
    { 0, 0, output_4749 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_shifted_offset_z_uv4si },
    &operand_data[4841],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8052 */
  {
    "mve_vstrhq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4750 },
#else
    { 0, 0, output_4750 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_fv8hf },
    &operand_data[4845],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8071 */
  {
    "mve_vstrhq_p_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4751 },
#else
    { 0, 0, output_4751 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_p_fv8hf },
    &operand_data[4845],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8091 */
  {
    "mve_vstrhq_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4752 },
#else
    { 0, 0, output_4752 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_p_sv8hi },
    &operand_data[4848],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8091 */
  {
    "mve_vstrhq_p_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4753 },
#else
    { 0, 0, output_4753 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_p_uv8hi },
    &operand_data[4848],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8091 */
  {
    "mve_vstrhq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4754 },
#else
    { 0, 0, output_4754 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_p_sv4si },
    &operand_data[4851],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8091 */
  {
    "mve_vstrhq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4755 },
#else
    { 0, 0, output_4755 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_p_uv4si },
    &operand_data[4851],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8128 */
  {
    "mve_vstrhq_scatter_offset_p_sv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrht.16\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_p_sv8hi_insn },
    &operand_data[4730],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8128 */
  {
    "mve_vstrhq_scatter_offset_p_uv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrht.16\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_p_uv8hi_insn },
    &operand_data[4730],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8128 */
  {
    "mve_vstrhq_scatter_offset_p_sv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrht.32\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_p_sv4si_insn },
    &operand_data[4734],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8128 */
  {
    "mve_vstrhq_scatter_offset_p_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrht.32\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_p_uv4si_insn },
    &operand_data[4734],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8157 */
  {
    "mve_vstrhq_scatter_offset_sv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrh.16\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_sv8hi_insn },
    &operand_data[4700],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8157 */
  {
    "mve_vstrhq_scatter_offset_uv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrh.16\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_uv8hi_insn },
    &operand_data[4700],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8157 */
  {
    "mve_vstrhq_scatter_offset_sv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrh.32\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_sv4si_insn },
    &operand_data[4703],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8157 */
  {
    "mve_vstrhq_scatter_offset_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrh.32\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_uv4si_insn },
    &operand_data[4703],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8188 */
  {
    "mve_vstrhq_scatter_shifted_offset_p_sv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrht.16\t%q2, [%0, %q1, uxtw #1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_p_sv8hi_insn },
    &operand_data[4730],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8188 */
  {
    "mve_vstrhq_scatter_shifted_offset_p_uv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrht.16\t%q2, [%0, %q1, uxtw #1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_p_uv8hi_insn },
    &operand_data[4730],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8188 */
  {
    "mve_vstrhq_scatter_shifted_offset_p_sv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrht.32\t%q2, [%0, %q1, uxtw #1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_p_sv4si_insn },
    &operand_data[4734],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8188 */
  {
    "mve_vstrhq_scatter_shifted_offset_p_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrht.32\t%q2, [%0, %q1, uxtw #1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_p_uv4si_insn },
    &operand_data[4734],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8218 */
  {
    "mve_vstrhq_scatter_shifted_offset_sv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrh.16\t%q2, [%0, %q1, uxtw #1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_sv8hi_insn },
    &operand_data[4700],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8218 */
  {
    "mve_vstrhq_scatter_shifted_offset_uv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrh.16\t%q2, [%0, %q1, uxtw #1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_uv8hi_insn },
    &operand_data[4700],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8218 */
  {
    "mve_vstrhq_scatter_shifted_offset_sv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrh.32\t%q2, [%0, %q1, uxtw #1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_sv4si_insn },
    &operand_data[4703],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8218 */
  {
    "mve_vstrhq_scatter_shifted_offset_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrh.32\t%q2, [%0, %q1, uxtw #1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_uv4si_insn },
    &operand_data[4703],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8232 */
  {
    "mve_vstrhq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4772 },
#else
    { 0, 0, output_4772 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_sv8hi },
    &operand_data[4848],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8232 */
  {
    "mve_vstrhq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4773 },
#else
    { 0, 0, output_4773 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_uv8hi },
    &operand_data[4848],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8232 */
  {
    "mve_vstrhq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4774 },
#else
    { 0, 0, output_4774 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_sv4si },
    &operand_data[4851],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8232 */
  {
    "mve_vstrhq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4775 },
#else
    { 0, 0, output_4775 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_uv4si },
    &operand_data[4851],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8251 */
  {
    "mve_vstrwq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4776 },
#else
    { 0, 0, output_4776 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_fv4sf },
    &operand_data[4854],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8270 */
  {
    "mve_vstrwq_p_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4777 },
#else
    { 0, 0, output_4777 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_p_fv4sf },
    &operand_data[4854],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8290 */
  {
    "mve_vstrwq_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4778 },
#else
    { 0, 0, output_4778 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_p_sv4si },
    &operand_data[4857],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8290 */
  {
    "mve_vstrwq_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4779 },
#else
    { 0, 0, output_4779 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_p_uv4si },
    &operand_data[4857],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8310 */
  {
    "mve_vstrwq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4780 },
#else
    { 0, 0, output_4780 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_sv4si },
    &operand_data[4857],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8310 */
  {
    "mve_vstrwq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4781 },
#else
    { 0, 0, output_4781 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_uv4si },
    &operand_data[4857],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8349 */
  {
    "mve_vstrdq_scatter_base_p_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4782 },
#else
    { 0, 0, output_4782 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_base_p_sv2di },
    &operand_data[4860],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8349 */
  {
    "mve_vstrdq_scatter_base_p_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4783 },
#else
    { 0, 0, output_4783 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_base_p_uv2di },
    &operand_data[4860],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8372 */
  {
    "mve_vstrdq_scatter_base_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4784 },
#else
    { 0, 0, output_4784 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_base_sv2di },
    &operand_data[4864],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8372 */
  {
    "mve_vstrdq_scatter_base_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4785 },
#else
    { 0, 0, output_4785 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_base_uv2di },
    &operand_data[4864],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8410 */
  {
    "mve_vstrdq_scatter_offset_p_sv2di_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrdt.64\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_offset_p_sv2di_insn },
    &operand_data[4867],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8410 */
  {
    "mve_vstrdq_scatter_offset_p_uv2di_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrdt.64\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_offset_p_uv2di_insn },
    &operand_data[4867],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8439 */
  {
    "mve_vstrdq_scatter_offset_sv2di_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrd.64\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_offset_sv2di_insn },
    &operand_data[4867],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8439 */
  {
    "mve_vstrdq_scatter_offset_uv2di_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrd.64\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_offset_uv2di_insn },
    &operand_data[4867],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8470 */
  {
    "mve_vstrdq_scatter_shifted_offset_p_sv2di_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrdt.64\t%q2, [%0, %q1, UXTW #3]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_shifted_offset_p_sv2di_insn },
    &operand_data[4867],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8470 */
  {
    "mve_vstrdq_scatter_shifted_offset_p_uv2di_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrdt.64\t%q2, [%0, %q1, UXTW #3]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_shifted_offset_p_uv2di_insn },
    &operand_data[4867],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8500 */
  {
    "mve_vstrdq_scatter_shifted_offset_sv2di_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrd.64\t%q2, [%0, %q1, UXTW #3]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_shifted_offset_sv2di_insn },
    &operand_data[4867],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8500 */
  {
    "mve_vstrdq_scatter_shifted_offset_uv2di_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrd.64\t%q2, [%0, %q1, UXTW #3]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_shifted_offset_uv2di_insn },
    &operand_data[4867],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8528 */
  {
    "mve_vstrhq_scatter_offset_fv8hf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrh.16\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_fv8hf_insn },
    &operand_data[4871],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8558 */
  {
    "mve_vstrhq_scatter_offset_p_fv8hf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrht.16\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_p_fv8hf_insn },
    &operand_data[4871],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8587 */
  {
    "mve_vstrhq_scatter_shifted_offset_fv8hf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrh.16\t%q2, [%0, %q1, uxtw #1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_fv8hf_insn },
    &operand_data[4871],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8618 */
  {
    "mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrht.16\t%q2, [%0, %q1, uxtw #1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn },
    &operand_data[4871],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8633 */
  {
    "mve_vstrwq_scatter_base_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4798 },
#else
    { 0, 0, output_4798 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_base_fv4sf },
    &operand_data[4875],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8655 */
  {
    "mve_vstrwq_scatter_base_p_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4799 },
#else
    { 0, 0, output_4799 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_base_p_fv4sf },
    &operand_data[4875],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8692 */
  {
    "mve_vstrwq_scatter_offset_fv4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrw.32\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_offset_fv4sf_insn },
    &operand_data[4879],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8722 */
  {
    "mve_vstrwq_scatter_offset_p_fv4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrwt.32\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_offset_p_fv4sf_insn },
    &operand_data[4879],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8753 */
  {
    "mve_vstrwq_scatter_offset_p_sv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrwt.32\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_offset_p_sv4si_insn },
    &operand_data[4734],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8753 */
  {
    "mve_vstrwq_scatter_offset_p_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrwt.32\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_offset_p_uv4si_insn },
    &operand_data[4734],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8782 */
  {
    "mve_vstrwq_scatter_offset_sv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrw.32\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_offset_sv4si_insn },
    &operand_data[4703],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8782 */
  {
    "mve_vstrwq_scatter_offset_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrw.32\t%q2, [%0, %q1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_offset_uv4si_insn },
    &operand_data[4703],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8810 */
  {
    "mve_vstrwq_scatter_shifted_offset_fv4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrw.32\t%q2, [%0, %q1, uxtw #2]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_shifted_offset_fv4sf_insn },
    &operand_data[4879],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8841 */
  {
    "mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrwt.32\t%q2, [%0, %q1, uxtw #2]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn },
    &operand_data[4879],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8873 */
  {
    "mve_vstrwq_scatter_shifted_offset_p_sv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrwt.32\t%q2, [%0, %q1, uxtw #2]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_shifted_offset_p_sv4si_insn },
    &operand_data[4734],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8873 */
  {
    "mve_vstrwq_scatter_shifted_offset_p_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvstrwt.32\t%q2, [%0, %q1, uxtw #2]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_shifted_offset_p_uv4si_insn },
    &operand_data[4734],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8903 */
  {
    "mve_vstrwq_scatter_shifted_offset_sv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrw.32\t%q2, [%0, %q1, uxtw #2]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_shifted_offset_sv4si_insn },
    &operand_data[4703],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8903 */
  {
    "mve_vstrwq_scatter_shifted_offset_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrw.32\t%q2, [%0, %q1, uxtw #2]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_shifted_offset_uv4si_insn },
    &operand_data[4703],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8917 */
  {
    "mve_vaddqv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i%#8  %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddqv16qi },
    &operand_data[1810],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8917 */
  {
    "mve_vaddqv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i%#16  %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddqv8hi },
    &operand_data[1816],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8917 */
  {
    "mve_vaddqv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.i%#32  %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddqv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8931 */
  {
    "mve_vaddq_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.f%#16 %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_fv8hf },
    &operand_data[1828],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8931 */
  {
    "mve_vaddq_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd.f%#32 %q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vaddq_fv4sf },
    &operand_data[1834],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8962 */
  {
    "mve_vidupq_uv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vidup.u%#8\t%q0, %1, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vidupq_uv16qi_insn },
    &operand_data[4883],
    5,
    5,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8962 */
  {
    "mve_vidupq_uv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vidup.u%#16\t%q0, %1, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vidupq_uv8hi_insn },
    &operand_data[4888],
    5,
    5,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8962 */
  {
    "mve_vidupq_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vidup.u%#32\t%q0, %1, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vidupq_uv4si_insn },
    &operand_data[4893],
    5,
    5,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8996 */
  {
    "mve_vidupq_m_wb_uv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\t\tvidupt.u%#8\t%q0, %2, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vidupq_m_wb_uv16qi_insn },
    &operand_data[4898],
    7,
    7,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8996 */
  {
    "mve_vidupq_m_wb_uv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\t\tvidupt.u%#16\t%q0, %2, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vidupq_m_wb_uv8hi_insn },
    &operand_data[4905],
    7,
    7,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8996 */
  {
    "mve_vidupq_m_wb_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\t\tvidupt.u%#32\t%q0, %2, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vidupq_m_wb_uv4si_insn },
    &operand_data[4912],
    7,
    7,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9030 */
  {
    "mve_vddupq_uv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vddup.u%#8  %q0, %1, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vddupq_uv16qi_insn },
    &operand_data[4919],
    5,
    5,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9030 */
  {
    "mve_vddupq_uv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vddup.u%#16  %q0, %1, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vddupq_uv8hi_insn },
    &operand_data[4924],
    5,
    5,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9030 */
  {
    "mve_vddupq_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vddup.u%#32  %q0, %1, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vddupq_uv4si_insn },
    &operand_data[4929],
    5,
    5,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9064 */
  {
    "mve_vddupq_m_wb_uv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\t\tvddupt.u%#8\t%q0, %2, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vddupq_m_wb_uv16qi_insn },
    &operand_data[4898],
    7,
    7,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9064 */
  {
    "mve_vddupq_m_wb_uv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\t\tvddupt.u%#16\t%q0, %2, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vddupq_m_wb_uv8hi_insn },
    &operand_data[4905],
    7,
    7,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9064 */
  {
    "mve_vddupq_m_wb_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\t\tvddupt.u%#32\t%q0, %2, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vddupq_m_wb_uv4si_insn },
    &operand_data[4912],
    7,
    7,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9116 */
  {
    "mve_vdwdupq_wb_uv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdwdup.u%#8\t%q0, %2, %R3, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_wb_uv16qi_insn },
    &operand_data[4934],
    5,
    5,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9116 */
  {
    "mve_vdwdupq_wb_uv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdwdup.u%#16\t%q0, %2, %R3, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_wb_uv8hi_insn },
    &operand_data[4939],
    5,
    5,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9116 */
  {
    "mve_vdwdupq_wb_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdwdup.u%#32\t%q0, %2, %R3, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_wb_uv4si_insn },
    &operand_data[4944],
    5,
    5,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9174 */
  {
    "mve_vdwdupq_m_wb_uv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\t\tvdwdupt.u%#8\t%q2, %3, %R4, %5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_m_wb_uv16qi_insn },
    &operand_data[4949],
    7,
    7,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9174 */
  {
    "mve_vdwdupq_m_wb_uv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\t\tvdwdupt.u%#16\t%q2, %3, %R4, %5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_m_wb_uv8hi_insn },
    &operand_data[4956],
    7,
    7,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9174 */
  {
    "mve_vdwdupq_m_wb_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\t\tvdwdupt.u%#32\t%q2, %3, %R4, %5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_m_wb_uv4si_insn },
    &operand_data[4963],
    7,
    7,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9233 */
  {
    "mve_viwdupq_wb_uv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "viwdup.u%#8\t%q0, %2, %R3, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_wb_uv16qi_insn },
    &operand_data[4934],
    5,
    5,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9233 */
  {
    "mve_viwdupq_wb_uv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "viwdup.u%#16\t%q0, %2, %R3, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_wb_uv8hi_insn },
    &operand_data[4939],
    5,
    5,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9233 */
  {
    "mve_viwdupq_wb_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "viwdup.u%#32\t%q0, %2, %R3, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_wb_uv4si_insn },
    &operand_data[4944],
    5,
    5,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9291 */
  {
    "mve_viwdupq_m_wb_uv16qi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\t\tviwdupt.u%#8\t%q2, %3, %R4, %5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_m_wb_uv16qi_insn },
    &operand_data[4949],
    7,
    7,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9291 */
  {
    "mve_viwdupq_m_wb_uv8hi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\t\tviwdupt.u%#16\t%q2, %3, %R4, %5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_m_wb_uv8hi_insn },
    &operand_data[4956],
    7,
    7,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9291 */
  {
    "mve_viwdupq_m_wb_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\t\tviwdupt.u%#32\t%q2, %3, %R4, %5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_m_wb_uv4si_insn },
    &operand_data[4963],
    7,
    7,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9315 */
  {
    "mve_vstrwq_scatter_base_wb_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4841 },
#else
    { 0, 0, output_4841 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_base_wb_sv4si },
    &operand_data[4970],
    4,
    4,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9315 */
  {
    "mve_vstrwq_scatter_base_wb_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4842 },
#else
    { 0, 0, output_4842 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_base_wb_uv4si },
    &operand_data[4970],
    4,
    4,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9340 */
  {
    "mve_vstrwq_scatter_base_wb_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4843 },
#else
    { 0, 0, output_4843 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_base_wb_p_sv4si },
    &operand_data[4970],
    5,
    5,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9340 */
  {
    "mve_vstrwq_scatter_base_wb_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4844 },
#else
    { 0, 0, output_4844 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_base_wb_p_uv4si },
    &operand_data[4970],
    5,
    5,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9366 */
  {
    "mve_vstrwq_scatter_base_wb_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4845 },
#else
    { 0, 0, output_4845 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_base_wb_fv4sf },
    &operand_data[4975],
    4,
    4,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9391 */
  {
    "mve_vstrwq_scatter_base_wb_p_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4846 },
#else
    { 0, 0, output_4846 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_base_wb_p_fv4sf },
    &operand_data[4975],
    5,
    5,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9417 */
  {
    "mve_vstrdq_scatter_base_wb_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4847 },
#else
    { 0, 0, output_4847 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_base_wb_sv2di },
    &operand_data[4980],
    4,
    4,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9417 */
  {
    "mve_vstrdq_scatter_base_wb_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4848 },
#else
    { 0, 0, output_4848 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_base_wb_uv2di },
    &operand_data[4980],
    4,
    4,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9442 */
  {
    "mve_vstrdq_scatter_base_wb_p_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4849 },
#else
    { 0, 0, output_4849 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_base_wb_p_sv2di },
    &operand_data[4984],
    5,
    5,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9442 */
  {
    "mve_vstrdq_scatter_base_wb_p_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4850 },
#else
    { 0, 0, output_4850 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_base_wb_p_uv2di },
    &operand_data[4984],
    5,
    5,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9496 */
  {
    "mve_vldrwq_gather_base_wb_sv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4851 },
#else
    { 0, 0, output_4851 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_wb_sv4si_insn },
    &operand_data[4989],
    4,
    4,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9496 */
  {
    "mve_vldrwq_gather_base_wb_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4852 },
#else
    { 0, 0, output_4852 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_wb_uv4si_insn },
    &operand_data[4989],
    4,
    4,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9551 */
  {
    "mve_vldrwq_gather_base_wb_z_sv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4853 },
#else
    { 0, 0, output_4853 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_wb_z_sv4si_insn },
    &operand_data[4989],
    5,
    5,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9551 */
  {
    "mve_vldrwq_gather_base_wb_z_uv4si_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4854 },
#else
    { 0, 0, output_4854 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_wb_z_uv4si_insn },
    &operand_data[4989],
    5,
    5,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9604 */
  {
    "mve_vldrwq_gather_base_wb_fv4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4855 },
#else
    { 0, 0, output_4855 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_wb_fv4sf_insn },
    &operand_data[4994],
    4,
    4,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9660 */
  {
    "mve_vldrwq_gather_base_wb_z_fv4sf_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4856 },
#else
    { 0, 0, output_4856 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_wb_z_fv4sf_insn },
    &operand_data[4994],
    5,
    5,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9714 */
  {
    "mve_vldrdq_gather_base_wb_sv2di_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4857 },
#else
    { 0, 0, output_4857 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_wb_sv2di_insn },
    &operand_data[4999],
    4,
    4,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9714 */
  {
    "mve_vldrdq_gather_base_wb_uv2di_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4858 },
#else
    { 0, 0, output_4858 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_wb_uv2di_insn },
    &operand_data[4999],
    4,
    4,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9767 */
  {
    "get_fpscr_nzcvqc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmrs\t%0, FPSCR_nzcvqc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_get_fpscr_nzcvqc },
    &operand_data[29],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9774 */
  {
    "set_fpscr_nzcvqc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmsr\tFPSCR_nzcvqc, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_set_fpscr_nzcvqc },
    &operand_data[30],
    1,
    1,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9785 */
  {
    "mve_vldrdq_gather_base_wb_z_sv2di_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4861 },
#else
    { 0, 0, output_4861 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_wb_z_sv2di_insn },
    &operand_data[4999],
    5,
    5,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9785 */
  {
    "mve_vldrdq_gather_base_wb_z_uv2di_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4862 },
#else
    { 0, 0, output_4862 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_wb_z_uv2di_insn },
    &operand_data[4999],
    5,
    5,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9809 */
  {
    "mve_vadciq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvadcit.i32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vadciq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9809 */
  {
    "mve_vadciq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvadcit.i32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vadciq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9828 */
  {
    "mve_vadciq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadci.i32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vadciq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9828 */
  {
    "mve_vadciq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadci.i32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vadciq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9845 */
  {
    "mve_vadcq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvadct.i32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vadcq_m_uv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9845 */
  {
    "mve_vadcq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvadct.i32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vadcq_m_sv4si },
    &operand_data[4476],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9864 */
  {
    "mve_vadcq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadc.i32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vadcq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9864 */
  {
    "mve_vadcq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadc.i32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vadcq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9882 */
  {
    "mve_vsbciq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsbcit.i32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsbciq_m_uv4si },
    &operand_data[5004],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9882 */
  {
    "mve_vsbciq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsbcit.i32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsbciq_m_sv4si },
    &operand_data[5004],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9901 */
  {
    "mve_vsbciq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsbci.i32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsbciq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9901 */
  {
    "mve_vsbciq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsbci.i32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsbciq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9918 */
  {
    "mve_vsbcq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsbct.i32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsbcq_m_uv4si },
    &operand_data[5004],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9918 */
  {
    "mve_vsbcq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvsbct.i32\t%q0, %q2, %q3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsbcq_m_sv4si },
    &operand_data[5004],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9937 */
  {
    "mve_vsbcq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsbc.i32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsbcq_uv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9937 */
  {
    "mve_vsbcq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsbc.i32\t%q0, %q1, %q2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vsbcq_sv4si },
    &operand_data[1822],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9954 */
  {
    "mve_vst2qv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4879 },
#else
    { 0, 0, output_4879 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst2qv16qi },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9954 */
  {
    "mve_vst2qv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4880 },
#else
    { 0, 0, output_4880 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst2qv8hi },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9954 */
  {
    "mve_vst2qv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4881 },
#else
    { 0, 0, output_4881 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst2qv4si },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9954 */
  {
    "mve_vst2qv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4882 },
#else
    { 0, 0, output_4882 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst2qv8hf },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9954 */
  {
    "mve_vst2qv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4883 },
#else
    { 0, 0, output_4883 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst2qv4sf },
    &operand_data[3054],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9982 */
  {
    "mve_vld2qv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4884 },
#else
    { 0, 0, output_4884 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld2qv16qi },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9982 */
  {
    "mve_vld2qv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4885 },
#else
    { 0, 0, output_4885 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld2qv8hi },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9982 */
  {
    "mve_vld2qv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4886 },
#else
    { 0, 0, output_4886 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld2qv4si },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9982 */
  {
    "mve_vld2qv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4887 },
#else
    { 0, 0, output_4887 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld2qv8hf },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9982 */
  {
    "mve_vld2qv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4888 },
#else
    { 0, 0, output_4888 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld2qv4sf },
    &operand_data[3002],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10010 */
  {
    "mve_vld4qv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4889 },
#else
    { 0, 0, output_4889 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld4qv16qi },
    &operand_data[5009],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10010 */
  {
    "mve_vld4qv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4890 },
#else
    { 0, 0, output_4890 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld4qv8hi },
    &operand_data[5009],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10010 */
  {
    "mve_vld4qv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4891 },
#else
    { 0, 0, output_4891 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld4qv4si },
    &operand_data[5009],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10010 */
  {
    "mve_vld4qv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4892 },
#else
    { 0, 0, output_4892 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld4qv8hf },
    &operand_data[5009],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10010 */
  {
    "mve_vld4qv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4893 },
#else
    { 0, 0, output_4893 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld4qv4sf },
    &operand_data[5009],
    2,
    2,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10041 */
  {
    "mve_vec_extractv16qiqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4894 },
#else
    { 0, 0, output_4894 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vec_extractv16qiqi },
    &operand_data[5011],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10041 */
  {
    "mve_vec_extractv8hihi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4895 },
#else
    { 0, 0, output_4895 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vec_extractv8hihi },
    &operand_data[5014],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10041 */
  {
    "mve_vec_extractv4sisi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4896 },
#else
    { 0, 0, output_4896 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vec_extractv4sisi },
    &operand_data[5017],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10041 */
  {
    "mve_vec_extractv8hfhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4897 },
#else
    { 0, 0, output_4897 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vec_extractv8hfhf },
    &operand_data[5020],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10041 */
  {
    "mve_vec_extractv4sfsf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4898 },
#else
    { 0, 0, output_4898 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vec_extractv4sfsf },
    &operand_data[5023],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10059 */
  {
    "mve_vec_extractv2didi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4899 },
#else
    { 0, 0, output_4899 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vec_extractv2didi },
    &operand_data[5026],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10077 */
  {
    "*mve_vec_extract_sext_internalv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4900 },
#else
    { 0, 0, output_4900 },
#endif
    { 0 },
    &operand_data[2357],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10077 */
  {
    "*mve_vec_extract_sext_internalv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4901 },
#else
    { 0, 0, output_4901 },
#endif
    { 0 },
    &operand_data[2360],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10077 */
  {
    "*mve_vec_extract_sext_internalv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4902 },
#else
    { 0, 0, output_4902 },
#endif
    { 0 },
    &operand_data[2366],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10096 */
  {
    "*mve_vec_extract_zext_internalv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4903 },
#else
    { 0, 0, output_4903 },
#endif
    { 0 },
    &operand_data[2357],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10096 */
  {
    "*mve_vec_extract_zext_internalv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4904 },
#else
    { 0, 0, output_4904 },
#endif
    { 0 },
    &operand_data[2360],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10096 */
  {
    "*mve_vec_extract_zext_internalv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4905 },
#else
    { 0, 0, output_4905 },
#endif
    { 0 },
    &operand_data[2366],
    3,
    3,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10118 */
  {
    "mve_vec_setv16qi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4906 },
#else
    { 0, 0, output_4906 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vec_setv16qi_internal },
    &operand_data[5029],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10118 */
  {
    "mve_vec_setv8hi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4907 },
#else
    { 0, 0, output_4907 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vec_setv8hi_internal },
    &operand_data[5033],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10118 */
  {
    "mve_vec_setv8hf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4908 },
#else
    { 0, 0, output_4908 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vec_setv8hf_internal },
    &operand_data[5037],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10118 */
  {
    "mve_vec_setv4si_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4909 },
#else
    { 0, 0, output_4909 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vec_setv4si_internal },
    &operand_data[5041],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10118 */
  {
    "mve_vec_setv4sf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4910 },
#else
    { 0, 0, output_4910 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vec_setv4sf_internal },
    &operand_data[5045],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10137 */
  {
    "mve_vec_setv2di_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_4911 },
#else
    { 0, 0, output_4911 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vec_setv2di_internal },
    &operand_data[5049],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10160 */
  {
    "mve_uqrshll_sat64_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqrshll%?\t%Q1, %R1, #64, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_uqrshll_sat64_di },
    &operand_data[5053],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10160 */
  {
    "mve_uqrshll_sat48_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqrshll%?\t%Q1, %R1, #48, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_uqrshll_sat48_di },
    &operand_data[5053],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10172 */
  {
    "mve_sqrshrl_sat64_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sqrshrl%?\t%Q1, %R1, #64, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_sqrshrl_sat64_di },
    &operand_data[5053],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10172 */
  {
    "mve_sqrshrl_sat48_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sqrshrl%?\t%Q1, %R1, #48, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_sqrshrl_sat48_di },
    &operand_data[5053],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10184 */
  {
    "mve_uqrshl_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqrshl%?\t%1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_uqrshl_si },
    &operand_data[5056],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10196 */
  {
    "mve_sqrshr_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sqrshr%?\t%1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_sqrshr_si },
    &operand_data[5056],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10208 */
  {
    "mve_uqshll_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqshll%?\t%Q1, %R1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_uqshll_di },
    &operand_data[5059],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10219 */
  {
    "mve_urshrl_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "urshrl%?\t%Q1, %R1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_urshrl_di },
    &operand_data[5059],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10231 */
  {
    "mve_uqshl_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqshl%?\t%1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_uqshl_si },
    &operand_data[5062],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10242 */
  {
    "mve_urshr_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "urshr%?\t%1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_urshr_si },
    &operand_data[5062],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10254 */
  {
    "mve_sqshl_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sqshl%?\t%1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_sqshl_si },
    &operand_data[5065],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10265 */
  {
    "mve_srshr_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "srshr%?\t%1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_srshr_si },
    &operand_data[5065],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10277 */
  {
    "mve_srshrl_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "srshrl%?\t%Q1, %R1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_srshrl_di },
    &operand_data[5059],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10289 */
  {
    "mve_sqshll_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sqshll%?\t%Q1, %R1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_sqshll_di },
    &operand_data[5059],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10332 */
  {
    "mve_vshlcq_m_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlct\t%q0, %1, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_sv16qi },
    &operand_data[5068],
    6,
    6,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10332 */
  {
    "mve_vshlcq_m_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlct\t%q0, %1, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_uv16qi },
    &operand_data[5068],
    6,
    6,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10332 */
  {
    "mve_vshlcq_m_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlct\t%q0, %1, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_sv8hi },
    &operand_data[5074],
    6,
    6,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10332 */
  {
    "mve_vshlcq_m_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlct\t%q0, %1, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_uv8hi },
    &operand_data[5074],
    6,
    6,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10332 */
  {
    "mve_vshlcq_m_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlct\t%q0, %1, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_sv4si },
    &operand_data[5080],
    6,
    6,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10332 */
  {
    "mve_vshlcq_m_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvshlct\t%q0, %1, %4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_uv4si },
    &operand_data[5080],
    6,
    6,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10353 */
  {
    "arm_vcx1qv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx1\tp%c1, %q0, #%c2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx1qv16qi },
    &operand_data[5086],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10363 */
  {
    "arm_vcx1qav16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx1a\tp%c1, %q0, #%c3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx1qav16qi },
    &operand_data[5089],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10374 */
  {
    "arm_vcx2qv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx2\tp%c1, %q0, %q2, #%c3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx2qv16qi },
    &operand_data[5093],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10385 */
  {
    "arm_vcx2qav16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx2a\tp%c1, %q0, %q3, #%c4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx2qav16qi },
    &operand_data[5097],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10397 */
  {
    "arm_vcx3qv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx3\tp%c1, %q0, %q2, %q3, #%c4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx3qv16qi },
    &operand_data[5102],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10409 */
  {
    "arm_vcx3qav16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcx3a\tp%c1, %q0, %q3, %q4, #%c5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx3qav16qi },
    &operand_data[5107],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10422 */
  {
    "arm_vcx1q_p_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcx1t\tp%c1, %q0, #%c3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx1q_p_v16qi },
    &operand_data[5113],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10422 */
  {
    "arm_vcx1qa_p_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcx1at\tp%c1, %q0, #%c3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx1qa_p_v16qi },
    &operand_data[5113],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10435 */
  {
    "arm_vcx2q_p_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcx2t\tp%c1, %q0, %q3, #%c4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx2q_p_v16qi },
    &operand_data[5118],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10435 */
  {
    "arm_vcx2qa_p_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcx2at\tp%c1, %q0, %q3, #%c4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx2qa_p_v16qi },
    &operand_data[5118],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10449 */
  {
    "arm_vcx3q_p_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcx3t\tp%c1, %q0, %q3, %q4, #%c5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx3q_p_v16qi },
    &operand_data[5124],
    7,
    7,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10449 */
  {
    "arm_vcx3qa_p_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vpst\n\tvcx3at\tp%c1, %q0, %q3, %q4, #%c5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcx3qa_p_v16qi },
    &operand_data[5124],
    7,
    7,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10464 */
  {
    "*movmisalignv16qi_mve_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrb.8\t%q1, %E0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[5131],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10464 */
  {
    "*movmisalignv8hi_mve_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrh.16\t%q1, %E0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[5133],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10464 */
  {
    "*movmisalignv4si_mve_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrw.32\t%q1, %E0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[5135],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10464 */
  {
    "*movmisalignv8hf_mve_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrh.16\t%q1, %E0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[5137],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10464 */
  {
    "*movmisalignv4sf_mve_store",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vstrw.32\t%q1, %E0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[5139],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10476 */
  {
    "*movmisalignv16qi_mve_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vldrb.8\t%q0, %E1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[5141],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10476 */
  {
    "*movmisalignv8hi_mve_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vldrh.16\t%q0, %E1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[5143],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10476 */
  {
    "*movmisalignv4si_mve_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vldrw.32\t%q0, %E1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[5145],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10476 */
  {
    "*movmisalignv8hf_mve_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vldrh.16\t%q0, %E1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[5147],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10476 */
  {
    "*movmisalignv4sf_mve_load",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vldrw.32\t%q0, %E1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[5149],
    2,
    2,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:476 */
  {
    "adddi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_adddi3 },
    &operand_data[5151],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:531 */
  {
    "addvsi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addvsi4 },
    &operand_data[5154],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:547 */
  {
    "addvdi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addvdi4 },
    &operand_data[5158],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:591 */
  {
    "addsi3_cin_vout_reg",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsi3_cin_vout_reg },
    &operand_data[5162],
    3,
    3,
    8,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:637 */
  {
    "addsi3_cin_vout_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsi3_cin_vout_imm },
    &operand_data[5163],
    3,
    3,
    8,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:681 */
  {
    "addsi3_cin_vout_0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsi3_cin_vout_0 },
    &operand_data[5154],
    2,
    2,
    6,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:715 */
  {
    "uaddvsi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_uaddvsi4 },
    &operand_data[5154],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:728 */
  {
    "uaddvdi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_uaddvdi4 },
    &operand_data[5158],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:772 */
  {
    "addsi3_cin_cout_reg",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsi3_cin_cout_reg },
    &operand_data[5162],
    3,
    3,
    5,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:815 */
  {
    "addsi3_cin_cout_imm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsi3_cin_cout_imm },
    &operand_data[5166],
    3,
    3,
    5,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:858 */
  {
    "addsi3_cin_cout_0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsi3_cin_cout_0 },
    &operand_data[5154],
    2,
    2,
    4,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:890 */
  {
    "addsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsi3 },
    &operand_data[5169],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1396 */
  {
    "subvsi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subvsi4 },
    &operand_data[5172],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1434 */
  {
    "subvdi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subvdi4 },
    &operand_data[5176],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1514 */
  {
    "usubvsi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usubvsi4 },
    &operand_data[5172],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1551 */
  {
    "usubvdi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usubvdi4 },
    &operand_data[5176],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1887 */
  {
    "addsf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addsf3 },
    &operand_data[5180],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1895 */
  {
    "adddf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_adddf3 },
    &operand_data[5183],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1903 */
  {
    "subdi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subdi3 },
    &operand_data[5186],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1973 */
  {
    "subsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subsi3 },
    &operand_data[5170],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2200 */
  {
    "subsf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subsf3 },
    &operand_data[5180],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2208 */
  {
    "subdf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subdf3 },
    &operand_data[5183],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2219 */
  {
    "mulhi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulhi3 },
    &operand_data[5189],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2233 */
  {
    "mulsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulsi3 },
    &operand_data[5162],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2405 */
  {
    "mulsidi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulsidi3 },
    &operand_data[5192],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2405 */
  {
    "umulsidi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_umulsidi3 },
    &operand_data[5192],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2436 */
  {
    "maddsidi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_maddsidi4 },
    &operand_data[5192],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2436 */
  {
    "umaddsidi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_umaddsidi4 },
    &operand_data[5192],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2477 */
  {
    "smulsi3_highpart",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smulsi3_highpart },
    &operand_data[5196],
    3,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2477 */
  {
    "umulsi3_highpart",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_umulsi3_highpart },
    &operand_data[5196],
    3,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2559 */
  {
    "maddhisi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_maddhisi4 },
    &operand_data[5200],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2609 */
  {
    "arm_smlabb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlabb },
    &operand_data[5203],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2657 */
  {
    "arm_smlatb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlatb },
    &operand_data[5203],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2707 */
  {
    "arm_smlatt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlatt },
    &operand_data[5203],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2783 */
  {
    "arm_smlawb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlawb },
    &operand_data[5203],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2783 */
  {
    "arm_smlawt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlawt },
    &operand_data[5203],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2802 */
  {
    "mulsf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulsf3 },
    &operand_data[5180],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2810 */
  {
    "muldf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_muldf3 },
    &operand_data[5183],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2820 */
  {
    "divsf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_divsf3 },
    &operand_data[5180],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2827 */
  {
    "divdf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_divdf3 },
    &operand_data[5183],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2839 */
  {
    "anddi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_anddi3 },
    &operand_data[5207],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2839 */
  {
    "iordi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iordi3 },
    &operand_data[5210],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2839 */
  {
    "xordi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xordi3 },
    &operand_data[5213],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2859 */
  {
    "one_cmpldi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmpldi2 },
    &operand_data[5151],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2919 */
  {
    "andsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andsi3 },
    &operand_data[5169],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3272 */
  {
    "insv",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_insv },
    &operand_data[5216],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3594 */
  {
    "iorsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorsi3 },
    &operand_data[5169],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3702 */
  {
    "xorsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorsi3 },
    &operand_data[5169],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3942 */
  {
    "smaxsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smaxsi3 },
    &operand_data[5220],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4002 */
  {
    "sminsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sminsi3 },
    &operand_data[5220],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4052 */
  {
    "umaxsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_umaxsi3 },
    &operand_data[5220],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4085 */
  {
    "uminsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_uminsi3 },
    &operand_data[5220],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4238 */
  {
    "arm_qadd",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_qadd },
    &operand_data[5162],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4238 */
  {
    "arm_qsub",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_qsub },
    &operand_data[5162],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4268 */
  {
    "arm_ssat",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_ssat },
    &operand_data[5223],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4291 */
  {
    "arm_usat",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_usat },
    &operand_data[5223],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4333 */
  {
    "arm_saturation_occurred",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_saturation_occurred },
    &operand_data[790],
    1,
    1,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4346 */
  {
    "arm_set_saturation",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_set_saturation },
    &operand_data[5171],
    1,
    1,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4491 */
  {
    "ashldi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashldi3 },
    &operand_data[5226],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4520 */
  {
    "ashlsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashlsi3 },
    &operand_data[5220],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4535 */
  {
    "ashrdi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashrdi3 },
    &operand_data[5226],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4558 */
  {
    "ashrsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ashrsi3 },
    &operand_data[5220],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4570 */
  {
    "lshrdi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lshrdi3 },
    &operand_data[5226],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4593 */
  {
    "lshrsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_lshrsi3 },
    &operand_data[5220],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4608 */
  {
    "rotlsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rotlsi3 },
    &operand_data[5169],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4625 */
  {
    "rotrsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_rotrsi3 },
    &operand_data[5220],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4735 */
  {
    "extzv",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_extzv },
    &operand_data[5229],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4816 */
  {
    "extzv_t1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_extzv_t1 },
    &operand_data[5233],
    5,
    5,
    1,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4826 */
  {
    "extv",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_extv },
    &operand_data[5229],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4887 */
  {
    "extv_regsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_extv_regsi },
    &operand_data[5237],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5055 */
  {
    "negvsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negvsi3 },
    &operand_data[5241],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5055 */
  {
    "negvdi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negvdi3 },
    &operand_data[5244],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5066 */
  {
    "negsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negsi2 },
    &operand_data[5154],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5117 */
  {
    "negsf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negsf2 },
    &operand_data[5180],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5124 */
  {
    "negdf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negdf2 },
    &operand_data[5183],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5135 */
  {
    "abssi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_abssi2 },
    &operand_data[5154],
    2,
    2,
    1,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5265 */
  {
    "abssf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_abssf2 },
    &operand_data[5180],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5271 */
  {
    "absdf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_absdf2 },
    &operand_data[5183],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5277 */
  {
    "sqrtsf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sqrtsf2 },
    &operand_data[5180],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5283 */
  {
    "sqrtdf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sqrtdf2 },
    &operand_data[5183],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5289 */
  {
    "one_cmplsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplsi2 },
    &operand_data[5154],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5333 */
  {
    "floatsihf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_floatsihf2 },
    &operand_data[5247],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5347 */
  {
    "floatdihf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_floatdihf2 },
    &operand_data[5249],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5361 */
  {
    "floatsisf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_floatsisf2 },
    &operand_data[5251],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5368 */
  {
    "floatsidf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_floatsidf2 },
    &operand_data[5253],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5375 */
  {
    "fix_trunchfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fix_trunchfsi2 },
    &operand_data[5248],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5387 */
  {
    "fix_trunchfdi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fix_trunchfdi2 },
    &operand_data[5255],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5399 */
  {
    "fix_truncsfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fix_truncsfsi2 },
    &operand_data[5257],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5406 */
  {
    "fix_truncdfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_fix_truncdfsi2 },
    &operand_data[5252],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5415 */
  {
    "truncdfsf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_truncdfsf2 },
    &operand_data[5182],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5430 */
  {
    "truncdfhf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_truncdfhf2 },
    &operand_data[5259],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5455 */
  {
    "zero_extendqidi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_zero_extendqidi2 },
    &operand_data[5261],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5455 */
  {
    "zero_extendhidi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_zero_extendhidi2 },
    &operand_data[5263],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5455 */
  {
    "zero_extendsidi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_zero_extendsidi2 },
    &operand_data[5192],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5485 */
  {
    "extendqidi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_extendqidi2 },
    &operand_data[5265],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5485 */
  {
    "extendhidi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_extendhidi2 },
    &operand_data[5263],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5485 */
  {
    "extendsidi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_extendsidi2 },
    &operand_data[5192],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5552 */
  {
    "zero_extendhisi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_zero_extendhisi2 },
    &operand_data[5267],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5614 */
  {
    "zero_extendqisi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_zero_extendqisi2 },
    &operand_data[5269],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5736 */
  {
    "extendhisi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_extendhisi2 },
    &operand_data[5267],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5775 */
  {
    "extendhisi2_mem",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_extendhisi2_mem },
    &operand_data[5271],
    2,
    2,
    7,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5854 */
  {
    "extendqihi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_extendqihi2 },
    &operand_data[5273],
    2,
    2,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5887 */
  {
    "extendqisi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_extendqisi2 },
    &operand_data[5275],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6013 */
  {
    "arm_smlad",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlad },
    &operand_data[5203],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6013 */
  {
    "arm_smladx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smladx },
    &operand_data[5203],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6013 */
  {
    "arm_smlsd",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlsd },
    &operand_data[5203],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6013 */
  {
    "arm_smlsdx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smlsdx },
    &operand_data[5203],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6041 */
  {
    "arm_smuad",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smuad },
    &operand_data[5162],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6041 */
  {
    "arm_smuadx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_smuadx },
    &operand_data[5162],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6068 */
  {
    "arm_ssat16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_ssat16 },
    &operand_data[5277],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6068 */
  {
    "arm_usat16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_usat16 },
    &operand_data[5280],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6096 */
  {
    "extendsfdf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_extendsfdf2 },
    &operand_data[5283],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6108 */
  {
    "extendhfdf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_extendhfdf2 },
    &operand_data[5285],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6188 */
  {
    "movdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movdi },
    &operand_data[5287],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6364 */
  {
    "movsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movsi },
    &operand_data[5289],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6557 */
  {
    "calculate_pic_address",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_calculate_pic_address },
    &operand_data[5291],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6709 */
  {
    "builtin_setjmp_receiver",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_builtin_setjmp_receiver },
    &operand_data[442],
    1,
    1,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6752 */
  {
    "storehi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_storehi },
    &operand_data[504],
    2,
    2,
    4,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6780 */
  {
    "storehi_bigend",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_storehi_bigend },
    &operand_data[504],
    2,
    2,
    4,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6806 */
  {
    "storeinthi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_storeinthi },
    &operand_data[504],
    2,
    2,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6853 */
  {
    "storehi_single_op",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_storehi_single_op },
    &operand_data[5294],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6863 */
  {
    "movhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movhi },
    &operand_data[5295],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7055 */
  {
    "movhi_bytes",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movhi_bytes },
    &operand_data[5271],
    2,
    2,
    5,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7089 */
  {
    "movhi_bigend",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movhi_bigend },
    &operand_data[5297],
    2,
    2,
    4,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7150 */
  {
    "reload_outhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reload_outhi },
    &operand_data[5299],
    3,
    3,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7163 */
  {
    "reload_inhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reload_inhi },
    &operand_data[5302],
    3,
    3,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7176 */
  {
    "movqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movqi },
    &operand_data[5305],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7274 */
  {
    "movhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movhf },
    &operand_data[5307],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7274 */
  {
    "movbf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movbf },
    &operand_data[5309],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7342 */
  {
    "movsf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movsf },
    &operand_data[5311],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7439 */
  {
    "movdf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movdf },
    &operand_data[5313],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7480 */
  {
    "reload_outdf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reload_outdf },
    &operand_data[5315],
    3,
    3,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7574 */
  {
    "load_multiple",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_load_multiple },
    &operand_data[5318],
    3,
    3,
    1,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7599 */
  {
    "store_multiple",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_store_multiple },
    &operand_data[5318],
    3,
    3,
    1,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7625 */
  {
    "setmemsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_setmemsi },
    &operand_data[5321],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7643 */
  {
    "cpymemqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cpymemqi },
    &operand_data[5325],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7700 */
  {
    "cbranchsi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cbranchsi4 },
    &operand_data[5329],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7727 */
  {
    "cbranchsf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cbranchsf4 },
    &operand_data[5333],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7739 */
  {
    "cbranchdf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cbranchdf4 },
    &operand_data[5337],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7751 */
  {
    "cbranchdi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cbranchdi4 },
    &operand_data[5341],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7849 */
  {
    "cbranch_cc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cbranch_cc },
    &operand_data[5345],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7975 */
  {
    "cstore_cc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cstore_cc },
    &operand_data[5349],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8051 */
  {
    "cstoresi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cstoresi4 },
    &operand_data[5353],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8187 */
  {
    "cstorehf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cstorehf4 },
    &operand_data[5357],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8205 */
  {
    "cstoresf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cstoresf4 },
    &operand_data[5361],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8215 */
  {
    "cstoredf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cstoredf4 },
    &operand_data[5365],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8225 */
  {
    "cstoredi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cstoredi4 },
    &operand_data[5369],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8245 */
  {
    "movsicc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movsicc },
    &operand_data[5373],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8267 */
  {
    "movhfcc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movhfcc },
    &operand_data[5377],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8289 */
  {
    "movsfcc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movsfcc },
    &operand_data[5381],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8311 */
  {
    "movdfcc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movdfcc },
    &operand_data[5385],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8478 */
  {
    "jump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_jump },
    &operand_data[442],
    1,
    1,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8510 */
  {
    "call",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_call },
    &operand_data[5389],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8577 */
  {
    "call_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_call_internal },
    &operand_data[5389],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8583 */
  {
    "nonsecure_call_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_nonsecure_call_internal },
    &operand_data[5389],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8631 */
  {
    "call_value",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_call_value },
    &operand_data[5391],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8689 */
  {
    "call_value_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_call_value_internal },
    &operand_data[5391],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8696 */
  {
    "nonsecure_call_value_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_nonsecure_call_value_internal },
    &operand_data[5391],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8792 */
  {
    "sibcall_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sibcall_internal },
    &operand_data[5389],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8799 */
  {
    "sibcall",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sibcall },
    &operand_data[5389],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8824 */
  {
    "sibcall_value_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sibcall_value_internal },
    &operand_data[5391],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8831 */
  {
    "sibcall_value",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sibcall_value },
    &operand_data[5391],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8899 */
  {
    "return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_return },
    &operand_data[0],
    0,
    0,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8899 */
  {
    "simple_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_simple_return },
    &operand_data[0],
    0,
    0,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8999 */
  {
    "return_addr_mask",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_return_addr_mask },
    &operand_data[790],
    1,
    1,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9025 */
  {
    "untyped_call",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_untyped_call },
    &operand_data[1503],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9094 */
  {
    "untyped_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_untyped_return },
    &operand_data[5395],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9179 */
  {
    "stack_protect_combined_set",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_stack_protect_combined_set },
    &operand_data[5397],
    2,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9258 */
  {
    "stack_protect_combined_test",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_stack_protect_combined_test },
    &operand_data[5401],
    3,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9364 */
  {
    "stack_protect_set",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_stack_protect_set },
    &operand_data[5406],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9390 */
  {
    "stack_protect_test",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_stack_protect_test },
    &operand_data[5406],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9422 */
  {
    "casesi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_casesi },
    &operand_data[5409],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9462 */
  {
    "arm_casesi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_casesi_internal },
    &operand_data[5414],
    4,
    4,
    1,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9502 */
  {
    "indirect_jump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_indirect_jump },
    &operand_data[790],
    1,
    1,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11514 */
  {
    "prologue",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_prologue },
    &operand_data[0],
    0,
    0,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11525 */
  {
    "epilogue",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_epilogue },
    &operand_data[0],
    0,
    0,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11556 */
  {
    "sibcall_epilogue",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sibcall_epilogue },
    &operand_data[0],
    0,
    0,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11566 */
  {
    "eh_epilogue",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_eh_epilogue },
    &operand_data[5418],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12153 */
  {
    "eh_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_eh_return },
    &operand_data[5217],
    1,
    1,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12249 */
  {
    "get_thread_pointersi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_get_thread_pointersi },
    &operand_data[790],
    1,
    1,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12291 */
  {
    "arm_legacy_rev",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_legacy_rev },
    &operand_data[5203],
    4,
    4,
    8,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12313 */
  {
    "thumb_legacy_rev",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb_legacy_rev },
    &operand_data[5421],
    6,
    6,
    18,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12355 */
  {
    "modsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_modsi3 },
    &operand_data[5427],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12416 */
  {
    "bswapsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_bswapsi2 },
    &operand_data[5154],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12512 */
  {
    "bswaphi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_bswaphi2 },
    &operand_data[5189],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12646 */
  {
    "copysignsf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_copysignsf3 },
    &operand_data[5430],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12660 */
  {
    "copysigndf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_copysigndf3 },
    &operand_data[5433],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12688 */
  {
    "movmisaligndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movmisaligndi },
    &operand_data[5287],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12704 */
  {
    "movmisalignhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movmisalignhi },
    &operand_data[5295],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12704 */
  {
    "movmisalignsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movmisalignsi },
    &operand_data[5289],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12784 */
  {
    "arm_ldc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_ldc },
    &operand_data[5436],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12784 */
  {
    "arm_ldc2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_ldc2 },
    &operand_data[5436],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12784 */
  {
    "arm_ldcl",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_ldcl },
    &operand_data[5436],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12784 */
  {
    "arm_ldc2l",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_ldc2l },
    &operand_data[5436],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12790 */
  {
    "arm_stc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_stc },
    &operand_data[5436],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12790 */
  {
    "arm_stc2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_stc2 },
    &operand_data[5436],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12790 */
  {
    "arm_stcl",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_stcl },
    &operand_data[5436],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12790 */
  {
    "arm_stc2l",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_stc2l },
    &operand_data[5436],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12866 */
  {
    "speculation_barrier",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_speculation_barrier },
    &operand_data[0],
    0,
    0,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:23 */
  {
    "movv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv16qi },
    &operand_data[5439],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:23 */
  {
    "movv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv8hi },
    &operand_data[5441],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:23 */
  {
    "movv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv4si },
    &operand_data[5443],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:23 */
  {
    "movv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv4sf },
    &operand_data[5445],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:23 */
  {
    "movv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv2di },
    &operand_data[5447],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:46 */
  {
    "movv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv2si },
    &operand_data[5449],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:46 */
  {
    "movv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv4hi },
    &operand_data[5451],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:46 */
  {
    "movv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv8qi },
    &operand_data[5453],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:46 */
  {
    "movv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv2sf },
    &operand_data[5455],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:66 */
  {
    "movv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv8hf },
    &operand_data[5457],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:88 */
  {
    "addv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addv8qi3 },
    &operand_data[5459],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:88 */
  {
    "addv16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addv16qi3 },
    &operand_data[5462],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:88 */
  {
    "addv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addv4hi3 },
    &operand_data[5465],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:88 */
  {
    "addv8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addv8hi3 },
    &operand_data[5468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:88 */
  {
    "addv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addv2si3 },
    &operand_data[5471],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:88 */
  {
    "addv4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addv4si3 },
    &operand_data[5474],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:88 */
  {
    "addv4hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addv4hf3 },
    &operand_data[5477],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:88 */
  {
    "addv8hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addv8hf3 },
    &operand_data[5480],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:88 */
  {
    "addv2sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addv2sf3 },
    &operand_data[5483],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:88 */
  {
    "addv4sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addv4sf3 },
    &operand_data[5486],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:88 */
  {
    "addv2di3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addv2di3 },
    &operand_data[5489],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:95 */
  {
    "subv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subv8qi3 },
    &operand_data[5459],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:95 */
  {
    "subv16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subv16qi3 },
    &operand_data[5462],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:95 */
  {
    "subv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subv4hi3 },
    &operand_data[5465],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:95 */
  {
    "subv8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subv8hi3 },
    &operand_data[5468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:95 */
  {
    "subv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subv2si3 },
    &operand_data[5471],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:95 */
  {
    "subv4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subv4si3 },
    &operand_data[5474],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:95 */
  {
    "subv4hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subv4hf3 },
    &operand_data[5477],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:95 */
  {
    "subv8hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subv8hf3 },
    &operand_data[5480],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:95 */
  {
    "subv2sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subv2sf3 },
    &operand_data[5483],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:95 */
  {
    "subv4sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subv4sf3 },
    &operand_data[5486],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:95 */
  {
    "subv2di3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subv2di3 },
    &operand_data[5489],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:102 */
  {
    "mulv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv8qi3 },
    &operand_data[5459],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:102 */
  {
    "mulv16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv16qi3 },
    &operand_data[5462],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:102 */
  {
    "mulv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv4hi3 },
    &operand_data[5465],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:102 */
  {
    "mulv8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv8hi3 },
    &operand_data[5468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:102 */
  {
    "mulv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv2si3 },
    &operand_data[5471],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:102 */
  {
    "mulv4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv4si3 },
    &operand_data[5474],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:102 */
  {
    "mulv2sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv2sf3 },
    &operand_data[5483],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:102 */
  {
    "mulv4sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv4sf3 },
    &operand_data[5486],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:102 */
  {
    "mulv8hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv8hf3 },
    &operand_data[5480],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:102 */
  {
    "mulv4hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulv4hf3 },
    &operand_data[5477],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:112 */
  {
    "sminv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sminv2si3 },
    &operand_data[5471],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:112 */
  {
    "sminv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sminv4hi3 },
    &operand_data[5465],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:112 */
  {
    "sminv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sminv8qi3 },
    &operand_data[5459],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:112 */
  {
    "sminv2sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sminv2sf3 },
    &operand_data[5483],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:112 */
  {
    "sminv4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sminv4si3 },
    &operand_data[5474],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:112 */
  {
    "sminv8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sminv8hi3 },
    &operand_data[5468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:112 */
  {
    "sminv16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sminv16qi3 },
    &operand_data[5462],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:112 */
  {
    "sminv4sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sminv4sf3 },
    &operand_data[5486],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:119 */
  {
    "uminv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_uminv2si3 },
    &operand_data[5471],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:119 */
  {
    "uminv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_uminv4hi3 },
    &operand_data[5465],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:119 */
  {
    "uminv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_uminv8qi3 },
    &operand_data[5459],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:119 */
  {
    "uminv4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_uminv4si3 },
    &operand_data[5474],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:119 */
  {
    "uminv8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_uminv8hi3 },
    &operand_data[5468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:119 */
  {
    "uminv16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_uminv16qi3 },
    &operand_data[5462],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:126 */
  {
    "smaxv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smaxv2si3 },
    &operand_data[5471],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:126 */
  {
    "smaxv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smaxv4hi3 },
    &operand_data[5465],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:126 */
  {
    "smaxv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smaxv8qi3 },
    &operand_data[5459],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:126 */
  {
    "smaxv2sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smaxv2sf3 },
    &operand_data[5483],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:126 */
  {
    "smaxv4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smaxv4si3 },
    &operand_data[5474],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:126 */
  {
    "smaxv8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smaxv8hi3 },
    &operand_data[5468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:126 */
  {
    "smaxv16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smaxv16qi3 },
    &operand_data[5462],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:126 */
  {
    "smaxv4sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_smaxv4sf3 },
    &operand_data[5486],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:133 */
  {
    "umaxv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_umaxv2si3 },
    &operand_data[5471],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:133 */
  {
    "umaxv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_umaxv4hi3 },
    &operand_data[5465],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:133 */
  {
    "umaxv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_umaxv8qi3 },
    &operand_data[5459],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:133 */
  {
    "umaxv4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_umaxv4si3 },
    &operand_data[5474],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:133 */
  {
    "umaxv8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_umaxv8hi3 },
    &operand_data[5468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:133 */
  {
    "umaxv16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_umaxv16qi3 },
    &operand_data[5462],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:140 */
  {
    "vec_permv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_permv8qi },
    &operand_data[5492],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:140 */
  {
    "vec_permv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_permv16qi },
    &operand_data[5496],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:151 */
  {
    "vec_extractv16qiqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_extractv16qiqi },
    &operand_data[5500],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:151 */
  {
    "vec_extractv8hihi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_extractv8hihi },
    &operand_data[5503],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:151 */
  {
    "vec_extractv8hfhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_extractv8hfhf },
    &operand_data[5506],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:151 */
  {
    "vec_extractv4sisi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_extractv4sisi },
    &operand_data[5509],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:151 */
  {
    "vec_extractv4sfsf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_extractv4sfsf },
    &operand_data[5512],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:151 */
  {
    "vec_extractv2didi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_extractv2didi },
    &operand_data[5515],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:168 */
  {
    "vec_setv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv16qi },
    &operand_data[5518],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:168 */
  {
    "vec_setv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv8hi },
    &operand_data[5521],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:168 */
  {
    "vec_setv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv8hf },
    &operand_data[5524],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:168 */
  {
    "vec_setv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv4si },
    &operand_data[5527],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:168 */
  {
    "vec_setv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv4sf },
    &operand_data[5530],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:168 */
  {
    "vec_setv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_setv2di },
    &operand_data[5533],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:184 */
  {
    "andv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv8qi3 },
    &operand_data[5536],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:184 */
  {
    "andv16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv16qi3 },
    &operand_data[5539],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:184 */
  {
    "andv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv4hi3 },
    &operand_data[5542],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:184 */
  {
    "andv8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv8hi3 },
    &operand_data[5545],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:184 */
  {
    "andv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv2si3 },
    &operand_data[5548],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:184 */
  {
    "andv4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv4si3 },
    &operand_data[5551],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:184 */
  {
    "andv4hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv4hf3 },
    &operand_data[5554],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:184 */
  {
    "andv8hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv8hf3 },
    &operand_data[5557],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:184 */
  {
    "andv2sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv2sf3 },
    &operand_data[5560],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:184 */
  {
    "andv4sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv4sf3 },
    &operand_data[5563],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:184 */
  {
    "andv2di3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_andv2di3 },
    &operand_data[5566],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:191 */
  {
    "iorv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv8qi3 },
    &operand_data[5569],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:191 */
  {
    "iorv16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv16qi3 },
    &operand_data[5572],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:191 */
  {
    "iorv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv4hi3 },
    &operand_data[5575],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:191 */
  {
    "iorv8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv8hi3 },
    &operand_data[5578],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:191 */
  {
    "iorv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv2si3 },
    &operand_data[5581],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:191 */
  {
    "iorv4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv4si3 },
    &operand_data[5584],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:191 */
  {
    "iorv4hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv4hf3 },
    &operand_data[5587],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:191 */
  {
    "iorv8hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv8hf3 },
    &operand_data[5590],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:191 */
  {
    "iorv2sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv2sf3 },
    &operand_data[5593],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:191 */
  {
    "iorv4sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv4sf3 },
    &operand_data[5596],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:191 */
  {
    "iorv2di3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iorv2di3 },
    &operand_data[5599],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:198 */
  {
    "xorv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv8qi3 },
    &operand_data[5459],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:198 */
  {
    "xorv16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv16qi3 },
    &operand_data[5462],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:198 */
  {
    "xorv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv4hi3 },
    &operand_data[5465],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:198 */
  {
    "xorv8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv8hi3 },
    &operand_data[5468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:198 */
  {
    "xorv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv2si3 },
    &operand_data[5471],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:198 */
  {
    "xorv4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv4si3 },
    &operand_data[5474],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:198 */
  {
    "xorv4hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv4hf3 },
    &operand_data[5477],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:198 */
  {
    "xorv8hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv8hf3 },
    &operand_data[5480],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:198 */
  {
    "xorv2sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv2sf3 },
    &operand_data[5483],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:198 */
  {
    "xorv4sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv4sf3 },
    &operand_data[5486],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:198 */
  {
    "xorv2di3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_xorv2di3 },
    &operand_data[5489],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:205 */
  {
    "one_cmplv8qi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv8qi2 },
    &operand_data[5459],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:205 */
  {
    "one_cmplv16qi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv16qi2 },
    &operand_data[5462],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:205 */
  {
    "one_cmplv4hi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv4hi2 },
    &operand_data[5465],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:205 */
  {
    "one_cmplv8hi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv8hi2 },
    &operand_data[5468],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:205 */
  {
    "one_cmplv2si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv2si2 },
    &operand_data[5471],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:205 */
  {
    "one_cmplv4si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv4si2 },
    &operand_data[5474],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:205 */
  {
    "one_cmplv4hf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv4hf2 },
    &operand_data[5477],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:205 */
  {
    "one_cmplv8hf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv8hf2 },
    &operand_data[5457],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:205 */
  {
    "one_cmplv2sf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv2sf2 },
    &operand_data[5483],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:205 */
  {
    "one_cmplv4sf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv4sf2 },
    &operand_data[5486],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:205 */
  {
    "one_cmplv2di2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_one_cmplv2di2 },
    &operand_data[5489],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "absv8qi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_absv8qi2 },
    &operand_data[5459],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "negv8qi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negv8qi2 },
    &operand_data[5459],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "absv16qi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_absv16qi2 },
    &operand_data[5462],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "negv16qi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negv16qi2 },
    &operand_data[5462],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "absv4hi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_absv4hi2 },
    &operand_data[5465],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "negv4hi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negv4hi2 },
    &operand_data[5465],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "absv8hi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_absv8hi2 },
    &operand_data[5468],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "negv8hi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negv8hi2 },
    &operand_data[5468],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "absv2si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_absv2si2 },
    &operand_data[5471],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "negv2si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negv2si2 },
    &operand_data[5471],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "absv4si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_absv4si2 },
    &operand_data[5474],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "negv4si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negv4si2 },
    &operand_data[5474],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "absv2sf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_absv2sf2 },
    &operand_data[5483],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "negv2sf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negv2sf2 },
    &operand_data[5483],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "absv4sf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_absv4sf2 },
    &operand_data[5486],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "negv4sf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negv4sf2 },
    &operand_data[5486],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "absv8hf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_absv8hf2 },
    &operand_data[5457],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "negv8hf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negv8hf2 },
    &operand_data[5457],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "absv4hf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_absv4hf2 },
    &operand_data[5477],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:211 */
  {
    "negv4hf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_negv4hf2 },
    &operand_data[5477],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:217 */
  {
    "cadd90v4hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cadd90v4hf3 },
    &operand_data[5602],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:217 */
  {
    "cadd270v4hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cadd270v4hf3 },
    &operand_data[5602],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:217 */
  {
    "cadd90v8hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cadd90v8hf3 },
    &operand_data[5605],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:217 */
  {
    "cadd270v8hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cadd270v8hf3 },
    &operand_data[5605],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:217 */
  {
    "cadd90v2sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cadd90v2sf3 },
    &operand_data[5608],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:217 */
  {
    "cadd270v2sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cadd270v2sf3 },
    &operand_data[5608],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:217 */
  {
    "cadd90v4sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cadd90v4sf3 },
    &operand_data[5611],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:217 */
  {
    "cadd270v4sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cadd270v4sf3 },
    &operand_data[5611],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:229 */
  {
    "cmulv8hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmulv8hf3 },
    &operand_data[5605],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:229 */
  {
    "cmul_conjv8hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmul_conjv8hf3 },
    &operand_data[5605],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:229 */
  {
    "cmulv4sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmulv4sf3 },
    &operand_data[5611],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:229 */
  {
    "cmul_conjv4sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmul_conjv4sf3 },
    &operand_data[5611],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla0v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla0v4hf },
    &operand_data[5614],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla90v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla90v4hf },
    &operand_data[5614],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla180v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla180v4hf },
    &operand_data[5614],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla270v4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla270v4hf },
    &operand_data[5614],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla0v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla0v8hf },
    &operand_data[5618],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla90v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla90v8hf },
    &operand_data[5618],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla180v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla180v8hf },
    &operand_data[5618],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla270v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla270v8hf },
    &operand_data[5618],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla0v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla0v2sf },
    &operand_data[5622],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla90v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla90v2sf },
    &operand_data[5622],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla180v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla180v2sf },
    &operand_data[5622],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla270v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla270v2sf },
    &operand_data[5622],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla0v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla0v4sf },
    &operand_data[5626],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla90v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla90v4sf },
    &operand_data[5626],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla180v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla180v4sf },
    &operand_data[5626],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:253 */
  {
    "arm_vcmla270v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_arm_vcmla270v4sf },
    &operand_data[5626],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmlav4hf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmlav4hf4 },
    &operand_data[5614],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmla_conjv4hf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmla_conjv4hf4 },
    &operand_data[5614],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmlsv4hf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmlsv4hf4 },
    &operand_data[5614],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmls_conjv4hf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmls_conjv4hf4 },
    &operand_data[5614],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmlav8hf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmlav8hf4 },
    &operand_data[5618],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmla_conjv8hf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmla_conjv8hf4 },
    &operand_data[5618],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmlsv8hf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmlsv8hf4 },
    &operand_data[5618],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmls_conjv8hf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmls_conjv8hf4 },
    &operand_data[5618],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmlav2sf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmlav2sf4 },
    &operand_data[5622],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmla_conjv2sf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmla_conjv2sf4 },
    &operand_data[5622],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmlsv2sf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmlsv2sf4 },
    &operand_data[5622],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmls_conjv2sf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmls_conjv2sf4 },
    &operand_data[5622],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmlav4sf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmlav4sf4 },
    &operand_data[5626],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmla_conjv4sf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmla_conjv4sf4 },
    &operand_data[5626],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmlsv4sf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmlsv4sf4 },
    &operand_data[5626],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:266 */
  {
    "cmls_conjv4sf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmls_conjv4sf4 },
    &operand_data[5626],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:283 */
  {
    "movmisalignv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movmisalignv8qi },
    &operand_data[5630],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:283 */
  {
    "movmisalignv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movmisalignv16qi },
    &operand_data[5632],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:283 */
  {
    "movmisalignv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movmisalignv4hi },
    &operand_data[5634],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:283 */
  {
    "movmisalignv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movmisalignv8hi },
    &operand_data[5636],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:283 */
  {
    "movmisalignv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movmisalignv2si },
    &operand_data[5638],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:283 */
  {
    "movmisalignv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movmisalignv4si },
    &operand_data[5640],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:283 */
  {
    "movmisalignv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movmisalignv4hf },
    &operand_data[5642],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:283 */
  {
    "movmisalignv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movmisalignv8hf },
    &operand_data[5644],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:283 */
  {
    "movmisalignv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movmisalignv2sf },
    &operand_data[5646],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:283 */
  {
    "movmisalignv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movmisalignv4sf },
    &operand_data[5648],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:283 */
  {
    "movmisalignv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movmisalignv2di },
    &operand_data[5650],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:320 */
  {
    "vashlv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashlv8qi3 },
    &operand_data[5652],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:320 */
  {
    "vashlv16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashlv16qi3 },
    &operand_data[5655],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:320 */
  {
    "vashlv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashlv4hi3 },
    &operand_data[5658],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:320 */
  {
    "vashlv8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashlv8hi3 },
    &operand_data[5661],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:320 */
  {
    "vashlv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashlv2si3 },
    &operand_data[5664],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:320 */
  {
    "vashlv4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashlv4si3 },
    &operand_data[5667],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:333 */
  {
    "vashrv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashrv8qi3 },
    &operand_data[5670],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:333 */
  {
    "vashrv16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashrv16qi3 },
    &operand_data[5673],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:333 */
  {
    "vashrv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashrv4hi3 },
    &operand_data[5676],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:333 */
  {
    "vashrv8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashrv8hi3 },
    &operand_data[5679],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:333 */
  {
    "vashrv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashrv2si3 },
    &operand_data[5682],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:333 */
  {
    "vashrv4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vashrv4si3 },
    &operand_data[5685],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:351 */
  {
    "vlshrv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vlshrv8qi3 },
    &operand_data[5670],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:351 */
  {
    "vlshrv16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vlshrv16qi3 },
    &operand_data[5673],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:351 */
  {
    "vlshrv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vlshrv4hi3 },
    &operand_data[5676],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:351 */
  {
    "vlshrv8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vlshrv8hi3 },
    &operand_data[5679],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:351 */
  {
    "vlshrv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vlshrv2si3 },
    &operand_data[5682],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:351 */
  {
    "vlshrv4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vlshrv4si3 },
    &operand_data[5685],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:374 */
  {
    "vcondv8qiv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv8qiv8qi },
    &operand_data[5688],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:374 */
  {
    "vcondv16qiv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv16qiv16qi },
    &operand_data[5694],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:374 */
  {
    "vcondv4hiv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv4hiv4hi },
    &operand_data[5700],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:374 */
  {
    "vcondv8hiv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv8hiv8hi },
    &operand_data[5706],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:374 */
  {
    "vcondv2siv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv2siv2si },
    &operand_data[5712],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:374 */
  {
    "vcondv4siv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv4siv4si },
    &operand_data[5718],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:374 */
  {
    "vcondv2sfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv2sfv2sf },
    &operand_data[5724],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:374 */
  {
    "vcondv4sfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv4sfv4sf },
    &operand_data[5730],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:374 */
  {
    "vcondv8hfv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv8hfv8hf },
    &operand_data[5736],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:374 */
  {
    "vcondv4hfv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv4hfv4hf },
    &operand_data[5742],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:390 */
  {
    "vcondv2sfv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv2sfv2si },
    &operand_data[5748],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:390 */
  {
    "vcondv2siv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv2siv2sf },
    &operand_data[5754],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:390 */
  {
    "vcondv4sfv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv4sfv4si },
    &operand_data[5760],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:390 */
  {
    "vcondv4siv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv4siv4sf },
    &operand_data[5766],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:406 */
  {
    "vcondv4hfv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv4hfv4hi },
    &operand_data[5772],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:406 */
  {
    "vcondv4hiv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv4hiv4hf },
    &operand_data[5778],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:406 */
  {
    "vcondv8hfv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv8hfv8hi },
    &operand_data[5784],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:406 */
  {
    "vcondv8hiv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcondv8hiv8hf },
    &operand_data[5790],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:422 */
  {
    "vconduv8qiv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vconduv8qiv8qi },
    &operand_data[5796],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:422 */
  {
    "vconduv16qiv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vconduv16qiv16qi },
    &operand_data[5802],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:422 */
  {
    "vconduv4hiv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vconduv4hiv4hi },
    &operand_data[5808],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:422 */
  {
    "vconduv8hiv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vconduv8hiv8hi },
    &operand_data[5814],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:422 */
  {
    "vconduv2siv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vconduv2siv2si },
    &operand_data[5820],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:422 */
  {
    "vconduv4siv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vconduv4siv4si },
    &operand_data[5826],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:422 */
  {
    "vconduv2sfv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vconduv2sfv2si },
    &operand_data[5832],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:422 */
  {
    "vconduv4sfv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vconduv4sfv4si },
    &operand_data[5838],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:437 */
  {
    "vec_load_lanesoiv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesoiv16qi },
    &operand_data[5844],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:437 */
  {
    "vec_load_lanesoiv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesoiv8hi },
    &operand_data[5844],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:437 */
  {
    "vec_load_lanesoiv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesoiv8hf },
    &operand_data[5844],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:437 */
  {
    "vec_load_lanesoiv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesoiv4si },
    &operand_data[5844],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:437 */
  {
    "vec_load_lanesoiv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesoiv4sf },
    &operand_data[5844],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:451 */
  {
    "vec_store_lanesoiv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesoiv16qi },
    &operand_data[5845],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:451 */
  {
    "vec_store_lanesoiv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesoiv8hi },
    &operand_data[5845],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:451 */
  {
    "vec_store_lanesoiv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesoiv8hf },
    &operand_data[5845],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:451 */
  {
    "vec_store_lanesoiv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesoiv4si },
    &operand_data[5845],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:451 */
  {
    "vec_store_lanesoiv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesoiv4sf },
    &operand_data[5845],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:465 */
  {
    "vec_load_lanesxiv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesxiv16qi },
    &operand_data[5847],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:465 */
  {
    "vec_load_lanesxiv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesxiv8hi },
    &operand_data[5847],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:465 */
  {
    "vec_load_lanesxiv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesxiv8hf },
    &operand_data[5847],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:465 */
  {
    "vec_load_lanesxiv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesxiv4si },
    &operand_data[5847],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:465 */
  {
    "vec_load_lanesxiv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesxiv4sf },
    &operand_data[5847],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:478 */
  {
    "vec_store_lanesxiv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesxiv16qi },
    &operand_data[5848],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:478 */
  {
    "vec_store_lanesxiv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesxiv8hi },
    &operand_data[5848],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:478 */
  {
    "vec_store_lanesxiv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesxiv8hf },
    &operand_data[5848],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:478 */
  {
    "vec_store_lanesxiv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesxiv4si },
    &operand_data[5848],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:478 */
  {
    "vec_store_lanesxiv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesxiv4sf },
    &operand_data[5848],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:491 */
  {
    "reduc_plus_scal_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_plus_scal_v16qi },
    &operand_data[5500],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:491 */
  {
    "reduc_plus_scal_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_plus_scal_v8hi },
    &operand_data[5503],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:491 */
  {
    "reduc_plus_scal_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_plus_scal_v4si },
    &operand_data[5509],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:491 */
  {
    "reduc_plus_scal_v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_plus_scal_v4sf },
    &operand_data[5512],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:517 */
  {
    "avgv16qi3_floor",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_avgv16qi3_floor },
    &operand_data[5462],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:517 */
  {
    "avgv8hi3_floor",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_avgv8hi3_floor },
    &operand_data[5468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:517 */
  {
    "avgv4si3_floor",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_avgv4si3_floor },
    &operand_data[5474],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:532 */
  {
    "uavgv16qi3_floor",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_uavgv16qi3_floor },
    &operand_data[5462],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:532 */
  {
    "uavgv8hi3_floor",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_uavgv8hi3_floor },
    &operand_data[5468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:532 */
  {
    "uavgv4si3_floor",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_uavgv4si3_floor },
    &operand_data[5474],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:547 */
  {
    "avgv16qi3_ceil",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_avgv16qi3_ceil },
    &operand_data[5462],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:547 */
  {
    "avgv8hi3_ceil",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_avgv8hi3_ceil },
    &operand_data[5468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:547 */
  {
    "avgv4si3_ceil",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_avgv4si3_ceil },
    &operand_data[5474],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:562 */
  {
    "uavgv16qi3_ceil",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_uavgv16qi3_ceil },
    &operand_data[5462],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:562 */
  {
    "uavgv8hi3_ceil",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_uavgv8hi3_ceil },
    &operand_data[5468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:562 */
  {
    "uavgv4si3_ceil",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_uavgv4si3_ceil },
    &operand_data[5474],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:577 */
  {
    "clzv8qi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_clzv8qi2 },
    &operand_data[5459],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:577 */
  {
    "clzv16qi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_clzv16qi2 },
    &operand_data[5462],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:577 */
  {
    "clzv4hi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_clzv4hi2 },
    &operand_data[5465],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:577 */
  {
    "clzv8hi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_clzv8hi2 },
    &operand_data[5468],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:577 */
  {
    "clzv2si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_clzv2si2 },
    &operand_data[5471],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:577 */
  {
    "clzv4si2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_clzv4si2 },
    &operand_data[5474],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:583 */
  {
    "vec_initv8qiqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_initv8qiqi },
    &operand_data[5850],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:583 */
  {
    "vec_initv16qiqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_initv16qiqi },
    &operand_data[5852],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:583 */
  {
    "vec_initv4hihi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_initv4hihi },
    &operand_data[5854],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:583 */
  {
    "vec_initv8hihi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_initv8hihi },
    &operand_data[5856],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:583 */
  {
    "vec_initv2sisi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_initv2sisi },
    &operand_data[5858],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:583 */
  {
    "vec_initv4sisi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_initv4sisi },
    &operand_data[5860],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:583 */
  {
    "vec_initv4hfhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_initv4hfhf },
    &operand_data[5862],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:583 */
  {
    "vec_initv8hfhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_initv8hfhf },
    &operand_data[5864],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:583 */
  {
    "vec_initv4bfbf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_initv4bfbf },
    &operand_data[5866],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:583 */
  {
    "vec_initv8bfbf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_initv8bfbf },
    &operand_data[5868],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:583 */
  {
    "vec_initv2sfsf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_initv2sfsf },
    &operand_data[5870],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:583 */
  {
    "vec_initv4sfsf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_initv4sfsf },
    &operand_data[5872],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:583 */
  {
    "vec_initdidi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_initdidi },
    &operand_data[5245],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vec-common.md:583 */
  {
    "vec_initv2didi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_initv2didi },
    &operand_data[5874],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:248 */
  {
    "iwmmxt_setwcgr0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_setwcgr0 },
    &operand_data[812],
    1,
    1,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:255 */
  {
    "iwmmxt_setwcgr1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_setwcgr1 },
    &operand_data[812],
    1,
    1,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:262 */
  {
    "iwmmxt_setwcgr2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_setwcgr2 },
    &operand_data[812],
    1,
    1,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:269 */
  {
    "iwmmxt_setwcgr3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_setwcgr3 },
    &operand_data[812],
    1,
    1,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:276 */
  {
    "iwmmxt_getwcgr0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_getwcgr0 },
    &operand_data[812],
    1,
    1,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:283 */
  {
    "iwmmxt_getwcgr1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_getwcgr1 },
    &operand_data[812],
    1,
    1,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:290 */
  {
    "iwmmxt_getwcgr2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_getwcgr2 },
    &operand_data[812],
    1,
    1,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:297 */
  {
    "iwmmxt_getwcgr3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_iwmmxt_getwcgr3 },
    &operand_data[812],
    1,
    1,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:955 */
  {
    "neon_vabshf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabshf },
    &operand_data[5379],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1348 */
  {
    "neon_vfmahf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmahf },
    &operand_data[5876],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1383 */
  {
    "neon_vfmshf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmshf },
    &operand_data[5876],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1951 */
  {
    "neon_vcvths_nhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvths_nhf },
    &operand_data[5879],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1951 */
  {
    "neon_vcvthu_nhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvthu_nhf },
    &operand_data[5879],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1992 */
  {
    "neon_vcvths_nsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvths_nsi },
    &operand_data[5882],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1992 */
  {
    "neon_vcvthu_nsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcvthu_nsi },
    &operand_data[5882],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:839 */
  {
    "thumb_movhi_clobber",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb_movhi_clobber },
    &operand_data[5885],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1040 */
  {
    "cbranchqi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cbranchqi4 },
    &operand_data[5888],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1211 */
  {
    "cbranchsi4_neg_late",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cbranchsi4_neg_late },
    &operand_data[5892],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1695 */
  {
    "cstoresi_eq0_thumb1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cstoresi_eq0_thumb1 },
    &operand_data[5154],
    2,
    2,
    1,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1705 */
  {
    "cstoresi_ne0_thumb1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cstoresi_ne0_thumb1 },
    &operand_data[5154],
    2,
    2,
    1,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1918 */
  {
    "thumb1_casesi_internal_pic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb1_casesi_internal_pic },
    &operand_data[5897],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb1.md:1991 */
  {
    "tablejump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_tablejump },
    &operand_data[5901],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1130 */
  {
    "thumb2_casesi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb2_casesi_internal },
    &operand_data[5903],
    4,
    6,
    1,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1168 */
  {
    "thumb2_casesi_internal_pic",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_thumb2_casesi_internal_pic },
    &operand_data[5903],
    4,
    7,
    1,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1611 */
  {
    "doloop_end",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_doloop_end },
    &operand_data[504],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1751 */
  {
    "doloop_begin",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_doloop_begin },
    &operand_data[504],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:135 */
  {
    "movti",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movti },
    &operand_data[5910],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:149 */
  {
    "movei",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movei },
    &operand_data[5912],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:149 */
  {
    "movoi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movoi },
    &operand_data[5914],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:149 */
  {
    "movci",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movci },
    &operand_data[5916],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:149 */
  {
    "movxi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movxi },
    &operand_data[5918],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:167 */
  {
    "movv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv4hf },
    &operand_data[5477],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:167 */
  {
    "movv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv4bf },
    &operand_data[5920],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:167 */
  {
    "movv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv8bf },
    &operand_data[5922],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:507 */
  {
    "divv2sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_divv2sf3 },
    &operand_data[5483],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:507 */
  {
    "divv4sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_divv4sf3 },
    &operand_data[5486],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:763 */
  {
    "neon_vabsv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabsv8hf },
    &operand_data[5457],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:763 */
  {
    "neon_vnegv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vnegv8hf },
    &operand_data[5457],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:763 */
  {
    "neon_vabsv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabsv4hf },
    &operand_data[5477],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:763 */
  {
    "neon_vnegv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vnegv4hf },
    &operand_data[5477],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:913 */
  {
    "widen_ssumv16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_widen_ssumv16qi3 },
    &operand_data[5924],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:913 */
  {
    "widen_ssumv8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_widen_ssumv8hi3 },
    &operand_data[5927],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:913 */
  {
    "widen_ssumv4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_widen_ssumv4si3 },
    &operand_data[5930],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:983 */
  {
    "widen_usumv16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_widen_usumv16qi3 },
    &operand_data[5924],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:983 */
  {
    "widen_usumv8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_widen_usumv8hi3 },
    &operand_data[5927],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:983 */
  {
    "widen_usumv4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_widen_usumv4si3 },
    &operand_data[5930],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1118 */
  {
    "move_hi_quad_v2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_move_hi_quad_v2di },
    &operand_data[5533],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1118 */
  {
    "move_hi_quad_v2df",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_move_hi_quad_v2df },
    &operand_data[5933],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1118 */
  {
    "move_hi_quad_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_move_hi_quad_v16qi },
    &operand_data[5935],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1118 */
  {
    "move_hi_quad_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_move_hi_quad_v8hi },
    &operand_data[5937],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1118 */
  {
    "move_hi_quad_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_move_hi_quad_v4si },
    &operand_data[5939],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1118 */
  {
    "move_hi_quad_v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_move_hi_quad_v4sf },
    &operand_data[5941],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1129 */
  {
    "move_lo_quad_v2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_move_lo_quad_v2di },
    &operand_data[5533],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1129 */
  {
    "move_lo_quad_v2df",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_move_lo_quad_v2df },
    &operand_data[5933],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1129 */
  {
    "move_lo_quad_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_move_lo_quad_v16qi },
    &operand_data[5935],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1129 */
  {
    "move_lo_quad_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_move_lo_quad_v8hi },
    &operand_data[5937],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1129 */
  {
    "move_lo_quad_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_move_lo_quad_v4si },
    &operand_data[5939],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1129 */
  {
    "move_lo_quad_v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_move_lo_quad_v4sf },
    &operand_data[5941],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1142 */
  {
    "reduc_plus_scal_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_plus_scal_v8qi },
    &operand_data[5943],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1142 */
  {
    "reduc_plus_scal_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_plus_scal_v4hi },
    &operand_data[5945],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1142 */
  {
    "reduc_plus_scal_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_plus_scal_v2si },
    &operand_data[5947],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1142 */
  {
    "reduc_plus_scal_v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_plus_scal_v2sf },
    &operand_data[5949],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1155 */
  {
    "reduc_plus_scal_v2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_plus_scal_v2di },
    &operand_data[5515],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1177 */
  {
    "reduc_smin_scal_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smin_scal_v8qi },
    &operand_data[5943],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1177 */
  {
    "reduc_smin_scal_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smin_scal_v4hi },
    &operand_data[5945],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1177 */
  {
    "reduc_smin_scal_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smin_scal_v2si },
    &operand_data[5947],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1177 */
  {
    "reduc_smin_scal_v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smin_scal_v2sf },
    &operand_data[5949],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1191 */
  {
    "reduc_smin_scal_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smin_scal_v16qi },
    &operand_data[5500],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1191 */
  {
    "reduc_smin_scal_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smin_scal_v8hi },
    &operand_data[5503],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1191 */
  {
    "reduc_smin_scal_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smin_scal_v4si },
    &operand_data[5509],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1191 */
  {
    "reduc_smin_scal_v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smin_scal_v4sf },
    &operand_data[5512],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1204 */
  {
    "reduc_smax_scal_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smax_scal_v8qi },
    &operand_data[5943],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1204 */
  {
    "reduc_smax_scal_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smax_scal_v4hi },
    &operand_data[5945],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1204 */
  {
    "reduc_smax_scal_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smax_scal_v2si },
    &operand_data[5947],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1204 */
  {
    "reduc_smax_scal_v2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smax_scal_v2sf },
    &operand_data[5949],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1217 */
  {
    "reduc_smax_scal_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smax_scal_v16qi },
    &operand_data[5500],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1217 */
  {
    "reduc_smax_scal_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smax_scal_v8hi },
    &operand_data[5503],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1217 */
  {
    "reduc_smax_scal_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smax_scal_v4si },
    &operand_data[5509],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1217 */
  {
    "reduc_smax_scal_v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_smax_scal_v4sf },
    &operand_data[5512],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1230 */
  {
    "reduc_umin_scal_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_umin_scal_v8qi },
    &operand_data[5943],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1230 */
  {
    "reduc_umin_scal_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_umin_scal_v4hi },
    &operand_data[5945],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1230 */
  {
    "reduc_umin_scal_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_umin_scal_v2si },
    &operand_data[5947],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1243 */
  {
    "reduc_umin_scal_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_umin_scal_v16qi },
    &operand_data[5500],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1243 */
  {
    "reduc_umin_scal_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_umin_scal_v8hi },
    &operand_data[5503],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1243 */
  {
    "reduc_umin_scal_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_umin_scal_v4si },
    &operand_data[5509],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1256 */
  {
    "reduc_umax_scal_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_umax_scal_v8qi },
    &operand_data[5943],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1256 */
  {
    "reduc_umax_scal_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_umax_scal_v4hi },
    &operand_data[5945],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1256 */
  {
    "reduc_umax_scal_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_umax_scal_v2si },
    &operand_data[5947],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1269 */
  {
    "reduc_umax_scal_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_umax_scal_v16qi },
    &operand_data[5500],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1269 */
  {
    "reduc_umax_scal_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_umax_scal_v8hi },
    &operand_data[5503],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1269 */
  {
    "reduc_umax_scal_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_reduc_umax_scal_v4si },
    &operand_data[5509],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1397 */
  {
    "vec_cmpv8qiv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpv8qiv8qi },
    &operand_data[5951],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1397 */
  {
    "vec_cmpv16qiv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpv16qiv16qi },
    &operand_data[5955],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1397 */
  {
    "vec_cmpv4hiv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpv4hiv4hi },
    &operand_data[5959],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1397 */
  {
    "vec_cmpv8hiv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpv8hiv8hi },
    &operand_data[5963],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1397 */
  {
    "vec_cmpv2siv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpv2siv2si },
    &operand_data[5967],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1397 */
  {
    "vec_cmpv4siv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpv4siv4si },
    &operand_data[5971],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1397 */
  {
    "vec_cmpv2sfv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpv2sfv2si },
    &operand_data[5975],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1397 */
  {
    "vec_cmpv4sfv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpv4sfv4si },
    &operand_data[5979],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1397 */
  {
    "vec_cmpv8hfv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpv8hfv8hi },
    &operand_data[5983],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1397 */
  {
    "vec_cmpv4hfv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpv4hfv4hi },
    &operand_data[5987],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1410 */
  {
    "vec_cmpuv8qiv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpuv8qiv8qi },
    &operand_data[5951],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1410 */
  {
    "vec_cmpuv16qiv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpuv16qiv16qi },
    &operand_data[5955],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1410 */
  {
    "vec_cmpuv4hiv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpuv4hiv4hi },
    &operand_data[5959],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1410 */
  {
    "vec_cmpuv8hiv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpuv8hiv8hi },
    &operand_data[5963],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1410 */
  {
    "vec_cmpuv2siv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpuv2siv2si },
    &operand_data[5967],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1410 */
  {
    "vec_cmpuv4siv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpuv4siv4si },
    &operand_data[5971],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1422 */
  {
    "vcond_mask_v8qiv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcond_mask_v8qiv8qi },
    &operand_data[5492],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1422 */
  {
    "vcond_mask_v16qiv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcond_mask_v16qiv16qi },
    &operand_data[5496],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1422 */
  {
    "vcond_mask_v4hiv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcond_mask_v4hiv4hi },
    &operand_data[5991],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1422 */
  {
    "vcond_mask_v8hiv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcond_mask_v8hiv8hi },
    &operand_data[5995],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1422 */
  {
    "vcond_mask_v2siv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcond_mask_v2siv2si },
    &operand_data[5999],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1422 */
  {
    "vcond_mask_v4siv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcond_mask_v4siv4si },
    &operand_data[6003],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1422 */
  {
    "vcond_mask_v2sfv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcond_mask_v2sfv2si },
    &operand_data[6007],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1422 */
  {
    "vcond_mask_v4sfv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcond_mask_v4sfv4si },
    &operand_data[6011],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1422 */
  {
    "vcond_mask_v8hfv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcond_mask_v8hfv8hi },
    &operand_data[6015],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1422 */
  {
    "vcond_mask_v4hfv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcond_mask_v4hfv4hi },
    &operand_data[6019],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1440 */
  {
    "neon_vaddv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddv2sf },
    &operand_data[5483],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1440 */
  {
    "neon_vaddv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddv4sf },
    &operand_data[5486],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1454 */
  {
    "neon_vaddv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddv8hf },
    &operand_data[5480],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1454 */
  {
    "neon_vaddv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vaddv4hf },
    &operand_data[5477],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1464 */
  {
    "neon_vsubv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubv8hf },
    &operand_data[5480],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1464 */
  {
    "neon_vsubv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubv4hf },
    &operand_data[5477],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1576 */
  {
    "neon_vmlav8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav8qi },
    &operand_data[5492],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1576 */
  {
    "neon_vmlav16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav16qi },
    &operand_data[5496],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1576 */
  {
    "neon_vmlav4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav4hi },
    &operand_data[5991],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1576 */
  {
    "neon_vmlav8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav8hi },
    &operand_data[5995],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1576 */
  {
    "neon_vmlav2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav2si },
    &operand_data[5999],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1576 */
  {
    "neon_vmlav4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav4si },
    &operand_data[6003],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1576 */
  {
    "neon_vmlav2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav2sf },
    &operand_data[6023],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1576 */
  {
    "neon_vmlav4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlav4sf },
    &operand_data[6027],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1592 */
  {
    "neon_vfmav2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmav2sf },
    &operand_data[6023],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1592 */
  {
    "neon_vfmav4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmav4sf },
    &operand_data[6027],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1604 */
  {
    "neon_vfmav8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmav8hf },
    &operand_data[6031],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1604 */
  {
    "neon_vfmav4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmav4hf },
    &operand_data[6035],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1616 */
  {
    "neon_vfmsv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsv2sf },
    &operand_data[6023],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1616 */
  {
    "neon_vfmsv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsv4sf },
    &operand_data[6027],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1628 */
  {
    "neon_vfmsv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsv8hf },
    &operand_data[6031],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1628 */
  {
    "neon_vfmsv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsv4hf },
    &operand_data[6035],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1644 */
  {
    "neon_vfmal_lowv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmal_lowv2sf },
    &operand_data[6039],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1644 */
  {
    "neon_vfmal_highv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmal_highv2sf },
    &operand_data[6039],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1644 */
  {
    "neon_vfmsl_lowv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsl_lowv2sf },
    &operand_data[6039],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1644 */
  {
    "neon_vfmsl_highv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsl_highv2sf },
    &operand_data[6039],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1644 */
  {
    "neon_vfmal_lowv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmal_lowv4sf },
    &operand_data[6029],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1644 */
  {
    "neon_vfmal_highv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmal_highv4sf },
    &operand_data[6029],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1644 */
  {
    "neon_vfmsl_lowv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsl_lowv4sf },
    &operand_data[6029],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1644 */
  {
    "neon_vfmsl_highv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsl_highv4sf },
    &operand_data[6029],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1732 */
  {
    "neon_vfmal_lane_lowv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmal_lane_lowv2sf },
    &operand_data[6039],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1732 */
  {
    "neon_vfmal_lane_highv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmal_lane_highv2sf },
    &operand_data[6039],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1732 */
  {
    "neon_vfmsl_lane_lowv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsl_lane_lowv2sf },
    &operand_data[6039],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1732 */
  {
    "neon_vfmsl_lane_highv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsl_lane_highv2sf },
    &operand_data[6039],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1732 */
  {
    "neon_vfmal_lane_lowv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmal_lane_lowv4sf },
    &operand_data[6044],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1732 */
  {
    "neon_vfmal_lane_highv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmal_lane_highv4sf },
    &operand_data[6044],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1732 */
  {
    "neon_vfmsl_lane_lowv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsl_lane_lowv4sf },
    &operand_data[6044],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1732 */
  {
    "neon_vfmsl_lane_highv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsl_lane_highv4sf },
    &operand_data[6044],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1781 */
  {
    "neon_vfmal_lane_lowv8hfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmal_lane_lowv8hfv2sf },
    &operand_data[6049],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1781 */
  {
    "neon_vfmal_lane_highv8hfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmal_lane_highv8hfv2sf },
    &operand_data[6049],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1781 */
  {
    "neon_vfmsl_lane_lowv8hfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsl_lane_lowv8hfv2sf },
    &operand_data[6049],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1781 */
  {
    "neon_vfmsl_lane_highv8hfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsl_lane_highv8hfv2sf },
    &operand_data[6049],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1781 */
  {
    "neon_vfmal_lane_lowv4hfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmal_lane_lowv4hfv4sf },
    &operand_data[6054],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1781 */
  {
    "neon_vfmal_lane_highv4hfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmal_lane_highv4hfv4sf },
    &operand_data[6054],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1781 */
  {
    "neon_vfmsl_lane_lowv4hfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsl_lane_lowv4hfv4sf },
    &operand_data[6054],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:1781 */
  {
    "neon_vfmsl_lane_highv4hfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmsl_lane_highv4hfv4sf },
    &operand_data[6054],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2067 */
  {
    "neon_vmlsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv8qi },
    &operand_data[5492],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2067 */
  {
    "neon_vmlsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv16qi },
    &operand_data[5496],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2067 */
  {
    "neon_vmlsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv4hi },
    &operand_data[5991],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2067 */
  {
    "neon_vmlsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv8hi },
    &operand_data[5995],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2067 */
  {
    "neon_vmlsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv2si },
    &operand_data[5999],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2067 */
  {
    "neon_vmlsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv4si },
    &operand_data[6003],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2067 */
  {
    "neon_vmlsv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv2sf },
    &operand_data[6023],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2067 */
  {
    "neon_vmlsv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsv4sf },
    &operand_data[6027],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2175 */
  {
    "neon_vsubv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubv2sf },
    &operand_data[5483],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2175 */
  {
    "neon_vsubv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vsubv4sf },
    &operand_data[5486],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vceqv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv8qi },
    &operand_data[6059],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgtv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv8qi },
    &operand_data[6059],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev8qi },
    &operand_data[6059],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vclev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev8qi },
    &operand_data[6059],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcltv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv8qi },
    &operand_data[6059],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vceqv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv16qi },
    &operand_data[6062],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgtv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv16qi },
    &operand_data[6062],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgev16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev16qi },
    &operand_data[6062],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vclev16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev16qi },
    &operand_data[6062],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcltv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv16qi },
    &operand_data[6062],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vceqv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv4hi },
    &operand_data[6065],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgtv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv4hi },
    &operand_data[6065],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev4hi },
    &operand_data[6065],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vclev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev4hi },
    &operand_data[6065],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcltv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv4hi },
    &operand_data[6065],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vceqv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv8hi },
    &operand_data[6068],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgtv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv8hi },
    &operand_data[6068],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev8hi },
    &operand_data[6068],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vclev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev8hi },
    &operand_data[6068],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcltv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv8hi },
    &operand_data[6068],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vceqv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv2si },
    &operand_data[6071],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgtv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv2si },
    &operand_data[6071],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev2si },
    &operand_data[6071],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vclev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev2si },
    &operand_data[6071],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcltv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv2si },
    &operand_data[6071],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vceqv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv4si },
    &operand_data[6074],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgtv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv4si },
    &operand_data[6074],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev4si },
    &operand_data[6074],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vclev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev4si },
    &operand_data[6074],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcltv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv4si },
    &operand_data[6074],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vceqv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv2sf },
    &operand_data[6077],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgtv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv2sf },
    &operand_data[6077],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev2sf },
    &operand_data[6077],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vclev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev2sf },
    &operand_data[6077],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcltv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv2sf },
    &operand_data[6077],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vceqv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv4sf },
    &operand_data[6080],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgtv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv4sf },
    &operand_data[6080],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcgev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev4sf },
    &operand_data[6080],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vclev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev4sf },
    &operand_data[6080],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2256 */
  {
    "neon_vcltv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv4sf },
    &operand_data[6080],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2340 */
  {
    "neon_vceqv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv8hf },
    &operand_data[6083],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2340 */
  {
    "neon_vcgtv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv8hf },
    &operand_data[6083],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2340 */
  {
    "neon_vcgev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev8hf },
    &operand_data[6083],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2340 */
  {
    "neon_vclev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev8hf },
    &operand_data[6083],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2340 */
  {
    "neon_vcltv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv8hf },
    &operand_data[6083],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2340 */
  {
    "neon_vceqv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqv4hf },
    &operand_data[6086],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2340 */
  {
    "neon_vcgtv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtv4hf },
    &operand_data[6086],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2340 */
  {
    "neon_vcgev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgev4hf },
    &operand_data[6086],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2340 */
  {
    "neon_vclev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclev4hf },
    &operand_data[6086],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2340 */
  {
    "neon_vcltv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltv4hf },
    &operand_data[6086],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2417 */
  {
    "neon_vcagtv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagtv2sf },
    &operand_data[6089],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2417 */
  {
    "neon_vcagev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagev2sf },
    &operand_data[6089],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2417 */
  {
    "neon_vcaltv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcaltv2sf },
    &operand_data[6089],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2417 */
  {
    "neon_vcalev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcalev2sf },
    &operand_data[6089],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2417 */
  {
    "neon_vcagtv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagtv4sf },
    &operand_data[6092],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2417 */
  {
    "neon_vcagev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagev4sf },
    &operand_data[6092],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2417 */
  {
    "neon_vcaltv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcaltv4sf },
    &operand_data[6092],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2417 */
  {
    "neon_vcalev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcalev4sf },
    &operand_data[6092],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2457 */
  {
    "neon_vcagtv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagtv8hf },
    &operand_data[6095],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2457 */
  {
    "neon_vcagev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagev8hf },
    &operand_data[6095],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2457 */
  {
    "neon_vcaltv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcaltv8hf },
    &operand_data[6095],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2457 */
  {
    "neon_vcalev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcalev8hf },
    &operand_data[6095],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2457 */
  {
    "neon_vcagtv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagtv4hf },
    &operand_data[6098],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2457 */
  {
    "neon_vcagev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcagev4hf },
    &operand_data[6098],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2457 */
  {
    "neon_vcaltv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcaltv4hf },
    &operand_data[6098],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2457 */
  {
    "neon_vcalev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcalev4hf },
    &operand_data[6098],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2498 */
  {
    "neon_vceqzv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqzv8hf },
    &operand_data[6083],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2498 */
  {
    "neon_vcgtzv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtzv8hf },
    &operand_data[6083],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2498 */
  {
    "neon_vcgezv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgezv8hf },
    &operand_data[6083],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2498 */
  {
    "neon_vclezv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclezv8hf },
    &operand_data[6083],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2498 */
  {
    "neon_vcltzv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltzv8hf },
    &operand_data[6083],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2498 */
  {
    "neon_vceqzv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vceqzv4hf },
    &operand_data[6086],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2498 */
  {
    "neon_vcgtzv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgtzv4hf },
    &operand_data[6086],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2498 */
  {
    "neon_vcgezv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcgezv4hf },
    &operand_data[6086],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2498 */
  {
    "neon_vclezv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vclezv4hf },
    &operand_data[6086],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2498 */
  {
    "neon_vcltzv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcltzv4hf },
    &operand_data[6086],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2586 */
  {
    "ssadv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ssadv16qi },
    &operand_data[6101],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2586 */
  {
    "usadv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usadv16qi },
    &operand_data[6101],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2688 */
  {
    "neon_vpaddv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddv8qi },
    &operand_data[5459],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2688 */
  {
    "neon_vpaddv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddv4hi },
    &operand_data[5465],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2688 */
  {
    "neon_vpaddv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddv2si },
    &operand_data[5471],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2688 */
  {
    "neon_vpaddv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vpaddv2sf },
    &operand_data[5483],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2780 */
  {
    "neon_vabsv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabsv8qi },
    &operand_data[5459],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2780 */
  {
    "neon_vabsv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabsv16qi },
    &operand_data[5462],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2780 */
  {
    "neon_vabsv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabsv4hi },
    &operand_data[5465],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2780 */
  {
    "neon_vabsv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabsv8hi },
    &operand_data[5468],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2780 */
  {
    "neon_vabsv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabsv2si },
    &operand_data[5471],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2780 */
  {
    "neon_vabsv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabsv4si },
    &operand_data[5474],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2780 */
  {
    "neon_vabsv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabsv2sf },
    &operand_data[5483],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2780 */
  {
    "neon_vabsv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vabsv4sf },
    &operand_data[5486],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2806 */
  {
    "neon_vnegv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vnegv8qi },
    &operand_data[5459],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2806 */
  {
    "neon_vnegv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vnegv16qi },
    &operand_data[5462],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2806 */
  {
    "neon_vnegv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vnegv4hi },
    &operand_data[5465],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2806 */
  {
    "neon_vnegv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vnegv8hi },
    &operand_data[5468],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2806 */
  {
    "neon_vnegv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vnegv2si },
    &operand_data[5471],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2806 */
  {
    "neon_vnegv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vnegv4si },
    &operand_data[5474],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2806 */
  {
    "neon_vnegv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vnegv2sf },
    &operand_data[5483],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2806 */
  {
    "neon_vnegv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vnegv4sf },
    &operand_data[5486],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2891 */
  {
    "cmulv2sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmulv2sf3 },
    &operand_data[5608],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2891 */
  {
    "cmul_conjv2sf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmul_conjv2sf3 },
    &operand_data[5608],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2891 */
  {
    "cmulv4hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmulv4hf3 },
    &operand_data[5602],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2891 */
  {
    "cmul_conjv4hf3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cmul_conjv4hf3 },
    &operand_data[5602],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2941 */
  {
    "neon_sdotv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_sdotv8qi },
    &operand_data[6105],
    4,
    4,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2941 */
  {
    "neon_udotv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_udotv8qi },
    &operand_data[6105],
    4,
    4,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2941 */
  {
    "neon_sdotv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_sdotv16qi },
    &operand_data[6109],
    4,
    4,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:2941 */
  {
    "neon_udotv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_udotv16qi },
    &operand_data[6109],
    4,
    4,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3051 */
  {
    "usdot_prodv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usdot_prodv8qi },
    &operand_data[6113],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3051 */
  {
    "usdot_prodv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usdot_prodv16qi },
    &operand_data[6101],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3062 */
  {
    "neon_copysignfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_copysignfv2sf },
    &operand_data[5608],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3062 */
  {
    "neon_copysignfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_copysignfv4sf },
    &operand_data[5611],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3118 */
  {
    "neon_vcntv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcntv8qi },
    &operand_data[5459],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3118 */
  {
    "neon_vcntv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcntv16qi },
    &operand_data[5462],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3154 */
  {
    "neon_vmvnv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmvnv8qi },
    &operand_data[5459],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3154 */
  {
    "neon_vmvnv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmvnv16qi },
    &operand_data[5462],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3154 */
  {
    "neon_vmvnv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmvnv4hi },
    &operand_data[5465],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3154 */
  {
    "neon_vmvnv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmvnv8hi },
    &operand_data[5468],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3154 */
  {
    "neon_vmvnv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmvnv2si },
    &operand_data[5471],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3154 */
  {
    "neon_vmvnv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmvnv4si },
    &operand_data[5474],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3255 */
  {
    "neon_vget_lanev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev8qi },
    &operand_data[6117],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3255 */
  {
    "neon_vget_lanev16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev16qi },
    &operand_data[6120],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3255 */
  {
    "neon_vget_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev4hi },
    &operand_data[6123],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3255 */
  {
    "neon_vget_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev8hi },
    &operand_data[6126],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3255 */
  {
    "neon_vget_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev2si },
    &operand_data[6129],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3255 */
  {
    "neon_vget_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev4si },
    &operand_data[6132],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3255 */
  {
    "neon_vget_lanev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev2sf },
    &operand_data[6135],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3255 */
  {
    "neon_vget_lanev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev4sf },
    &operand_data[6138],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3285 */
  {
    "neon_vget_laneuv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_laneuv8qi },
    &operand_data[6117],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3285 */
  {
    "neon_vget_laneuv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_laneuv16qi },
    &operand_data[6120],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3285 */
  {
    "neon_vget_laneuv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_laneuv4hi },
    &operand_data[6123],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3285 */
  {
    "neon_vget_laneuv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_laneuv8hi },
    &operand_data[6126],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3285 */
  {
    "neon_vget_laneuv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_laneuv2si },
    &operand_data[6129],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3285 */
  {
    "neon_vget_laneuv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_laneuv4si },
    &operand_data[6132],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3315 */
  {
    "neon_vget_lanedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanedi },
    &operand_data[6141],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3325 */
  {
    "neon_vget_lanev2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lanev2di },
    &operand_data[6144],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3354 */
  {
    "neon_vset_lanev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vset_lanev8qi },
    &operand_data[6147],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3354 */
  {
    "neon_vset_lanev16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vset_lanev16qi },
    &operand_data[6151],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3354 */
  {
    "neon_vset_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vset_lanev4hi },
    &operand_data[6155],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3354 */
  {
    "neon_vset_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vset_lanev8hi },
    &operand_data[6159],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3354 */
  {
    "neon_vset_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vset_lanev2si },
    &operand_data[6163],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3354 */
  {
    "neon_vset_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vset_lanev4si },
    &operand_data[6167],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3354 */
  {
    "neon_vset_lanev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vset_lanev4hf },
    &operand_data[6171],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3354 */
  {
    "neon_vset_lanev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vset_lanev8hf },
    &operand_data[6175],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3354 */
  {
    "neon_vset_lanev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vset_lanev2sf },
    &operand_data[6179],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3354 */
  {
    "neon_vset_lanev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vset_lanev4sf },
    &operand_data[6183],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3354 */
  {
    "neon_vset_lanev2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vset_lanev2di },
    &operand_data[6187],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3377 */
  {
    "neon_vset_lanedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vset_lanedi },
    &operand_data[6191],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3388 */
  {
    "neon_vcreatev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcreatev8qi },
    &operand_data[6195],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3388 */
  {
    "neon_vcreatev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcreatev4hi },
    &operand_data[6197],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3388 */
  {
    "neon_vcreatev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcreatev2si },
    &operand_data[6199],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3388 */
  {
    "neon_vcreatev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcreatev2sf },
    &operand_data[6201],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3388 */
  {
    "neon_vcreatedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vcreatedi },
    &operand_data[6203],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3448 */
  {
    "neon_vdup_ndi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_ndi },
    &operand_data[5151],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3513 */
  {
    "neon_vdup_lanev8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev8qi },
    &operand_data[6205],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3513 */
  {
    "neon_vdup_lanev16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev16qi },
    &operand_data[6208],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3513 */
  {
    "neon_vdup_lanev4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev4hi },
    &operand_data[6211],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3513 */
  {
    "neon_vdup_lanev8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev8hi },
    &operand_data[6214],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3513 */
  {
    "neon_vdup_lanev2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev2si },
    &operand_data[6217],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3513 */
  {
    "neon_vdup_lanev4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev4si },
    &operand_data[6220],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3513 */
  {
    "neon_vdup_lanev2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev2sf },
    &operand_data[6223],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3513 */
  {
    "neon_vdup_lanev4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev4sf },
    &operand_data[6226],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3532 */
  {
    "neon_vdup_lanev8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev8hf },
    &operand_data[6229],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3532 */
  {
    "neon_vdup_lanev4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev4hf },
    &operand_data[6232],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3532 */
  {
    "neon_vdup_lanev4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev4bf },
    &operand_data[6235],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3532 */
  {
    "neon_vdup_lanev8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev8bf },
    &operand_data[6238],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3552 */
  {
    "neon_vdup_lanedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanedi },
    &operand_data[6141],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3563 */
  {
    "neon_vdup_lanev2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vdup_lanev2di },
    &operand_data[5533],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3607 */
  {
    "neon_vget_highv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_highv16qi },
    &operand_data[5461],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3607 */
  {
    "neon_vget_highv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_highv8hi },
    &operand_data[5467],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3607 */
  {
    "neon_vget_highv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_highv8hf },
    &operand_data[5479],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3607 */
  {
    "neon_vget_highv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_highv8bf },
    &operand_data[5921],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3607 */
  {
    "neon_vget_highv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_highv4si },
    &operand_data[5473],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3607 */
  {
    "neon_vget_highv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_highv4sf },
    &operand_data[5485],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3607 */
  {
    "neon_vget_highv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_highv2di },
    &operand_data[6144],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3618 */
  {
    "neon_vget_lowv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lowv16qi },
    &operand_data[5461],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3618 */
  {
    "neon_vget_lowv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lowv8hi },
    &operand_data[5467],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3618 */
  {
    "neon_vget_lowv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lowv8hf },
    &operand_data[5479],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3618 */
  {
    "neon_vget_lowv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lowv8bf },
    &operand_data[5921],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3618 */
  {
    "neon_vget_lowv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lowv4si },
    &operand_data[5473],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3618 */
  {
    "neon_vget_lowv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lowv4sf },
    &operand_data[5485],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:3618 */
  {
    "neon_vget_lowv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vget_lowv2di },
    &operand_data[6144],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4094 */
  {
    "neon_vmul_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_nv4hi },
    &operand_data[6241],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4094 */
  {
    "neon_vmul_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_nv2si },
    &operand_data[6244],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4094 */
  {
    "neon_vmul_nv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_nv2sf },
    &operand_data[6247],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4107 */
  {
    "neon_vmul_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_nv8hi },
    &operand_data[6250],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4107 */
  {
    "neon_vmul_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_nv4si },
    &operand_data[6253],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4107 */
  {
    "neon_vmul_nv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_nv4sf },
    &operand_data[6256],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4120 */
  {
    "neon_vmul_nv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_nv8hf },
    &operand_data[6259],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4120 */
  {
    "neon_vmul_nv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmul_nv4hf },
    &operand_data[6262],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4133 */
  {
    "neon_vmulls_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmulls_nv4hi },
    &operand_data[6265],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4133 */
  {
    "neon_vmulls_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmulls_nv2si },
    &operand_data[6268],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4146 */
  {
    "neon_vmullu_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmullu_nv4hi },
    &operand_data[6265],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4146 */
  {
    "neon_vmullu_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmullu_nv2si },
    &operand_data[6268],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4159 */
  {
    "neon_vqdmull_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmull_nv4hi },
    &operand_data[6265],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4159 */
  {
    "neon_vqdmull_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmull_nv2si },
    &operand_data[6268],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4172 */
  {
    "neon_vqdmulh_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmulh_nv4hi },
    &operand_data[6241],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4172 */
  {
    "neon_vqdmulh_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmulh_nv2si },
    &operand_data[6244],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4185 */
  {
    "neon_vqrdmulh_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmulh_nv4hi },
    &operand_data[6241],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4185 */
  {
    "neon_vqrdmulh_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmulh_nv2si },
    &operand_data[6244],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4198 */
  {
    "neon_vqdmulh_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmulh_nv8hi },
    &operand_data[6250],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4198 */
  {
    "neon_vqdmulh_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmulh_nv4si },
    &operand_data[6253],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4211 */
  {
    "neon_vqrdmulh_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmulh_nv8hi },
    &operand_data[6250],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4211 */
  {
    "neon_vqrdmulh_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqrdmulh_nv4si },
    &operand_data[6253],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4224 */
  {
    "neon_vmla_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmla_nv4hi },
    &operand_data[6271],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4224 */
  {
    "neon_vmla_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmla_nv2si },
    &operand_data[6275],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4224 */
  {
    "neon_vmla_nv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmla_nv2sf },
    &operand_data[6279],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4238 */
  {
    "neon_vmla_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmla_nv8hi },
    &operand_data[6283],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4238 */
  {
    "neon_vmla_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmla_nv4si },
    &operand_data[6287],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4238 */
  {
    "neon_vmla_nv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmla_nv4sf },
    &operand_data[6291],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4252 */
  {
    "neon_vmlals_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlals_nv4hi },
    &operand_data[6295],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4252 */
  {
    "neon_vmlals_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlals_nv2si },
    &operand_data[6299],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4266 */
  {
    "neon_vmlalu_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlalu_nv4hi },
    &operand_data[6295],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4266 */
  {
    "neon_vmlalu_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlalu_nv2si },
    &operand_data[6299],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4280 */
  {
    "neon_vqdmlal_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmlal_nv4hi },
    &operand_data[6295],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4280 */
  {
    "neon_vqdmlal_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmlal_nv2si },
    &operand_data[6299],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4294 */
  {
    "neon_vmls_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmls_nv4hi },
    &operand_data[6271],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4294 */
  {
    "neon_vmls_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmls_nv2si },
    &operand_data[6275],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4294 */
  {
    "neon_vmls_nv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmls_nv2sf },
    &operand_data[6279],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4308 */
  {
    "neon_vmls_nv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmls_nv8hi },
    &operand_data[6283],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4308 */
  {
    "neon_vmls_nv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmls_nv4si },
    &operand_data[6287],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4308 */
  {
    "neon_vmls_nv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmls_nv4sf },
    &operand_data[6291],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4322 */
  {
    "neon_vmlsls_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsls_nv4hi },
    &operand_data[6295],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4322 */
  {
    "neon_vmlsls_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlsls_nv2si },
    &operand_data[6299],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4336 */
  {
    "neon_vmlslu_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlslu_nv4hi },
    &operand_data[6295],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4336 */
  {
    "neon_vmlslu_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vmlslu_nv2si },
    &operand_data[6299],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4350 */
  {
    "neon_vqdmlsl_nv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmlsl_nv4hi },
    &operand_data[6295],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4350 */
  {
    "neon_vqdmlsl_nv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vqdmlsl_nv2si },
    &operand_data[6299],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4427 */
  {
    "neon_vbslv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv8qi },
    &operand_data[5492],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4427 */
  {
    "neon_vbslv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv16qi },
    &operand_data[5496],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4427 */
  {
    "neon_vbslv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv4hi },
    &operand_data[5991],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4427 */
  {
    "neon_vbslv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv8hi },
    &operand_data[5995],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4427 */
  {
    "neon_vbslv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv2si },
    &operand_data[5999],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4427 */
  {
    "neon_vbslv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv4si },
    &operand_data[6003],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4427 */
  {
    "neon_vbslv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv4hf },
    &operand_data[6303],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4427 */
  {
    "neon_vbslv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv8hf },
    &operand_data[6307],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4427 */
  {
    "neon_vbslv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv4bf },
    &operand_data[6311],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4427 */
  {
    "neon_vbslv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv8bf },
    &operand_data[6315],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4427 */
  {
    "neon_vbslv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv2sf },
    &operand_data[6319],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4427 */
  {
    "neon_vbslv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv4sf },
    &operand_data[6323],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4427 */
  {
    "neon_vbsldi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbsldi },
    &operand_data[6327],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4427 */
  {
    "neon_vbslv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbslv2di },
    &operand_data[6331],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4852 */
  {
    "neon_vtrnv8qi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtrnv8qi_internal },
    &operand_data[5492],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4852 */
  {
    "neon_vtrnv16qi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtrnv16qi_internal },
    &operand_data[5496],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4852 */
  {
    "neon_vtrnv4hi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtrnv4hi_internal },
    &operand_data[5991],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4852 */
  {
    "neon_vtrnv8hi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtrnv8hi_internal },
    &operand_data[5995],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4852 */
  {
    "neon_vtrnv2si_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtrnv2si_internal },
    &operand_data[5999],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4852 */
  {
    "neon_vtrnv4si_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtrnv4si_internal },
    &operand_data[6003],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4852 */
  {
    "neon_vtrnv2sf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtrnv2sf_internal },
    &operand_data[6023],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4852 */
  {
    "neon_vtrnv4sf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtrnv4sf_internal },
    &operand_data[6027],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4852 */
  {
    "neon_vtrnv8hf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtrnv8hf_internal },
    &operand_data[6031],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4852 */
  {
    "neon_vtrnv4hf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vtrnv4hf_internal },
    &operand_data[6035],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4878 */
  {
    "neon_vzipv8qi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vzipv8qi_internal },
    &operand_data[5492],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4878 */
  {
    "neon_vzipv16qi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vzipv16qi_internal },
    &operand_data[5496],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4878 */
  {
    "neon_vzipv4hi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vzipv4hi_internal },
    &operand_data[5991],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4878 */
  {
    "neon_vzipv8hi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vzipv8hi_internal },
    &operand_data[5995],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4878 */
  {
    "neon_vzipv2si_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vzipv2si_internal },
    &operand_data[5999],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4878 */
  {
    "neon_vzipv4si_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vzipv4si_internal },
    &operand_data[6003],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4878 */
  {
    "neon_vzipv2sf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vzipv2sf_internal },
    &operand_data[6023],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4878 */
  {
    "neon_vzipv4sf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vzipv4sf_internal },
    &operand_data[6027],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4878 */
  {
    "neon_vzipv8hf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vzipv8hf_internal },
    &operand_data[6031],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4878 */
  {
    "neon_vzipv4hf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vzipv4hf_internal },
    &operand_data[6035],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4904 */
  {
    "neon_vuzpv8qi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vuzpv8qi_internal },
    &operand_data[5492],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4904 */
  {
    "neon_vuzpv16qi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vuzpv16qi_internal },
    &operand_data[5496],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4904 */
  {
    "neon_vuzpv4hi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vuzpv4hi_internal },
    &operand_data[5991],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4904 */
  {
    "neon_vuzpv8hi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vuzpv8hi_internal },
    &operand_data[5995],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4904 */
  {
    "neon_vuzpv2si_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vuzpv2si_internal },
    &operand_data[5999],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4904 */
  {
    "neon_vuzpv4si_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vuzpv4si_internal },
    &operand_data[6003],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4904 */
  {
    "neon_vuzpv2sf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vuzpv2sf_internal },
    &operand_data[6023],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4904 */
  {
    "neon_vuzpv4sf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vuzpv4sf_internal },
    &operand_data[6027],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4904 */
  {
    "neon_vuzpv8hf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vuzpv8hf_internal },
    &operand_data[6031],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4904 */
  {
    "neon_vuzpv4hf_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vuzpv4hf_internal },
    &operand_data[6035],
    4,
    4,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4930 */
  {
    "vec_load_lanesv8qiv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesv8qiv8qi },
    &operand_data[6335],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4930 */
  {
    "vec_load_lanesv16qiv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesv16qiv16qi },
    &operand_data[6337],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4930 */
  {
    "vec_load_lanesv4hiv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesv4hiv4hi },
    &operand_data[6339],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4930 */
  {
    "vec_load_lanesv8hiv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesv8hiv8hi },
    &operand_data[6341],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4930 */
  {
    "vec_load_lanesv2siv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesv2siv2si },
    &operand_data[6343],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4930 */
  {
    "vec_load_lanesv4siv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesv4siv4si },
    &operand_data[6345],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4930 */
  {
    "vec_load_lanesv4hfv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesv4hfv4hf },
    &operand_data[6347],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4930 */
  {
    "vec_load_lanesv8hfv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesv8hfv8hf },
    &operand_data[6349],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4930 */
  {
    "vec_load_lanesv4bfv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesv4bfv4bf },
    &operand_data[6351],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4930 */
  {
    "vec_load_lanesv8bfv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesv8bfv8bf },
    &operand_data[6353],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4930 */
  {
    "vec_load_lanesv2sfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesv2sfv2sf },
    &operand_data[6355],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4930 */
  {
    "vec_load_lanesv4sfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesv4sfv4sf },
    &operand_data[6357],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4930 */
  {
    "vec_load_lanesdidi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesdidi },
    &operand_data[6359],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:4930 */
  {
    "vec_load_lanesv2div2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesv2div2di },
    &operand_data[6361],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5005 */
  {
    "neon_vld1_dupdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld1_dupdi },
    &operand_data[6359],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5040 */
  {
    "vec_store_lanesv8qiv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesv8qiv8qi },
    &operand_data[6363],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5040 */
  {
    "vec_store_lanesv16qiv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesv16qiv16qi },
    &operand_data[6365],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5040 */
  {
    "vec_store_lanesv4hiv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesv4hiv4hi },
    &operand_data[6367],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5040 */
  {
    "vec_store_lanesv8hiv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesv8hiv8hi },
    &operand_data[6369],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5040 */
  {
    "vec_store_lanesv2siv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesv2siv2si },
    &operand_data[6371],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5040 */
  {
    "vec_store_lanesv4siv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesv4siv4si },
    &operand_data[6373],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5040 */
  {
    "vec_store_lanesv4hfv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesv4hfv4hf },
    &operand_data[6375],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5040 */
  {
    "vec_store_lanesv8hfv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesv8hfv8hf },
    &operand_data[6377],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5040 */
  {
    "vec_store_lanesv4bfv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesv4bfv4bf },
    &operand_data[6379],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5040 */
  {
    "vec_store_lanesv8bfv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesv8bfv8bf },
    &operand_data[6381],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5040 */
  {
    "vec_store_lanesv2sfv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesv2sfv2sf },
    &operand_data[6383],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5040 */
  {
    "vec_store_lanesv4sfv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesv4sfv4sf },
    &operand_data[6385],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5040 */
  {
    "vec_store_lanesdidi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesdidi },
    &operand_data[6387],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5040 */
  {
    "vec_store_lanesv2div2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesv2div2di },
    &operand_data[6389],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5103 */
  {
    "vec_load_lanestiv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanestiv8qi },
    &operand_data[6391],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5103 */
  {
    "vec_load_lanestiv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanestiv4hi },
    &operand_data[6391],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5103 */
  {
    "vec_load_lanestiv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanestiv4hf },
    &operand_data[6391],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5103 */
  {
    "vec_load_lanestiv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanestiv4bf },
    &operand_data[6391],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5103 */
  {
    "vec_load_lanestiv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanestiv2si },
    &operand_data[6391],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5103 */
  {
    "vec_load_lanestiv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanestiv2sf },
    &operand_data[6391],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5103 */
  {
    "vec_load_lanestidi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanestidi },
    &operand_data[6391],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5230 */
  {
    "vec_store_lanestiv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanestiv8qi },
    &operand_data[6392],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5230 */
  {
    "vec_store_lanestiv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanestiv4hi },
    &operand_data[6392],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5230 */
  {
    "vec_store_lanestiv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanestiv4hf },
    &operand_data[6392],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5230 */
  {
    "vec_store_lanestiv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanestiv4bf },
    &operand_data[6392],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5230 */
  {
    "vec_store_lanestiv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanestiv2si },
    &operand_data[6392],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5230 */
  {
    "vec_store_lanestiv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanestiv2sf },
    &operand_data[6392],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5230 */
  {
    "vec_store_lanestidi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanestidi },
    &operand_data[6392],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5319 */
  {
    "vec_load_laneseiv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_laneseiv8qi },
    &operand_data[6394],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5319 */
  {
    "vec_load_laneseiv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_laneseiv4hi },
    &operand_data[6394],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5319 */
  {
    "vec_load_laneseiv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_laneseiv4hf },
    &operand_data[6394],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5319 */
  {
    "vec_load_laneseiv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_laneseiv4bf },
    &operand_data[6394],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5319 */
  {
    "vec_load_laneseiv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_laneseiv2si },
    &operand_data[6394],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5319 */
  {
    "vec_load_laneseiv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_laneseiv2sf },
    &operand_data[6394],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5319 */
  {
    "vec_load_laneseidi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_laneseidi },
    &operand_data[6394],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5344 */
  {
    "vec_load_lanesciv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesciv16qi },
    &operand_data[6396],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5344 */
  {
    "vec_load_lanesciv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesciv8hi },
    &operand_data[6396],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5344 */
  {
    "vec_load_lanesciv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesciv8hf },
    &operand_data[6396],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5344 */
  {
    "vec_load_lanesciv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesciv4si },
    &operand_data[6396],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5344 */
  {
    "vec_load_lanesciv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesciv4sf },
    &operand_data[6396],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5354 */
  {
    "neon_vld3v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3v16qi },
    &operand_data[6396],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5354 */
  {
    "neon_vld3v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3v8hi },
    &operand_data[6396],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5354 */
  {
    "neon_vld3v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3v8hf },
    &operand_data[6396],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5354 */
  {
    "neon_vld3v8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3v8bf },
    &operand_data[6396],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5354 */
  {
    "neon_vld3v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3v4si },
    &operand_data[6396],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5354 */
  {
    "neon_vld3v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld3v4sf },
    &operand_data[6396],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5512 */
  {
    "vec_store_laneseiv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_laneseiv8qi },
    &operand_data[6398],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5512 */
  {
    "vec_store_laneseiv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_laneseiv4hi },
    &operand_data[6398],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5512 */
  {
    "vec_store_laneseiv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_laneseiv4hf },
    &operand_data[6398],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5512 */
  {
    "vec_store_laneseiv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_laneseiv4bf },
    &operand_data[6398],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5512 */
  {
    "vec_store_laneseiv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_laneseiv2si },
    &operand_data[6398],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5512 */
  {
    "vec_store_laneseiv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_laneseiv2sf },
    &operand_data[6398],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5512 */
  {
    "vec_store_laneseidi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_laneseidi },
    &operand_data[6398],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5536 */
  {
    "vec_store_lanesciv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesciv16qi },
    &operand_data[6400],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5536 */
  {
    "vec_store_lanesciv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesciv8hi },
    &operand_data[6400],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5536 */
  {
    "vec_store_lanesciv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesciv8hf },
    &operand_data[6400],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5536 */
  {
    "vec_store_lanesciv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesciv4si },
    &operand_data[6400],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5536 */
  {
    "vec_store_lanesciv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesciv4sf },
    &operand_data[6400],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5546 */
  {
    "neon_vst3v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3v16qi },
    &operand_data[6400],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5546 */
  {
    "neon_vst3v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3v8hi },
    &operand_data[6400],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5546 */
  {
    "neon_vst3v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3v8hf },
    &operand_data[6400],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5546 */
  {
    "neon_vst3v8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3v8bf },
    &operand_data[6400],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5546 */
  {
    "neon_vst3v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3v4si },
    &operand_data[6400],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5546 */
  {
    "neon_vst3v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst3v4sf },
    &operand_data[6400],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5657 */
  {
    "vec_load_lanesoiv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesoiv8qi },
    &operand_data[5844],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5657 */
  {
    "vec_load_lanesoiv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesoiv4hi },
    &operand_data[5844],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5657 */
  {
    "vec_load_lanesoiv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesoiv4hf },
    &operand_data[5844],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5657 */
  {
    "vec_load_lanesoiv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesoiv4bf },
    &operand_data[5844],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5657 */
  {
    "vec_load_lanesoiv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesoiv2si },
    &operand_data[5844],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5657 */
  {
    "vec_load_lanesoiv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesoiv2sf },
    &operand_data[5844],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5657 */
  {
    "vec_load_lanesoidi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_load_lanesoidi },
    &operand_data[5844],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5682 */
  {
    "neon_vld4v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4v16qi },
    &operand_data[5847],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5682 */
  {
    "neon_vld4v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4v8hi },
    &operand_data[5847],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5682 */
  {
    "neon_vld4v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4v8hf },
    &operand_data[5847],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5682 */
  {
    "neon_vld4v8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4v8bf },
    &operand_data[5847],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5682 */
  {
    "neon_vld4v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4v4si },
    &operand_data[5847],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5682 */
  {
    "neon_vld4v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vld4v4sf },
    &operand_data[5847],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5848 */
  {
    "vec_store_lanesoiv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesoiv8qi },
    &operand_data[5845],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5848 */
  {
    "vec_store_lanesoiv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesoiv4hi },
    &operand_data[5845],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5848 */
  {
    "vec_store_lanesoiv4hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesoiv4hf },
    &operand_data[5845],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5848 */
  {
    "vec_store_lanesoiv4bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesoiv4bf },
    &operand_data[5845],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5848 */
  {
    "vec_store_lanesoiv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesoiv2si },
    &operand_data[5845],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5848 */
  {
    "vec_store_lanesoiv2sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesoiv2sf },
    &operand_data[5845],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5848 */
  {
    "vec_store_lanesoidi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_store_lanesoidi },
    &operand_data[5845],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5873 */
  {
    "neon_vst4v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4v16qi },
    &operand_data[5848],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5873 */
  {
    "neon_vst4v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4v8hi },
    &operand_data[5848],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5873 */
  {
    "neon_vst4v8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4v8hf },
    &operand_data[5848],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5873 */
  {
    "neon_vst4v8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4v8bf },
    &operand_data[5848],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5873 */
  {
    "neon_vst4v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4v4si },
    &operand_data[5848],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:5873 */
  {
    "neon_vst4v4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vst4v4sf },
    &operand_data[5848],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6008 */
  {
    "vec_unpacks_hi_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v16qi },
    &operand_data[6402],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6008 */
  {
    "vec_unpacku_hi_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_hi_v16qi },
    &operand_data[6402],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6008 */
  {
    "vec_unpacks_hi_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v8hi },
    &operand_data[6404],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6008 */
  {
    "vec_unpacku_hi_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_hi_v8hi },
    &operand_data[6404],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6008 */
  {
    "vec_unpacks_hi_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v4si },
    &operand_data[6406],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6008 */
  {
    "vec_unpacku_hi_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_hi_v4si },
    &operand_data[6406],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6027 */
  {
    "vec_unpacks_lo_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v16qi },
    &operand_data[6402],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6027 */
  {
    "vec_unpacku_lo_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_lo_v16qi },
    &operand_data[6402],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6027 */
  {
    "vec_unpacks_lo_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v8hi },
    &operand_data[6404],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6027 */
  {
    "vec_unpacku_lo_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_lo_v8hi },
    &operand_data[6404],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6027 */
  {
    "vec_unpacks_lo_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v4si },
    &operand_data[6406],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6027 */
  {
    "vec_unpacku_lo_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_lo_v4si },
    &operand_data[6406],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6058 */
  {
    "vec_widen_smult_lo_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_lo_v16qi },
    &operand_data[6408],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6058 */
  {
    "vec_widen_umult_lo_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_lo_v16qi },
    &operand_data[6408],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6058 */
  {
    "vec_widen_smult_lo_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_lo_v8hi },
    &operand_data[6411],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6058 */
  {
    "vec_widen_umult_lo_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_lo_v8hi },
    &operand_data[6411],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6058 */
  {
    "vec_widen_smult_lo_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_lo_v4si },
    &operand_data[6414],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6058 */
  {
    "vec_widen_umult_lo_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_lo_v4si },
    &operand_data[6414],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6092 */
  {
    "vec_widen_smult_hi_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_hi_v16qi },
    &operand_data[6408],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6092 */
  {
    "vec_widen_umult_hi_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_hi_v16qi },
    &operand_data[6408],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6092 */
  {
    "vec_widen_smult_hi_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_hi_v8hi },
    &operand_data[6411],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6092 */
  {
    "vec_widen_umult_hi_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_hi_v8hi },
    &operand_data[6411],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6092 */
  {
    "vec_widen_smult_hi_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_hi_v4si },
    &operand_data[6414],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6092 */
  {
    "vec_widen_umult_hi_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_hi_v4si },
    &operand_data[6414],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6125 */
  {
    "vec_widen_sshiftl_lo_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_sshiftl_lo_v16qi },
    &operand_data[6417],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6125 */
  {
    "vec_widen_ushiftl_lo_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_ushiftl_lo_v16qi },
    &operand_data[6417],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6125 */
  {
    "vec_widen_sshiftl_lo_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_sshiftl_lo_v8hi },
    &operand_data[6420],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6125 */
  {
    "vec_widen_ushiftl_lo_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_ushiftl_lo_v8hi },
    &operand_data[6420],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6125 */
  {
    "vec_widen_sshiftl_lo_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_sshiftl_lo_v4si },
    &operand_data[6423],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6125 */
  {
    "vec_widen_ushiftl_lo_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_ushiftl_lo_v4si },
    &operand_data[6423],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6138 */
  {
    "vec_widen_sshiftl_hi_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_sshiftl_hi_v16qi },
    &operand_data[6417],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6138 */
  {
    "vec_widen_ushiftl_hi_v16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_ushiftl_hi_v16qi },
    &operand_data[6417],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6138 */
  {
    "vec_widen_sshiftl_hi_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_sshiftl_hi_v8hi },
    &operand_data[6420],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6138 */
  {
    "vec_widen_ushiftl_hi_v8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_ushiftl_hi_v8hi },
    &operand_data[6420],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6138 */
  {
    "vec_widen_sshiftl_hi_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_sshiftl_hi_v4si },
    &operand_data[6423],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6138 */
  {
    "vec_widen_ushiftl_hi_v4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_ushiftl_hi_v4si },
    &operand_data[6423],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6161 */
  {
    "vec_unpacks_lo_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v8qi },
    &operand_data[6426],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6161 */
  {
    "vec_unpacku_lo_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_lo_v8qi },
    &operand_data[6426],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6161 */
  {
    "vec_unpacks_lo_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v4hi },
    &operand_data[6428],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6161 */
  {
    "vec_unpacku_lo_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_lo_v4hi },
    &operand_data[6428],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6161 */
  {
    "vec_unpacks_lo_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_lo_v2si },
    &operand_data[6430],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6161 */
  {
    "vec_unpacku_lo_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_lo_v2si },
    &operand_data[6430],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6174 */
  {
    "vec_unpacks_hi_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v8qi },
    &operand_data[6426],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6174 */
  {
    "vec_unpacku_hi_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_hi_v8qi },
    &operand_data[6426],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6174 */
  {
    "vec_unpacks_hi_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v4hi },
    &operand_data[6428],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6174 */
  {
    "vec_unpacku_hi_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_hi_v4hi },
    &operand_data[6428],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6174 */
  {
    "vec_unpacks_hi_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacks_hi_v2si },
    &operand_data[6430],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6174 */
  {
    "vec_unpacku_hi_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_unpacku_hi_v2si },
    &operand_data[6430],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6198 */
  {
    "vec_widen_smult_hi_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_hi_v8qi },
    &operand_data[6432],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6198 */
  {
    "vec_widen_umult_hi_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_hi_v8qi },
    &operand_data[6432],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6198 */
  {
    "vec_widen_smult_hi_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_hi_v4hi },
    &operand_data[6435],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6198 */
  {
    "vec_widen_umult_hi_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_hi_v4hi },
    &operand_data[6435],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6198 */
  {
    "vec_widen_smult_hi_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_hi_v2si },
    &operand_data[6438],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6198 */
  {
    "vec_widen_umult_hi_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_hi_v2si },
    &operand_data[6438],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6213 */
  {
    "vec_widen_smult_lo_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_lo_v8qi },
    &operand_data[6432],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6213 */
  {
    "vec_widen_umult_lo_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_lo_v8qi },
    &operand_data[6432],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6213 */
  {
    "vec_widen_smult_lo_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_lo_v4hi },
    &operand_data[6435],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6213 */
  {
    "vec_widen_umult_lo_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_lo_v4hi },
    &operand_data[6435],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6213 */
  {
    "vec_widen_smult_lo_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_smult_lo_v2si },
    &operand_data[6438],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6213 */
  {
    "vec_widen_umult_lo_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_umult_lo_v2si },
    &operand_data[6438],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6228 */
  {
    "vec_widen_sshiftl_hi_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_sshiftl_hi_v8qi },
    &operand_data[6441],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6228 */
  {
    "vec_widen_ushiftl_hi_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_ushiftl_hi_v8qi },
    &operand_data[6441],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6228 */
  {
    "vec_widen_sshiftl_hi_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_sshiftl_hi_v4hi },
    &operand_data[6444],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6228 */
  {
    "vec_widen_ushiftl_hi_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_ushiftl_hi_v4hi },
    &operand_data[6444],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6228 */
  {
    "vec_widen_sshiftl_hi_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_sshiftl_hi_v2si },
    &operand_data[6447],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6228 */
  {
    "vec_widen_ushiftl_hi_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_ushiftl_hi_v2si },
    &operand_data[6447],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6242 */
  {
    "vec_widen_sshiftl_lo_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_sshiftl_lo_v8qi },
    &operand_data[6441],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6242 */
  {
    "vec_widen_ushiftl_lo_v8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_ushiftl_lo_v8qi },
    &operand_data[6441],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6242 */
  {
    "vec_widen_sshiftl_lo_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_sshiftl_lo_v4hi },
    &operand_data[6444],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6242 */
  {
    "vec_widen_ushiftl_lo_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_ushiftl_lo_v4hi },
    &operand_data[6444],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6242 */
  {
    "vec_widen_sshiftl_lo_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_sshiftl_lo_v2si },
    &operand_data[6447],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6242 */
  {
    "vec_widen_ushiftl_lo_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_widen_ushiftl_lo_v2si },
    &operand_data[6447],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6282 */
  {
    "vec_pack_trunc_v4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_v4hi },
    &operand_data[6450],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6282 */
  {
    "vec_pack_trunc_v2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_v2si },
    &operand_data[6452],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6282 */
  {
    "vec_pack_trunc_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_pack_trunc_di },
    &operand_data[6454],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6424 */
  {
    "neon_vbfcvtbf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vbfcvtbf },
    &operand_data[6457],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6485 */
  {
    "neon_vfmab_laneqv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmab_laneqv8bf },
    &operand_data[6459],
    5,
    5,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/neon.md:6485 */
  {
    "neon_vfmat_laneqv8bf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_neon_vfmat_laneqv8bf },
    &operand_data[6459],
    5,
    5,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:32 */
  {
    "crypto_aesd",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_aesd },
    &operand_data[3318],
    3,
    3,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:32 */
  {
    "crypto_aese",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_aese },
    &operand_data[3318],
    3,
    3,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:235 */
  {
    "crypto_sha1h",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_sha1h },
    &operand_data[6415],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:271 */
  {
    "crypto_sha1c",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_sha1c },
    &operand_data[6464],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:271 */
  {
    "crypto_sha1m",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_sha1m },
    &operand_data[6464],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/crypto.md:271 */
  {
    "crypto_sha1p",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_crypto_sha1p },
    &operand_data[6464],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:37 */
  {
    "memory_barrier",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_memory_barrier },
    &operand_data[0],
    0,
    0,
    2,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:133 */
  {
    "atomic_loaddi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_loaddi },
    &operand_data[6468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:172 */
  {
    "atomic_compare_and_swapqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swapqi },
    &operand_data[6471],
    8,
    8,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:172 */
  {
    "atomic_compare_and_swaphi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swaphi },
    &operand_data[6479],
    8,
    8,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:172 */
  {
    "atomic_compare_and_swapsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swapsi },
    &operand_data[6487],
    8,
    8,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:172 */
  {
    "atomic_compare_and_swapdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_atomic_compare_and_swapdi },
    &operand_data[6495],
    8,
    8,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:31 */
  {
    "addv4qq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addv4qq3 },
    &operand_data[6503],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:31 */
  {
    "addv2hq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addv2hq3 },
    &operand_data[6506],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:31 */
  {
    "addv2ha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_addv2ha3 },
    &operand_data[6509],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:60 */
  {
    "ssaddv4qq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ssaddv4qq3 },
    &operand_data[6503],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:60 */
  {
    "ssaddv2hq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ssaddv2hq3 },
    &operand_data[6506],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:60 */
  {
    "ssaddqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ssaddqq3 },
    &operand_data[6512],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:60 */
  {
    "ssaddhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ssaddhq3 },
    &operand_data[6515],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:60 */
  {
    "ssaddv2ha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ssaddv2ha3 },
    &operand_data[6509],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:60 */
  {
    "ssaddha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ssaddha3 },
    &operand_data[6518],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:60 */
  {
    "ssaddsq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ssaddsq3 },
    &operand_data[6521],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:60 */
  {
    "ssaddsa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ssaddsa3 },
    &operand_data[6524],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:90 */
  {
    "subv4qq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subv4qq3 },
    &operand_data[6503],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:90 */
  {
    "subv2hq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subv2hq3 },
    &operand_data[6506],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:90 */
  {
    "subv2ha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_subv2ha3 },
    &operand_data[6509],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:120 */
  {
    "sssubv4qq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sssubv4qq3 },
    &operand_data[6503],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:120 */
  {
    "sssubv2hq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sssubv2hq3 },
    &operand_data[6506],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:120 */
  {
    "sssubqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sssubqq3 },
    &operand_data[6512],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:120 */
  {
    "sssubhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sssubhq3 },
    &operand_data[6515],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:120 */
  {
    "sssubv2ha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sssubv2ha3 },
    &operand_data[6509],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:120 */
  {
    "sssubha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sssubha3 },
    &operand_data[6518],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:120 */
  {
    "sssubsq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sssubsq3 },
    &operand_data[6521],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:120 */
  {
    "sssubsa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_sssubsa3 },
    &operand_data[6524],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:144 */
  {
    "mulqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulqq3 },
    &operand_data[6512],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:162 */
  {
    "mulhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulhq3 },
    &operand_data[6515],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:180 */
  {
    "mulsq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulsq3 },
    &operand_data[6521],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:202 */
  {
    "mulsa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulsa3 },
    &operand_data[6524],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:221 */
  {
    "mulusa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulusa3 },
    &operand_data[6527],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:243 */
  {
    "ssmulsa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ssmulsa3 },
    &operand_data[6530],
    3,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:315 */
  {
    "usmulusa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usmulusa3 },
    &operand_data[6535],
    3,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:387 */
  {
    "mulha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mulha3 },
    &operand_data[6518],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:403 */
  {
    "muluha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_muluha3 },
    &operand_data[6540],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:423 */
  {
    "ssmulha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_ssmulha3 },
    &operand_data[6518],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:445 */
  {
    "usmuluha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_usmuluha3 },
    &operand_data[6540],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:413 */
  {
    "mve_vmvnq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_sv16qi },
    &operand_data[5462],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:413 */
  {
    "mve_vmvnq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_sv8hi },
    &operand_data[5468],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:413 */
  {
    "mve_vmvnq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vmvnq_sv4si },
    &operand_data[5474],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:447 */
  {
    "mve_vclzq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclzq_uv16qi },
    &operand_data[5462],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:447 */
  {
    "mve_vclzq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclzq_uv8hi },
    &operand_data[5468],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:447 */
  {
    "mve_vclzq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vclzq_uv4si },
    &operand_data[5474],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:928 */
  {
    "mve_vandq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_sv16qi },
    &operand_data[5539],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:928 */
  {
    "mve_vandq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_sv8hi },
    &operand_data[5545],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:928 */
  {
    "mve_vandq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vandq_sv4si },
    &operand_data[5551],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:951 */
  {
    "mve_vbicq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_sv16qi },
    &operand_data[5462],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:951 */
  {
    "mve_vbicq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_sv8hi },
    &operand_data[5468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:951 */
  {
    "mve_vbicq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vbicq_sv4si },
    &operand_data[5474],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:991 */
  {
    "cadd90v16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cadd90v16qi3 },
    &operand_data[6543],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:991 */
  {
    "cadd270v16qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cadd270v16qi3 },
    &operand_data[6543],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:991 */
  {
    "cadd90v8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cadd90v8hi3 },
    &operand_data[6546],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:991 */
  {
    "cadd270v8hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cadd270v8hi3 },
    &operand_data[6546],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:991 */
  {
    "cadd90v4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cadd90v4si3 },
    &operand_data[6464],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:991 */
  {
    "cadd270v4si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_cadd270v4si3 },
    &operand_data[6464],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1012 */
  {
    "mve_veorq_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_sv16qi },
    &operand_data[5462],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1012 */
  {
    "mve_veorq_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_sv8hi },
    &operand_data[5468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1012 */
  {
    "mve_veorq_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_veorq_sv4si },
    &operand_data[5474],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1411 */
  {
    "mve_vornq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_uv16qi },
    &operand_data[5462],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1411 */
  {
    "mve_vornq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_uv8hi },
    &operand_data[5468],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1411 */
  {
    "mve_vornq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vornq_uv4si },
    &operand_data[5474],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1439 */
  {
    "mve_vorrq_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_uv16qi },
    &operand_data[5572],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1439 */
  {
    "mve_vorrq_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_uv8hi },
    &operand_data[5578],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:1439 */
  {
    "mve_vorrq_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vorrq_uv4si },
    &operand_data[5584],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2668 */
  {
    "mve_vshlcq_vec_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_vec_sv16qi },
    &operand_data[6549],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2668 */
  {
    "mve_vshlcq_vec_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_vec_uv16qi },
    &operand_data[6549],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2668 */
  {
    "mve_vshlcq_vec_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_vec_sv8hi },
    &operand_data[6553],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2668 */
  {
    "mve_vshlcq_vec_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_vec_uv8hi },
    &operand_data[6553],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2668 */
  {
    "mve_vshlcq_vec_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_vec_sv4si },
    &operand_data[6557],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2668 */
  {
    "mve_vshlcq_vec_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_vec_uv4si },
    &operand_data[6557],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2682 */
  {
    "mve_vshlcq_carry_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_carry_sv16qi },
    &operand_data[6561],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2682 */
  {
    "mve_vshlcq_carry_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_carry_uv16qi },
    &operand_data[6561],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2682 */
  {
    "mve_vshlcq_carry_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_carry_sv8hi },
    &operand_data[6565],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2682 */
  {
    "mve_vshlcq_carry_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_carry_uv8hi },
    &operand_data[6565],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2682 */
  {
    "mve_vshlcq_carry_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_carry_sv4si },
    &operand_data[6569],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:2682 */
  {
    "mve_vshlcq_carry_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_carry_uv4si },
    &operand_data[6569],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7099 */
  {
    "mve_vstrbq_scatter_offset_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_sv16qi },
    &operand_data[6573],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7099 */
  {
    "mve_vstrbq_scatter_offset_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_uv16qi },
    &operand_data[6573],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7099 */
  {
    "mve_vstrbq_scatter_offset_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_sv8hi },
    &operand_data[6576],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7099 */
  {
    "mve_vstrbq_scatter_offset_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_uv8hi },
    &operand_data[6576],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7099 */
  {
    "mve_vstrbq_scatter_offset_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_sv4si },
    &operand_data[6579],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7099 */
  {
    "mve_vstrbq_scatter_offset_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_uv4si },
    &operand_data[6579],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7214 */
  {
    "mve_vstrbq_scatter_offset_p_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_p_sv16qi },
    &operand_data[6582],
    4,
    4,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7214 */
  {
    "mve_vstrbq_scatter_offset_p_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_p_uv16qi },
    &operand_data[6582],
    4,
    4,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7214 */
  {
    "mve_vstrbq_scatter_offset_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_p_sv8hi },
    &operand_data[6586],
    4,
    4,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7214 */
  {
    "mve_vstrbq_scatter_offset_p_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_p_uv8hi },
    &operand_data[6586],
    4,
    4,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7214 */
  {
    "mve_vstrbq_scatter_offset_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_p_sv4si },
    &operand_data[6590],
    4,
    4,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7214 */
  {
    "mve_vstrbq_scatter_offset_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrbq_scatter_offset_p_uv4si },
    &operand_data[6590],
    4,
    4,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7613 */
  {
    "mve_vld1q_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld1q_fv8hf },
    &operand_data[6594],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7613 */
  {
    "mve_vld1q_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld1q_fv4sf },
    &operand_data[6596],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7623 */
  {
    "mve_vld1q_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld1q_sv16qi },
    &operand_data[6598],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7623 */
  {
    "mve_vld1q_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld1q_uv16qi },
    &operand_data[6598],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7623 */
  {
    "mve_vld1q_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld1q_sv8hi },
    &operand_data[6600],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7623 */
  {
    "mve_vld1q_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld1q_uv8hi },
    &operand_data[6600],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7623 */
  {
    "mve_vld1q_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld1q_sv4si },
    &operand_data[6602],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:7623 */
  {
    "mve_vld1q_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vld1q_uv4si },
    &operand_data[6602],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8111 */
  {
    "mve_vstrhq_scatter_offset_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_p_sv8hi },
    &operand_data[6604],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8111 */
  {
    "mve_vstrhq_scatter_offset_p_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_p_uv8hi },
    &operand_data[6604],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8111 */
  {
    "mve_vstrhq_scatter_offset_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_p_sv4si },
    &operand_data[6608],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8111 */
  {
    "mve_vstrhq_scatter_offset_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_p_uv4si },
    &operand_data[6608],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8143 */
  {
    "mve_vstrhq_scatter_offset_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_sv8hi },
    &operand_data[6604],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8143 */
  {
    "mve_vstrhq_scatter_offset_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_uv8hi },
    &operand_data[6604],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8143 */
  {
    "mve_vstrhq_scatter_offset_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_sv4si },
    &operand_data[6608],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8143 */
  {
    "mve_vstrhq_scatter_offset_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_uv4si },
    &operand_data[6608],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8171 */
  {
    "mve_vstrhq_scatter_shifted_offset_p_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_p_sv8hi },
    &operand_data[6604],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8171 */
  {
    "mve_vstrhq_scatter_shifted_offset_p_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_p_uv8hi },
    &operand_data[6604],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8171 */
  {
    "mve_vstrhq_scatter_shifted_offset_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_p_sv4si },
    &operand_data[6608],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8171 */
  {
    "mve_vstrhq_scatter_shifted_offset_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_p_uv4si },
    &operand_data[6608],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8203 */
  {
    "mve_vstrhq_scatter_shifted_offset_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_sv8hi },
    &operand_data[6604],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8203 */
  {
    "mve_vstrhq_scatter_shifted_offset_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_uv8hi },
    &operand_data[6604],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8203 */
  {
    "mve_vstrhq_scatter_shifted_offset_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_sv4si },
    &operand_data[6608],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8203 */
  {
    "mve_vstrhq_scatter_shifted_offset_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_uv4si },
    &operand_data[6608],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8326 */
  {
    "mve_vst1q_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst1q_fv8hf },
    &operand_data[6612],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8326 */
  {
    "mve_vst1q_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst1q_fv4sf },
    &operand_data[6614],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8336 */
  {
    "mve_vst1q_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst1q_sv16qi },
    &operand_data[6616],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8336 */
  {
    "mve_vst1q_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst1q_uv16qi },
    &operand_data[6616],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8336 */
  {
    "mve_vst1q_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst1q_sv8hi },
    &operand_data[6618],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8336 */
  {
    "mve_vst1q_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst1q_uv8hi },
    &operand_data[6618],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8336 */
  {
    "mve_vst1q_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst1q_sv4si },
    &operand_data[6620],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8336 */
  {
    "mve_vst1q_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vst1q_uv4si },
    &operand_data[6620],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8394 */
  {
    "mve_vstrdq_scatter_offset_p_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_offset_p_sv2di },
    &operand_data[6622],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8394 */
  {
    "mve_vstrdq_scatter_offset_p_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_offset_p_uv2di },
    &operand_data[6622],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8425 */
  {
    "mve_vstrdq_scatter_offset_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_offset_sv2di },
    &operand_data[6622],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8425 */
  {
    "mve_vstrdq_scatter_offset_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_offset_uv2di },
    &operand_data[6622],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8453 */
  {
    "mve_vstrdq_scatter_shifted_offset_p_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_shifted_offset_p_sv2di },
    &operand_data[6622],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8453 */
  {
    "mve_vstrdq_scatter_shifted_offset_p_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_shifted_offset_p_uv2di },
    &operand_data[6622],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8485 */
  {
    "mve_vstrdq_scatter_shifted_offset_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_shifted_offset_sv2di },
    &operand_data[6622],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8485 */
  {
    "mve_vstrdq_scatter_shifted_offset_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrdq_scatter_shifted_offset_uv2di },
    &operand_data[6622],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8514 */
  {
    "mve_vstrhq_scatter_offset_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_fv8hf },
    &operand_data[6626],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8542 */
  {
    "mve_vstrhq_scatter_offset_p_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_offset_p_fv8hf },
    &operand_data[6626],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8573 */
  {
    "mve_vstrhq_scatter_shifted_offset_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_fv8hf },
    &operand_data[6630],
    3,
    3,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8601 */
  {
    "mve_vstrhq_scatter_shifted_offset_p_fv8hf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrhq_scatter_shifted_offset_p_fv8hf },
    &operand_data[6630],
    4,
    4,
    0,
    1,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8678 */
  {
    "mve_vstrwq_scatter_offset_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_offset_fv4sf },
    &operand_data[6634],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8706 */
  {
    "mve_vstrwq_scatter_offset_p_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_offset_p_fv4sf },
    &operand_data[6634],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8737 */
  {
    "mve_vstrwq_scatter_offset_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_offset_p_sv4si },
    &operand_data[6638],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8737 */
  {
    "mve_vstrwq_scatter_offset_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_offset_p_uv4si },
    &operand_data[6638],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8768 */
  {
    "mve_vstrwq_scatter_offset_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_offset_sv4si },
    &operand_data[6638],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8768 */
  {
    "mve_vstrwq_scatter_offset_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_offset_uv4si },
    &operand_data[6638],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8796 */
  {
    "mve_vstrwq_scatter_shifted_offset_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_shifted_offset_fv4sf },
    &operand_data[6634],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8824 */
  {
    "mve_vstrwq_scatter_shifted_offset_p_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_shifted_offset_p_fv4sf },
    &operand_data[6634],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8856 */
  {
    "mve_vstrwq_scatter_shifted_offset_p_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_shifted_offset_p_sv4si },
    &operand_data[6638],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8856 */
  {
    "mve_vstrwq_scatter_shifted_offset_p_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_shifted_offset_p_uv4si },
    &operand_data[6638],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8888 */
  {
    "mve_vstrwq_scatter_shifted_offset_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_shifted_offset_sv4si },
    &operand_data[6638],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8888 */
  {
    "mve_vstrwq_scatter_shifted_offset_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vstrwq_scatter_shifted_offset_uv4si },
    &operand_data[6638],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8945 */
  {
    "mve_vidupq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vidupq_n_uv16qi },
    &operand_data[6642],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8945 */
  {
    "mve_vidupq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vidupq_n_uv8hi },
    &operand_data[6645],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8945 */
  {
    "mve_vidupq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vidupq_n_uv4si },
    &operand_data[6648],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8976 */
  {
    "mve_vidupq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vidupq_m_n_uv16qi },
    &operand_data[6651],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8976 */
  {
    "mve_vidupq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vidupq_m_n_uv8hi },
    &operand_data[6656],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:8976 */
  {
    "mve_vidupq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vidupq_m_n_uv4si },
    &operand_data[6661],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9013 */
  {
    "mve_vddupq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vddupq_n_uv16qi },
    &operand_data[6642],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9013 */
  {
    "mve_vddupq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vddupq_n_uv8hi },
    &operand_data[6645],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9013 */
  {
    "mve_vddupq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vddupq_n_uv4si },
    &operand_data[6648],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9044 */
  {
    "mve_vddupq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vddupq_m_n_uv16qi },
    &operand_data[6651],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9044 */
  {
    "mve_vddupq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vddupq_m_n_uv8hi },
    &operand_data[6656],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9044 */
  {
    "mve_vddupq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vddupq_m_n_uv4si },
    &operand_data[6661],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9081 */
  {
    "mve_vdwdupq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_n_uv16qi },
    &operand_data[6666],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9081 */
  {
    "mve_vdwdupq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_n_uv8hi },
    &operand_data[6670],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9081 */
  {
    "mve_vdwdupq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_n_uv4si },
    &operand_data[6674],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9098 */
  {
    "mve_vdwdupq_wb_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_wb_uv16qi },
    &operand_data[6678],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9098 */
  {
    "mve_vdwdupq_wb_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_wb_uv8hi },
    &operand_data[6678],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9098 */
  {
    "mve_vdwdupq_wb_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_wb_uv4si },
    &operand_data[6678],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9134 */
  {
    "mve_vdwdupq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_m_n_uv16qi },
    &operand_data[6682],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9134 */
  {
    "mve_vdwdupq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_m_n_uv8hi },
    &operand_data[6688],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9134 */
  {
    "mve_vdwdupq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_m_n_uv4si },
    &operand_data[6694],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9154 */
  {
    "mve_vdwdupq_m_wb_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_m_wb_uv16qi },
    &operand_data[6700],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9154 */
  {
    "mve_vdwdupq_m_wb_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_m_wb_uv8hi },
    &operand_data[6706],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9154 */
  {
    "mve_vdwdupq_m_wb_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vdwdupq_m_wb_uv4si },
    &operand_data[6712],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9198 */
  {
    "mve_viwdupq_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_n_uv16qi },
    &operand_data[6666],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9198 */
  {
    "mve_viwdupq_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_n_uv8hi },
    &operand_data[6670],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9198 */
  {
    "mve_viwdupq_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_n_uv4si },
    &operand_data[6674],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9215 */
  {
    "mve_viwdupq_wb_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_wb_uv16qi },
    &operand_data[6678],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9215 */
  {
    "mve_viwdupq_wb_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_wb_uv8hi },
    &operand_data[6678],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9215 */
  {
    "mve_viwdupq_wb_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_wb_uv4si },
    &operand_data[6678],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9251 */
  {
    "mve_viwdupq_m_n_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_m_n_uv16qi },
    &operand_data[6682],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9251 */
  {
    "mve_viwdupq_m_n_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_m_n_uv8hi },
    &operand_data[6688],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9251 */
  {
    "mve_viwdupq_m_n_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_m_n_uv4si },
    &operand_data[6694],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9271 */
  {
    "mve_viwdupq_m_wb_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_m_wb_uv16qi },
    &operand_data[6700],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9271 */
  {
    "mve_viwdupq_m_wb_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_m_wb_uv8hi },
    &operand_data[6706],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9271 */
  {
    "mve_viwdupq_m_wb_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_viwdupq_m_wb_uv4si },
    &operand_data[6712],
    6,
    6,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9465 */
  {
    "mve_vldrwq_gather_base_wb_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_wb_sv4si },
    &operand_data[6718],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9465 */
  {
    "mve_vldrwq_gather_base_wb_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_wb_uv4si },
    &operand_data[6718],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9479 */
  {
    "mve_vldrwq_gather_base_nowb_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_nowb_sv4si },
    &operand_data[6718],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9479 */
  {
    "mve_vldrwq_gather_base_nowb_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_nowb_uv4si },
    &operand_data[6718],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9517 */
  {
    "mve_vldrwq_gather_base_wb_z_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_wb_z_sv4si },
    &operand_data[6718],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9517 */
  {
    "mve_vldrwq_gather_base_wb_z_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_wb_z_uv4si },
    &operand_data[6718],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9532 */
  {
    "mve_vldrwq_gather_base_nowb_z_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_nowb_z_sv4si },
    &operand_data[6718],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9532 */
  {
    "mve_vldrwq_gather_base_nowb_z_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_nowb_z_uv4si },
    &operand_data[6718],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9573 */
  {
    "mve_vldrwq_gather_base_wb_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_wb_fv4sf },
    &operand_data[6718],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9587 */
  {
    "mve_vldrwq_gather_base_nowb_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_nowb_fv4sf },
    &operand_data[6722],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9625 */
  {
    "mve_vldrwq_gather_base_wb_z_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_wb_z_fv4sf },
    &operand_data[6718],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9641 */
  {
    "mve_vldrwq_gather_base_nowb_z_fv4sf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrwq_gather_base_nowb_z_fv4sf },
    &operand_data[6722],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9682 */
  {
    "mve_vldrdq_gather_base_wb_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_wb_sv2di },
    &operand_data[6726],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9682 */
  {
    "mve_vldrdq_gather_base_wb_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_wb_uv2di },
    &operand_data[6726],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9696 */
  {
    "mve_vldrdq_gather_base_nowb_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_nowb_sv2di },
    &operand_data[6726],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9696 */
  {
    "mve_vldrdq_gather_base_nowb_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_nowb_uv2di },
    &operand_data[6726],
    3,
    3,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9735 */
  {
    "mve_vldrdq_gather_base_wb_z_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_wb_z_sv2di },
    &operand_data[6726],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9735 */
  {
    "mve_vldrdq_gather_base_wb_z_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_wb_z_uv2di },
    &operand_data[6726],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9751 */
  {
    "mve_vldrdq_gather_base_nowb_z_sv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_nowb_z_sv2di },
    &operand_data[6726],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:9751 */
  {
    "mve_vldrdq_gather_base_nowb_z_uv2di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vldrdq_gather_base_nowb_z_uv2di },
    &operand_data[6726],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10300 */
  {
    "mve_vshlcq_m_vec_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_vec_sv16qi },
    &operand_data[6730],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10300 */
  {
    "mve_vshlcq_m_vec_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_vec_uv16qi },
    &operand_data[6730],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10300 */
  {
    "mve_vshlcq_m_vec_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_vec_sv8hi },
    &operand_data[6735],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10300 */
  {
    "mve_vshlcq_m_vec_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_vec_uv8hi },
    &operand_data[6735],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10300 */
  {
    "mve_vshlcq_m_vec_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_vec_sv4si },
    &operand_data[6740],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10300 */
  {
    "mve_vshlcq_m_vec_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_vec_uv4si },
    &operand_data[6740],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10316 */
  {
    "mve_vshlcq_m_carry_sv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_carry_sv16qi },
    &operand_data[6745],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10316 */
  {
    "mve_vshlcq_m_carry_uv16qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_carry_uv16qi },
    &operand_data[6745],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10316 */
  {
    "mve_vshlcq_m_carry_sv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_carry_sv8hi },
    &operand_data[6750],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10316 */
  {
    "mve_vshlcq_m_carry_uv8hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_carry_uv8hi },
    &operand_data[6750],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10316 */
  {
    "mve_vshlcq_m_carry_sv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_carry_sv4si },
    &operand_data[6755],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10316 */
  {
    "mve_vshlcq_m_carry_uv4si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_mve_vshlcq_m_carry_uv4si },
    &operand_data[6755],
    5,
    5,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10488 */
  {
    "movv16bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv16bi },
    &operand_data[6760],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10488 */
  {
    "movv8bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv8bi },
    &operand_data[6762],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10488 */
  {
    "movv4bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_movv4bi },
    &operand_data[6764],
    2,
    2,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10500 */
  {
    "vec_cmpv16qiv16bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpv16qiv16bi },
    &operand_data[6766],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10500 */
  {
    "vec_cmpv8hiv8bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpv8hiv8bi },
    &operand_data[6770],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10500 */
  {
    "vec_cmpv4siv4bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpv4siv4bi },
    &operand_data[6774],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10500 */
  {
    "vec_cmpv8hfv8bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpv8hfv8bi },
    &operand_data[6778],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10500 */
  {
    "vec_cmpv4sfv4bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpv4sfv4bi },
    &operand_data[6782],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10513 */
  {
    "vec_cmpuv16qiv16bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpuv16qiv16bi },
    &operand_data[6766],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10513 */
  {
    "vec_cmpuv8hiv8bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpuv8hiv8bi },
    &operand_data[6770],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10513 */
  {
    "vec_cmpuv4siv4bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vec_cmpuv4siv4bi },
    &operand_data[6774],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10525 */
  {
    "vcond_mask_v16qiv16bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcond_mask_v16qiv16bi },
    &operand_data[6786],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10525 */
  {
    "vcond_mask_v8hiv8bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcond_mask_v8hiv8bi },
    &operand_data[6790],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10525 */
  {
    "vcond_mask_v4siv4bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcond_mask_v4siv4bi },
    &operand_data[6794],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10525 */
  {
    "vcond_mask_v8hfv8bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcond_mask_v8hfv8bi },
    &operand_data[6798],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10525 */
  {
    "vcond_mask_v4sfv4bi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { 0 },
#else
    { 0, 0, 0 },
#endif
    { (insn_gen_fn::stored_funcptr) gen_vcond_mask_v4sfv4bi },
    &operand_data[6802],
    4,
    4,
    0,
    0,
    0
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:925 */
  {
    "*p *arm_addsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6318 },
#else
    { 0, output_6318, 0 },
#endif
    { 0 },
    &operand_data[6806],
    5,
    5,
    0,
    16,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1121 */
  {
    "*p *addsi3_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6319 },
#else
    { 0, output_6319, 0 },
#endif
    { 0 },
    &operand_data[6811],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1137 */
  {
    "*p *compare_negsi_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cmn%?\t%1, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6815],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1272 */
  {
    "*p *compare_addsi2_op0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6321 },
#else
    { 0, output_6321, 0 },
#endif
    { 0 },
    &operand_data[6819],
    4,
    4,
    1,
    4,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1295 */
  {
    "*p *compare_addsi2_op1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6322 },
#else
    { 0, output_6322, 0 },
#endif
    { 0 },
    &operand_data[6819],
    4,
    4,
    1,
    4,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1318 */
  {
    "*p addsi3_carryin",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6323 },
#else
    { 0, output_6323, 0 },
#endif
    { 0 },
    &operand_data[6823],
    6,
    6,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1337 */
  {
    "*p add0si3_carryin",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "adc%?\t%0, %1, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6829],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1349 */
  {
    "*p *addsi3_carryin_alt2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6325 },
#else
    { 0, output_6325, 0 },
#endif
    { 0 },
    &operand_data[6834],
    6,
    6,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1367 */
  {
    "*p *addsi3_carryin_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "adc%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6840],
    8,
    8,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1677 */
  {
    "*p subsi3_carryin",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6327 },
#else
    { 0, output_6327, 0 },
#endif
    { 0 },
    &operand_data[6848],
    6,
    6,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1695 */
  {
    "*p rsbsi_carryin_reg",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsc%?\t%0, %2, #1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6854],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1708 */
  {
    "*p *add_not_cin",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6329 },
#else
    { 0, output_6329, 0 },
#endif
    { 0 },
    &operand_data[6859],
    6,
    6,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1726 */
  {
    "*p add_not_shift_cin",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsc%?\t%0, %4, %1%S3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6865],
    8,
    8,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1808 */
  {
    "*p *subsi3_carryin_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sbc%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6873],
    8,
    8,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1825 */
  {
    "*p *subsi3_carryin_shift_alt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sbc%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6873],
    8,
    8,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1843 */
  {
    "*p *rsbsi3_carryin_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsc%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6873],
    8,
    8,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:1858 */
  {
    "*p *rsbsi3_carryin_shift_alt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsc%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6873],
    8,
    8,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2001 */
  {
    "*p *arm_subsi3_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6335 },
#else
    { 0, output_6335, 0 },
#endif
    { 0 },
    &operand_data[6881],
    5,
    5,
    0,
    9,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2242 */
  {
    "*p *mul",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mul%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6886],
    5,
    5,
    0,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2258 */
  {
    "*p *mla",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mla%?\t%0, %3, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6891],
    6,
    6,
    0,
    4,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2271 */
  {
    "*p *mls",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mls%?\t%0, %3, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2419 */
  {
    "*p smull",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smull%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6903],
    6,
    6,
    2,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2419 */
  {
    "*p umull",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "umull%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6903],
    6,
    6,
    2,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2454 */
  {
    "*p smlal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlal%?\t%0, %2, %4, %5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6909],
    8,
    8,
    3,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2454 */
  {
    "*p umlal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "umlal%?\t%0, %2, %4, %5",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6909],
    8,
    8,
    3,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2491 */
  {
    "*p *smull_high",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smull%?\t%3, %0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6917],
    6,
    6,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2491 */
  {
    "*p *umull_high",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "umull%?\t%3, %0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6917],
    6,
    6,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2507 */
  {
    "*p mulhisi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smulbb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6923],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2519 */
  {
    "*p *mulhisi3tb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smultb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6928],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2532 */
  {
    "*p *mulhisi3bt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smulbt%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6933],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2545 */
  {
    "*p *mulhisi3tt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smultt%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2581 */
  {
    "*p *arm_maddhisi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlabb%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6943],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2594 */
  {
    "*p arm_smlabb_setq",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlabb%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6943],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2627 */
  {
    "*p maddhisi4tb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlatb%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6949],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2641 */
  {
    "*p arm_smlatb_setq",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlatb%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6949],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2675 */
  {
    "*p maddhisi4tt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlatt%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2690 */
  {
    "*p arm_smlatt_setq",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlatt%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2724 */
  {
    "*p maddhidi4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlalbb%?\t%Q0, %R0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6955],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2738 */
  {
    "*p *maddhidi4tb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlaltb%?\t%Q0, %R0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6961],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2753 */
  {
    "*p *maddhidi4tt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlaltt%?\t%Q0, %R0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6967],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2770 */
  {
    "*p arm_smlawb_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlawb%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2770 */
  {
    "*p arm_smlawb_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlawb%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2770 */
  {
    "*p arm_smlawt_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlawt%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:2770 */
  {
    "*p arm_smlawt_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlawt%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3004 */
  {
    "*p *arm_andsi3_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6362 },
#else
    { 0, output_6362, 0 },
#endif
    { 0 },
    &operand_data[6973],
    5,
    5,
    0,
    5,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3064 */
  {
    "*p *zeroextractsi_compare0_scratch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6363 },
#else
    { 0, 0, output_6363 },
#endif
    { 0 },
    &operand_data[6978],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3474 */
  {
    "*p insv_zero",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bfc%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6983],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3486 */
  {
    "*p insv_t2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bfi%?\t%0, %3, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6988],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3498 */
  {
    "*p andsi_notsi_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bic%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3508 */
  {
    "*p andsi_not_shiftsi_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bic%?\t%0, %1, %2%S4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6994],
    7,
    7,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3525 */
  {
    "*p andsi_not_shiftsi_si_scc_no_reuse",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bics%?\t%4, %3, %1%S0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7001],
    7,
    7,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3545 */
  {
    "*p andsi_not_shiftsi_si_scc",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bics%?\t%4, %3, %1%S0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7008],
    7,
    7,
    4,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3630 */
  {
    "*p *iorsi3_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6370 },
#else
    { 0, output_6370, 0 },
#endif
    { 0 },
    &operand_data[6973],
    5,
    5,
    0,
    5,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3736 */
  {
    "*p *arm_xorsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6371 },
#else
    { 0, output_6371, 0 },
#endif
    { 0 },
    &operand_data[7015],
    5,
    5,
    0,
    4,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3802 */
  {
    "*p *andsi_iorsi3_notsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7020],
    6,
    6,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3960 */
  {
    "*p *smax_0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "bic%?\t%0, %1, %1, asr #31",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7026],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:3970 */
  {
    "*p *smax_m1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "orr%?\t%0, %1, %1, asr #31",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7026],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4020 */
  {
    "*p *smin_0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "and%?\t%0, %1, %1, asr #31",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7026],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4253 */
  {
    "*p arm_qadd_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4253 */
  {
    "*p arm_qadd_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4253 */
  {
    "*p arm_qsub_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4253 */
  {
    "*p arm_qsub_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4313 */
  {
    "*p arm_get_apsr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mrs%?\t%0, APSR",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7030],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4322 */
  {
    "*p arm_set_apsr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "msr%?\tAPSR_nzcvq, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6856],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4369 */
  {
    "*p satsi_smin",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6382 },
#else
    { 0, 0, output_6382 },
#endif
    { 0 },
    &operand_data[7033],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4369 */
  {
    "*p satsi_smin_setq",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6383 },
#else
    { 0, 0, output_6383 },
#endif
    { 0 },
    &operand_data[7033],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4369 */
  {
    "*p satsi_smax",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6384 },
#else
    { 0, 0, output_6384 },
#endif
    { 0 },
    &operand_data[7033],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4369 */
  {
    "*p satsi_smax_setq",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6385 },
#else
    { 0, 0, output_6385 },
#endif
    { 0 },
    &operand_data[7033],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4393 */
  {
    "*p *satsi_smin_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6386 },
#else
    { 0, 0, output_6386 },
#endif
    { 0 },
    &operand_data[7039],
    8,
    8,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4393 */
  {
    "*p *satsi_smax_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6387 },
#else
    { 0, 0, output_6387 },
#endif
    { 0 },
    &operand_data[7039],
    8,
    8,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4645 */
  {
    "*p *arm_shiftsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6388 },
#else
    { 0, 0, output_6388 },
#endif
    { 0 },
    &operand_data[7047],
    6,
    6,
    0,
    4,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4689 */
  {
    "*p *not_shiftsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mvn%?\t%0, %1%S3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7053],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4909 */
  {
    "*p unaligned_loadsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6390 },
#else
    { 0, output_6390, 0 },
#endif
    { 0 },
    &operand_data[7059],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4928 */
  {
    "*p unaligned_loadhis",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldrsh%?\t%0, %1\t@ unaligned",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7063],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4938 */
  {
    "*p unaligned_loadhiu",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6392 },
#else
    { 0, output_6392, 0 },
#endif
    { 0 },
    &operand_data[7067],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4965 */
  {
    "*p unaligned_storesi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6393 },
#else
    { 0, output_6393, 0 },
#endif
    { 0 },
    &operand_data[7071],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4980 */
  {
    "*p unaligned_storehi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6394 },
#else
    { 0, output_6394, 0 },
#endif
    { 0 },
    &operand_data[7075],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:4996 */
  {
    "*p *extv_reg",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sbfx%?\t%0, %1, %3, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7079],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5010 */
  {
    "*p extzv_t2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ubfx%?\t%0, %1, %3, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7079],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5026 */
  {
    "*p divsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6397 },
#else
    { 0, output_6397, 0 },
#endif
    { 0 },
    &operand_data[7085],
    5,
    5,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5039 */
  {
    "*p udivsi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6398 },
#else
    { 0, output_6398, 0 },
#endif
    { 0 },
    &operand_data[7085],
    5,
    5,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5073 */
  {
    "*p *arm_negsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsb%?\t%0, %1, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7090],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5148 */
  {
    "*p *arm_abssi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7094],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5212 */
  {
    "*p *arm_neg_abssi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7094],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5296 */
  {
    "*p *arm_one_cmplsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mvn%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7090],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5582 */
  {
    "*p *arm_zero_extendhisi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6403 },
#else
    { 0, output_6403, 0 },
#endif
    { 0 },
    &operand_data[7098],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5593 */
  {
    "*p *arm_zero_extendhisi2_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6404 },
#else
    { 0, output_6404, 0 },
#endif
    { 0 },
    &operand_data[7102],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5604 */
  {
    "*p *arm_zero_extendhisi2addsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uxtah%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6933],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5651 */
  {
    "*p *arm_zero_extendqisi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6406 },
#else
    { 0, output_6406, 0 },
#endif
    { 0 },
    &operand_data[7106],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5663 */
  {
    "*p *arm_zero_extendqisi2_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6407 },
#else
    { 0, output_6407, 0 },
#endif
    { 0 },
    &operand_data[7110],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5674 */
  {
    "*p *arm_zero_extendqisi2addsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uxtab%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7114],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5725 */
  {
    "*p *compareqi_eq0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tst%?\t%0, #255",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7119],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5821 */
  {
    "*p *arm_extendhisi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6410 },
#else
    { 0, output_6410, 0 },
#endif
    { 0 },
    &operand_data[7102],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5834 */
  {
    "*p *arm_extendhisi2_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6411 },
#else
    { 0, output_6411, 0 },
#endif
    { 0 },
    &operand_data[7102],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5878 */
  {
    "*p *arm_extendqihi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldrsb%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7122],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5915 */
  {
    "*p *arm_extendqisi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6413 },
#else
    { 0, output_6413, 0 },
#endif
    { 0 },
    &operand_data[7126],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5927 */
  {
    "*p *arm_extendqisi_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6414 },
#else
    { 0, output_6414, 0 },
#endif
    { 0 },
    &operand_data[7126],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5939 */
  {
    "*p *arm_extendqisi2addsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sxtab%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7114],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5949 */
  {
    "*p arm_sxtb16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sxtb16%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7026],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5949 */
  {
    "*p arm_uxtb16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uxtb16%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7026],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_qadd8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_qsub8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_shadd8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "shadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_shsub8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "shsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_uhadd8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uhadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_uhsub8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uhsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_uqadd8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_uqsub8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_qadd16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_qasx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qasx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_qsax",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsax%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_qsub16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_shadd16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "shadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_shasx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "shasx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_shsax",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "shsax%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_shsub16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "shsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_uhadd16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uhadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_uhasx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uhasx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_uhsax",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uhsax%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_uhsub16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uhsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_uqadd16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_uqasx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqasx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_uqsax",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsax%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_uqsub16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_smusd",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smusd%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_smusdx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smusdx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_sxtab16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sxtab16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_uxtab16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uxtab16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5958 */
  {
    "*p arm_usad8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usad8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5968 */
  {
    "*p arm_usada8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usada8%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5979 */
  {
    "*p arm_smlald",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlald%?\t%Q0, %R0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6967],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5979 */
  {
    "*p arm_smlaldx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlaldx%?\t%Q0, %R0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6967],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5979 */
  {
    "*p arm_smlsld",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlsld%?\t%Q0, %R0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6967],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5979 */
  {
    "*p arm_smlsldx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlsldx%?\t%Q0, %R0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6967],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "*p arm_sadd8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "*p arm_ssub8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "*p arm_uadd8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "*p arm_usub8",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "*p arm_sadd16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "*p arm_sasx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sasx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "*p arm_ssax",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssax%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "*p arm_ssub16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "*p arm_uadd16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "*p arm_uasx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uasx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "*p arm_usax",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usax%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:5990 */
  {
    "*p arm_usub16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "*p arm_smlad_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlad%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "*p arm_smlad_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlad%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "*p arm_smladx_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smladx%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "*p arm_smladx_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smladx%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "*p arm_smlsd_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlsd%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "*p arm_smlsd_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlsd%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "*p arm_smlsdx_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlsdx%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6002 */
  {
    "*p arm_smlsdx_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smlsdx%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6897],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6031 */
  {
    "*p arm_smuad_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smuad%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6031 */
  {
    "*p arm_smuad_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smuad%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6031 */
  {
    "*p arm_smuadx_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smuadx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6031 */
  {
    "*p arm_smuadx_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "smuadx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6058 */
  {
    "*p arm_ssat16_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssat16%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7130],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6058 */
  {
    "*p arm_ssat16_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssat16%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7130],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6058 */
  {
    "*p arm_usat16_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usat16%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7135],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6058 */
  {
    "*p arm_usat16_setq_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usat16%?\t%0, %2, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7135],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6085 */
  {
    "*p arm_sel",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sel%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6437 */
  {
    "*p *arm_movt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6481 },
#else
    { 0, output_6481, 0 },
#endif
    { 0 },
    &operand_data[7140],
    5,
    5,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6451 */
  {
    "*p *arm_movsi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6482 },
#else
    { 0, output_6482, 0 },
#endif
    { 0 },
    &operand_data[7145],
    4,
    4,
    0,
    6,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6646 */
  {
    "*p pic_add_dot_plus_eight",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6483 },
#else
    { 0, 0, output_6483 },
#endif
    { 0 },
    &operand_data[7149],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:6662 */
  {
    "*p tls_load_dot_plus_eight",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6484 },
#else
    { 0, 0, output_6484 },
#endif
    { 0 },
    &operand_data[7149],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7106 */
  {
    "*p *movhi_insn_arch4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6485 },
#else
    { 0, output_6485, 0 },
#endif
    { 0 },
    &operand_data[7154],
    4,
    4,
    0,
    5,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7133 */
  {
    "*p *movhi_bytes",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6486 },
#else
    { 0, output_6486, 0 },
#endif
    { 0 },
    &operand_data[7158],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7250 */
  {
    "*p *arm_movqi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6487 },
#else
    { 0, output_6487, 0 },
#endif
    { 0 },
    &operand_data[7162],
    4,
    4,
    0,
    9,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7297 */
  {
    "*p *arm32_movhf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6488 },
#else
    { 0, 0, output_6488 },
#endif
    { 0 },
    &operand_data[7166],
    4,
    4,
    0,
    4,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7297 */
  {
    "*p *arm32_movbf",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6489 },
#else
    { 0, 0, output_6489 },
#endif
    { 0 },
    &operand_data[7170],
    4,
    4,
    0,
    4,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7396 */
  {
    "*p *arm_movsf_soft_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6490 },
#else
    { 0, 0, output_6490 },
#endif
    { 0 },
    &operand_data[7174],
    4,
    4,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7770 */
  {
    "*p *arm_cmpsi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6491 },
#else
    { 0, output_6491, 0 },
#endif
    { 0 },
    &operand_data[7178],
    4,
    4,
    0,
    5,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:7815 */
  {
    "*p *arm_cmpsi_negshiftsi_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "cmn%?\t%0, %2%S1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7182],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8485 */
  {
    "*p *arm_jump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6493 },
#else
    { 0, 0, output_6493 },
#endif
    { 0 },
    &operand_data[465],
    3,
    3,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8917 */
  {
    "*p *arm_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6494 },
#else
    { 0, 0, output_6494 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:8978 */
  {
    "*p *arm_simple_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6495 },
#else
    { 0, 0, output_6495 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9156 */
  {
    "*p probe_stack",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "str%?\tr0, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7188],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9520 */
  {
    "*p *arm_indirect_jump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mov%?\t%|pc, %0\t%@ indirect register jump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6856],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9529 */
  {
    "*p *load_indirect_jump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldr%?\t%|pc, %0\t%@ indirect memory jump",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7191],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9574 */
  {
    "*p *add_multsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2, lsl %b3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7194],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9574 */
  {
    "*p *rsb_multsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsb%?\t%0, %1, %2, lsl %b3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7200],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9574 */
  {
    "*p *orr_multsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "orr%?\t%0, %1, %2, lsl %b3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7200],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9574 */
  {
    "*p *eor_multsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "eor%?\t%0, %1, %2, lsl %b3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7200],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9574 */
  {
    "*p *and_multsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "and%?\t%0, %1, %2, lsl %b3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7200],
    6,
    6,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9587 */
  {
    "*p *add_shiftsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7206],
    7,
    7,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9587 */
  {
    "*p *rsb_shiftsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsb%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7213],
    7,
    7,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9587 */
  {
    "*p *orr_shiftsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "orr%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7213],
    7,
    7,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9587 */
  {
    "*p *eor_shiftsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "eor%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7213],
    7,
    7,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9587 */
  {
    "*p *and_shiftsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "and%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7213],
    7,
    7,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:9655 */
  {
    "*p *sub_shiftsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %3%S2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7220],
    7,
    7,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11360 */
  {
    "*p *arith_adjacentmem",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6510 },
#else
    { 0, 0, output_6510 },
#endif
    { 0 },
    &operand_data[7227],
    7,
    7,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11826 */
  {
    "*p *load_multiple_with_writeback",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6511 },
#else
    { 0, 0, output_6511 },
#endif
    { 0 },
    &operand_data[7234],
    6,
    6,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11858 */
  {
    "*p *pop_multiple_with_writeback_and_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6512 },
#else
    { 0, 0, output_6512 },
#endif
    { 0 },
    &operand_data[7240],
    6,
    6,
    2,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11884 */
  {
    "*p *pop_multiple_with_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6513 },
#else
    { 0, 0, output_6513 },
#endif
    { 0 },
    &operand_data[7246],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:11908 */
  {
    "*p *ldr_with_return",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldr%?\t%|pc, [%0], #4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7251],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12086 */
  {
    "*p clzsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "clz%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7026],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12094 */
  {
    "*p rbitsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rbit%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7026],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12185 */
  {
    "*p load_tp_hard",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mrc%?\tp15, 0, %0, c13, c0, 3\t@ load_tp_hard",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7254],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12262 */
  {
    "*p *arm_movtas_ze",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6518 },
#else
    { 0, output_6518, 0 },
#endif
    { 0 },
    &operand_data[7257],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12277 */
  {
    "*p *arm_rev",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6519 },
#else
    { 0, output_6519, 0 },
#endif
    { 0 },
    &operand_data[7261],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12521 */
  {
    "*p *thumb2_ldrd",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldrd%?\t%0, %3, [%1, %2]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7265],
    7,
    7,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12537 */
  {
    "*p *thumb2_ldrd_base",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldrd%?\t%0, %2, [%1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7272],
    5,
    5,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12550 */
  {
    "*p *thumb2_ldrd_base_neg",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldrd%?\t%0, %2, [%1, #-4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7272],
    5,
    5,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12563 */
  {
    "*p *thumb2_strd",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "strd%?\t%2, %4, [%0, %1]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7277],
    7,
    7,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12579 */
  {
    "*p *thumb2_strd_base",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "strd%?\t%1, %2, [%0]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7284],
    5,
    5,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12592 */
  {
    "*p *thumb2_strd_base_neg",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "strd%?\t%1, %2, [%0, #-4]",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7284],
    5,
    5,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldrdstrd.md:159 */
  {
    "*p *arm_ldrd",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6526 },
#else
    { 0, 0, output_6526 },
#endif
    { 0 },
    &operand_data[7289],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldrdstrd.md:179 */
  {
    "*p *arm_strd",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6527 },
#else
    { 0, 0, output_6527 },
#endif
    { 0 },
    &operand_data[7295],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:24 */
  {
    "*p *ldm4_",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldm%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7301],
    8,
    8,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:59 */
  {
    "*p *ldm4_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmia%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7309],
    8,
    8,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:98 */
  {
    "*p *stm4_",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stm%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7317],
    8,
    8,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:113 */
  {
    "*p *stm4_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmia%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7325],
    8,
    8,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:146 */
  {
    "*p *ldm4_ib",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmib%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7301],
    8,
    8,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:165 */
  {
    "*p *ldm4_ib_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmib%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7309],
    8,
    8,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:186 */
  {
    "*p *stm4_ib",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmib%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7317],
    8,
    8,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:201 */
  {
    "*p *stm4_ib_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmib%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7325],
    8,
    8,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:218 */
  {
    "*p *ldm4_da",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmda%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7301],
    8,
    8,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:236 */
  {
    "*p *ldm4_da_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmda%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7309],
    8,
    8,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:256 */
  {
    "*p *stm4_da",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmda%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7317],
    8,
    8,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:271 */
  {
    "*p *stm4_da_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmda%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7325],
    8,
    8,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:288 */
  {
    "*p *ldm4_db",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmdb%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7301],
    8,
    8,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:307 */
  {
    "*p *ldm4_db_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmdb%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7309],
    8,
    8,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:328 */
  {
    "*p *stm4_db",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmdb%?\t%5, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7317],
    8,
    8,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:343 */
  {
    "*p *stm4_db_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmdb%?\t%5!, {%1, %2, %3, %4}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7325],
    8,
    8,
    5,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:467 */
  {
    "*p *ldm3_",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldm%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7333],
    7,
    7,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:496 */
  {
    "*p *ldm3_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmia%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7340],
    7,
    7,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:529 */
  {
    "*p *stm3_",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stm%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7347],
    7,
    7,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:542 */
  {
    "*p *stm3_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmia%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7354],
    7,
    7,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:571 */
  {
    "*p *ldm3_ib",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmib%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7333],
    7,
    7,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:587 */
  {
    "*p *ldm3_ib_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmib%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7340],
    7,
    7,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:605 */
  {
    "*p *stm3_ib",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmib%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7347],
    7,
    7,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:618 */
  {
    "*p *stm3_ib_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmib%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7354],
    7,
    7,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:633 */
  {
    "*p *ldm3_da",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmda%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7333],
    7,
    7,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:648 */
  {
    "*p *ldm3_da_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmda%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7340],
    7,
    7,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:665 */
  {
    "*p *stm3_da",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmda%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7347],
    7,
    7,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:678 */
  {
    "*p *stm3_da_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmda%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7354],
    7,
    7,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:693 */
  {
    "*p *ldm3_db",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmdb%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7333],
    7,
    7,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:709 */
  {
    "*p *ldm3_db_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmdb%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7340],
    7,
    7,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:727 */
  {
    "*p *stm3_db",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmdb%?\t%4, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7347],
    7,
    7,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:740 */
  {
    "*p *stm3_db_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmdb%?\t%4!, {%1, %2, %3}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7354],
    7,
    7,
    4,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:848 */
  {
    "*p *ldm2_",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldm%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7361],
    6,
    6,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:871 */
  {
    "*p *ldm2_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmia%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7367],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:898 */
  {
    "*p *stm2_",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stm%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7373],
    6,
    6,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:909 */
  {
    "*p *stm2_ia_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmia%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7379],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:934 */
  {
    "*p *ldm2_ib",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmib%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7361],
    6,
    6,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:947 */
  {
    "*p *ldm2_ib_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmib%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7367],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:962 */
  {
    "*p *stm2_ib",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmib%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7373],
    6,
    6,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:973 */
  {
    "*p *stm2_ib_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmib%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7379],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:986 */
  {
    "*p *ldm2_da",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmda%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7361],
    6,
    6,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:998 */
  {
    "*p *ldm2_da_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmda%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7367],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:1012 */
  {
    "*p *stm2_da",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmda%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7373],
    6,
    6,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:1023 */
  {
    "*p *stm2_da_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmda%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7379],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:1036 */
  {
    "*p *ldm2_db",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmdb%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7361],
    6,
    6,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:1049 */
  {
    "*p *ldm2_db_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldmdb%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7367],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:1064 */
  {
    "*p *stm2_db",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmdb%?\t%3, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7373],
    6,
    6,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/ldmstm.md:1075 */
  {
    "*p *stm2_db_update",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "stmdb%?\t%3!, {%1, %2}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7379],
    6,
    6,
    3,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm.md:12628 */
  {
    "*p *load_multiple",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6576 },
#else
    { 0, 0, output_6576 },
#endif
    { 0 },
    &operand_data[7385],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:30 */
  {
    "*p tbcstv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tbcstb%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7390],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:39 */
  {
    "*p tbcstv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tbcsth%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7394],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:48 */
  {
    "*p tbcstv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tbcstw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7398],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:57 */
  {
    "*p iwmmxt_iordi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wor%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7402],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:68 */
  {
    "*p iwmmxt_xordi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7402],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:79 */
  {
    "*p iwmmxt_anddi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wand%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7402],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:90 */
  {
    "*p iwmmxt_nanddi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wandn%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7407],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:226 */
  {
    "*p movv2si_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6584 },
#else
    { 0, 0, output_6584 },
#endif
    { 0 },
    &operand_data[7412],
    4,
    4,
    0,
    8,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:226 */
  {
    "*p movv4hi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6585 },
#else
    { 0, 0, output_6585 },
#endif
    { 0 },
    &operand_data[7416],
    4,
    4,
    0,
    8,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:226 */
  {
    "*p movv8qi_internal",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6586 },
#else
    { 0, 0, output_6586 },
#endif
    { 0 },
    &operand_data[7420],
    4,
    4,
    0,
    8,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:304 */
  {
    "*p *andv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wand\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:304 */
  {
    "*p *andv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wand\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:304 */
  {
    "*p *andv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wand\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:314 */
  {
    "*p *iorv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wor\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:314 */
  {
    "*p *iorv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wor\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:314 */
  {
    "*p *iorv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wor\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:324 */
  {
    "*p *xorv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:324 */
  {
    "*p *xorv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:324 */
  {
    "*p *xorv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:337 */
  {
    "*p *addv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:337 */
  {
    "*p *addv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:337 */
  {
    "*p *addv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:347 */
  {
    "*p ssaddv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddbss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:357 */
  {
    "*p ssaddv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddhss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:367 */
  {
    "*p ssaddv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddwss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:377 */
  {
    "*p usaddv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddbus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:387 */
  {
    "*p usaddv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddhus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:397 */
  {
    "*p usaddv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddwus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:407 */
  {
    "*p *subv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:407 */
  {
    "*p *subv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:407 */
  {
    "*p *subv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:417 */
  {
    "*p sssubv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubbss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:427 */
  {
    "*p sssubv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubhss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:437 */
  {
    "*p sssubv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubwss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:447 */
  {
    "*p ussubv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubbus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:457 */
  {
    "*p ussubv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubhus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:467 */
  {
    "*p ussubv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubwus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:477 */
  {
    "*p *mulv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulul%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:487 */
  {
    "*p smulv4hi3_highpart",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulsm%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:500 */
  {
    "*p umulv4hi3_highpart",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulum%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:513 */
  {
    "*p iwmmxt_wmacs",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmacs%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7439],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:524 */
  {
    "*p iwmmxt_wmacsz",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmacsz%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7445],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:534 */
  {
    "*p iwmmxt_wmacu",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmacu%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7439],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:545 */
  {
    "*p iwmmxt_wmacuz",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmacuz%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7445],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:557 */
  {
    "*p iwmmxt_clrdi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor%?\t%0, %0, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7450],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:568 */
  {
    "*p iwmmxt_clrv8qi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor%?\t%0, %0, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7453],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:580 */
  {
    "*p iwmmxt_clrv4hi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor%?\t%0, %0, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7456],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:590 */
  {
    "*p iwmmxt_clrv2si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wxor%?\t%0, %0, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7459],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:601 */
  {
    "*p iwmmxt_uavgrndv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wavg2br%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:623 */
  {
    "*p iwmmxt_uavgrndv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wavg2hr%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:641 */
  {
    "*p iwmmxt_uavgv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wavg2b%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:654 */
  {
    "*p iwmmxt_uavgv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wavg2h%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:669 */
  {
    "*p iwmmxt_tinsrb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6629 },
#else
    { 0, 0, output_6629 },
#endif
    { 0 },
    &operand_data[7462],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:686 */
  {
    "*p iwmmxt_tinsrh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6630 },
#else
    { 0, 0, output_6630 },
#endif
    { 0 },
    &operand_data[7468],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:703 */
  {
    "*p iwmmxt_tinsrw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6631 },
#else
    { 0, 0, output_6631 },
#endif
    { 0 },
    &operand_data[7474],
    6,
    6,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:720 */
  {
    "*p iwmmxt_textrmub",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrmub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7480],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:731 */
  {
    "*p iwmmxt_textrmsb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrmsb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7480],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:742 */
  {
    "*p iwmmxt_textrmuh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrmuh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7485],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:753 */
  {
    "*p iwmmxt_textrmsh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrmsh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7485],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:766 */
  {
    "*p iwmmxt_textrmw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrmsw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7490],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:776 */
  {
    "*p iwmmxt_wshufh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wshufh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7495],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:797 */
  {
    "*p eqv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpeqb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:808 */
  {
    "*p eqv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpeqh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:819 */
  {
    "*p eqv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpeqw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:831 */
  {
    "*p gtuv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpgtub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:842 */
  {
    "*p gtuv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpgtuh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:853 */
  {
    "*p gtuv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpgtuw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:864 */
  {
    "*p gtv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpgtsb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:875 */
  {
    "*p gtv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpgtsh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:886 */
  {
    "*p gtv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wcmpgtsw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:899 */
  {
    "*p *smaxv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaxsw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:899 */
  {
    "*p *smaxv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaxsh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:899 */
  {
    "*p *smaxv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaxsb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:909 */
  {
    "*p *umaxv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaxuw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:909 */
  {
    "*p *umaxv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaxuh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:909 */
  {
    "*p *umaxv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaxub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:919 */
  {
    "*p *sminv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wminsw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:919 */
  {
    "*p *sminv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wminsh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:919 */
  {
    "*p *sminv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wminsb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:929 */
  {
    "*p *uminv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wminuw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:929 */
  {
    "*p *uminv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wminuh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:929 */
  {
    "*p *uminv8qi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wminub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:941 */
  {
    "*p iwmmxt_wpackhss",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wpackhss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7500],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:952 */
  {
    "*p iwmmxt_wpackwss",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wpackwss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7505],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:963 */
  {
    "*p iwmmxt_wpackdss",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wpackdss%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7510],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:974 */
  {
    "*p iwmmxt_wpackhus",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wpackhus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7500],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:985 */
  {
    "*p iwmmxt_wpackwus",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wpackwus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7505],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:996 */
  {
    "*p iwmmxt_wpackdus",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wpackdus%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7510],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1007 */
  {
    "*p iwmmxt_wunpckihb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckihb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1035 */
  {
    "*p iwmmxt_wunpckihh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckihh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1055 */
  {
    "*p iwmmxt_wunpckihw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckihw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1071 */
  {
    "*p iwmmxt_wunpckilb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckilb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1099 */
  {
    "*p iwmmxt_wunpckilh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckilh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1119 */
  {
    "*p iwmmxt_wunpckilw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckilw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1135 */
  {
    "*p iwmmxt_wunpckehub",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckehub%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7515],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1147 */
  {
    "*p iwmmxt_wunpckehuh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckehuh%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7519],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1158 */
  {
    "*p iwmmxt_wunpckehuw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckehuw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7523],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1169 */
  {
    "*p iwmmxt_wunpckehsb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckehsb%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7515],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1181 */
  {
    "*p iwmmxt_wunpckehsh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckehsh%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7519],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1192 */
  {
    "*p iwmmxt_wunpckehsw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckehsw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7523],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1203 */
  {
    "*p iwmmxt_wunpckelub",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckelub%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7515],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1215 */
  {
    "*p iwmmxt_wunpckeluh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckeluh%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7519],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1226 */
  {
    "*p iwmmxt_wunpckeluw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckeluw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7523],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1237 */
  {
    "*p iwmmxt_wunpckelsb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckelsb%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7515],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1249 */
  {
    "*p iwmmxt_wunpckelsh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckelsh%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7519],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1260 */
  {
    "*p iwmmxt_wunpckelsw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wunpckelsw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7523],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1273 */
  {
    "*p rorv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6683 },
#else
    { 0, 0, output_6683 },
#endif
    { 0 },
    &operand_data[7527],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1273 */
  {
    "*p rorv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6684 },
#else
    { 0, 0, output_6684 },
#endif
    { 0 },
    &operand_data[7532],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1273 */
  {
    "*p rordi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6685 },
#else
    { 0, 0, output_6685 },
#endif
    { 0 },
    &operand_data[7537],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1294 */
  {
    "*p ashrv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6686 },
#else
    { 0, 0, output_6686 },
#endif
    { 0 },
    &operand_data[7527],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1294 */
  {
    "*p ashrv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6687 },
#else
    { 0, 0, output_6687 },
#endif
    { 0 },
    &operand_data[7532],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1294 */
  {
    "*p ashrdi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6688 },
#else
    { 0, 0, output_6688 },
#endif
    { 0 },
    &operand_data[7537],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1315 */
  {
    "*p lshrv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6689 },
#else
    { 0, 0, output_6689 },
#endif
    { 0 },
    &operand_data[7527],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1315 */
  {
    "*p lshrv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6690 },
#else
    { 0, 0, output_6690 },
#endif
    { 0 },
    &operand_data[7532],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1315 */
  {
    "*p lshrdi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6691 },
#else
    { 0, 0, output_6691 },
#endif
    { 0 },
    &operand_data[7537],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1336 */
  {
    "*p ashlv4hi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6692 },
#else
    { 0, 0, output_6692 },
#endif
    { 0 },
    &operand_data[7527],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1336 */
  {
    "*p ashlv2si3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6693 },
#else
    { 0, 0, output_6693 },
#endif
    { 0 },
    &operand_data[7532],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1336 */
  {
    "*p ashldi3_iwmmxt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6694 },
#else
    { 0, 0, output_6694 },
#endif
    { 0 },
    &operand_data[7537],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1357 */
  {
    "*p rorv4hi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6695 },
#else
    { 0, 0, output_6695 },
#endif
    { 0 },
    &operand_data[7542],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1357 */
  {
    "*p rorv2si3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6696 },
#else
    { 0, 0, output_6696 },
#endif
    { 0 },
    &operand_data[7547],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1357 */
  {
    "*p rordi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6697 },
#else
    { 0, 0, output_6697 },
#endif
    { 0 },
    &operand_data[7552],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1378 */
  {
    "*p ashrv4hi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6698 },
#else
    { 0, 0, output_6698 },
#endif
    { 0 },
    &operand_data[7542],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1378 */
  {
    "*p ashrv2si3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6699 },
#else
    { 0, 0, output_6699 },
#endif
    { 0 },
    &operand_data[7547],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1378 */
  {
    "*p ashrdi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6700 },
#else
    { 0, 0, output_6700 },
#endif
    { 0 },
    &operand_data[7552],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1399 */
  {
    "*p lshrv4hi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6701 },
#else
    { 0, 0, output_6701 },
#endif
    { 0 },
    &operand_data[7557],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1399 */
  {
    "*p lshrv2si3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6702 },
#else
    { 0, 0, output_6702 },
#endif
    { 0 },
    &operand_data[7562],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1399 */
  {
    "*p lshrdi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6703 },
#else
    { 0, 0, output_6703 },
#endif
    { 0 },
    &operand_data[7567],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1420 */
  {
    "*p ashlv4hi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6704 },
#else
    { 0, 0, output_6704 },
#endif
    { 0 },
    &operand_data[7542],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1420 */
  {
    "*p ashlv2si3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6705 },
#else
    { 0, 0, output_6705 },
#endif
    { 0 },
    &operand_data[7547],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1420 */
  {
    "*p ashldi3_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6706 },
#else
    { 0, 0, output_6706 },
#endif
    { 0 },
    &operand_data[7552],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1441 */
  {
    "*p iwmmxt_wmadds",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmadds%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7572],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1460 */
  {
    "*p iwmmxt_wmaddu",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaddu%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7572],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1479 */
  {
    "*p iwmmxt_tmia",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmia%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7577],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1492 */
  {
    "*p iwmmxt_tmiaph",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmiaph%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7577],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1510 */
  {
    "*p iwmmxt_tmiabb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmiabb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7577],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1523 */
  {
    "*p iwmmxt_tmiatb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmiatb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7577],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1540 */
  {
    "*p iwmmxt_tmiabt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmiabt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7577],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1557 */
  {
    "*p iwmmxt_tmiatt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmiatt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7577],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1576 */
  {
    "*p iwmmxt_tmovmskb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmovmskb%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7583],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1585 */
  {
    "*p iwmmxt_tmovmskh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmovmskh%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7587],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1594 */
  {
    "*p iwmmxt_tmovmskw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tmovmskw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7591],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1603 */
  {
    "*p iwmmxt_waccb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waccb%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7595],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1612 */
  {
    "*p iwmmxt_wacch",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wacch%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7599],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1621 */
  {
    "*p iwmmxt_waccw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waccw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7523],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1631 */
  {
    "*p iwmmxt_waligni",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waligni%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7603],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1647 */
  {
    "*p iwmmxt_walignr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "walignr%U3%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7609],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1662 */
  {
    "*p iwmmxt_walignr0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "walignr0%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1677 */
  {
    "*p iwmmxt_walignr1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "walignr1%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1692 */
  {
    "*p iwmmxt_walignr2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "walignr2%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1707 */
  {
    "*p iwmmxt_walignr3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "walignr3%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1722 */
  {
    "*p iwmmxt_wsadb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsadb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7615],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1734 */
  {
    "*p iwmmxt_wsadh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsadh%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7621],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1746 */
  {
    "*p iwmmxt_wsadbz",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsadbz%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7627],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt.md:1756 */
  {
    "*p iwmmxt_wsadhz",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsadhz%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7572],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:21 */
  {
    "*p iwmmxt_wabsv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wabsw%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7632],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:21 */
  {
    "*p iwmmxt_wabsv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wabsh%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7636],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:21 */
  {
    "*p iwmmxt_wabsv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wabsb%?\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7640],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:30 */
  {
    "*p iwmmxt_wabsdiffb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wabsdiffb%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:43 */
  {
    "*p iwmmxt_wabsdiffh",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wabsdiffh%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:56 */
  {
    "*p iwmmxt_wabsdiffw",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wabsdiffw%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:69 */
  {
    "*p iwmmxt_waddsubhx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddsubhx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:87 */
  {
    "*p iwmmxt_wsubaddhx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wsubaddhx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:105 */
  {
    "*p addcv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddhc%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:105 */
  {
    "*p addcv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddwc%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:117 */
  {
    "*p iwmmxt_avg4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wavg4%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:149 */
  {
    "*p iwmmxt_avg4r",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wavg4r%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7434],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:181 */
  {
    "*p iwmmxt_wmaddsx",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaddsx%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7572],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:200 */
  {
    "*p iwmmxt_wmaddux",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaddux%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7572],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:219 */
  {
    "*p iwmmxt_wmaddsn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaddsn%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7572],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:238 */
  {
    "*p iwmmxt_wmaddun",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmaddun%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7572],
    5,
    5,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:257 */
  {
    "*p iwmmxt_wmulwsm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulwsm%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:271 */
  {
    "*p iwmmxt_wmulwum",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulwum%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:285 */
  {
    "*p iwmmxt_wmulsmr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulsmr%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:303 */
  {
    "*p iwmmxt_wmulumr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulumr%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:322 */
  {
    "*p iwmmxt_wmulwsmr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulwsmr%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:339 */
  {
    "*p iwmmxt_wmulwumr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulwumr%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:356 */
  {
    "*p iwmmxt_wmulwl",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmulwl%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:367 */
  {
    "*p iwmmxt_wqmulm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmulm%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:377 */
  {
    "*p iwmmxt_wqmulwm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmulwm%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:387 */
  {
    "*p iwmmxt_wqmulmr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmulmr%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7429],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:397 */
  {
    "*p iwmmxt_wqmulwmr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmulwmr%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7424],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:407 */
  {
    "*p iwmmxt_waddbhusm",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddbhusm%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7644],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:423 */
  {
    "*p iwmmxt_waddbhusl",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "waddbhusl%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7644],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:439 */
  {
    "*p iwmmxt_wqmiabb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiabb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7621],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:452 */
  {
    "*p iwmmxt_wqmiabt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiabt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7621],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:465 */
  {
    "*p iwmmxt_wqmiatb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiatb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7621],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:478 */
  {
    "*p iwmmxt_wqmiatt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiatt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7621],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:491 */
  {
    "*p iwmmxt_wqmiabbn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiabbn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7621],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:504 */
  {
    "*p iwmmxt_wqmiabtn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiabtn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7621],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:517 */
  {
    "*p iwmmxt_wqmiatbn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiatbn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7621],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:530 */
  {
    "*p iwmmxt_wqmiattn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wqmiattn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7621],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:543 */
  {
    "*p iwmmxt_wmiabb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiabb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7439],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:567 */
  {
    "*p iwmmxt_wmiabt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiabt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7439],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:591 */
  {
    "*p iwmmxt_wmiatb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiatb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7439],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:615 */
  {
    "*p iwmmxt_wmiatt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiatt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7439],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:639 */
  {
    "*p iwmmxt_wmiabbn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiabbn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7439],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:663 */
  {
    "*p iwmmxt_wmiabtn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiabtn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7439],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:687 */
  {
    "*p iwmmxt_wmiatbn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiatbn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7439],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:711 */
  {
    "*p iwmmxt_wmiattn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiattn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7439],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:735 */
  {
    "*p iwmmxt_wmiawbb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawbb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7649],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:748 */
  {
    "*p iwmmxt_wmiawbt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawbt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7649],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:761 */
  {
    "*p iwmmxt_wmiawtb",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawtb%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7649],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:774 */
  {
    "*p iwmmxt_wmiawtt",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawtt%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7649],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:787 */
  {
    "*p iwmmxt_wmiawbbn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawbbn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7649],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:800 */
  {
    "*p iwmmxt_wmiawbtn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawbtn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7649],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:813 */
  {
    "*p iwmmxt_wmiawtbn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawtbn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7649],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:826 */
  {
    "*p iwmmxt_wmiawttn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmiawttn%?\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7649],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:839 */
  {
    "*p iwmmxt_wmerge",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "wmerge%?\t%0, %1, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7655],
    6,
    6,
    2,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:864 */
  {
    "*p iwmmxt_tandcv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tandcw%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:864 */
  {
    "*p iwmmxt_tandcv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tandch%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:864 */
  {
    "*p iwmmxt_tandcv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "tandcb%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:874 */
  {
    "*p iwmmxt_torcv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "torcw%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:874 */
  {
    "*p iwmmxt_torcv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "torch%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:874 */
  {
    "*p iwmmxt_torcv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "torcb%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:884 */
  {
    "*p iwmmxt_torvscv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "torvscw%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:884 */
  {
    "*p iwmmxt_torvscv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "torvsch%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:884 */
  {
    "*p iwmmxt_torvscv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "torvscb%?\t r15",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:894 */
  {
    "*p iwmmxt_textrcv2si3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrcw%?\t r15, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7465],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:894 */
  {
    "*p iwmmxt_textrcv4hi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrch%?\t r15, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7465],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/iwmmxt2.md:894 */
  {
    "*p iwmmxt_textrcv8qi3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "textrcb%?\t r15, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7465],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:23 */
  {
    "*p *arm_movhi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6797 },
#else
    { 0, 0, output_6797 },
#endif
    { 0 },
    &operand_data[7661],
    4,
    4,
    0,
    8,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:74 */
  {
    "*p *thumb2_movhi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6798 },
#else
    { 0, 0, output_6798 },
#endif
    { 0 },
    &operand_data[7665],
    4,
    4,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:74 */
  {
    "*p *thumb2_movhi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6799 },
#else
    { 0, 0, output_6799 },
#endif
    { 0 },
    &operand_data[7669],
    4,
    4,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:74 */
  {
    "*p *thumb2_movhi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6800 },
#else
    { 0, 0, output_6800 },
#endif
    { 0 },
    &operand_data[7673],
    4,
    4,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:74 */
  {
    "*p *thumb2_movhi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6801 },
#else
    { 0, 0, output_6801 },
#endif
    { 0 },
    &operand_data[7677],
    4,
    4,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:129 */
  {
    "*p *arm_movhi_fp16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6802 },
#else
    { 0, 0, output_6802 },
#endif
    { 0 },
    &operand_data[7681],
    4,
    4,
    0,
    8,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:179 */
  {
    "*p *thumb2_movhi_fp16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6803 },
#else
    { 0, 0, output_6803 },
#endif
    { 0 },
    &operand_data[7665],
    4,
    4,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:179 */
  {
    "*p *thumb2_movhi_fp16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6804 },
#else
    { 0, 0, output_6804 },
#endif
    { 0 },
    &operand_data[7669],
    4,
    4,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:179 */
  {
    "*p *thumb2_movhi_fp16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6805 },
#else
    { 0, 0, output_6805 },
#endif
    { 0 },
    &operand_data[7673],
    4,
    4,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:179 */
  {
    "*p *thumb2_movhi_fp16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6806 },
#else
    { 0, 0, output_6806 },
#endif
    { 0 },
    &operand_data[7677],
    4,
    4,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:235 */
  {
    "*p *arm_movsi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6807 },
#else
    { 0, 0, output_6807 },
#endif
    { 0 },
    &operand_data[7685],
    4,
    4,
    0,
    11,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:278 */
  {
    "*p *thumb2_movsi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6808 },
#else
    { 0, 0, output_6808 },
#endif
    { 0 },
    &operand_data[7689],
    4,
    4,
    0,
    18,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:341 */
  {
    "*p *movdi_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6809 },
#else
    { 0, 0, output_6809 },
#endif
    { 0 },
    &operand_data[7693],
    4,
    4,
    0,
    12,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:402 */
  {
    "*p *movhf_vfp_hf16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6810 },
#else
    { 0, 0, output_6810 },
#endif
    { 0 },
    &operand_data[7697],
    4,
    4,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:402 */
  {
    "*p *movbf_vfp_bf16",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6811 },
#else
    { 0, 0, output_6811 },
#endif
    { 0 },
    &operand_data[7701],
    4,
    4,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:597 */
  {
    "*p *movsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6812 },
#else
    { 0, 0, output_6812 },
#endif
    { 0 },
    &operand_data[7705],
    4,
    4,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:633 */
  {
    "*p *thumb2_movsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6813 },
#else
    { 0, 0, output_6813 },
#endif
    { 0 },
    &operand_data[7709],
    4,
    4,
    0,
    9,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:671 */
  {
    "*p *movdf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6814 },
#else
    { 0, 0, output_6814 },
#endif
    { 0 },
    &operand_data[7713],
    4,
    4,
    0,
    10,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:869 */
  {
    "*p *abssf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs%?.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7717],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:878 */
  {
    "*p *absdf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vabs%?.f64\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7721],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:887 */
  {
    "*p *negsf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6817 },
#else
    { 0, output_6817, 0 },
#endif
    { 0 },
    &operand_data[7725],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:898 */
  {
    "*p *negdf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6818 },
#else
    { 0, output_6818, 0 },
#endif
    { 0 },
    &operand_data[7729],
    4,
    4,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1002 */
  {
    "*p *addsf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7733],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1012 */
  {
    "*p *adddf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vadd%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7738],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1034 */
  {
    "*p *subsf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7733],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1044 */
  {
    "*p *subdf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsub%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7738],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1073 */
  {
    "*p *divsf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdiv%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7743],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1084 */
  {
    "*p *divdf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vdiv%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7748],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1109 */
  {
    "*p *mulsf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7733],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1119 */
  {
    "*p *muldf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmul%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7738],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1149 */
  {
    "*p *mulsf3negsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmul%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7733],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1159 */
  {
    "*p *negmulsf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmul%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7733],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1169 */
  {
    "*p *muldf3negdf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmul%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7738],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1180 */
  {
    "*p *negmuldf3_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmul%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7738],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1206 */
  {
    "*p *mulsf3addsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla%?.f32\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7753],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1217 */
  {
    "*p *muldf3adddf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmla%?.f64\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7759],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1240 */
  {
    "*p *mulsf3subsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmls%?.f32\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7753],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1251 */
  {
    "*p *muldf3subdf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmls%?.f64\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7759],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1274 */
  {
    "*p *mulsf3negsfaddsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls%?.f32\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7753],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1285 */
  {
    "*p *fmuldf3negdfadddf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vmls%?.f64\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7759],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1310 */
  {
    "*p *mulsf3negsfsubsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmla%?.f32\t%0, %2, %3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7753],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1322 */
  {
    "*p *muldf3negdfsubdf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vnmla%?.f64\t%P0, %P2, %P3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7759],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1360 */
  {
    "*p fmasf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfma%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7765],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1360 */
  {
    "*p fmadf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfma%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7771],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1395 */
  {
    "*p *fmsubsf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfms%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7765],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1395 */
  {
    "*p *fmsubdf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfms%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7771],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1418 */
  {
    "*p *fnmsubsf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfnms%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7765],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1418 */
  {
    "*p *fnmsubdf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfnms%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7771],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1440 */
  {
    "*p *fnmaddsf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfnma%?.f32\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7765],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1440 */
  {
    "*p *fnmadddf4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vfnma%?.f64\t%P0, %P1, %P2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7771],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1455 */
  {
    "*p *extendsfdf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f64.f32\t%P0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7777],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1464 */
  {
    "*p *truncdfsf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f32.f64\t%0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7781],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1473 */
  {
    "*p extendhfsf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtb%?.f32.f16\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7785],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1482 */
  {
    "*p *truncdfhf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtb%?.f16.f64\t%0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7789],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1491 */
  {
    "*p *extendhfdf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtb%?.f64.f16\t%P0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7793],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1500 */
  {
    "*p truncsfhf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvtb%?.f16.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7797],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1509 */
  {
    "*p *truncsisf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.s32.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7801],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1518 */
  {
    "*p *truncsidf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.s32.f64\t%0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7805],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1528 */
  {
    "*p fixuns_truncsfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.u32.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7801],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1537 */
  {
    "*p fixuns_truncdfsi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.u32.f64\t%0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7809],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1547 */
  {
    "*p *floatsisf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f32.s32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7813],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1556 */
  {
    "*p *floatsidf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f64.s32\t%P0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7817],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1566 */
  {
    "*p floatunssisf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f32.u32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7813],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1575 */
  {
    "*p floatunssidf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f64.u32\t%P0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7817],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1611 */
  {
    "*p *sqrtsf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsqrt%?.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7821],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1621 */
  {
    "*p *sqrtdf2_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vsqrt%?.f64\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7825],
    4,
    4,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1643 */
  {
    "*p push_fpsysreg_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6863 },
#else
    { 0, 0, output_6863 },
#endif
    { 0 },
    &operand_data[7829],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1662 */
  {
    "*p pop_fpsysreg_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6864 },
#else
    { 0, 0, output_6864 },
#endif
    { 0 },
    &operand_data[7829],
    4,
    4,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1684 */
  {
    "*p *clear_vfp_multiple",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6865 },
#else
    { 0, 0, output_6865 },
#endif
    { 0 },
    &operand_data[7833],
    3,
    3,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1721 */
  {
    "*p lazy_store_multiple_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vlstm%?\t%0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7306],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1811 */
  {
    "*p *cmpsf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6867 },
#else
    { 0, output_6867, 0 },
#endif
    { 0 },
    &operand_data[7836],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1823 */
  {
    "*p *cmpsf_trap_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6868 },
#else
    { 0, output_6868, 0 },
#endif
    { 0 },
    &operand_data[7836],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1835 */
  {
    "*p *cmpdf_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6869 },
#else
    { 0, output_6869, 0 },
#endif
    { 0 },
    &operand_data[7840],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1847 */
  {
    "*p *cmpdf_trap_vfp",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6870 },
#else
    { 0, output_6870, 0 },
#endif
    { 0 },
    &operand_data[7840],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1860 */
  {
    "*p *combine_vcvt_f32_u32",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f32.u32\t%0, %1, %v2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7844],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1860 */
  {
    "*p *combine_vcvt_f32_s32",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.f32.s32\t%0, %1, %v2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7844],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1873 */
  {
    "*p *combine_vcvt_f64_u32",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6873 },
#else
    { 0, output_6873, 0 },
#endif
    { 0 },
    &operand_data[7849],
    5,
    5,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1873 */
  {
    "*p *combine_vcvt_f64_s32",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6874 },
#else
    { 0, output_6874, 0 },
#endif
    { 0 },
    &operand_data[7849],
    5,
    5,
    0,
    3,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:1890 */
  {
    "*p *combine_vcvtf2i",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vcvt%?.s32.f32\t%0, %1, %v2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7854],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "*p btruncsf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintz%?.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7859],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "*p nearbyintsf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintr%?.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7859],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "*p rintsf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintx%?.f32\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7859],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "*p btruncdf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintz%?.f64\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7863],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "*p nearbyintdf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintr%?.f64\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7863],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/vfp.md:2035 */
  {
    "*p rintdf2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "vrintx%?.f64\t%P0, %P1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7863],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:113 */
  {
    "*p *thumb2_abssi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7867],
    4,
    4,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:166 */
  {
    "*p *thumb2_neg_abssi2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "#",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7867],
    4,
    4,
    0,
    3,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:220 */
  {
    "*p *thumb2_pop_single",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "pop\t{%0}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7871],
    3,
    3,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:235 */
  {
    "*p *thumb2_movsi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6885 },
#else
    { 0, 0, output_6885 },
#endif
    { 0 },
    &operand_data[7874],
    4,
    4,
    0,
    7,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:286 */
  {
    "*p *thumb2_movhi_insn",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6886 },
#else
    { 0, output_6886, 0 },
#endif
    { 0 },
    &operand_data[7878],
    4,
    4,
    0,
    6,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1091 */
  {
    "*p *thumb2_extendqisi_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6887 },
#else
    { 0, output_6887, 0 },
#endif
    { 0 },
    &operand_data[7106],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1104 */
  {
    "*p *thumb2_zero_extendhisi2_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6888 },
#else
    { 0, output_6888, 0 },
#endif
    { 0 },
    &operand_data[7098],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1117 */
  {
    "*p thumb2_zero_extendqisi2_v6",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6889 },
#else
    { 0, output_6889, 0 },
#endif
    { 0 },
    &operand_data[7106],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1250 */
  {
    "*p *thumb2_alusi3_short",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "%I3%!\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7882],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1265 */
  {
    "*p *thumb2_shiftsi3_short",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6891 },
#else
    { 0, 0, output_6891 },
#endif
    { 0 },
    &operand_data[7888],
    6,
    6,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1285 */
  {
    "*p *thumb2_movqi_shortim",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mov%!\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7894],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1285 */
  {
    "*p *thumb2_movhi_shortim",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mov%!\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7898],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1285 */
  {
    "*p *thumb2_movsi_shortim",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mov%!\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7902],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1296 */
  {
    "*p *thumb2_addsi_short",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6895 },
#else
    { 0, 0, output_6895 },
#endif
    { 0 },
    &operand_data[7906],
    5,
    5,
    0,
    2,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1325 */
  {
    "*p *thumb2_subsi_short",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%!\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7911],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1424 */
  {
    "*p *thumb2_mulsi_short",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mul%!\t%0, %2, %0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7916],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1508 */
  {
    "*p *thumb2_one_cmplsi2_short",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "mvn%!\t%0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7921],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1519 */
  {
    "*p *thumb2_negsi2_short",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "rsb%!\t%0, %1, #0",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7921],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1530 */
  {
    "*p *orsi_notsi_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "orn%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[6938],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1540 */
  {
    "*p *orsi_not_shiftsi_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "orn%?\t%0, %1, %2%S4",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7925],
    7,
    7,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1662 */
  {
    "*p *clear_apsr",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "clrm%?\t{APSR}",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[466],
    2,
    2,
    0,
    0,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1673 */
  {
    "*p *clear_multiple",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6903 },
#else
    { 0, 0, output_6903 },
#endif
    { 0 },
    &operand_data[7932],
    4,
    4,
    0,
    0,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1703 */
  {
    "*p thumb2_asrl",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "asrl%?\t%Q0, %R0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7936],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1711 */
  {
    "*p thumb2_lsll",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "lsll%?\t%Q0, %R0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7936],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/thumb2.md:1719 */
  {
    "*p thumb2_lsrl",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "lsrl%?\t%Q0, %R0, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7940],
    4,
    4,
    1,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:65 */
  {
    "*p atomic_loadqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6907 },
#else
    { 0, 0, output_6907 },
#endif
    { 0 },
    &operand_data[7944],
    5,
    5,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:65 */
  {
    "*p atomic_loadhi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6908 },
#else
    { 0, 0, output_6908 },
#endif
    { 0 },
    &operand_data[7949],
    5,
    5,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:65 */
  {
    "*p atomic_loadsi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6909 },
#else
    { 0, 0, output_6909 },
#endif
    { 0 },
    &operand_data[7954],
    5,
    5,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:91 */
  {
    "*p atomic_storeqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6910 },
#else
    { 0, 0, output_6910 },
#endif
    { 0 },
    &operand_data[7959],
    5,
    5,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:91 */
  {
    "*p atomic_storehi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6911 },
#else
    { 0, 0, output_6911 },
#endif
    { 0 },
    &operand_data[7964],
    5,
    5,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:91 */
  {
    "*p atomic_storesi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6912 },
#else
    { 0, 0, output_6912 },
#endif
    { 0 },
    &operand_data[7969],
    5,
    5,
    0,
    3,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:119 */
  {
    "*p arm_atomic_loaddi2_ldrd",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldrd%?\t%0, %H0, %C1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7974],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:448 */
  {
    "*p arm_load_exclusiveqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6914 },
#else
    { 0, output_6914, 0 },
#endif
    { 0 },
    &operand_data[7978],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:448 */
  {
    "*p arm_load_exclusivehi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6915 },
#else
    { 0, output_6915, 0 },
#endif
    { 0 },
    &operand_data[7982],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:461 */
  {
    "*p arm_load_acquire_exclusiveqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6916 },
#else
    { 0, output_6916, 0 },
#endif
    { 0 },
    &operand_data[7978],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:461 */
  {
    "*p arm_load_acquire_exclusivehi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6917 },
#else
    { 0, output_6917, 0 },
#endif
    { 0 },
    &operand_data[7982],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:474 */
  {
    "*p arm_load_exclusivesi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6918 },
#else
    { 0, output_6918, 0 },
#endif
    { 0 },
    &operand_data[7986],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:486 */
  {
    "*p arm_load_acquire_exclusivesi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6919 },
#else
    { 0, output_6919, 0 },
#endif
    { 0 },
    &operand_data[7986],
    4,
    4,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:498 */
  {
    "*p arm_load_exclusivedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldrexd%?\t%0, %H0, %C1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7990],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:507 */
  {
    "*p arm_load_acquire_exclusivedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ldaexd%?\t%0, %H0, %C1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[7990],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:516 */
  {
    "*p arm_store_exclusiveqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6922 },
#else
    { 0, 0, output_6922 },
#endif
    { 0 },
    &operand_data[7994],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:516 */
  {
    "*p arm_store_exclusivehi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6923 },
#else
    { 0, 0, output_6923 },
#endif
    { 0 },
    &operand_data[7999],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:516 */
  {
    "*p arm_store_exclusivesi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6924 },
#else
    { 0, 0, output_6924 },
#endif
    { 0 },
    &operand_data[8004],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:516 */
  {
    "*p arm_store_exclusivedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6925 },
#else
    { 0, 0, output_6925 },
#endif
    { 0 },
    &operand_data[8009],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:542 */
  {
    "*p arm_store_release_exclusivedi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .function = output_6926 },
#else
    { 0, 0, output_6926 },
#endif
    { 0 },
    &operand_data[8009],
    5,
    5,
    0,
    1,
    3
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:557 */
  {
    "*p arm_store_release_exclusiveqi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6927 },
#else
    { 0, output_6927, 0 },
#endif
    { 0 },
    &operand_data[8014],
    5,
    5,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:557 */
  {
    "*p arm_store_release_exclusivehi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6928 },
#else
    { 0, output_6928, 0 },
#endif
    { 0 },
    &operand_data[8019],
    5,
    5,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/sync.md:557 */
  {
    "*p arm_store_release_exclusivesi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .multi = output_6929 },
#else
    { 0, output_6929, 0 },
#endif
    { 0 },
    &operand_data[8024],
    5,
    5,
    0,
    2,
    2
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "*p addqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8029],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "*p addhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8034],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "*p addsq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8039],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "*p adduqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8044],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "*p adduhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8049],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "*p addusq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8054],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "*p addha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8059],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "*p addsa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8064],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "*p adduha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8069],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:21 */
  {
    "*p addusa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "add%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8074],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:42 */
  {
    "*p *arm_addv4qq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8079],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:42 */
  {
    "*p *arm_addv2hq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8084],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:42 */
  {
    "*p *arm_addv2ha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8089],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:51 */
  {
    "*p usaddv4uqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8094],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:51 */
  {
    "*p usaddv2uhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8099],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:51 */
  {
    "*p usadduqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8104],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:51 */
  {
    "*p usadduhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8109],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:51 */
  {
    "*p usaddv2uha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8114],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:51 */
  {
    "*p usadduha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8119],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*p *arm_ssaddv4qq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8079],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*p *arm_ssaddv2hq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8084],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*p *arm_ssaddqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8124],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*p *arm_ssaddhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8129],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*p *arm_ssaddv2ha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8089],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*p *arm_ssaddha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8134],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*p *arm_ssaddsq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8139],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:71 */
  {
    "*p *arm_ssaddsa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qadd%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8144],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "*p subqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8029],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "*p subhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8034],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "*p subsq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8039],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "*p subuqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8044],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "*p subuhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8049],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "*p subusq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8054],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "*p subha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8059],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "*p subsa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8064],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "*p subuha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8069],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:80 */
  {
    "*p subusa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8074],
    5,
    5,
    0,
    2,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:101 */
  {
    "*p *arm_subv4qq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8079],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:101 */
  {
    "*p *arm_subv2hq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8084],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:101 */
  {
    "*p *arm_subv2ha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8089],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:110 */
  {
    "*p ussubv4uqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8094],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:110 */
  {
    "*p ussubv2uhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8099],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:110 */
  {
    "*p ussubuqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8104],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:110 */
  {
    "*p ussubuhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8109],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:110 */
  {
    "*p ussubv2uha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8114],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:110 */
  {
    "*p ussubuha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8119],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*p *arm_sssubv4qq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8079],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*p *arm_sssubv2hq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8084],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*p *arm_sssubqq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub8%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8124],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*p *arm_sssubhq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8129],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*p *arm_sssubv2ha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8089],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*p *arm_sssubha3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub16%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8134],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*p *arm_sssubsq3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8139],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:131 */
  {
    "*p *arm_sssubsa3",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "qsub%?\t%0, %1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8144],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:476 */
  {
    "*p arm_ssatsihi_shift",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "ssat%?\t%0, #16, %2%S1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8149],
    6,
    6,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/arm-fixed.md:487 */
  {
    "*p arm_usatsihi",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "usat%?\t%0, #16, %1",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8155],
    4,
    4,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10160 */
  {
    "*p mve_uqrshll_sat64_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqrshll%?\t%Q1, %R1, #64, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8159],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10160 */
  {
    "*p mve_uqrshll_sat48_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqrshll%?\t%Q1, %R1, #48, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8159],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10172 */
  {
    "*p mve_sqrshrl_sat64_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sqrshrl%?\t%Q1, %R1, #64, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8159],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10172 */
  {
    "*p mve_sqrshrl_sat48_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sqrshrl%?\t%Q1, %R1, #48, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8159],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10184 */
  {
    "*p mve_uqrshl_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqrshl%?\t%1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8164],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10196 */
  {
    "*p mve_sqrshr_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sqrshr%?\t%1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8164],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10208 */
  {
    "*p mve_uqshll_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqshll%?\t%Q1, %R1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8169],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10219 */
  {
    "*p mve_urshrl_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "urshrl%?\t%Q1, %R1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8169],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10231 */
  {
    "*p mve_uqshl_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "uqshl%?\t%1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8174],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10242 */
  {
    "*p mve_urshr_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "urshr%?\t%1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8174],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10254 */
  {
    "*p mve_sqshl_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sqshl%?\t%1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8179],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10265 */
  {
    "*p mve_srshr_si",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "srshr%?\t%1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8179],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10277 */
  {
    "*p mve_srshrl_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "srshrl%?\t%Q1, %R1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8169],
    5,
    5,
    0,
    1,
    1
  },
  /* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/arm/mve.md:10289 */
  {
    "*p mve_sqshll_di",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    { .single =
#else
    {
#endif
    "sqshll%?\t%Q1, %R1, %2",
#if HAVE_DESIGNATED_UNION_INITIALIZERS
    },
#else
    0, 0 },
#endif
    { 0 },
    &operand_data[8169],
    5,
    5,
    0,
    1,
    1
  },
};


const char *
get_insn_name (int code)
{
  if (code == NOOP_MOVE_INSN_CODE)
    return "NOOP_MOVE";
  else
    return insn_data[code].name;
}
