	&psv_cortexa72_0 {
		xlnx,timestamp-clk-freq = <99999908>;
		xlnx,pss-ref-clk-freq = <33333300>;
		stamp-frequency = <99999908>;
		xlnx,ip-name = "psv_cortexa72";
		xlnx,cpu-clk-freq-hz = <1349998657>;
		cpu-frequency = <1349998657>;
		bus-handle = <&amba>;
	};
	&psv_cortexa72_1 {
		xlnx,timestamp-clk-freq = <99999908>;
		xlnx,pss-ref-clk-freq = <33333300>;
		stamp-frequency = <99999908>;
		xlnx,ip-name = "psv_cortexa72";
		xlnx,cpu-clk-freq-hz = <1349998657>;
		cpu-frequency = <1349998657>;
		bus-handle = <&amba>;
	};
	&amba {
		blp_cips_pspmc_0_psv_apu_0: blp_cips_pspmc_0_psv_apu_0@fd5c0000 {
			compatible = "xlnx,psv-apu-1.0";
			status = "okay";
			xlnx,ip-name = "psv_apu";
			reg = <0x0 0xfd5c0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_apu_0";
		};
		blp_cips_pspmc_0_psv_coresight_a720_cti: blp_cips_pspmc_0_psv_coresight_a720_cti@f0d10000 {
			compatible = "xlnx,psv-coresight-a720-cti-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_a720_cti";
			reg = <0x0 0xf0d10000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_a720_cti";
		};
		blp_cips_pspmc_0_psv_coresight_a720_dbg: blp_cips_pspmc_0_psv_coresight_a720_dbg@f0d00000 {
			compatible = "xlnx,psv-coresight-a720-dbg-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_a720_dbg";
			reg = <0x0 0xf0d00000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_a720_dbg";
		};
		blp_cips_pspmc_0_psv_coresight_a720_etm: blp_cips_pspmc_0_psv_coresight_a720_etm@f0d30000 {
			compatible = "xlnx,psv-coresight-a720-etm-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_a720_etm";
			reg = <0x0 0xf0d30000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_a720_etm";
		};
		blp_cips_pspmc_0_psv_coresight_a720_pmu: blp_cips_pspmc_0_psv_coresight_a720_pmu@f0d20000 {
			compatible = "xlnx,psv-coresight-a720-pmu-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_a720_pmu";
			reg = <0x0 0xf0d20000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_a720_pmu";
		};
		blp_cips_pspmc_0_psv_coresight_a721_cti: blp_cips_pspmc_0_psv_coresight_a721_cti@f0d50000 {
			compatible = "xlnx,psv-coresight-a721-cti-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_a721_cti";
			reg = <0x0 0xf0d50000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_a721_cti";
		};
		blp_cips_pspmc_0_psv_coresight_a721_dbg: blp_cips_pspmc_0_psv_coresight_a721_dbg@f0d40000 {
			compatible = "xlnx,psv-coresight-a721-dbg-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_a721_dbg";
			reg = <0x0 0xf0d40000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_a721_dbg";
		};
		blp_cips_pspmc_0_psv_coresight_a721_etm: blp_cips_pspmc_0_psv_coresight_a721_etm@f0d70000 {
			compatible = "xlnx,psv-coresight-a721-etm-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_a721_etm";
			reg = <0x0 0xf0d70000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_a721_etm";
		};
		blp_cips_pspmc_0_psv_coresight_a721_pmu: blp_cips_pspmc_0_psv_coresight_a721_pmu@f0d60000 {
			compatible = "xlnx,psv-coresight-a721-pmu-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_a721_pmu";
			reg = <0x0 0xf0d60000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_a721_pmu";
		};
		blp_cips_pspmc_0_psv_coresight_apu_cti: blp_cips_pspmc_0_psv_coresight_apu_cti@f0ca0000 {
			compatible = "xlnx,psv-coresight-apu-cti-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_apu_cti";
			reg = <0x0 0xf0ca0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_apu_cti";
		};
		blp_cips_pspmc_0_psv_coresight_apu_ela: blp_cips_pspmc_0_psv_coresight_apu_ela@f0c60000 {
			compatible = "xlnx,psv-coresight-apu-ela-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_apu_ela";
			reg = <0x0 0xf0c60000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_apu_ela";
		};
		blp_cips_pspmc_0_psv_coresight_apu_etf: blp_cips_pspmc_0_psv_coresight_apu_etf@f0c30000 {
			compatible = "xlnx,psv-coresight-apu-etf-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_apu_etf";
			reg = <0x0 0xf0c30000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_apu_etf";
		};
		blp_cips_pspmc_0_psv_coresight_apu_fun: blp_cips_pspmc_0_psv_coresight_apu_fun@f0c20000 {
			compatible = "xlnx,psv-coresight-apu-fun-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_apu_fun";
			reg = <0x0 0xf0c20000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_apu_fun";
		};
		blp_cips_pspmc_0_psv_coresight_cpm_atm: blp_cips_pspmc_0_psv_coresight_cpm_atm@f0f80000 {
			compatible = "xlnx,psv-coresight-cpm-atm-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_cpm_atm";
			reg = <0x0 0xf0f80000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_cpm_atm";
		};
		blp_cips_pspmc_0_psv_coresight_cpm_cti2a: blp_cips_pspmc_0_psv_coresight_cpm_cti2a@f0fa0000 {
			compatible = "xlnx,psv-coresight-cpm-cti2a-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_cpm_cti2a";
			reg = <0x0 0xf0fa0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_cpm_cti2a";
		};
		blp_cips_pspmc_0_psv_coresight_cpm_cti2d: blp_cips_pspmc_0_psv_coresight_cpm_cti2d@f0fd0000 {
			compatible = "xlnx,psv-coresight-cpm-cti2d-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_cpm_cti2d";
			reg = <0x0 0xf0fd0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_cpm_cti2d";
		};
		blp_cips_pspmc_0_psv_coresight_cpm_ela2a: blp_cips_pspmc_0_psv_coresight_cpm_ela2a@f0f40000 {
			compatible = "xlnx,psv-coresight-cpm-ela2a-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_cpm_ela2a";
			reg = <0x0 0xf0f40000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_cpm_ela2a";
		};
		blp_cips_pspmc_0_psv_coresight_cpm_ela2b: blp_cips_pspmc_0_psv_coresight_cpm_ela2b@f0f50000 {
			compatible = "xlnx,psv-coresight-cpm-ela2b-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_cpm_ela2b";
			reg = <0x0 0xf0f50000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_cpm_ela2b";
		};
		blp_cips_pspmc_0_psv_coresight_cpm_ela2c: blp_cips_pspmc_0_psv_coresight_cpm_ela2c@f0f60000 {
			compatible = "xlnx,psv-coresight-cpm-ela2c-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_cpm_ela2c";
			reg = <0x0 0xf0f60000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_cpm_ela2c";
		};
		blp_cips_pspmc_0_psv_coresight_cpm_ela2d: blp_cips_pspmc_0_psv_coresight_cpm_ela2d@f0f70000 {
			compatible = "xlnx,psv-coresight-cpm-ela2d-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_cpm_ela2d";
			reg = <0x0 0xf0f70000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_cpm_ela2d";
		};
		blp_cips_pspmc_0_psv_coresight_cpm_fun: blp_cips_pspmc_0_psv_coresight_cpm_fun@f0f20000 {
			compatible = "xlnx,psv-coresight-cpm-fun-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_cpm_fun";
			reg = <0x0 0xf0f20000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_cpm_fun";
		};
		blp_cips_pspmc_0_psv_coresight_cpm_rom: blp_cips_pspmc_0_psv_coresight_cpm_rom@f0f00000 {
			compatible = "xlnx,psv-coresight-cpm-rom-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_cpm_rom";
			reg = <0x0 0xf0f00000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_cpm_rom";
		};
		blp_cips_pspmc_0_psv_coresight_fpd_atm: blp_cips_pspmc_0_psv_coresight_fpd_atm@f0b80000 {
			compatible = "xlnx,psv-coresight-fpd-atm-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_fpd_atm";
			reg = <0x0 0xf0b80000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_fpd_atm";
		};
		blp_cips_pspmc_0_psv_coresight_fpd_cti1b: blp_cips_pspmc_0_psv_coresight_fpd_cti1b@f0bb0000 {
			compatible = "xlnx,psv-coresight-fpd-cti1b-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_fpd_cti1b";
			reg = <0x0 0xf0bb0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_fpd_cti1b";
		};
		blp_cips_pspmc_0_psv_coresight_fpd_cti1c: blp_cips_pspmc_0_psv_coresight_fpd_cti1c@f0bc0000 {
			compatible = "xlnx,psv-coresight-fpd-cti1c-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_fpd_cti1c";
			reg = <0x0 0xf0bc0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_fpd_cti1c";
		};
		blp_cips_pspmc_0_psv_coresight_fpd_cti1d: blp_cips_pspmc_0_psv_coresight_fpd_cti1d@f0bd0000 {
			compatible = "xlnx,psv-coresight-fpd-cti1d-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_fpd_cti1d";
			reg = <0x0 0xf0bd0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_fpd_cti1d";
		};
		blp_cips_pspmc_0_psv_coresight_fpd_stm: blp_cips_pspmc_0_psv_coresight_fpd_stm@f0b70000 {
			compatible = "xlnx,psv-coresight-fpd-stm-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_fpd_stm";
			reg = <0x0 0xf0b70000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_fpd_stm";
		};
		blp_cips_pspmc_0_psv_coresight_lpd_atm: blp_cips_pspmc_0_psv_coresight_lpd_atm@f0980000 {
			compatible = "xlnx,psv-coresight-lpd-atm-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_lpd_atm";
			reg = <0x0 0xf0980000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_lpd_atm";
		};
		blp_cips_pspmc_0_psv_coresight_lpd_cti: blp_cips_pspmc_0_psv_coresight_lpd_cti@f09d0000 {
			compatible = "xlnx,psv-coresight-lpd-cti-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_lpd_cti";
			reg = <0x0 0xf09d0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_lpd_cti";
		};
		blp_cips_pspmc_0_psv_coresight_pmc_cti: blp_cips_pspmc_0_psv_coresight_pmc_cti@f08d0000 {
			compatible = "xlnx,psv-coresight-pmc-cti-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_pmc_cti";
			reg = <0x0 0xf08d0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_pmc_cti";
		};
		blp_cips_pspmc_0_psv_coresight_r50_cti: blp_cips_pspmc_0_psv_coresight_r50_cti@f0a10000 {
			compatible = "xlnx,psv-coresight-r50-cti-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_r50_cti";
			reg = <0x0 0xf0a10000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_r50_cti";
		};
		blp_cips_pspmc_0_psv_coresight_r51_cti: blp_cips_pspmc_0_psv_coresight_r51_cti@f0a50000 {
			compatible = "xlnx,psv-coresight-r51-cti-1.0";
			status = "okay";
			xlnx,ip-name = "psv_coresight_r51_cti";
			reg = <0x0 0xf0a50000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_coresight_r51_cti";
		};
		blp_cips_pspmc_0_psv_cpm: blp_cips_pspmc_0_psv_cpm@0 {
			compatible = "xlnx,psv-cpm-1.0";
			status = "okay";
			xlnx,ip-name = "psv_cpm";
			reg = <0x0 0xfc000000 0x0 0x1000000>;
			xlnx,name = "blp_cips_pspmc_0_psv_cpm";
		};
		blp_cips_pspmc_0_psv_crf_0: blp_cips_pspmc_0_psv_crf_0@fd1a0000 {
			compatible = "xlnx,psv-crf-1.0";
			status = "okay";
			xlnx,ip-name = "psv_crf";
			reg = <0x0 0xfd1a0000 0x0 0x140000>;
			xlnx,name = "blp_cips_pspmc_0_psv_crf_0";
		};
		blp_cips_pspmc_0_psv_crl_0: blp_cips_pspmc_0_psv_crl_0@ff5e0000 {
			compatible = "xlnx,psv-crl-1.0";
			status = "okay";
			xlnx,ip-name = "psv_crl";
			reg = <0x0 0xff5e0000 0x0 0x300000>;
			xlnx,name = "blp_cips_pspmc_0_psv_crl_0";
		};
		blp_cips_pspmc_0_psv_crp_0: blp_cips_pspmc_0_psv_crp_0@f1260000 {
			compatible = "xlnx,psv-crp-1.0";
			status = "okay";
			xlnx,ip-name = "psv_crp";
			reg = <0x0 0xf1260000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_crp_0";
		};
		blp_cips_pspmc_0_psv_fpd_afi_0: blp_cips_pspmc_0_psv_fpd_afi_0@fd360000 {
			compatible = "xlnx,psv-fpd-afi-1.0";
			status = "okay";
			xlnx,ip-name = "psv_fpd_afi";
			reg = <0x0 0xfd360000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_fpd_afi_0";
		};
		blp_cips_pspmc_0_psv_fpd_afi_2: blp_cips_pspmc_0_psv_fpd_afi_2@fd380000 {
			compatible = "xlnx,psv-fpd-afi-1.0";
			status = "okay";
			xlnx,ip-name = "psv_fpd_afi";
			reg = <0x0 0xfd380000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_fpd_afi_2";
		};
		blp_cips_pspmc_0_psv_fpd_afi_mem_0: blp_cips_pspmc_0_psv_fpd_afi_mem_0@a4000000 {
			compatible = "xlnx,psv-fpd-afi-mem-1.0";
			status = "okay";
			xlnx,ip-name = "psv_fpd_afi_mem";
			reg = <0x0 0xa4000000 0x0 0xc000000>;
			xlnx,name = "blp_cips_pspmc_0_psv_fpd_afi_mem_0";
		};
		blp_cips_pspmc_0_psv_fpd_afi_mem_2: blp_cips_pspmc_0_psv_fpd_afi_mem_2@b0000000 {
			compatible = "xlnx,psv-fpd-afi-mem-1.0";
			status = "okay";
			xlnx,ip-name = "psv_fpd_afi_mem";
			reg = <0x0 0xb0000000 0x0 0x10000000>;
			xlnx,name = "blp_cips_pspmc_0_psv_fpd_afi_mem_2";
		};
		blp_cips_pspmc_0_psv_fpd_cci_0: blp_cips_pspmc_0_psv_fpd_cci_0@fd5e0000 {
			compatible = "xlnx,psv-fpd-cci-1.0";
			status = "okay";
			xlnx,ip-name = "psv_fpd_cci";
			reg = <0x0 0xfd5e0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_fpd_cci_0";
		};
		blp_cips_pspmc_0_psv_fpd_gpv_0: blp_cips_pspmc_0_psv_fpd_gpv_0@fd700000 {
			compatible = "xlnx,psv-fpd-gpv-1.0";
			status = "okay";
			xlnx,ip-name = "psv_fpd_gpv";
			reg = <0x0 0xfd700000 0x0 0x100000>;
			xlnx,name = "blp_cips_pspmc_0_psv_fpd_gpv_0";
		};
		blp_cips_pspmc_0_psv_fpd_slcr_0: blp_cips_pspmc_0_psv_fpd_slcr_0@fd610000 {
			compatible = "xlnx,psv-fpd-slcr-1.0";
			status = "okay";
			xlnx,ip-name = "psv_fpd_slcr";
			reg = <0x0 0xfd610000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_fpd_slcr_0";
		};
		blp_cips_pspmc_0_psv_fpd_slcr_secure_0: blp_cips_pspmc_0_psv_fpd_slcr_secure_0@fd690000 {
			compatible = "xlnx,psv-fpd-slcr-secure-1.0";
			status = "okay";
			xlnx,ip-name = "psv_fpd_slcr_secure";
			reg = <0x0 0xfd690000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_fpd_slcr_secure_0";
		};
		blp_cips_pspmc_0_psv_fpd_smmu_0: blp_cips_pspmc_0_psv_fpd_smmu_0@fd5f0000 {
			compatible = "xlnx,psv-fpd-smmu-1.0";
			status = "okay";
			xlnx,ip-name = "psv_fpd_smmu";
			reg = <0x0 0xfd5f0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_fpd_smmu_0";
		};
		blp_cips_pspmc_0_psv_ipi_buffer: blp_cips_pspmc_0_psv_ipi_buffer@ff3f0000 {
			compatible = "xlnx,psv-ipi-buffer-1.0";
			status = "okay";
			xlnx,ip-name = "psv_ipi_buffer";
			reg = <0x0 0xff3f0000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_ipi_buffer";
		};
		blp_cips_pspmc_0_psv_lpd_afi_0: blp_cips_pspmc_0_psv_lpd_afi_0@ff9b0000 {
			compatible = "xlnx,psv-lpd-afi-1.0";
			status = "okay";
			xlnx,ip-name = "psv_lpd_afi";
			reg = <0x0 0xff9b0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_lpd_afi_0";
		};
		blp_cips_pspmc_0_psv_lpd_afi_mem_0: blp_cips_pspmc_0_psv_lpd_afi_mem_0@80000000 {
			compatible = "xlnx,psv-lpd-afi-mem-1.0";
			status = "okay";
			xlnx,ip-name = "psv_lpd_afi_mem";
			reg = <0x0 0x80000000 0x0 0x20000000>;
			xlnx,name = "blp_cips_pspmc_0_psv_lpd_afi_mem_0";
		};
		blp_cips_pspmc_0_psv_lpd_iou_secure_slcr_0: blp_cips_pspmc_0_psv_lpd_iou_secure_slcr_0@ff0a0000 {
			compatible = "xlnx,psv-lpd-iou-secure-slcr-1.0";
			status = "okay";
			xlnx,ip-name = "psv_lpd_iou_secure_slcr";
			reg = <0x0 0xff0a0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_lpd_iou_secure_slcr_0";
		};
		blp_cips_pspmc_0_psv_lpd_iou_slcr_0: blp_cips_pspmc_0_psv_lpd_iou_slcr_0@ff080000 {
			compatible = "xlnx,psv-lpd-iou-slcr-1.0";
			status = "okay";
			xlnx,ip-name = "psv_lpd_iou_slcr";
			reg = <0x0 0xff080000 0x0 0x20000>;
			xlnx,name = "blp_cips_pspmc_0_psv_lpd_iou_slcr_0";
		};
		blp_cips_pspmc_0_psv_lpd_slcr_0: blp_cips_pspmc_0_psv_lpd_slcr_0@ff410000 {
			compatible = "xlnx,psv-lpd-slcr-1.0";
			status = "okay";
			xlnx,ip-name = "psv_lpd_slcr";
			reg = <0x0 0xff410000 0x0 0x100000>;
			xlnx,name = "blp_cips_pspmc_0_psv_lpd_slcr_0";
		};
		blp_cips_pspmc_0_psv_lpd_slcr_secure_0: blp_cips_pspmc_0_psv_lpd_slcr_secure_0@ff510000 {
			compatible = "xlnx,psv-lpd-slcr-secure-1.0";
			status = "okay";
			xlnx,ip-name = "psv_lpd_slcr_secure";
			reg = <0x0 0xff510000 0x0 0x40000>;
			xlnx,name = "blp_cips_pspmc_0_psv_lpd_slcr_secure_0";
		};
		blp_cips_pspmc_0_psv_ocm_ctrl: blp_cips_pspmc_0_psv_ocm_ctrl@ff960000 {
			compatible = "xlnx,psv-ocm-1.0";
			status = "okay";
			power-domains = <&versal_firmware 0x18314007>;
			xlnx,ip-name = "psv_ocm";
			reg = <0x0 0xff960000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_ocm_ctrl";
		};
		blp_cips_pspmc_0_psv_pmc_aes: blp_cips_pspmc_0_psv_pmc_aes@f11e0000 {
			compatible = "xlnx,psv-pmc-aes-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_aes";
			reg = <0x0 0xf11e0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_aes";
		};
		blp_cips_pspmc_0_psv_pmc_analog_0: blp_cips_pspmc_0_psv_pmc_analog_0@f1160000 {
			compatible = "xlnx,psv-pmc-analog-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_analog";
			reg = <0x0 0xf1160000 0x0 0x30000>;
			xlnx,npi-scan = <0>;
			xlnx,event-log = <0>;
			xlnx,cram-scan = <0>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_analog_0";
		};
		blp_cips_pspmc_0_psv_pmc_bbram_ctrl: blp_cips_pspmc_0_psv_pmc_bbram_ctrl@f11f0000 {
			compatible = "xlnx,psv-pmc-bbram-ctrl-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_bbram_ctrl";
			reg = <0x0 0xf11f0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_bbram_ctrl";
		};
		blp_cips_pspmc_0_psv_pmc_cfi_cframe_1: blp_cips_pspmc_0_psv_pmc_cfi_cframe_1@f12d2000 {
			compatible = "xlnx,psv-pmc-cfi-cframe-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_cfi_cframe";
			reg = <0x0 0xf12d2000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_1";
		};
		blp_cips_pspmc_0_psv_pmc_cfi_cframe_10: blp_cips_pspmc_0_psv_pmc_cfi_cframe_10@f12e4000 {
			compatible = "xlnx,psv-pmc-cfi-cframe-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_cfi_cframe";
			reg = <0x0 0xf12e4000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_10";
		};
		blp_cips_pspmc_0_psv_pmc_cfi_cframe_11: blp_cips_pspmc_0_psv_pmc_cfi_cframe_11@f12e6000 {
			compatible = "xlnx,psv-pmc-cfi-cframe-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_cfi_cframe";
			reg = <0x0 0xf12e6000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_11";
		};
		blp_cips_pspmc_0_psv_pmc_cfi_cframe_12: blp_cips_pspmc_0_psv_pmc_cfi_cframe_12@f12e8000 {
			compatible = "xlnx,psv-pmc-cfi-cframe-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_cfi_cframe";
			reg = <0x0 0xf12e8000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_12";
		};
		blp_cips_pspmc_0_psv_pmc_cfi_cframe_13: blp_cips_pspmc_0_psv_pmc_cfi_cframe_13@f12ea000 {
			compatible = "xlnx,psv-pmc-cfi-cframe-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_cfi_cframe";
			reg = <0x0 0xf12ea000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_13";
		};
		blp_cips_pspmc_0_psv_pmc_cfi_cframe_14: blp_cips_pspmc_0_psv_pmc_cfi_cframe_14@f12ec000 {
			compatible = "xlnx,psv-pmc-cfi-cframe-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_cfi_cframe";
			reg = <0x0 0xf12ec000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_14";
		};
		blp_cips_pspmc_0_psv_pmc_cfi_cframe_2: blp_cips_pspmc_0_psv_pmc_cfi_cframe_2@f12d4000 {
			compatible = "xlnx,psv-pmc-cfi-cframe-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_cfi_cframe";
			reg = <0x0 0xf12d4000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_2";
		};
		blp_cips_pspmc_0_psv_pmc_cfi_cframe_3: blp_cips_pspmc_0_psv_pmc_cfi_cframe_3@f12d6000 {
			compatible = "xlnx,psv-pmc-cfi-cframe-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_cfi_cframe";
			reg = <0x0 0xf12d6000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_3";
		};
		blp_cips_pspmc_0_psv_pmc_cfi_cframe_4: blp_cips_pspmc_0_psv_pmc_cfi_cframe_4@f12d8000 {
			compatible = "xlnx,psv-pmc-cfi-cframe-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_cfi_cframe";
			reg = <0x0 0xf12d8000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_4";
		};
		blp_cips_pspmc_0_psv_pmc_cfi_cframe_5: blp_cips_pspmc_0_psv_pmc_cfi_cframe_5@f12da000 {
			compatible = "xlnx,psv-pmc-cfi-cframe-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_cfi_cframe";
			reg = <0x0 0xf12da000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_5";
		};
		blp_cips_pspmc_0_psv_pmc_cfi_cframe_6: blp_cips_pspmc_0_psv_pmc_cfi_cframe_6@f12dc000 {
			compatible = "xlnx,psv-pmc-cfi-cframe-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_cfi_cframe";
			reg = <0x0 0xf12dc000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_6";
		};
		blp_cips_pspmc_0_psv_pmc_cfi_cframe_7: blp_cips_pspmc_0_psv_pmc_cfi_cframe_7@f12de000 {
			compatible = "xlnx,psv-pmc-cfi-cframe-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_cfi_cframe";
			reg = <0x0 0xf12de000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_7";
		};
		blp_cips_pspmc_0_psv_pmc_cfi_cframe_8: blp_cips_pspmc_0_psv_pmc_cfi_cframe_8@f12e0000 {
			compatible = "xlnx,psv-pmc-cfi-cframe-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_cfi_cframe";
			reg = <0x0 0xf12e0000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_8";
		};
		blp_cips_pspmc_0_psv_pmc_cfi_cframe_9: blp_cips_pspmc_0_psv_pmc_cfi_cframe_9@f12e2000 {
			compatible = "xlnx,psv-pmc-cfi-cframe-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_cfi_cframe";
			reg = <0x0 0xf12e2000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_9";
		};
		blp_cips_pspmc_0_psv_pmc_cfi_cframe_bcast: blp_cips_pspmc_0_psv_pmc_cfi_cframe_bcast@f12ee000 {
			compatible = "xlnx,psv-pmc-cfi-cframe-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_cfi_cframe";
			reg = <0x0 0xf12ee000 0x0 0x1000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_bcast";
		};
		blp_cips_pspmc_0_psv_pmc_efuse_cache: blp_cips_pspmc_0_psv_pmc_efuse_cache@f1250000 {
			compatible = "xlnx,psv-pmc-efuse-cache-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_efuse_cache";
			reg = <0x0 0xf1250000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_efuse_cache";
		};
		blp_cips_pspmc_0_psv_pmc_efuse_ctrl: blp_cips_pspmc_0_psv_pmc_efuse_ctrl@f1240000 {
			compatible = "xlnx,psv-pmc-efuse-ctrl-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_efuse_ctrl";
			reg = <0x0 0xf1240000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_efuse_ctrl";
		};
		blp_cips_pspmc_0_psv_pmc_global_0: blp_cips_pspmc_0_psv_pmc_global_0@f1110000 {
			compatible = "xlnx,psv-pmc-global-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_global";
			reg = <0x0 0xf1110000 0x0 0x50000>;
			xlnx,npi-scan = <0>;
			xlnx,event-log = <0>;
			xlnx,cram-scan = <0>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_global_0";
		};
		blp_cips_pspmc_0_psv_pmc_iou_slcr_0: blp_cips_pspmc_0_psv_pmc_iou_slcr_0@f1060000 {
			compatible = "xlnx,psv-pmc-iou-slcr-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_iou_slcr";
			reg = <0x0 0xf1060000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_iou_slcr_0";
		};
		blp_cips_pspmc_0_psv_pmc_ram: blp_cips_pspmc_0_psv_pmc_ram@f2000000 {
			compatible = "xlnx,psv-pmc-ram-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_ram";
			reg = <0x0 0xf2000000 0x0 0x20000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_ram";
		};
		blp_cips_pspmc_0_psv_pmc_ram_data_cntlr: blp_cips_pspmc_0_psv_pmc_ram_data_cntlr@f0240000 {
			xlnx,edk-special = "BRAM_CTRL";
			xlnx,write-access = <2>;
			compatible = "xlnx,ram-data-cntlr-1.0";
			xlnx,ecc-onoff-register = <1>;
			xlnx,ecc-onoff-reset-value = <1>;
			xlnx,s-axi-ctrl-protocol = "AXI4LITE";
			xlnx,mask = <0xffffffff 0xffffe000>;
			xlnx,mask1 = <0xffffffff 0xffffe000>;
			xlnx,s-axi-ctrl-aclk-freq-hz = <100000000>;
			xlnx,mask2 = <0x800000>;
			xlnx,fault-inject = <1>;
			xlnx,mask3 = <0x800000>;
			xlnx,ip-name = "ram_data_cntlr";
			xlnx,num-lmb = <2>;
			reg = <0x0 0xf0240000 0x0 0x20000>;
			xlnx,s-axi-ctrl-addr-width = <32>;
			xlnx,ecc-status-registers = <1>;
			xlnx,ce-counter-width = <16>;
			xlnx,ecc = <1>;
			xlnx,edk-iptype = "PERIPHERAL";
			xlnx,lmb-dwidth = <32>;
			xlnx,interconnect = <2>;
			xlnx,ce-failing-registers = <1>;
			xlnx,ue-failing-registers = <1>;
			status = "okay";
			xlnx,s-axi-ctrl-data-width = <32>;
			xlnx,bram-awidth = <32>;
			xlnx,lmb-awidth = <32>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_ram_data_cntlr";
		};
		blp_cips_pspmc_0_psv_pmc_ram_instr_cntlr: blp_cips_pspmc_0_psv_pmc_ram_instr_cntlr@f0200000 {
			xlnx,edk-special = "BRAM_CTRL";
			xlnx,write-access = <2>;
			compatible = "xlnx,ram-instr-cntlr-1.0";
			xlnx,ecc-onoff-register = <1>;
			xlnx,ecc-onoff-reset-value = <1>;
			xlnx,s-axi-ctrl-protocol = "AXI4LITE";
			xlnx,mask = <0xfffe0000>;
			xlnx,mask1 = <0xfffe0000>;
			xlnx,s-axi-ctrl-aclk-freq-hz = <100000000>;
			xlnx,mask2 = <0x800000>;
			xlnx,fault-inject = <1>;
			xlnx,mask3 = <0x800000>;
			xlnx,ip-name = "ram_instr_cntlr";
			xlnx,num-lmb = <2>;
			reg = <0x0 0xf0200000 0x0 0x40000>;
			xlnx,s-axi-ctrl-addr-width = <32>;
			xlnx,ecc-status-registers = <1>;
			xlnx,ce-counter-width = <16>;
			xlnx,ecc = <1>;
			xlnx,edk-iptype = "PERIPHERAL";
			xlnx,lmb-dwidth = <32>;
			xlnx,interconnect = <2>;
			xlnx,ce-failing-registers = <1>;
			xlnx,ue-failing-registers = <1>;
			status = "okay";
			xlnx,s-axi-ctrl-data-width = <32>;
			xlnx,bram-awidth = <32>;
			xlnx,lmb-awidth = <32>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_ram_instr_cntlr";
		};
		blp_cips_pspmc_0_psv_pmc_ram_npi: blp_cips_pspmc_0_psv_pmc_ram_npi@f6000000 {
			compatible = "xlnx,psv-pmc-ram-npi-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_ram_npi";
			reg = <0x0 0xf6000000 0x0 0x2000000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_ram_npi";
		};
		blp_cips_pspmc_0_psv_pmc_rsa: blp_cips_pspmc_0_psv_pmc_rsa@f1200000 {
			compatible = "xlnx,psv-pmc-rsa-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_rsa";
			reg = <0x0 0xf1200000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_rsa";
		};
		blp_cips_pspmc_0_psv_pmc_sha: blp_cips_pspmc_0_psv_pmc_sha@f1210000 {
			compatible = "xlnx,psv-pmc-sha-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_sha";
			reg = <0x0 0xf1210000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_sha";
		};
		blp_cips_pspmc_0_psv_pmc_slave_boot: blp_cips_pspmc_0_psv_pmc_slave_boot@f1220000 {
			xlnx,device-id = <0>;
			compatible = "xlnx,psv-pmc-slave-boot-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_slave_boot";
			reg = <0x0 0xf1220000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_slave_boot";
		};
		blp_cips_pspmc_0_psv_pmc_slave_boot_stream: blp_cips_pspmc_0_psv_pmc_slave_boot_stream@f2100000 {
			xlnx,device-id = <0>;
			compatible = "xlnx,psv-pmc-slave-boot-stream-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_slave_boot_stream";
			reg = <0x0 0xf2100000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_slave_boot_stream";
		};
		blp_cips_pspmc_0_psv_pmc_tap: blp_cips_pspmc_0_psv_pmc_tap@f11a0000 {
			compatible = "xlnx,psv-pmc-tap-1.0";
			status = "okay";
			xlnx,ip-name = "psv_pmc_tap";
			reg = <0x0 0xf11a0000 0x0 0x20000>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_tap";
		};
		blp_cips_pspmc_0_psv_pmc_tmr_inject_0: blp_cips_pspmc_0_psv_pmc_tmr_inject_0@f0083000 {
			compatible = "xlnx,tmr-inject-1.0";
			xlnx,cpu-id = <1>;
			xlnx,edk-special = "tmr_inject";
			xlnx,mask = <0x84000>;
			xlnx,ip-name = "tmr_inject";
			reg = <0x0 0xf0083000 0x0 0x1000>;
			xlnx,magic = <0x27>;
			xlnx,lmb-dwidth = <32>;
			xlnx,edk-iptype = "PROCESSOR";
			status = "okay";
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_tmr_inject_0";
			xlnx,lmb-awidth = <32>;
		};
		blp_cips_pspmc_0_psv_pmc_tmr_manager_0: blp_cips_pspmc_0_psv_pmc_tmr_manager_0@f0283000 {
			xlnx,edk-special = "BRAM_CTRL";
			xlnx,use-debug-disable = <0>;
			xlnx,sem-interface-type = <1>;
			compatible = "xlnx,tmr-manager-1.0";
			xlnx,magic1 = <0x0>;
			xlnx,tmr = <1>;
			xlnx,magic2 = <0x0>;
			xlnx,brk-delay-rst-value = <0x0>;
			xlnx,mask = <0x83000>;
			xlnx,sem-heartbeat-watchdog-width = <10>;
			xlnx,watchdog-width = <30>;
			xlnx,use-tmr-disable = <0>;
			xlnx,ue-width = <3>;
			xlnx,ip-name = "tmr_manager";
			xlnx,async-ff = <2>;
			xlnx,ue-is-fatal = <0>;
			xlnx,sem-heartbeat-watchdog = <0>;
			reg = <0x0 0xf0283000 0x0 0x1000>;
			xlnx,brk-delay-width = <0>;
			xlnx,watchdog = <0>;
			xlnx,sem-interface = <0>;
			xlnx,edk-iptype = "PERIPHERAL";
			xlnx,mask-rst-value = <0xffffffff 0xffffffff>;
			xlnx,comparators-mask = <0>;
			xlnx,lmb-dwidth = <32>;
			xlnx,test-comparator = <0>;
			xlnx,strict-miscompare = <0>;
			status = "okay";
			xlnx,no-of-comparators = <1>;
			xlnx,sem-async = <0>;
			xlnx,name = "blp_cips_pspmc_0_psv_pmc_tmr_manager_0";
			xlnx,lmb-awidth = <32>;
		};
		blp_cips_pspmc_0_psv_psm_global_reg: blp_cips_pspmc_0_psv_psm_global_reg@ffc90000 {
			compatible = "xlnx,psv-psm-global-reg-1.0";
			status = "okay";
			xlnx,ip-name = "psv_psm_global_reg";
			reg = <0x0 0xffc90000 0x0 0xf000>;
			xlnx,name = "blp_cips_pspmc_0_psv_psm_global_reg";
		};
		blp_cips_pspmc_0_psv_psm_iomodule_0: blp_cips_pspmc_0_psv_psm_iomodule_0@ffc80000 {
			xlnx,gpo4-size = <32>;
			xlnx,tmr = <0>;
			xlnx,pit1-readable = <1>;
			xlnx,mask = <0xffff8000>;
			xlnx,pit-size = < 32 32 32 32 >;
			xlnx,pit2-prescaler = <0>;
			xlnx,gpi3-interrupt = <0>;
			xlnx,intc-level-edge = <0x7fff>;
			xlnx,intc-positive = <0xffff>;
			xlnx,ip-name = "iomodule";
			xlnx,gpo1-size = <3>;
			xlnx,max-intr-size = <32>;
			xlnx,pit3-size = <32>;
			xlnx,fit3-interrupt = <0>;
			reg = <0x0 0xffc80000 0x0 0x8000>;
			xlnx,fit1-no-clocks = <6216>;
			xlnx,gpi2-size = <32>;
			xlnx,pit2-readable = <1>;
			xlnx,intc-irq-connection = <0>;
			xlnx,uart-tx-interrupt = <1>;
			xlnx,use-config-reset = <0>;
			xlnx,pit2-interrupt = <1>;
			xlnx,intc-base-vectors = <0xffc00000>;
			compatible = "xlnx,iomodule-1.0" , "xlnx,iomodule-3.1";
			xlnx,gpo4-init = <0x0>;
			xlnx,pit3-readable = <1>;
			xlnx,pit3-prescaler = <9>;
			xlnx,gpi4-interrupt = <0>;
			xlnx,gpo1-init = <0x0>;
			xlnx,use-io-bus = <0>;
			xlnx,use-gpo1 = <1>;
			xlnx,uart-baudrate = <115200>;
			xlnx,fit4-interrupt = <0>;
			xlnx,gpo3-size = <32>;
			xlnx,use-gpo2 = <0>;
			xlnx,uart-data-bits = <8>;
			xlnx,pit-prescaler = < 9 0 9 0 >;
			xlnx,gpio1-board-interface = "Custom";
			xlnx,use-gpo3 = <0>;
			xlnx,fit2-no-clocks = <6216>;
			xlnx,options = <1>;
			xlnx,gpio2-board-interface = "Custom";
			xlnx,use-gpo4 = <0>;
			xlnx,gpi4-size = <32>;
			xlnx,gpio3-board-interface = "Custom";
			xlnx,uart-rx-interrupt = <1>;
			xlnx,uart-error-interrupt = <1>;
			xlnx,gpio4-board-interface = "Custom";
			xlnx,pit4-readable = <1>;
			status = "okay";
			xlnx,intc-use-irq-out = <0>;
			xlnx,clock-freq = <100000000>;
			xlnx,gpo-init = < 0 0 0 0 >;
			xlnx,use-board-flow;
			xlnx,pit2-size = <32>;
			xlnx,intc-intr-size = <16>;
			xlnx,intc-use-ext-intr = <1>;
			xlnx,name = "blp_cips_pspmc_0_psv_psm_iomodule_0";
			xlnx,gpi1-size = <32>;
			xlnx,edk-special = "INTR_CTRL";
			xlnx,pit3-interrupt = <1>;
			xlnx,intc-has-fast = <0>;
			xlnx,pit-used = < 1 1 1 1 >;
			xlnx,use-gpi1 = <0>;
			xlnx,gpi1-interrupt = <0>;
			xlnx,use-gpi2 = <0>;
			xlnx,use-gpi3 = <0>;
			xlnx,use-gpi4 = <0>;
			xlnx,fit1-interrupt = <0>;
			xlnx,pit4-prescaler = <0>;
			xlnx,gpo3-init = <0x0>;
			xlnx,intc-addr-width = <32>;
			xlnx,edk-iptype = "PERIPHERAL";
			xlnx,fit3-no-clocks = <6216>;
			xlnx,use-uart-rx = <1>;
			xlnx,instance = "iomodule_0";
			xlnx,pit-mask = <0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>;
			xlnx,uart-prog-baudrate = <1>;
			xlnx,use-pit1 = <1>;
			xlnx,gpo2-size = <32>;
			xlnx,use-pit2 = <1>;
			xlnx,pit4-size = <32>;
			xlnx,pit-readable = < 1 1 1 1 >;
			xlnx,use-pit3 = <1>;
			xlnx,use-pit4 = <1>;
			xlnx,pit4-interrupt = <1>;
			xlnx,gpi3-size = <32>;
			xlnx,intc-async-intr = <0xffff>;
			xlnx,pit1-prescaler = <9>;
			xlnx,avoid-primitives = <0>;
			xlnx,gpi2-interrupt = <0>;
			xlnx,use-tmr-disable = <0>;
			xlnx,use-fit1 = <0>;
			xlnx,pit1-size = <32>;
			xlnx,intc-num-sync-ff = <2>;
			xlnx,uart-board-interface = "rs232_uart";
			xlnx,use-fit2 = <0>;
			xlnx,fit2-interrupt = <0>;
			xlnx,use-fit3 = <0>;
			xlnx,use-fit4 = <0>;
			xlnx,io-baseaddr = <0xffffffff 0xffffffff>;
			xlnx,uart-use-parity = <0>;
			xlnx,lmb-dwidth = <32>;
			xlnx,fit4-no-clocks = <6216>;
			xlnx,uart-odd-parity = <0>;
			xlnx,freq = <100000000>;
			xlnx,use-uart-tx = <1>;
			xlnx,pit1-interrupt = <1>;
			xlnx,gpo2-init = <0x0>;
			xlnx,io-mask = <0xfffe0000>;
			xlnx,lmb-awidth = <32>;
		};
		blp_cips_pspmc_0_psv_psm_ram_data_cntlr: blp_cips_pspmc_0_psv_psm_ram_data_cntlr@ffc20000 {
			xlnx,edk-special = "BRAM_CTRL";
			xlnx,write-access = <2>;
			compatible = "xlnx,PSM-PPU-1.0";
			xlnx,ecc-onoff-register = <1>;
			xlnx,ecc-onoff-reset-value = <1>;
			xlnx,s-axi-ctrl-protocol = "AXI4LITE";
			xlnx,mask = <0xffffffff 0xffffe000>;
			xlnx,mask1 = <0xffffffff 0xffffe000>;
			xlnx,s-axi-ctrl-aclk-freq-hz = <100000000>;
			xlnx,mask2 = <0x800000>;
			xlnx,fault-inject = <1>;
			xlnx,mask3 = <0x800000>;
			xlnx,ip-name = "PSM_PPU";
			xlnx,num-lmb = <2>;
			reg = <0x0 0xffc20000 0x0 0x20000>;
			xlnx,s-axi-ctrl-addr-width = <32>;
			xlnx,ecc-status-registers = <1>;
			xlnx,ce-counter-width = <16>;
			xlnx,ecc = <1>;
			xlnx,edk-iptype = "PERIPHERAL";
			xlnx,lmb-dwidth = <32>;
			xlnx,interconnect = <2>;
			xlnx,ce-failing-registers = <1>;
			xlnx,ue-failing-registers = <1>;
			status = "okay";
			xlnx,s-axi-ctrl-data-width = <32>;
			xlnx,bram-awidth = <32>;
			xlnx,lmb-awidth = <32>;
			xlnx,name = "blp_cips_pspmc_0_psv_psm_ram_data_cntlr";
		};
		blp_cips_pspmc_0_psv_psm_ram_instr_cntlr: blp_cips_pspmc_0_psv_psm_ram_instr_cntlr@ffc00000 {
			xlnx,edk-special = "BRAM_CTRL";
			xlnx,write-access = <2>;
			compatible = "xlnx,ram-instr-cntlr-1.0";
			xlnx,ecc-onoff-register = <1>;
			xlnx,ecc-onoff-reset-value = <1>;
			xlnx,s-axi-ctrl-protocol = "AXI4LITE";
			xlnx,mask = <0xffffffff 0xfffe0000>;
			xlnx,mask1 = <0xffffffff 0xfffe0000>;
			xlnx,s-axi-ctrl-aclk-freq-hz = <100000000>;
			xlnx,mask2 = <0x800000>;
			xlnx,fault-inject = <1>;
			xlnx,mask3 = <0x800000>;
			xlnx,ip-name = "ram_instr_cntlr";
			xlnx,num-lmb = <2>;
			reg = <0x0 0xffc00000 0x0 0x20000>;
			xlnx,s-axi-ctrl-addr-width = <32>;
			xlnx,ecc-status-registers = <1>;
			xlnx,ce-counter-width = <16>;
			xlnx,ecc = <1>;
			xlnx,edk-iptype = "PERIPHERAL";
			xlnx,lmb-dwidth = <32>;
			xlnx,interconnect = <2>;
			xlnx,ce-failing-registers = <1>;
			xlnx,ue-failing-registers = <1>;
			status = "okay";
			xlnx,s-axi-ctrl-data-width = <32>;
			xlnx,bram-awidth = <32>;
			xlnx,lmb-awidth = <32>;
			xlnx,name = "blp_cips_pspmc_0_psv_psm_ram_instr_cntlr";
		};
		blp_cips_pspmc_0_psv_psm_tmr_inject_0: blp_cips_pspmc_0_psv_psm_tmr_inject_0@ffcd0000 {
			compatible = "xlnx,tmr-inject-1.0";
			xlnx,cpu-id = <1>;
			xlnx,edk-special = "tmr_inject";
			xlnx,mask = <0x50000>;
			xlnx,ip-name = "tmr_inject";
			reg = <0x0 0xffcd0000 0x0 0x10000>;
			xlnx,magic = <0x27>;
			xlnx,lmb-dwidth = <32>;
			xlnx,edk-iptype = "PROCESSOR";
			status = "okay";
			xlnx,name = "blp_cips_pspmc_0_psv_psm_tmr_inject_0";
			xlnx,lmb-awidth = <32>;
		};
		blp_cips_pspmc_0_psv_psm_tmr_manager_0: blp_cips_pspmc_0_psv_psm_tmr_manager_0@ffcc0000 {
			xlnx,edk-special = "BRAM_CTRL";
			xlnx,use-debug-disable = <0>;
			xlnx,sem-interface-type = <1>;
			compatible = "xlnx,tmr-manager-1.0";
			xlnx,magic1 = <0x0>;
			xlnx,tmr = <1>;
			xlnx,magic2 = <0x0>;
			xlnx,brk-delay-rst-value = <0x0>;
			xlnx,mask = <0x50000>;
			xlnx,sem-heartbeat-watchdog-width = <10>;
			xlnx,watchdog-width = <30>;
			xlnx,use-tmr-disable = <0>;
			xlnx,ue-width = <3>;
			xlnx,ip-name = "tmr_manager";
			xlnx,async-ff = <2>;
			xlnx,ue-is-fatal = <0>;
			xlnx,sem-heartbeat-watchdog = <0>;
			reg = <0x0 0xffcc0000 0x0 0x10000>;
			xlnx,brk-delay-width = <0>;
			xlnx,watchdog = <0>;
			xlnx,sem-interface = <0>;
			xlnx,edk-iptype = "PERIPHERAL";
			xlnx,mask-rst-value = <0xffffffff 0xffffffff>;
			xlnx,comparators-mask = <0>;
			xlnx,lmb-dwidth = <32>;
			xlnx,test-comparator = <0>;
			xlnx,strict-miscompare = <0>;
			status = "okay";
			xlnx,no-of-comparators = <1>;
			xlnx,sem-async = <0>;
			xlnx,name = "blp_cips_pspmc_0_psv_psm_tmr_manager_0";
			xlnx,lmb-awidth = <32>;
		};
		blp_cips_pspmc_0_psv_r5_0_atcm: blp_cips_pspmc_0_psv_r5_0_atcm@0 {
			xlnx,power-domain = <0x1831800b>;
			compatible = "xlnx,psv-r5-tcm-1.0";
			status = "okay";
			xlnx,ip-name = "psv_r5_tcm";
			xlnx,bank-size = <0x10000>;
			reg = <0x0 0x0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_r5_0_atcm";
		};
		blp_cips_pspmc_0_psv_r5_0_atcm_lockstep: blp_cips_pspmc_0_psv_r5_0_atcm_lockstep@ffe10000 {
			compatible = "xlnx,psv-r5-0-atcm-lockstep-1.0" , "mmio-sram";
			status = "okay";
			power-domains = <&versal_firmware 0x1831800b>;
			xlnx,ip-name = "psv_r5_0_atcm_lockstep";
			reg = <0x0 0xffe10000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_r5_0_atcm_lockstep";
		};
		blp_cips_pspmc_0_psv_r5_0_btcm: blp_cips_pspmc_0_psv_r5_0_btcm@20000 {
			xlnx,power-domain = <0x1831800c>;
			compatible = "xlnx,psv-r5-tcm-1.0";
			status = "okay";
			xlnx,ip-name = "psv_r5_tcm";
			xlnx,bank-size = <0x10000>;
			reg = <0x0 0x20000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_r5_0_btcm";
		};
		blp_cips_pspmc_0_psv_r5_0_btcm_lockstep: blp_cips_pspmc_0_psv_r5_0_btcm_lockstep@ffe30000 {
			compatible = "xlnx,psv-r5-0-btcm-lockstep-1.0" , "mmio-sram";
			status = "okay";
			power-domains = <&versal_firmware 0x1831800c>;
			xlnx,ip-name = "psv_r5_0_btcm_lockstep";
			reg = <0x0 0xffe30000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_r5_0_btcm_lockstep";
		};
		blp_cips_pspmc_0_psv_r5_0_data_cache: blp_cips_pspmc_0_psv_r5_0_data_cache@ffe50000 {
			compatible = "xlnx,psv-r5-0-data-cache-1.0";
			status = "okay";
			xlnx,ip-name = "psv_r5_0_data_cache";
			reg = <0x0 0xffe50000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_r5_0_data_cache";
		};
		blp_cips_pspmc_0_psv_r5_0_instruction_cache: blp_cips_pspmc_0_psv_r5_0_instruction_cache@ffe40000 {
			compatible = "xlnx,psv-r5-0-instruction-cache-1.0";
			status = "okay";
			xlnx,ip-name = "psv_r5_0_instruction_cache";
			reg = <0x0 0xffe40000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_r5_0_instruction_cache";
		};
		blp_cips_pspmc_0_psv_r5_1_atcm: blp_cips_pspmc_0_psv_r5_1_atcm@0 {
			xlnx,power-domain = <0x1831800d>;
			compatible = "xlnx,psv-r5-tcm-1.0";
			status = "okay";
			xlnx,ip-name = "psv_r5_tcm";
			xlnx,bank-size = <0x10000>;
			reg = <0x0 0x0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_r5_1_atcm";
		};
		blp_cips_pspmc_0_psv_r5_1_btcm: blp_cips_pspmc_0_psv_r5_1_btcm@20000 {
			xlnx,power-domain = <0x1831800e>;
			compatible = "xlnx,psv-r5-tcm-1.0";
			status = "okay";
			xlnx,ip-name = "psv_r5_tcm";
			xlnx,bank-size = <0x10000>;
			reg = <0x0 0x20000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_r5_1_btcm";
		};
		blp_cips_pspmc_0_psv_r5_1_data_cache: blp_cips_pspmc_0_psv_r5_1_data_cache@ffed0000 {
			compatible = "xlnx,psv-r5-1-data-cache-1.0";
			status = "okay";
			xlnx,ip-name = "psv_r5_1_data_cache";
			reg = <0x0 0xffed0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_r5_1_data_cache";
		};
		blp_cips_pspmc_0_psv_r5_1_instruction_cache: blp_cips_pspmc_0_psv_r5_1_instruction_cache@ffec0000 {
			compatible = "xlnx,psv-r5-1-instruction-cache-1.0";
			status = "okay";
			xlnx,ip-name = "psv_r5_1_instruction_cache";
			reg = <0x0 0xffec0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_r5_1_instruction_cache";
		};
		blp_cips_pspmc_0_psv_r5_tcm_ram_0: blp_cips_pspmc_0_psv_r5_tcm_ram_0@0 {
			compatible = "xlnx,psv-r5-tcm-1.0";
			status = "okay";
			xlnx,ip-name = "psv_r5_tcm";
			reg = <0x0 0x00000 0x0 0x40000>;
			xlnx,name = "blp_cips_pspmc_0_psv_r5_tcm_ram_0";
		};
		blp_cips_pspmc_0_psv_rpu_0: blp_cips_pspmc_0_psv_rpu_0@ff9a0000 {
			compatible = "xlnx,psv-rpu-1.0";
			status = "okay";
			xlnx,ip-name = "psv_rpu";
			reg = <0x0 0xff9a0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_rpu_0";
		};
		blp_cips_pspmc_0_psv_scntr_0: blp_cips_pspmc_0_psv_scntr_0@ff130000 {
			compatible = "xlnx,psv-scntr-1.0";
			status = "okay";
			xlnx,ip-name = "psv_scntr";
			reg = <0x0 0xff130000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_scntr_0";
		};
		blp_cips_pspmc_0_psv_scntrs_0: blp_cips_pspmc_0_psv_scntrs_0@ff140000 {
			compatible = "xlnx,psv-scntrs-1.0";
			status = "okay";
			xlnx,ip-name = "psv_scntrs";
			reg = <0x0 0xff140000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_scntrs_0";
		};
		blp_cips_pspmc_0_psv_xram_atm: blp_cips_pspmc_0_psv_xram_atm@ff970000 {
			compatible = "xlnx,psv-xram-atm-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_atm";
			reg = <0x0 0xff970000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_xram_atm";
		};
		blp_cips_pspmc_0_psv_xram_bank_1: blp_cips_pspmc_0_psv_xram_bank_1@fe800000 {
			compatible = "xlnx,psv-xram-bank-1-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_bank_1";
			reg = <0x0 0xfe800000 0x0 0x100000>;
			xlnx,name = "blp_cips_pspmc_0_psv_xram_bank_1";
		};
		blp_cips_pspmc_0_psv_xram_bank_2: blp_cips_pspmc_0_psv_xram_bank_2@fe900000 {
			compatible = "xlnx,psv-xram-bank-2-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_bank_2";
			reg = <0x0 0xfe900000 0x0 0x100000>;
			xlnx,name = "blp_cips_pspmc_0_psv_xram_bank_2";
		};
		blp_cips_pspmc_0_psv_xram_bank_3: blp_cips_pspmc_0_psv_xram_bank_3@fea00000 {
			compatible = "xlnx,psv-xram-bank-3-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_bank_3";
			reg = <0x0 0xfea00000 0x0 0x100000>;
			xlnx,name = "blp_cips_pspmc_0_psv_xram_bank_3";
		};
		blp_cips_pspmc_0_psv_xram_bank_4: blp_cips_pspmc_0_psv_xram_bank_4@feb00000 {
			compatible = "xlnx,psv-xram-bank-4-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_bank_4";
			reg = <0x0 0xfeb00000 0x0 0x100000>;
			xlnx,name = "blp_cips_pspmc_0_psv_xram_bank_4";
		};
		blp_cips_pspmc_0_psv_xram_ctrl_1: blp_cips_pspmc_0_psv_xram_ctrl_1@ff8e0000 {
			compatible = "xlnx,psv-xram-ctrl-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_ctrl";
			reg = <0x0 0xff8e0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_xram_ctrl_1";
		};
		blp_cips_pspmc_0_psv_xram_ctrl_2: blp_cips_pspmc_0_psv_xram_ctrl_2@ff8f0000 {
			compatible = "xlnx,psv-xram-ctrl-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_ctrl";
			reg = <0x0 0xff8f0000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_xram_ctrl_2";
		};
		blp_cips_pspmc_0_psv_xram_ctrl_3: blp_cips_pspmc_0_psv_xram_ctrl_3@ff900000 {
			compatible = "xlnx,psv-xram-ctrl-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_ctrl";
			reg = <0x0 0xff900000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_xram_ctrl_3";
		};
		blp_cips_pspmc_0_psv_xram_ctrl_4: blp_cips_pspmc_0_psv_xram_ctrl_4@ff910000 {
			compatible = "xlnx,psv-xram-ctrl-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_ctrl";
			reg = <0x0 0xff910000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_xram_ctrl_4";
		};
		blp_cips_pspmc_0_psv_xram_global_ctrl: blp_cips_pspmc_0_psv_xram_global_ctrl@ff950000 {
			compatible = "xlnx,psv-xram-global-ctrl-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_global_ctrl";
			reg = <0x0 0xff950000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_xram_global_ctrl";
		};
		blp_cips_pspmc_0_psv_xram_gpv: blp_cips_pspmc_0_psv_xram_gpv@ff940000 {
			compatible = "xlnx,psv-xram-gpv-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_gpv";
			reg = <0x0 0xff940000 0x0 0x10000>;
			xlnx,name = "blp_cips_pspmc_0_psv_xram_gpv";
		};
		blp_cips_pspmc_0_psv_xram_xmpu_bank_1: blp_cips_pspmc_0_psv_xram_xmpu_bank_1@ff930000 {
			compatible = "xlnx,psv-xram-xmpu-bank-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_xmpu_bank";
			reg = <0x0 0xff930000 0x0 0x4000>;
			xlnx,name = "blp_cips_pspmc_0_psv_xram_xmpu_bank_1";
		};
		blp_cips_pspmc_0_psv_xram_xmpu_bank_2: blp_cips_pspmc_0_psv_xram_xmpu_bank_2@ff934000 {
			compatible = "xlnx,psv-xram-xmpu-bank-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_xmpu_bank";
			reg = <0x0 0xff934000 0x0 0x4000>;
			xlnx,name = "blp_cips_pspmc_0_psv_xram_xmpu_bank_2";
		};
		blp_cips_pspmc_0_psv_xram_xmpu_bank_3: blp_cips_pspmc_0_psv_xram_xmpu_bank_3@ff938000 {
			compatible = "xlnx,psv-xram-xmpu-bank-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_xmpu_bank";
			reg = <0x0 0xff938000 0x0 0x4000>;
			xlnx,name = "blp_cips_pspmc_0_psv_xram_xmpu_bank_3";
		};
		blp_cips_pspmc_0_psv_xram_xmpu_bank_4: blp_cips_pspmc_0_psv_xram_xmpu_bank_4@ff93c000 {
			compatible = "xlnx,psv-xram-xmpu-bank-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_xmpu_bank";
			reg = <0x0 0xff93c000 0x0 0x4000>;
			xlnx,name = "blp_cips_pspmc_0_psv_xram_xmpu_bank_4";
		};
		blp_cips_xram_psv_xram_atm: blp_cips_xram_psv_xram_atm@ff970000 {
			compatible = "xlnx,psv-xram-atm-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_atm";
			reg = <0x0 0xff970000 0x0 0x10000>;
			xlnx,name = "blp_cips_xram_psv_xram_atm";
		};
		blp_cips_xram_psv_xram_bank_1: blp_cips_xram_psv_xram_bank_1@fe800000 {
			compatible = "xlnx,psv-xram-bank-1-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_bank_1";
			reg = <0x0 0xfe800000 0x0 0x100000>;
			xlnx,name = "blp_cips_xram_psv_xram_bank_1";
		};
		blp_cips_xram_psv_xram_bank_2: blp_cips_xram_psv_xram_bank_2@fe900000 {
			compatible = "xlnx,psv-xram-bank-2-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_bank_2";
			reg = <0x0 0xfe900000 0x0 0x100000>;
			xlnx,name = "blp_cips_xram_psv_xram_bank_2";
		};
		blp_cips_xram_psv_xram_bank_3: blp_cips_xram_psv_xram_bank_3@fea00000 {
			compatible = "xlnx,psv-xram-bank-3-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_bank_3";
			reg = <0x0 0xfea00000 0x0 0x100000>;
			xlnx,name = "blp_cips_xram_psv_xram_bank_3";
		};
		blp_cips_xram_psv_xram_bank_4: blp_cips_xram_psv_xram_bank_4@feb00000 {
			compatible = "xlnx,psv-xram-bank-4-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_bank_4";
			reg = <0x0 0xfeb00000 0x0 0x100000>;
			xlnx,name = "blp_cips_xram_psv_xram_bank_4";
		};
		blp_cips_xram_psv_xram_ctrl_1: blp_cips_xram_psv_xram_ctrl_1@ff8e0000 {
			compatible = "xlnx,psv-xram-ctrl-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_ctrl";
			reg = <0x0 0xff8e0000 0x0 0x10000>;
			xlnx,name = "blp_cips_xram_psv_xram_ctrl_1";
		};
		blp_cips_xram_psv_xram_ctrl_2: blp_cips_xram_psv_xram_ctrl_2@ff8f0000 {
			compatible = "xlnx,psv-xram-ctrl-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_ctrl";
			reg = <0x0 0xff8f0000 0x0 0x10000>;
			xlnx,name = "blp_cips_xram_psv_xram_ctrl_2";
		};
		blp_cips_xram_psv_xram_ctrl_3: blp_cips_xram_psv_xram_ctrl_3@ff900000 {
			compatible = "xlnx,psv-xram-ctrl-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_ctrl";
			reg = <0x0 0xff900000 0xffffffff 0xfff10000>;
			xlnx,name = "blp_cips_xram_psv_xram_ctrl_3";
		};
		blp_cips_xram_psv_xram_ctrl_4: blp_cips_xram_psv_xram_ctrl_4@ff910000 {
			compatible = "xlnx,psv-xram-ctrl-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_ctrl";
			reg = <0x0 0xff910000 0x0 0x10000>;
			xlnx,name = "blp_cips_xram_psv_xram_ctrl_4";
		};
		blp_cips_xram_psv_xram_global_ctrl: blp_cips_xram_psv_xram_global_ctrl@ff950000 {
			compatible = "xlnx,psv-xram-global-ctrl-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_global_ctrl";
			reg = <0x0 0xff950000 0x0 0x10000>;
			xlnx,name = "blp_cips_xram_psv_xram_global_ctrl";
		};
		blp_cips_xram_psv_xram_gpv: blp_cips_xram_psv_xram_gpv@ff940000 {
			compatible = "xlnx,psv-xram-gpv-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_gpv";
			reg = <0x0 0xff940000 0x0 0x10000>;
			xlnx,name = "blp_cips_xram_psv_xram_gpv";
		};
		blp_cips_xram_psv_xram_xmpu_bank_1: blp_cips_xram_psv_xram_xmpu_bank_1@ff930000 {
			compatible = "xlnx,psv-xram-xmpu-bank-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_xmpu_bank";
			reg = <0x0 0xff930000 0x0 0x4000>;
			xlnx,name = "blp_cips_xram_psv_xram_xmpu_bank_1";
		};
		blp_cips_xram_psv_xram_xmpu_bank_2: blp_cips_xram_psv_xram_xmpu_bank_2@ff934000 {
			compatible = "xlnx,psv-xram-xmpu-bank-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_xmpu_bank";
			reg = <0x0 0xff934000 0x0 0x4000>;
			xlnx,name = "blp_cips_xram_psv_xram_xmpu_bank_2";
		};
		blp_cips_xram_psv_xram_xmpu_bank_3: blp_cips_xram_psv_xram_xmpu_bank_3@ff938000 {
			compatible = "xlnx,psv-xram-xmpu-bank-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_xmpu_bank";
			reg = <0x0 0xff938000 0x0 0x4000>;
			xlnx,name = "blp_cips_xram_psv_xram_xmpu_bank_3";
		};
		blp_cips_xram_psv_xram_xmpu_bank_4: blp_cips_xram_psv_xram_xmpu_bank_4@ff93c000 {
			compatible = "xlnx,psv-xram-xmpu-bank-1.0";
			status = "okay";
			xlnx,ip-name = "psv_xram_xmpu_bank";
			reg = <0x0 0xff93c000 0x0 0x1000>;
			xlnx,name = "blp_cips_xram_psv_xram_xmpu_bank_4";
		};
	};
	&psv_pmc_0 {
		xlnx,d-axi = <1>;
		xlnx,addr-tag-bits = <0>;
		xlnx,m-axi-dc-thread-id-width = <1>;
		xlnx,m0-axis-protocol = "GENERIC";
		xlnx,dcache-force-tag-lutram = <0>;
		xlnx,interrupt-is-edge = <0>;
		xlnx,use-mmu = <0>;
		xlnx,m-axi-dp-exclusive-access = <0>;
		xlnx,use-reorder-instr = <1>;
		xlnx,m14-axis-protocol = "GENERIC";
		xlnx,use-div = <1>;
		xlnx,dc-axi-mon = <0>;
		xlnx,m-axi-ic-user-signals = <0>;
		xlnx,use-config-reset = <0>;
		xlnx,s14-axis-protocol = "GENERIC";
		xlnx,mmu-zones = <16>;
		xlnx,enable-discrete-ports = <0>;
		xlnx,d-lmb = <1>;
		xlnx,m-axi-dc-exclusive-access = <0>;
		xlnx,debug-interface = <0>;
		xlnx,s9-axis-protocol = "GENERIC";
		xlnx,sco = <0>;
		xlnx,use-ext-brk = <0>;
		xlnx,debug-enabled = <1>;
		xlnx,daddr-size = <32>;
		xlnx,s0-axis-data-width = <32>;
		xlnx,use-extended-fsl-instr = <0>;
		xlnx,m-axi-dc-user-signals = <0>;
		xlnx,reset-msr = <0x0>;
		xlnx,branch-target-cache-size = <0>;
		xlnx,s2-axis-data-width = <32>;
		xlnx,cache-byte-size = <8192>;
		bus-handle = <&amba>;
		xlnx,mmu-tlb-access = <3>;
		xlnx,s4-axis-data-width = <32>;
		xlnx,m-axi-ic-awuser-width = <5>;
		xlnx,s6-axis-data-width = <32>;
		xlnx,s4-axis-protocol = "GENERIC";
		xlnx,s8-axis-data-width = <32>;
		xlnx,edk-special = "microblaze";
		xlnx,use-dcache = <0>;
		xlnx,m-axi-dp-addr-width = <32>;
		xlnx,m-axi-ic-wuser-width = <1>;
		xlnx,i-axi = <0>;
		xlnx,icache-streams = <0>;
		xlnx,m-axi-dc-awuser-width = <5>;
		xlnx,pss-ref-clk-freq = <33333300>;
		xlnx,use-stack-protection = <1>;
		xlnx,m6-axis-protocol = "GENERIC";
		xlnx,num-sync-ff-dbg-clk = <1>;
		xlnx,m-axi-ip-data-width = <32>;
		d-cache-size = <8192>;
		xlnx,use-pcmp-instr = <1>;
		xlnx,area-optimized = <0>;
		xlnx,avoid-primitives = <0>;
		xlnx,m1-axis-protocol = "GENERIC";
		xlnx,i-lmb = <1>;
		xlnx,lockstep-select = <0>;
		xlnx,dcache-data-width = <0>;
		xlnx,icache-force-tag-lutram = <0>;
		xlnx,m15-axis-protocol = "GENERIC";
		xlnx,use-branch-target-cache = <0>;
		xlnx,m-axi-ip-thread-id-width = <1>;
		xlnx,mmu-itlb-size = <2>;
		xlnx,number-of-pc-brk = <2>;
		xlnx,imprecise-exceptions = <0>;
		xlnx,m-axi-ic-buser-width = <1>;
		xlnx,m-axi-ic-addr-width = <32>;
		xlnx,s15-axis-protocol = "GENERIC";
		d-cache-highaddr = <0x3fffffff>;
		xlnx,m10-axis-protocol = "GENERIC";
		xlnx,optimization = <0>;
		xlnx,m-axi-ic-aruser-width = <5>;
		xlnx,d-lmb-mon = <0>;
		xlnx,s10-axis-protocol = "GENERIC";
		xlnx,m-axi-ic-ruser-width = <1>;
		xlnx,s5-axis-protocol = "GENERIC";
		xlnx,fault-tolerant = <1>;
		d-cache-line-size = <16>;
		xlnx,m-axi-dc-aruser-width = <5>;
		xlnx,mmu-privileged-instr = <0>;
		xlnx,m-axi-i-bus-exception = <0>;
		xlnx,reset-msr-eip = <0>;
		xlnx,endianness = <1>;
		xlnx,reset-msr-ice = <0>;
		xlnx,dp-axi-mon = <0>;
		xlnx,s10-axis-data-width = <32>;
		xlnx,s0-axis-protocol = "GENERIC";
		xlnx,s12-axis-data-width = <32>;
		xlnx,m7-axis-protocol = "GENERIC";
		xlnx,s14-axis-data-width = <32>;
		xlnx,m-axi-d-bus-exception = <1>;
		xlnx,reset-msr-bip = <1>;
		xlnx,debug-external-trace = <0>;
		xlnx,addr-size = <32>;
		xlnx,m-axi-ic-user-value = <31>;
		xlnx,m1-axis-data-width = <32>;
		xlnx,debug-event-counters = <5>;
		xlnx,m3-axis-data-width = <32>;
		xlnx,fpu-exception = <0>;
		xlnx,m2-axis-protocol = "GENERIC";
		xlnx,m5-axis-data-width = <32>;
		xlnx,m7-axis-data-width = <32>;
		xlnx,edk-iptype = "PROCESSOR";
		xlnx,debug-latency-counters = <1>;
		xlnx,interconnect = <2>;
		xlnx,m9-axis-data-width = <32>;
		xlnx,edge-is-positive = <1>;
		xlnx,use-icache = <0>;
		xlnx,async-wakeup = <3>;
		xlnx,m10-axis-data-width = <32>;
		xlnx,m12-axis-data-width = <32>;
		xlnx,use-ext-nm-brk = <0>;
		xlnx,m11-axis-protocol = "GENERIC";
		xlnx,m14-axis-data-width = <32>;
		xlnx,icache-always-used = <0>;
		xlnx,ic-axi-mon = <0>;
		xlnx,num-sync-ff-clk-irq = <1>;
		xlnx,freq = <320000000>;
		xlnx,lockstep-master = <0>;
		xlnx,s11-axis-protocol = "GENERIC";
		xlnx,use-msr-instr = <1>;
		xlnx,s6-axis-protocol = "GENERIC";
		xlnx,iaddr-size = <32>;
		xlnx,interrupt-mon = <0>;
		xlnx,m-axi-dc-data-width = <32>;
		xlnx,dynamic-bus-sizing = <0>;
		xlnx,number-of-wr-addr-brk = <1>;
		xlnx,use-interrupt = <1>;
		xlnx,m-axi-ip-addr-width = <32>;
		xlnx,async-interrupt = <1>;
		xlnx,pc-width = <32>;
		xlnx,icache-victims = <0>;
		xlnx,reset-msr-ee = <0>;
		xlnx,s1-axis-protocol = "GENERIC";
		xlnx,m8-axis-protocol = "GENERIC";
		i-cache-baseaddr = <0x0>;
		xlnx,i-lmb-mon = <0>;
		xlnx,dcache-byte-size = <8192>;
		xlnx,m-axi-dp-thread-id-width = <1>;
		xlnx,data-size = <32>;
		xlnx,m-axi-dc-wuser-width = <1>;
		xlnx,fsl-exception = <0>;
		xlnx,m3-axis-protocol = "GENERIC";
		xlnx,s1-axis-data-width = <32>;
		xlnx,dcache-use-writeback = <0>;
		xlnx,div-zero-exception = <1>;
		xlnx,s3-axis-data-width = <32>;
		xlnx,base-vectors = <0xf0240000>;
		xlnx,icache-line-len = <4>;
		xlnx,s5-axis-data-width = <32>;
		xlnx,s7-axis-data-width = <32>;
		xlnx,allow-dcache-wr = <1>;
		xlnx,s9-axis-data-width = <32>;
		xlnx,use-barrel = <1>;
		xlnx,g-use-exceptions = <1>;
		xlnx,dcache-line-len = <4>;
		xlnx,m12-axis-protocol = "GENERIC";
		xlnx,num-sync-ff-clk = <2>;
		i-cache-size = <8192>;
		xlnx,instance = "design_1_microblaze_0_0";
		xlnx,reset-msr-ie = <0>;
		xlnx,s12-axis-protocol = "GENERIC";
		xlnx,dcache-addr-tag = <0>;
		xlnx,m-axi-ic-thread-id-width = <1>;
		xlnx,number-of-rd-addr-brk = <1>;
		xlnx,m-axi-dc-buser-width = <1>;
		xlnx,s7-axis-protocol = "GENERIC";
		xlnx,lockstep-slave = <0>;
		xlnx,debug-profile-size = <0>;
		xlnx,s2-axis-protocol = "GENERIC";
		xlnx,m9-axis-protocol = "GENERIC";
		xlnx,debug-counter-width = <32>;
		xlnx,icache-data-width = <0>;
		xlnx,m-axi-dc-ruser-width = <1>;
		xlnx,reset-msr-dce = <0>;
		xlnx,ip-name = "psv_pmc";
		xlnx,ip-axi-mon = <0>;
		xlnx,m-axi-dp-data-width = <32>;
		xlnx,m4-axis-protocol = "GENERIC";
		xlnx,dcache-always-used = <0>;
		xlnx,ill-opcode-exception = <1>;
		xlnx,trace = <1>;
		xlnx,pvr = <2>;
		xlnx,debug-trace-size = <8192>;
		i-cache-line-size = <16>;
		xlnx,m13-axis-protocol = "GENERIC";
		xlnx,s11-axis-data-width = <32>;
		xlnx,m-axi-dc-addr-width = <32>;
		xlnx,s13-axis-data-width = <32>;
		xlnx,ecc-use-ce-exception = <0>;
		xlnx,opcode-0x0-illegal = <1>;
		xlnx,pvr-user2 = <0x0>;
		xlnx,s15-axis-data-width = <32>;
		xlnx,s13-axis-protocol = "GENERIC";
		xlnx,m0-axis-data-width = <32>;
		i-cache-highaddr = <0x3fffffff>;
		xlnx,s8-axis-protocol = "GENERIC";
		xlnx,m2-axis-data-width = <32>;
		xlnx,num-sync-ff-clk-debug = <2>;
		xlnx,allow-icache-wr = <1>;
		xlnx,m4-axis-data-width = <32>;
		xlnx,g-template-list = <0>;
		xlnx,m6-axis-data-width = <32>;
		xlnx,m-axi-ic-data-width = <32>;
		xlnx,m8-axis-data-width = <32>;
		xlnx,use-hw-mul = <2>;
		xlnx,use-fpu = <0>;
		xlnx,s3-axis-protocol = "GENERIC";
		xlnx,use-non-secure = <0>;
		d-cache-baseaddr = <0x0>;
		xlnx,m11-axis-data-width = <32>;
		xlnx,m13-axis-data-width = <32>;
		xlnx,instr-size = <32>;
		xlnx,m15-axis-data-width = <32>;
		xlnx,mmu-dtlb-size = <4>;
		xlnx,fsl-links = <0>;
		xlnx,m5-axis-protocol = "GENERIC";
		xlnx,dcache-victims = <0>;
		xlnx,m-axi-dc-user-value = <31>;
		xlnx,unaligned-exceptions = <1>;
	};
	&psv_psm_0 {
		xlnx,d-axi = <1>;
		xlnx,addr-tag-bits = <0>;
		xlnx,m-axi-dc-thread-id-width = <1>;
		xlnx,m0-axis-protocol = "GENERIC";
		xlnx,dcache-force-tag-lutram = <0>;
		xlnx,interrupt-is-edge = <0>;
		xlnx,use-mmu = <0>;
		xlnx,m-axi-dp-exclusive-access = <0>;
		xlnx,use-reorder-instr = <1>;
		xlnx,m14-axis-protocol = "GENERIC";
		xlnx,use-div = <1>;
		xlnx,dc-axi-mon = <0>;
		xlnx,m-axi-ic-user-signals = <0>;
		xlnx,use-config-reset = <0>;
		xlnx,s14-axis-protocol = "GENERIC";
		xlnx,mmu-zones = <16>;
		xlnx,enable-discrete-ports = <0>;
		xlnx,d-lmb = <1>;
		xlnx,m-axi-dc-exclusive-access = <0>;
		xlnx,debug-interface = <0>;
		xlnx,s9-axis-protocol = "GENERIC";
		xlnx,sco = <0>;
		xlnx,use-ext-brk = <0>;
		xlnx,debug-enabled = <1>;
		xlnx,daddr-size = <32>;
		xlnx,s0-axis-data-width = <32>;
		xlnx,use-extended-fsl-instr = <0>;
		xlnx,m-axi-dc-user-signals = <0>;
		xlnx,reset-msr = <0x0>;
		xlnx,branch-target-cache-size = <0>;
		xlnx,s2-axis-data-width = <32>;
		bus-handle = <&amba>;
		xlnx,cache-byte-size = <8192>;
		xlnx,mmu-tlb-access = <3>;
		xlnx,s4-axis-data-width = <32>;
		xlnx,m-axi-ic-awuser-width = <5>;
		xlnx,s6-axis-data-width = <32>;
		xlnx,s4-axis-protocol = "GENERIC";
		xlnx,s8-axis-data-width = <32>;
		xlnx,edk-special = "microblaze";
		xlnx,use-dcache = <0>;
		xlnx,m-axi-dp-addr-width = <32>;
		xlnx,m-axi-ic-wuser-width = <1>;
		xlnx,i-axi = <0>;
		xlnx,icache-streams = <0>;
		xlnx,m-axi-dc-awuser-width = <5>;
		xlnx,pss-ref-clk-freq = <33333300>;
		xlnx,use-stack-protection = <1>;
		xlnx,m6-axis-protocol = "GENERIC";
		xlnx,num-sync-ff-dbg-clk = <1>;
		xlnx,m-axi-ip-data-width = <32>;
		d-cache-size = <8192>;
		xlnx,use-pcmp-instr = <1>;
		xlnx,area-optimized = <0>;
		xlnx,avoid-primitives = <0>;
		xlnx,m1-axis-protocol = "GENERIC";
		xlnx,i-lmb = <1>;
		xlnx,lockstep-select = <0>;
		xlnx,dcache-data-width = <0>;
		xlnx,icache-force-tag-lutram = <0>;
		xlnx,m15-axis-protocol = "GENERIC";
		xlnx,use-branch-target-cache = <0>;
		xlnx,m-axi-ip-thread-id-width = <1>;
		xlnx,mmu-itlb-size = <2>;
		xlnx,number-of-pc-brk = <2>;
		xlnx,imprecise-exceptions = <0>;
		xlnx,m-axi-ic-buser-width = <1>;
		xlnx,m-axi-ic-addr-width = <32>;
		xlnx,s15-axis-protocol = "GENERIC";
		d-cache-highaddr = <0x3fffffff>;
		xlnx,m10-axis-protocol = "GENERIC";
		xlnx,optimization = <0>;
		xlnx,m-axi-ic-aruser-width = <5>;
		xlnx,d-lmb-mon = <0>;
		xlnx,s10-axis-protocol = "GENERIC";
		xlnx,m-axi-ic-ruser-width = <1>;
		xlnx,s5-axis-protocol = "GENERIC";
		xlnx,fault-tolerant = <1>;
		d-cache-line-size = <16>;
		xlnx,m-axi-dc-aruser-width = <5>;
		xlnx,mmu-privileged-instr = <0>;
		xlnx,m-axi-i-bus-exception = <0>;
		xlnx,reset-msr-eip = <0>;
		xlnx,endianness = <1>;
		xlnx,reset-msr-ice = <0>;
		xlnx,dp-axi-mon = <0>;
		xlnx,s10-axis-data-width = <32>;
		xlnx,s0-axis-protocol = "GENERIC";
		xlnx,s12-axis-data-width = <32>;
		xlnx,m7-axis-protocol = "GENERIC";
		xlnx,s14-axis-data-width = <32>;
		xlnx,m-axi-d-bus-exception = <1>;
		xlnx,reset-msr-bip = <1>;
		xlnx,debug-external-trace = <0>;
		xlnx,addr-size = <32>;
		xlnx,m-axi-ic-user-value = <31>;
		xlnx,m1-axis-data-width = <32>;
		xlnx,debug-event-counters = <5>;
		xlnx,m3-axis-data-width = <32>;
		xlnx,fpu-exception = <0>;
		xlnx,m2-axis-protocol = "GENERIC";
		xlnx,m5-axis-data-width = <32>;
		xlnx,m7-axis-data-width = <32>;
		xlnx,edk-iptype = "PROCESSOR";
		xlnx,debug-latency-counters = <1>;
		xlnx,interconnect = <2>;
		xlnx,m9-axis-data-width = <32>;
		xlnx,edge-is-positive = <1>;
		xlnx,use-icache = <0>;
		xlnx,async-wakeup = <3>;
		xlnx,m10-axis-data-width = <32>;
		xlnx,m12-axis-data-width = <32>;
		xlnx,use-ext-nm-brk = <0>;
		xlnx,m11-axis-protocol = "GENERIC";
		xlnx,m14-axis-data-width = <32>;
		xlnx,icache-always-used = <0>;
		xlnx,ic-axi-mon = <0>;
		xlnx,num-sync-ff-clk-irq = <1>;
		xlnx,freq = <100000000>;
		xlnx,lockstep-master = <0>;
		xlnx,s11-axis-protocol = "GENERIC";
		xlnx,use-msr-instr = <1>;
		xlnx,s6-axis-protocol = "GENERIC";
		xlnx,iaddr-size = <32>;
		xlnx,interrupt-mon = <0>;
		xlnx,m-axi-dc-data-width = <32>;
		xlnx,dynamic-bus-sizing = <0>;
		xlnx,number-of-wr-addr-brk = <1>;
		xlnx,use-interrupt = <1>;
		xlnx,m-axi-ip-addr-width = <32>;
		xlnx,async-interrupt = <1>;
		xlnx,pc-width = <32>;
		xlnx,icache-victims = <0>;
		xlnx,reset-msr-ee = <0>;
		xlnx,s1-axis-protocol = "GENERIC";
		xlnx,m8-axis-protocol = "GENERIC";
		i-cache-baseaddr = <0x0>;
		xlnx,i-lmb-mon = <0>;
		xlnx,dcache-byte-size = <8192>;
		xlnx,m-axi-dp-thread-id-width = <1>;
		xlnx,data-size = <32>;
		xlnx,m-axi-dc-wuser-width = <1>;
		xlnx,fsl-exception = <0>;
		xlnx,m3-axis-protocol = "GENERIC";
		xlnx,s1-axis-data-width = <32>;
		xlnx,dcache-use-writeback = <0>;
		xlnx,div-zero-exception = <1>;
		xlnx,s3-axis-data-width = <32>;
		xlnx,base-vectors = <0xffc00000>;
		xlnx,icache-line-len = <4>;
		xlnx,s5-axis-data-width = <32>;
		xlnx,s7-axis-data-width = <32>;
		xlnx,allow-dcache-wr = <1>;
		xlnx,s9-axis-data-width = <32>;
		xlnx,use-barrel = <1>;
		xlnx,g-use-exceptions = <1>;
		xlnx,dcache-line-len = <4>;
		xlnx,m12-axis-protocol = "GENERIC";
		xlnx,num-sync-ff-clk = <2>;
		i-cache-size = <8192>;
		xlnx,instance = "design_1_microblaze_0_0";
		xlnx,reset-msr-ie = <0>;
		xlnx,s12-axis-protocol = "GENERIC";
		xlnx,dcache-addr-tag = <0>;
		xlnx,m-axi-ic-thread-id-width = <1>;
		xlnx,number-of-rd-addr-brk = <1>;
		xlnx,m-axi-dc-buser-width = <1>;
		xlnx,s7-axis-protocol = "GENERIC";
		xlnx,lockstep-slave = <0>;
		xlnx,debug-profile-size = <0>;
		xlnx,s2-axis-protocol = "GENERIC";
		xlnx,m9-axis-protocol = "GENERIC";
		xlnx,debug-counter-width = <32>;
		xlnx,icache-data-width = <0>;
		xlnx,m-axi-dc-ruser-width = <1>;
		xlnx,reset-msr-dce = <0>;
		xlnx,ip-name = "psv_psm";
		xlnx,ip-axi-mon = <0>;
		xlnx,m-axi-dp-data-width = <32>;
		xlnx,m4-axis-protocol = "GENERIC";
		xlnx,dcache-always-used = <0>;
		xlnx,ill-opcode-exception = <1>;
		xlnx,trace = <1>;
		xlnx,pvr = <2>;
		xlnx,debug-trace-size = <8192>;
		i-cache-line-size = <16>;
		xlnx,m13-axis-protocol = "GENERIC";
		xlnx,s11-axis-data-width = <32>;
		xlnx,m-axi-dc-addr-width = <32>;
		xlnx,s13-axis-data-width = <32>;
		xlnx,ecc-use-ce-exception = <0>;
		xlnx,opcode-0x0-illegal = <1>;
		xlnx,pvr-user2 = <0x0>;
		xlnx,s15-axis-data-width = <32>;
		xlnx,s13-axis-protocol = "GENERIC";
		xlnx,m0-axis-data-width = <32>;
		i-cache-highaddr = <0x3fffffff>;
		xlnx,s8-axis-protocol = "GENERIC";
		xlnx,m2-axis-data-width = <32>;
		xlnx,num-sync-ff-clk-debug = <2>;
		xlnx,allow-icache-wr = <1>;
		xlnx,m4-axis-data-width = <32>;
		xlnx,g-template-list = <0>;
		xlnx,m6-axis-data-width = <32>;
		xlnx,m-axi-ic-data-width = <32>;
		xlnx,m8-axis-data-width = <32>;
		xlnx,use-hw-mul = <2>;
		xlnx,use-fpu = <0>;
		xlnx,s3-axis-protocol = "GENERIC";
		xlnx,use-non-secure = <0>;
		d-cache-baseaddr = <0x0>;
		xlnx,m11-axis-data-width = <32>;
		xlnx,m13-axis-data-width = <32>;
		xlnx,instr-size = <32>;
		xlnx,m15-axis-data-width = <32>;
		xlnx,mmu-dtlb-size = <4>;
		xlnx,fsl-links = <0>;
		xlnx,m5-axis-protocol = "GENERIC";
		xlnx,dcache-victims = <0>;
		xlnx,m-axi-dc-user-value = <31>;
		xlnx,unaligned-exceptions = <1>;
	};
	&lpd_dma_chan0 {
		xlnx,is-cache-coherent = <0>;
		status = "okay";
		xlnx,ip-name = "psv_adma";
		xlnx,dma-mode = <1>;
		xlnx,name = "blp_cips_pspmc_0_psv_adma_0";
	};
	&lpd_dma_chan1 {
		xlnx,is-cache-coherent = <0>;
		status = "okay";
		xlnx,ip-name = "psv_adma";
		xlnx,dma-mode = <1>;
		xlnx,name = "blp_cips_pspmc_0_psv_adma_1";
	};
	&lpd_dma_chan2 {
		xlnx,is-cache-coherent = <0>;
		status = "okay";
		xlnx,ip-name = "psv_adma";
		xlnx,dma-mode = <1>;
		xlnx,name = "blp_cips_pspmc_0_psv_adma_2";
	};
	&lpd_dma_chan3 {
		xlnx,is-cache-coherent = <0>;
		status = "okay";
		xlnx,ip-name = "psv_adma";
		xlnx,dma-mode = <1>;
		xlnx,name = "blp_cips_pspmc_0_psv_adma_3";
	};
	&lpd_dma_chan4 {
		xlnx,is-cache-coherent = <0>;
		status = "okay";
		xlnx,ip-name = "psv_adma";
		xlnx,dma-mode = <1>;
		xlnx,name = "blp_cips_pspmc_0_psv_adma_4";
	};
	&lpd_dma_chan5 {
		xlnx,is-cache-coherent = <0>;
		status = "okay";
		xlnx,ip-name = "psv_adma";
		xlnx,dma-mode = <1>;
		xlnx,name = "blp_cips_pspmc_0_psv_adma_5";
	};
	&lpd_dma_chan6 {
		xlnx,is-cache-coherent = <0>;
		status = "okay";
		xlnx,ip-name = "psv_adma";
		xlnx,dma-mode = <1>;
		xlnx,name = "blp_cips_pspmc_0_psv_adma_6";
	};
	&lpd_dma_chan7 {
		xlnx,is-cache-coherent = <0>;
		status = "okay";
		xlnx,ip-name = "psv_adma";
		xlnx,dma-mode = <1>;
		xlnx,name = "blp_cips_pspmc_0_psv_adma_7";
	};
	&coresight {
		status = "okay";
		xlnx,ip-name = "psv_coresight";
		xlnx,name = "blp_cips_pspmc_0_psv_coresight_0";
	};
	&cci {
		status = "okay";
		xlnx,ip-name = "psv_fpd_maincci";
		xlnx,name = "blp_cips_pspmc_0_psv_fpd_maincci_0";
	};
	&fpd_xmpu {
		status = "okay";
		xlnx,ip-name = "psv_fpd_slave_xmpu";
		xlnx,name = "blp_cips_pspmc_0_psv_fpd_slave_xmpu_0";
	};
	&smmu {
		status = "okay";
		xlnx,ip-name = "psv_fpd_smmutcu";
		xlnx,name = "blp_cips_pspmc_0_psv_fpd_smmutcu_0";
	};
	&gpio0 {
		status = "okay";
		xlnx,ps-gpio-emio-peripheral-enable = <0>;
		xlnx,ip-name = "psv_gpio";
		emio-gpio-width = "";
		xlnx,name = "blp_cips_pspmc_0_psv_gpio_2";
	};
	&ipi0 {
		xlnx,cpu-name = "A72";
		xlnx,buffer-base = <0xff3f0400>;
		status = "okay";
		xlnx,buffer-index = <0x2>;
		xlnx,ip-name = "psv_ipi";
		xlnx,ipi-target-count = <10>;
		reg = <0x0 0xff330000 0x0 0x10000 0x0 0xff3f0400 0x0 0x200>;
		reg-names = "ctrl" , "msg";
		xlnx,int-id = <62>;
		xlnx,bit-position = <2>;
		xlnx,name = "blp_cips_pspmc_0_psv_ipi_0";
		ipi_0_to_ipi_0: child@ff330000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <4>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f04a0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <2>;
			reg = <0x0 0xff330000 0x0 0x10000 0x0 0xff3f0400 0x0 0x200>;
			xlnx,ipi-buf-index = <0x2>;
			xlnx,ipi-req-msg-buf = <0xff3f0480>;
			reg-names = "ctrl" , "msg";
		};
		ipi_0_to_ipi_1: child@ff340000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <8>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f04e0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <3>;
			reg = <0x0 0xff340000 0x0 0x10000 0x0 0xff3f0600 0x0 0x200>;
			xlnx,ipi-buf-index = <0x3>;
			xlnx,ipi-req-msg-buf = <0xff3f04c0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_0_to_ipi_2: child@ff350000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <16>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f0520>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <4>;
			reg = <0x0 0xff350000 0x0 0x10000 0x0 0xff3f0800 0x0 0x200>;
			xlnx,ipi-buf-index = <0x4>;
			xlnx,ipi-req-msg-buf = <0xff3f0500>;
			reg-names = "ctrl" , "msg";
		};
		ipi_0_to_ipi_3: child@ff360000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <32>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f0560>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <5>;
			reg = <0x0 0xff360000 0x0 0x10000 0x0 0xff3f0a00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x5>;
			xlnx,ipi-req-msg-buf = <0xff3f0540>;
			reg-names = "ctrl" , "msg";
		};
		ipi_0_to_ipi_4: child@ff370000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <64>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f05a0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <6>;
			reg = <0x0 0xff370000 0x0 0x10000 0x0 0xff3f0c00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x6>;
			xlnx,ipi-req-msg-buf = <0xff3f0580>;
			reg-names = "ctrl" , "msg";
		};
		ipi_0_to_ipi_5: child@ff380000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <128>;
			xlnx,cpu-name = "R5_1";
			xlnx,ipi-rsp-msg-buf = <0xff3f05e0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <7>;
			reg = <0x0 0xff380000 0x0 0x10000 0x0 0xff3f0e00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x7>;
			xlnx,ipi-req-msg-buf = <0xff3f05c0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_0_to_ipi_6: child@ff3a0000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <512>;
			xlnx,cpu-name = "R5_1";
			#mbox-cells = <1>;
			xlnx,ipi-id = <9>;
			reg = <0x0 0xff3a0000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_0_to_ipi_pmc: child@ff320000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <2>;
			xlnx,cpu-name = "PMC";
			xlnx,ipi-rsp-msg-buf = <0xff3f0460>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <1>;
			reg = <0x0 0xff320000 0x0 0x10000 0x0 0xff3f0200 0x0 0x200>;
			xlnx,ipi-buf-index = <0x1>;
			xlnx,ipi-req-msg-buf = <0xff3f0440>;
			reg-names = "ctrl" , "msg";
		};
		ipi_0_to_ipi_pmc_nobuf: child@ff390000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <256>;
			xlnx,cpu-name = "PMC";
			#mbox-cells = <1>;
			xlnx,ipi-id = <8>;
			reg = <0x0 0xff390000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_0_to_ipi_psm: child@ff310000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <1>;
			xlnx,cpu-name = "PSM";
			xlnx,ipi-rsp-msg-buf = <0xff3f0420>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <0>;
			reg = <0x0 0xff310000 0x0 0x10000 0x0 0xff3f0000 0x0 0x200>;
			xlnx,ipi-buf-index = <0x0>;
			xlnx,ipi-req-msg-buf = <0xff3f0400>;
			reg-names = "ctrl" , "msg";
		};
	};
	&ipi1 {
		xlnx,cpu-name = "A72";
		xlnx,buffer-base = <0xff3f0600>;
		status = "okay";
		xlnx,buffer-index = <0x3>;
		xlnx,ip-name = "psv_ipi";
		xlnx,ipi-target-count = <10>;
		reg = <0x0 0xff340000 0x0 0x10000 0x0 0xff3f0600 0x0 0x200>;
		reg-names = "ctrl" , "msg";
		xlnx,int-id = <63>;
		xlnx,bit-position = <3>;
		xlnx,name = "blp_cips_pspmc_0_psv_ipi_1";
		ipi_1_to_ipi_0: child@ff330000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <4>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f06a0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <2>;
			reg = <0x0 0xff330000 0x0 0x10000 0x0 0xff3f0400 0x0 0x200>;
			xlnx,ipi-buf-index = <0x2>;
			xlnx,ipi-req-msg-buf = <0xff3f0680>;
			reg-names = "ctrl" , "msg";
		};
		ipi_1_to_ipi_1: child@ff340000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <8>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f06e0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <3>;
			reg = <0x0 0xff340000 0x0 0x10000 0x0 0xff3f0600 0x0 0x200>;
			xlnx,ipi-buf-index = <0x3>;
			xlnx,ipi-req-msg-buf = <0xff3f06c0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_1_to_ipi_2: child@ff350000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <16>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f0720>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <4>;
			reg = <0x0 0xff350000 0x0 0x10000 0x0 0xff3f0800 0x0 0x200>;
			xlnx,ipi-buf-index = <0x4>;
			xlnx,ipi-req-msg-buf = <0xff3f0700>;
			reg-names = "ctrl" , "msg";
		};
		ipi_1_to_ipi_3: child@ff360000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <32>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f0760>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <5>;
			reg = <0x0 0xff360000 0x0 0x10000 0x0 0xff3f0a00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x5>;
			xlnx,ipi-req-msg-buf = <0xff3f0740>;
			reg-names = "ctrl" , "msg";
		};
		ipi_1_to_ipi_4: child@ff370000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <64>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f07a0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <6>;
			reg = <0x0 0xff370000 0x0 0x10000 0x0 0xff3f0c00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x6>;
			xlnx,ipi-req-msg-buf = <0xff3f0780>;
			reg-names = "ctrl" , "msg";
		};
		ipi_1_to_ipi_5: child@ff380000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <128>;
			xlnx,cpu-name = "R5_1";
			xlnx,ipi-rsp-msg-buf = <0xff3f07e0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <7>;
			reg = <0x0 0xff380000 0x0 0x10000 0x0 0xff3f0e00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x7>;
			xlnx,ipi-req-msg-buf = <0xff3f07c0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_1_to_ipi_6: child@ff3a0000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <512>;
			xlnx,cpu-name = "R5_1";
			#mbox-cells = <1>;
			xlnx,ipi-id = <9>;
			reg = <0x0 0xff3a0000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_1_to_ipi_pmc: child@ff320000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <2>;
			xlnx,cpu-name = "PMC";
			xlnx,ipi-rsp-msg-buf = <0xff3f0660>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <1>;
			reg = <0x0 0xff320000 0x0 0x10000 0x0 0xff3f0200 0x0 0x200>;
			xlnx,ipi-buf-index = <0x1>;
			xlnx,ipi-req-msg-buf = <0xff3f0640>;
			reg-names = "ctrl" , "msg";
		};
		ipi_1_to_ipi_pmc_nobuf: child@ff390000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <256>;
			xlnx,cpu-name = "PMC";
			#mbox-cells = <1>;
			xlnx,ipi-id = <8>;
			reg = <0x0 0xff390000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_1_to_ipi_psm: child@ff310000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <1>;
			xlnx,cpu-name = "PSM";
			xlnx,ipi-rsp-msg-buf = <0xff3f0620>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <0>;
			reg = <0x0 0xff310000 0x0 0x10000 0x0 0xff3f0000 0x0 0x200>;
			xlnx,ipi-buf-index = <0x0>;
			xlnx,ipi-req-msg-buf = <0xff3f0600>;
			reg-names = "ctrl" , "msg";
		};
	};
	&ipi2 {
		xlnx,cpu-name = "A72";
		xlnx,buffer-base = <0xff3f0800>;
		status = "okay";
		xlnx,buffer-index = <0x4>;
		xlnx,ip-name = "psv_ipi";
		xlnx,ipi-target-count = <10>;
		reg = <0x0 0xff350000 0x0 0x10000 0x0 0xff3f0800 0x0 0x200>;
		reg-names = "ctrl" , "msg";
		xlnx,int-id = <64>;
		xlnx,bit-position = <4>;
		xlnx,name = "blp_cips_pspmc_0_psv_ipi_2";
		ipi_2_to_ipi_0: child@ff330000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <4>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f08a0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <2>;
			reg = <0x0 0xff330000 0x0 0x10000 0x0 0xff3f0400 0x0 0x200>;
			xlnx,ipi-buf-index = <0x2>;
			xlnx,ipi-req-msg-buf = <0xff3f0880>;
			reg-names = "ctrl" , "msg";
		};
		ipi_2_to_ipi_1: child@ff340000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <8>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f08e0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <3>;
			reg = <0x0 0xff340000 0x0 0x10000 0x0 0xff3f0600 0x0 0x200>;
			xlnx,ipi-buf-index = <0x3>;
			xlnx,ipi-req-msg-buf = <0xff3f08c0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_2_to_ipi_2: child@ff350000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <16>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f0920>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <4>;
			reg = <0x0 0xff350000 0x0 0x10000 0x0 0xff3f0800 0x0 0x200>;
			xlnx,ipi-buf-index = <0x4>;
			xlnx,ipi-req-msg-buf = <0xff3f0900>;
			reg-names = "ctrl" , "msg";
		};
		ipi_2_to_ipi_3: child@ff360000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <32>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f0960>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <5>;
			reg = <0x0 0xff360000 0x0 0x10000 0x0 0xff3f0a00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x5>;
			xlnx,ipi-req-msg-buf = <0xff3f0940>;
			reg-names = "ctrl" , "msg";
		};
		ipi_2_to_ipi_4: child@ff370000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <64>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f09a0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <6>;
			reg = <0x0 0xff370000 0x0 0x10000 0x0 0xff3f0c00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x6>;
			xlnx,ipi-req-msg-buf = <0xff3f0980>;
			reg-names = "ctrl" , "msg";
		};
		ipi_2_to_ipi_5: child@ff380000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <128>;
			xlnx,cpu-name = "R5_1";
			xlnx,ipi-rsp-msg-buf = <0xff3f09e0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <7>;
			reg = <0x0 0xff380000 0x0 0x10000 0x0 0xff3f0e00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x7>;
			xlnx,ipi-req-msg-buf = <0xff3f09c0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_2_to_ipi_6: child@ff3a0000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <512>;
			xlnx,cpu-name = "R5_1";
			#mbox-cells = <1>;
			xlnx,ipi-id = <9>;
			reg = <0x0 0xff3a0000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_2_to_ipi_pmc: child@ff320000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <2>;
			xlnx,cpu-name = "PMC";
			xlnx,ipi-rsp-msg-buf = <0xff3f0860>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <1>;
			reg = <0x0 0xff320000 0x0 0x10000 0x0 0xff3f0200 0x0 0x200>;
			xlnx,ipi-buf-index = <0x1>;
			xlnx,ipi-req-msg-buf = <0xff3f0840>;
			reg-names = "ctrl" , "msg";
		};
		ipi_2_to_ipi_pmc_nobuf: child@ff390000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <256>;
			xlnx,cpu-name = "PMC";
			#mbox-cells = <1>;
			xlnx,ipi-id = <8>;
			reg = <0x0 0xff390000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_2_to_ipi_psm: child@ff310000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <1>;
			xlnx,cpu-name = "PSM";
			xlnx,ipi-rsp-msg-buf = <0xff3f0820>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <0>;
			reg = <0x0 0xff310000 0x0 0x10000 0x0 0xff3f0000 0x0 0x200>;
			xlnx,ipi-buf-index = <0x0>;
			xlnx,ipi-req-msg-buf = <0xff3f0800>;
			reg-names = "ctrl" , "msg";
		};
	};
	&ipi3 {
		xlnx,cpu-name = "R5_0";
		xlnx,buffer-base = <0xff3f0a00>;
		status = "okay";
		xlnx,buffer-index = <0x5>;
		xlnx,ip-name = "psv_ipi";
		xlnx,ipi-target-count = <10>;
		reg = <0x0 0xff360000 0x0 0x10000 0x0 0xff3f0a00 0x0 0x200>;
		reg-names = "ctrl" , "msg";
		xlnx,int-id = <65>;
		xlnx,bit-position = <5>;
		xlnx,name = "blp_cips_pspmc_0_psv_ipi_3";
		ipi_3_to_ipi_0: child@ff330000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <4>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f0aa0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <2>;
			reg = <0x0 0xff330000 0x0 0x10000 0x0 0xff3f0400 0x0 0x200>;
			xlnx,ipi-buf-index = <0x2>;
			xlnx,ipi-req-msg-buf = <0xff3f0a80>;
			reg-names = "ctrl" , "msg";
		};
		ipi_3_to_ipi_1: child@ff340000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <8>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f0ae0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <3>;
			reg = <0x0 0xff340000 0x0 0x10000 0x0 0xff3f0600 0x0 0x200>;
			xlnx,ipi-buf-index = <0x3>;
			xlnx,ipi-req-msg-buf = <0xff3f0ac0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_3_to_ipi_2: child@ff350000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <16>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f0b20>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <4>;
			reg = <0x0 0xff350000 0x0 0x10000 0x0 0xff3f0800 0x0 0x200>;
			xlnx,ipi-buf-index = <0x4>;
			xlnx,ipi-req-msg-buf = <0xff3f0b00>;
			reg-names = "ctrl" , "msg";
		};
		ipi_3_to_ipi_3: child@ff360000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <32>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f0b60>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <5>;
			reg = <0x0 0xff360000 0x0 0x10000 0x0 0xff3f0a00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x5>;
			xlnx,ipi-req-msg-buf = <0xff3f0b40>;
			reg-names = "ctrl" , "msg";
		};
		ipi_3_to_ipi_4: child@ff370000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <64>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f0ba0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <6>;
			reg = <0x0 0xff370000 0x0 0x10000 0x0 0xff3f0c00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x6>;
			xlnx,ipi-req-msg-buf = <0xff3f0b80>;
			reg-names = "ctrl" , "msg";
		};
		ipi_3_to_ipi_5: child@ff380000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <128>;
			xlnx,cpu-name = "R5_1";
			xlnx,ipi-rsp-msg-buf = <0xff3f0be0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <7>;
			reg = <0x0 0xff380000 0x0 0x10000 0x0 0xff3f0e00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x7>;
			xlnx,ipi-req-msg-buf = <0xff3f0bc0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_3_to_ipi_6: child@ff3a0000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <512>;
			xlnx,cpu-name = "R5_1";
			#mbox-cells = <1>;
			xlnx,ipi-id = <9>;
			reg = <0x0 0xff3a0000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_3_to_ipi_pmc: child@ff320000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <2>;
			xlnx,cpu-name = "PMC";
			xlnx,ipi-rsp-msg-buf = <0xff3f0a60>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <1>;
			reg = <0x0 0xff320000 0x0 0x10000 0x0 0xff3f0200 0x0 0x200>;
			xlnx,ipi-buf-index = <0x1>;
			xlnx,ipi-req-msg-buf = <0xff3f0a40>;
			reg-names = "ctrl" , "msg";
		};
		ipi_3_to_ipi_pmc_nobuf: child@ff390000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <256>;
			xlnx,cpu-name = "PMC";
			#mbox-cells = <1>;
			xlnx,ipi-id = <8>;
			reg = <0x0 0xff390000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_3_to_ipi_psm: child@ff310000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <1>;
			xlnx,cpu-name = "PSM";
			xlnx,ipi-rsp-msg-buf = <0xff3f0a20>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <0>;
			reg = <0x0 0xff310000 0x0 0x10000 0x0 0xff3f0000 0x0 0x200>;
			xlnx,ipi-buf-index = <0x0>;
			xlnx,ipi-req-msg-buf = <0xff3f0a00>;
			reg-names = "ctrl" , "msg";
		};
	};
	&ipi4 {
		xlnx,cpu-name = "R5_0";
		xlnx,buffer-base = <0xff3f0c00>;
		status = "okay";
		xlnx,buffer-index = <0x6>;
		xlnx,ip-name = "psv_ipi";
		xlnx,ipi-target-count = <10>;
		reg = <0x0 0xff370000 0x0 0x10000 0x0 0xff3f0c00 0x0 0x200>;
		reg-names = "ctrl" , "msg";
		xlnx,int-id = <66>;
		xlnx,bit-position = <6>;
		xlnx,name = "blp_cips_pspmc_0_psv_ipi_4";
		ipi_4_to_ipi_0: child@ff330000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <4>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f0ca0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <2>;
			reg = <0x0 0xff330000 0x0 0x10000 0x0 0xff3f0400 0x0 0x200>;
			xlnx,ipi-buf-index = <0x2>;
			xlnx,ipi-req-msg-buf = <0xff3f0c80>;
			reg-names = "ctrl" , "msg";
		};
		ipi_4_to_ipi_1: child@ff340000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <8>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f0ce0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <3>;
			reg = <0x0 0xff340000 0x0 0x10000 0x0 0xff3f0600 0x0 0x200>;
			xlnx,ipi-buf-index = <0x3>;
			xlnx,ipi-req-msg-buf = <0xff3f0cc0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_4_to_ipi_2: child@ff350000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <16>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f0d20>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <4>;
			reg = <0x0 0xff350000 0x0 0x10000 0x0 0xff3f0800 0x0 0x200>;
			xlnx,ipi-buf-index = <0x4>;
			xlnx,ipi-req-msg-buf = <0xff3f0d00>;
			reg-names = "ctrl" , "msg";
		};
		ipi_4_to_ipi_3: child@ff360000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <32>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f0d60>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <5>;
			reg = <0x0 0xff360000 0x0 0x10000 0x0 0xff3f0a00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x5>;
			xlnx,ipi-req-msg-buf = <0xff3f0d40>;
			reg-names = "ctrl" , "msg";
		};
		ipi_4_to_ipi_4: child@ff370000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <64>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f0da0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <6>;
			reg = <0x0 0xff370000 0x0 0x10000 0x0 0xff3f0c00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x6>;
			xlnx,ipi-req-msg-buf = <0xff3f0d80>;
			reg-names = "ctrl" , "msg";
		};
		ipi_4_to_ipi_5: child@ff380000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <128>;
			xlnx,cpu-name = "R5_1";
			xlnx,ipi-rsp-msg-buf = <0xff3f0de0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <7>;
			reg = <0x0 0xff380000 0x0 0x10000 0x0 0xff3f0e00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x7>;
			xlnx,ipi-req-msg-buf = <0xff3f0dc0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_4_to_ipi_6: child@ff3a0000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <512>;
			xlnx,cpu-name = "R5_1";
			#mbox-cells = <1>;
			xlnx,ipi-id = <9>;
			reg = <0x0 0xff3a0000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_4_to_ipi_pmc: child@ff320000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <2>;
			xlnx,cpu-name = "PMC";
			xlnx,ipi-rsp-msg-buf = <0xff3f0c60>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <1>;
			reg = <0x0 0xff320000 0x0 0x10000 0x0 0xff3f0200 0x0 0x200>;
			xlnx,ipi-buf-index = <0x1>;
			xlnx,ipi-req-msg-buf = <0xff3f0c40>;
			reg-names = "ctrl" , "msg";
		};
		ipi_4_to_ipi_pmc_nobuf: child@ff390000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <256>;
			xlnx,cpu-name = "PMC";
			#mbox-cells = <1>;
			xlnx,ipi-id = <8>;
			reg = <0x0 0xff390000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_4_to_ipi_psm: child@ff310000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <1>;
			xlnx,cpu-name = "PSM";
			xlnx,ipi-rsp-msg-buf = <0xff3f0c20>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <0>;
			reg = <0x0 0xff310000 0x0 0x10000 0x0 0xff3f0000 0x0 0x200>;
			xlnx,ipi-buf-index = <0x0>;
			xlnx,ipi-req-msg-buf = <0xff3f0c00>;
			reg-names = "ctrl" , "msg";
		};
	};
	&ipi5 {
		xlnx,cpu-name = "R5_1";
		xlnx,buffer-base = <0xff3f0e00>;
		status = "okay";
		xlnx,buffer-index = <0x7>;
		xlnx,ip-name = "psv_ipi";
		xlnx,ipi-target-count = <10>;
		reg = <0x0 0xff380000 0x0 0x10000 0x0 0xff3f0e00 0x0 0x200>;
		reg-names = "ctrl" , "msg";
		xlnx,int-id = <67>;
		xlnx,bit-position = <7>;
		xlnx,name = "blp_cips_pspmc_0_psv_ipi_5";
		ipi_5_to_ipi_0: child@ff330000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <4>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f0ea0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <2>;
			reg = <0x0 0xff330000 0x0 0x10000 0x0 0xff3f0400 0x0 0x200>;
			xlnx,ipi-buf-index = <0x2>;
			xlnx,ipi-req-msg-buf = <0xff3f0e80>;
			reg-names = "ctrl" , "msg";
		};
		ipi_5_to_ipi_1: child@ff340000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <8>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f0ee0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <3>;
			reg = <0x0 0xff340000 0x0 0x10000 0x0 0xff3f0600 0x0 0x200>;
			xlnx,ipi-buf-index = <0x3>;
			xlnx,ipi-req-msg-buf = <0xff3f0ec0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_5_to_ipi_2: child@ff350000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <16>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f0f20>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <4>;
			reg = <0x0 0xff350000 0x0 0x10000 0x0 0xff3f0800 0x0 0x200>;
			xlnx,ipi-buf-index = <0x4>;
			xlnx,ipi-req-msg-buf = <0xff3f0f00>;
			reg-names = "ctrl" , "msg";
		};
		ipi_5_to_ipi_3: child@ff360000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <32>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f0f60>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <5>;
			reg = <0x0 0xff360000 0x0 0x10000 0x0 0xff3f0a00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x5>;
			xlnx,ipi-req-msg-buf = <0xff3f0f40>;
			reg-names = "ctrl" , "msg";
		};
		ipi_5_to_ipi_4: child@ff370000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <64>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f0fa0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <6>;
			reg = <0x0 0xff370000 0x0 0x10000 0x0 0xff3f0c00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x6>;
			xlnx,ipi-req-msg-buf = <0xff3f0f80>;
			reg-names = "ctrl" , "msg";
		};
		ipi_5_to_ipi_5: child@ff380000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <128>;
			xlnx,cpu-name = "R5_1";
			xlnx,ipi-rsp-msg-buf = <0xff3f0fe0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <7>;
			reg = <0x0 0xff380000 0x0 0x10000 0x0 0xff3f0e00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x7>;
			xlnx,ipi-req-msg-buf = <0xff3f0fc0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_5_to_ipi_6: child@ff3a0000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <512>;
			xlnx,cpu-name = "R5_1";
			#mbox-cells = <1>;
			xlnx,ipi-id = <9>;
			reg = <0x0 0xff3a0000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_5_to_ipi_pmc: child@ff320000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <2>;
			xlnx,cpu-name = "PMC";
			xlnx,ipi-rsp-msg-buf = <0xff3f0e60>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <1>;
			reg = <0x0 0xff320000 0x0 0x10000 0x0 0xff3f0200 0x0 0x200>;
			xlnx,ipi-buf-index = <0x1>;
			xlnx,ipi-req-msg-buf = <0xff3f0e40>;
			reg-names = "ctrl" , "msg";
		};
		ipi_5_to_ipi_pmc_nobuf: child@ff390000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <256>;
			xlnx,cpu-name = "PMC";
			#mbox-cells = <1>;
			xlnx,ipi-id = <8>;
			reg = <0x0 0xff390000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_5_to_ipi_psm: child@ff310000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <1>;
			xlnx,cpu-name = "PSM";
			xlnx,ipi-rsp-msg-buf = <0xff3f0e20>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <0>;
			reg = <0x0 0xff310000 0x0 0x10000 0x0 0xff3f0000 0x0 0x200>;
			xlnx,ipi-buf-index = <0x0>;
			xlnx,ipi-req-msg-buf = <0xff3f0e00>;
			reg-names = "ctrl" , "msg";
		};
	};
	&ipi6 {
		xlnx,cpu-name = "R5_1";
		xlnx,buffer-base = "NIL";
		status = "okay";
		xlnx,buffer-index = "NIL";
		xlnx,ip-name = "psv_ipi";
		xlnx,ipi-target-count = <10>;
		reg = <0x0 0xff3a0000 0x0 0x10000>;
		reg-names = "ctrl";
		xlnx,int-id = <68>;
		xlnx,bit-position = <9>;
		xlnx,name = "blp_cips_pspmc_0_psv_ipi_6";
		ipi_6_to_ipi_0: child@ff330000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <4>;
			xlnx,cpu-name = "A72";
			#mbox-cells = <1>;
			xlnx,ipi-id = <2>;
			reg = <0x0 0xff330000 0x0 0x10000 0x0 0xff3f0400 0x0 0x200>;
			xlnx,ipi-buf-index = <0x2>;
			reg-names = "ctrl" , "msg";
		};
		ipi_6_to_ipi_1: child@ff340000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <8>;
			xlnx,cpu-name = "A72";
			#mbox-cells = <1>;
			xlnx,ipi-id = <3>;
			reg = <0x0 0xff340000 0x0 0x10000 0x0 0xff3f0600 0x0 0x200>;
			xlnx,ipi-buf-index = <0x3>;
			reg-names = "ctrl" , "msg";
		};
		ipi_6_to_ipi_2: child@ff350000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <16>;
			xlnx,cpu-name = "A72";
			#mbox-cells = <1>;
			xlnx,ipi-id = <4>;
			reg = <0x0 0xff350000 0x0 0x10000 0x0 0xff3f0800 0x0 0x200>;
			xlnx,ipi-buf-index = <0x4>;
			reg-names = "ctrl" , "msg";
		};
		ipi_6_to_ipi_3: child@ff360000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <32>;
			xlnx,cpu-name = "R5_0";
			#mbox-cells = <1>;
			xlnx,ipi-id = <5>;
			reg = <0x0 0xff360000 0x0 0x10000 0x0 0xff3f0a00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x5>;
			reg-names = "ctrl" , "msg";
		};
		ipi_6_to_ipi_4: child@ff370000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <64>;
			xlnx,cpu-name = "R5_0";
			#mbox-cells = <1>;
			xlnx,ipi-id = <6>;
			reg = <0x0 0xff370000 0x0 0x10000 0x0 0xff3f0c00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x6>;
			reg-names = "ctrl" , "msg";
		};
		ipi_6_to_ipi_5: child@ff380000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <128>;
			xlnx,cpu-name = "R5_1";
			#mbox-cells = <1>;
			xlnx,ipi-id = <7>;
			reg = <0x0 0xff380000 0x0 0x10000 0x0 0xff3f0e00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x7>;
			reg-names = "ctrl" , "msg";
		};
		ipi_6_to_ipi_6: child@ff3a0000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <512>;
			xlnx,cpu-name = "R5_1";
			#mbox-cells = <1>;
			xlnx,ipi-id = <9>;
			reg = <0x0 0xff3a0000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_6_to_ipi_pmc: child@ff320000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <2>;
			xlnx,cpu-name = "PMC";
			#mbox-cells = <1>;
			xlnx,ipi-id = <1>;
			reg = <0x0 0xff320000 0x0 0x10000 0x0 0xff3f0200 0x0 0x200>;
			xlnx,ipi-buf-index = <0x1>;
			reg-names = "ctrl" , "msg";
		};
		ipi_6_to_ipi_pmc_nobuf: child@ff390000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <256>;
			xlnx,cpu-name = "PMC";
			#mbox-cells = <1>;
			xlnx,ipi-id = <8>;
			reg = <0x0 0xff390000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_6_to_ipi_psm: child@ff310000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <1>;
			xlnx,cpu-name = "PSM";
			#mbox-cells = <1>;
			xlnx,ipi-id = <0>;
			reg = <0x0 0xff310000 0x0 0x10000 0x0 0xff3f0000 0x0 0x200>;
			xlnx,ipi-buf-index = <0x0>;
			reg-names = "ctrl" , "msg";
		};
	};
	&ipi_pmc {
		xlnx,cpu-name = "PMC";
		xlnx,buffer-base = <0xff3f0200>;
		status = "okay";
		xlnx,buffer-index = <0x1>;
		xlnx,ip-name = "psv_ipi";
		xlnx,ipi-target-count = <10>;
		reg = <0x0 0xff320000 0x0 0x10000 0x0 0xff3f0200 0x0 0x200>;
		reg-names = "ctrl" , "msg";
		xlnx,int-id = <59>;
		xlnx,bit-position = <1>;
		xlnx,name = "blp_cips_pspmc_0_psv_ipi_pmc";
		ipi_pmc_to_ipi_0: child@ff330000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <4>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f02a0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <2>;
			reg = <0x0 0xff330000 0x0 0x10000 0x0 0xff3f0400 0x0 0x200>;
			xlnx,ipi-buf-index = <0x2>;
			xlnx,ipi-req-msg-buf = <0xff3f0280>;
			reg-names = "ctrl" , "msg";
		};
		ipi_pmc_to_ipi_1: child@ff340000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <8>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f02e0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <3>;
			reg = <0x0 0xff340000 0x0 0x10000 0x0 0xff3f0600 0x0 0x200>;
			xlnx,ipi-buf-index = <0x3>;
			xlnx,ipi-req-msg-buf = <0xff3f02c0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_pmc_to_ipi_2: child@ff350000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <16>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f0320>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <4>;
			reg = <0x0 0xff350000 0x0 0x10000 0x0 0xff3f0800 0x0 0x200>;
			xlnx,ipi-buf-index = <0x4>;
			xlnx,ipi-req-msg-buf = <0xff3f0300>;
			reg-names = "ctrl" , "msg";
		};
		ipi_pmc_to_ipi_3: child@ff360000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <32>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f0360>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <5>;
			reg = <0x0 0xff360000 0x0 0x10000 0x0 0xff3f0a00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x5>;
			xlnx,ipi-req-msg-buf = <0xff3f0340>;
			reg-names = "ctrl" , "msg";
		};
		ipi_pmc_to_ipi_4: child@ff370000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <64>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f03a0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <6>;
			reg = <0x0 0xff370000 0x0 0x10000 0x0 0xff3f0c00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x6>;
			xlnx,ipi-req-msg-buf = <0xff3f0380>;
			reg-names = "ctrl" , "msg";
		};
		ipi_pmc_to_ipi_5: child@ff380000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <128>;
			xlnx,cpu-name = "R5_1";
			xlnx,ipi-rsp-msg-buf = <0xff3f03e0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <7>;
			reg = <0x0 0xff380000 0x0 0x10000 0x0 0xff3f0e00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x7>;
			xlnx,ipi-req-msg-buf = <0xff3f03c0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_pmc_to_ipi_6: child@ff3a0000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <512>;
			xlnx,cpu-name = "R5_1";
			#mbox-cells = <1>;
			xlnx,ipi-id = <9>;
			reg = <0x0 0xff3a0000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_pmc_to_ipi_pmc: child@ff320000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <2>;
			xlnx,cpu-name = "PMC";
			xlnx,ipi-rsp-msg-buf = <0xff3f0260>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <1>;
			reg = <0x0 0xff320000 0x0 0x10000 0x0 0xff3f0200 0x0 0x200>;
			xlnx,ipi-buf-index = <0x1>;
			xlnx,ipi-req-msg-buf = <0xff3f0240>;
			reg-names = "ctrl" , "msg";
		};
		ipi_pmc_to_ipi_pmc_nobuf: child@ff390000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <256>;
			xlnx,cpu-name = "PMC";
			#mbox-cells = <1>;
			xlnx,ipi-id = <8>;
			reg = <0x0 0xff390000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_pmc_to_ipi_psm: child@ff310000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <1>;
			xlnx,cpu-name = "PSM";
			xlnx,ipi-rsp-msg-buf = <0xff3f0220>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <0>;
			reg = <0x0 0xff310000 0x0 0x10000 0x0 0xff3f0000 0x0 0x200>;
			xlnx,ipi-buf-index = <0x0>;
			xlnx,ipi-req-msg-buf = <0xff3f0200>;
			reg-names = "ctrl" , "msg";
		};
	};
	&ipi_pmc_nobuf {
		xlnx,cpu-name = "PMC";
		xlnx,buffer-base = "NIL";
		status = "okay";
		xlnx,buffer-index = "NIL";
		xlnx,ip-name = "psv_ipi";
		xlnx,ipi-target-count = <10>;
		reg = <0x0 0xff390000 0x0 0x10000>;
		reg-names = "ctrl";
		xlnx,int-id = <60>;
		xlnx,bit-position = <8>;
		xlnx,name = "blp_cips_pspmc_0_psv_ipi_pmc_nobuf";
		ipi_pmc_nobuf_to_ipi_0: child@ff330000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <4>;
			xlnx,cpu-name = "A72";
			#mbox-cells = <1>;
			xlnx,ipi-id = <2>;
			reg = <0x0 0xff330000 0x0 0x10000 0x0 0xff3f0400 0x0 0x200>;
			xlnx,ipi-buf-index = <0x2>;
			reg-names = "ctrl" , "msg";
		};
		ipi_pmc_nobuf_to_ipi_1: child@ff340000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <8>;
			xlnx,cpu-name = "A72";
			#mbox-cells = <1>;
			xlnx,ipi-id = <3>;
			reg = <0x0 0xff340000 0x0 0x10000 0x0 0xff3f0600 0x0 0x200>;
			xlnx,ipi-buf-index = <0x3>;
			reg-names = "ctrl" , "msg";
		};
		ipi_pmc_nobuf_to_ipi_2: child@ff350000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <16>;
			xlnx,cpu-name = "A72";
			#mbox-cells = <1>;
			xlnx,ipi-id = <4>;
			reg = <0x0 0xff350000 0x0 0x10000 0x0 0xff3f0800 0x0 0x200>;
			xlnx,ipi-buf-index = <0x4>;
			reg-names = "ctrl" , "msg";
		};
		ipi_pmc_nobuf_to_ipi_3: child@ff360000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <32>;
			xlnx,cpu-name = "R5_0";
			#mbox-cells = <1>;
			xlnx,ipi-id = <5>;
			reg = <0x0 0xff360000 0x0 0x10000 0x0 0xff3f0a00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x5>;
			reg-names = "ctrl" , "msg";
		};
		ipi_pmc_nobuf_to_ipi_4: child@ff370000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <64>;
			xlnx,cpu-name = "R5_0";
			#mbox-cells = <1>;
			xlnx,ipi-id = <6>;
			reg = <0x0 0xff370000 0x0 0x10000 0x0 0xff3f0c00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x6>;
			reg-names = "ctrl" , "msg";
		};
		ipi_pmc_nobuf_to_ipi_5: child@ff380000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <128>;
			xlnx,cpu-name = "R5_1";
			#mbox-cells = <1>;
			xlnx,ipi-id = <7>;
			reg = <0x0 0xff380000 0x0 0x10000 0x0 0xff3f0e00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x7>;
			reg-names = "ctrl" , "msg";
		};
		ipi_pmc_nobuf_to_ipi_6: child@ff3a0000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <512>;
			xlnx,cpu-name = "R5_1";
			#mbox-cells = <1>;
			xlnx,ipi-id = <9>;
			reg = <0x0 0xff3a0000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_pmc_nobuf_to_ipi_pmc: child@ff320000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <2>;
			xlnx,cpu-name = "PMC";
			#mbox-cells = <1>;
			xlnx,ipi-id = <1>;
			reg = <0x0 0xff320000 0x0 0x10000 0x0 0xff3f0200 0x0 0x200>;
			xlnx,ipi-buf-index = <0x1>;
			reg-names = "ctrl" , "msg";
		};
		ipi_pmc_nobuf_to_ipi_pmc_nobuf: child@ff390000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <256>;
			xlnx,cpu-name = "PMC";
			#mbox-cells = <1>;
			xlnx,ipi-id = <8>;
			reg = <0x0 0xff390000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_pmc_nobuf_to_ipi_psm: child@ff310000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <1>;
			xlnx,cpu-name = "PSM";
			#mbox-cells = <1>;
			xlnx,ipi-id = <0>;
			reg = <0x0 0xff310000 0x0 0x10000 0x0 0xff3f0000 0x0 0x200>;
			xlnx,ipi-buf-index = <0x0>;
			reg-names = "ctrl" , "msg";
		};
	};
	&ipi_psm {
		xlnx,cpu-name = "PSM";
		xlnx,buffer-base = <0xff3f0000>;
		status = "okay";
		xlnx,buffer-index = <0x0>;
		xlnx,ip-name = "psv_ipi";
		xlnx,ipi-target-count = <10>;
		reg = <0x0 0xff310000 0x0 0x10000 0x0 0xff3f0000 0x0 0x200>;
		reg-names = "ctrl" , "msg";
		xlnx,int-id = <61>;
		xlnx,bit-position = <0>;
		xlnx,name = "blp_cips_pspmc_0_psv_ipi_psm";
		ipi_psm_to_ipi_0: child@ff330000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <4>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f00a0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <2>;
			reg = <0x0 0xff330000 0x0 0x10000 0x0 0xff3f0400 0x0 0x200>;
			xlnx,ipi-buf-index = <0x2>;
			xlnx,ipi-req-msg-buf = <0xff3f0080>;
			reg-names = "ctrl" , "msg";
		};
		ipi_psm_to_ipi_1: child@ff340000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <8>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f00e0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <3>;
			reg = <0x0 0xff340000 0x0 0x10000 0x0 0xff3f0600 0x0 0x200>;
			xlnx,ipi-buf-index = <0x3>;
			xlnx,ipi-req-msg-buf = <0xff3f00c0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_psm_to_ipi_2: child@ff350000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <16>;
			xlnx,cpu-name = "A72";
			xlnx,ipi-rsp-msg-buf = <0xff3f0120>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <4>;
			reg = <0x0 0xff350000 0x0 0x10000 0x0 0xff3f0800 0x0 0x200>;
			xlnx,ipi-buf-index = <0x4>;
			xlnx,ipi-req-msg-buf = <0xff3f0100>;
			reg-names = "ctrl" , "msg";
		};
		ipi_psm_to_ipi_3: child@ff360000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <32>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f0160>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <5>;
			reg = <0x0 0xff360000 0x0 0x10000 0x0 0xff3f0a00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x5>;
			xlnx,ipi-req-msg-buf = <0xff3f0140>;
			reg-names = "ctrl" , "msg";
		};
		ipi_psm_to_ipi_4: child@ff370000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <64>;
			xlnx,cpu-name = "R5_0";
			xlnx,ipi-rsp-msg-buf = <0xff3f01a0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <6>;
			reg = <0x0 0xff370000 0x0 0x10000 0x0 0xff3f0c00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x6>;
			xlnx,ipi-req-msg-buf = <0xff3f0180>;
			reg-names = "ctrl" , "msg";
		};
		ipi_psm_to_ipi_5: child@ff380000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <128>;
			xlnx,cpu-name = "R5_1";
			xlnx,ipi-rsp-msg-buf = <0xff3f01e0>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <7>;
			reg = <0x0 0xff380000 0x0 0x10000 0x0 0xff3f0e00 0x0 0x200>;
			xlnx,ipi-buf-index = <0x7>;
			xlnx,ipi-req-msg-buf = <0xff3f01c0>;
			reg-names = "ctrl" , "msg";
		};
		ipi_psm_to_ipi_6: child@ff3a0000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <512>;
			xlnx,cpu-name = "R5_1";
			#mbox-cells = <1>;
			xlnx,ipi-id = <9>;
			reg = <0x0 0xff3a0000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_psm_to_ipi_pmc: child@ff320000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <2>;
			xlnx,cpu-name = "PMC";
			xlnx,ipi-rsp-msg-buf = <0xff3f0060>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <1>;
			reg = <0x0 0xff320000 0x0 0x10000 0x0 0xff3f0200 0x0 0x200>;
			xlnx,ipi-buf-index = <0x1>;
			xlnx,ipi-req-msg-buf = <0xff3f0040>;
			reg-names = "ctrl" , "msg";
		};
		ipi_psm_to_ipi_pmc_nobuf: child@ff390000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <256>;
			xlnx,cpu-name = "PMC";
			#mbox-cells = <1>;
			xlnx,ipi-id = <8>;
			reg = <0x0 0xff390000 0x0 0x10000>;
			xlnx,ipi-buf-index = <0xffff>;
			reg-names = "ctrl";
		};
		ipi_psm_to_ipi_psm: child@ff310000 {
			compatible = "xlnx,versal-ipi-dest-mailbox";
			xlnx,ipi-bitmask = <1>;
			xlnx,cpu-name = "PSM";
			xlnx,ipi-rsp-msg-buf = <0xff3f0020>;
			#mbox-cells = <1>;
			xlnx,ipi-id = <0>;
			reg = <0x0 0xff310000 0x0 0x10000 0x0 0xff3f0000 0x0 0x200>;
			xlnx,ipi-buf-index = <0x0>;
			xlnx,ipi-req-msg-buf = <0xff3f0000>;
			reg-names = "ctrl" , "msg";
		};
	};
	&lpd_xppu {
		status = "okay";
		xlnx,ip-name = "psv_lpd_xppu";
		xlnx,name = "blp_cips_pspmc_0_psv_lpd_xppu_0";
	};
	&ocm_xmpu {
		status = "okay";
		xlnx,ip-name = "psv_ocm_xmpu";
		xlnx,name = "blp_cips_pspmc_0_psv_ocm_xmpu_0";
	};
	&pmc_cfi_cframe_0 {
		status = "okay";
		xlnx,ip-name = "psv_pmc_cfi_cframe";
		xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfi_cframe_0";
	};
	&pmc_cfu_apb_0 {
		status = "okay";
		xlnx,ip-name = "psv_pmc_cfu_apb";
		xlnx,name = "blp_cips_pspmc_0_psv_pmc_cfu_apb_0";
	};
	&dma0 {
		status = "okay";
		xlnx,ip-name = "psv_pmc_dma";
		xlnx,name = "blp_cips_pspmc_0_psv_pmc_dma_0";
	};
	&dma1 {
		status = "okay";
		xlnx,ip-name = "psv_pmc_dma";
		xlnx,name = "blp_cips_pspmc_0_psv_pmc_dma_1";
	};
	&gpio1 {
		status = "okay";
		xlnx,ip-name = "psv_pmc_gpio";
		xlnx,pmc-gpio-emio-peripheral-enable = <0>;
		xlnx,name = "blp_cips_pspmc_0_psv_pmc_gpio_0";
	};
	&i2c2 {
		status = "okay";
		xlnx,clock-freq = <99999901>;
		xlnx,i2c-clk-freq-hz = <99999901>;
		xlnx,ip-name = "psv_pmc_i2c";
		xlnx,name = "blp_cips_pspmc_0_psv_pmc_i2c_0";
	};
	&iomodule0 {
		xlnx,gpo4-size = <32>;
		xlnx,tmr = <0>;
		xlnx,pit1-readable = <1>;
		xlnx,mask = <0xfffff000>;
		xlnx,pit-size = < 32 32 32 32 >;
		xlnx,pit2-prescaler = <0>;
		xlnx,gpi3-interrupt = <0>;
		xlnx,intc-level-edge = <0x7fff>;
		xlnx,intc-positive = <0xffff>;
		xlnx,ip-name = "iomodule";
		xlnx,gpo1-size = <3>;
		xlnx,max-intr-size = <32>;
		xlnx,pit3-size = <32>;
		xlnx,fit3-interrupt = <0>;
		xlnx,fit1-no-clocks = <6216>;
		xlnx,gpi2-size = <32>;
		xlnx,pit2-readable = <1>;
		xlnx,intc-irq-connection = <0>;
		xlnx,uart-tx-interrupt = <1>;
		xlnx,use-config-reset = <0>;
		xlnx,pit2-interrupt = <1>;
		xlnx,intc-base-vectors = <0xf0240000>;
		xlnx,gpo4-init = <0x0>;
		xlnx,pit3-readable = <1>;
		xlnx,pit3-prescaler = <9>;
		xlnx,gpi4-interrupt = <0>;
		xlnx,gpo1-init = <0x0>;
		xlnx,use-io-bus = <0>;
		xlnx,use-gpo1 = <1>;
		xlnx,uart-baudrate = <115200>;
		xlnx,fit4-interrupt = <0>;
		xlnx,gpo3-size = <32>;
		xlnx,use-gpo2 = <0>;
		xlnx,uart-data-bits = <8>;
		xlnx,pit-prescaler = < 9 0 9 0 >;
		xlnx,gpio1-board-interface = "Custom";
		xlnx,use-gpo3 = <0>;
		xlnx,fit2-no-clocks = <6216>;
		xlnx,options = <1>;
		xlnx,gpio2-board-interface = "Custom";
		xlnx,use-gpo4 = <0>;
		xlnx,gpi4-size = <32>;
		xlnx,gpio3-board-interface = "Custom";
		xlnx,uart-rx-interrupt = <1>;
		xlnx,uart-error-interrupt = <1>;
		xlnx,gpio4-board-interface = "Custom";
		xlnx,pit4-readable = <1>;
		status = "okay";
		xlnx,intc-use-irq-out = <0>;
		xlnx,clock-freq = <100000000>;
		xlnx,gpo-init = < 0 0 0 0 >;
		xlnx,use-board-flow;
		xlnx,pit2-size = <32>;
		xlnx,intc-intr-size = <16>;
		xlnx,intc-use-ext-intr = <1>;
		xlnx,name = "blp_cips_pspmc_0_psv_pmc_iomodule_0";
		xlnx,gpi1-size = <32>;
		xlnx,edk-special = "INTR_CTRL";
		xlnx,pit3-interrupt = <1>;
		xlnx,intc-has-fast = <0>;
		xlnx,pit-used = < 1 1 1 1 >;
		xlnx,use-gpi1 = <0>;
		xlnx,gpi1-interrupt = <0>;
		xlnx,use-gpi2 = <0>;
		xlnx,use-gpi3 = <0>;
		xlnx,use-gpi4 = <0>;
		xlnx,fit1-interrupt = <0>;
		xlnx,pit4-prescaler = <0>;
		xlnx,gpo3-init = <0x0>;
		xlnx,intc-addr-width = <32>;
		xlnx,edk-iptype = "PERIPHERAL";
		xlnx,fit3-no-clocks = <6216>;
		xlnx,use-uart-rx = <1>;
		xlnx,instance = "iomodule_0";
		xlnx,pit-mask = <0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>;
		xlnx,uart-prog-baudrate = <1>;
		xlnx,use-pit1 = <1>;
		xlnx,gpo2-size = <32>;
		xlnx,use-pit2 = <1>;
		xlnx,pit4-size = <32>;
		xlnx,pit-readable = < 1 1 1 1 >;
		xlnx,use-pit3 = <1>;
		xlnx,use-pit4 = <1>;
		xlnx,pit4-interrupt = <1>;
		xlnx,gpi3-size = <32>;
		xlnx,intc-async-intr = <0xffff>;
		xlnx,avoid-primitives = <0>;
		xlnx,gpi2-interrupt = <0>;
		xlnx,pit1-prescaler = <9>;
		xlnx,use-tmr-disable = <0>;
		xlnx,use-fit1 = <0>;
		xlnx,pit1-size = <32>;
		xlnx,intc-num-sync-ff = <2>;
		xlnx,uart-board-interface = "rs232_uart";
		xlnx,use-fit2 = <0>;
		xlnx,fit2-interrupt = <0>;
		xlnx,use-fit3 = <0>;
		xlnx,use-fit4 = <0>;
		xlnx,io-baseaddr = <0xffffffff 0xffffffff>;
		xlnx,uart-use-parity = <0>;
		xlnx,lmb-dwidth = <32>;
		xlnx,fit4-no-clocks = <6216>;
		xlnx,uart-odd-parity = <0>;
		xlnx,freq = <100000000>;
		xlnx,use-uart-tx = <1>;
		xlnx,pit1-interrupt = <1>;
		xlnx,gpo2-init = <0x0>;
		xlnx,io-mask = <0xfffe0000>;
		xlnx,lmb-awidth = <32>;
	};
	&ospi {
		is-stacked = <0>;
		xlnx,is-cache-coherent = <0>;
		status = "okay";
		xlnx,clock-freq = <164285553>;
		xlnx,ip-name = "psv_pmc_ospi";
		xlnx,ospi-clk-freq-hz = <164285553>;
		is-dual = <0>;
		xlnx,ospi-mode = <0>;
		xlnx,name = "blp_cips_pspmc_0_psv_pmc_ospi_0";
	};
	&pmc_ppu1_mdm_0 {
		status = "okay";
		xlnx,ip-name = "psv_pmc_ppu1_mdm";
		xlnx,name = "blp_cips_pspmc_0_psv_pmc_ppu1_mdm_0";
	};
	&rtc {
		status = "okay";
		xlnx,ip-name = "psv_pmc_rtc";
		xlnx,name = "blp_cips_pspmc_0_psv_pmc_rtc_0";
	};
	&sysmon0 {
		xlnx,sat-63-desc = "PS , FPD , satellite";
		xlnx,sat-1-desc = "PMC , system , ADC";
		xlnx,sat-9-x = <2786>;
		xlnx,sat-9-y = <10501>;
		xlnx,meas-0-root-id = <1>;
		xlnx,meas-7-slr-number = <0>;
		xlnx,meas-10-root-id = <0>;
		xlnx,ip-name = "psv_pmc_sysmon";
		xlnx,meas-1-root-id = <5>;
		#size-cells = <2>;
		xlnx,meas-2-root-id = <8>;
		xlnx,meas-2-slr-number = <0>;
		xlnx,meas-3-root-id = <10>;
		xlnx,sat-9-desc = "ME , satellite";
		xlnx,meas-4-root-id = <7>;
		#io-channel-cells = <1>;
		#address-cells = <2>;
		xlnx,meas-5-root-id = <2>;
		xlnx,sat-10-x = <793>;
		xlnx,sat-64-x = <35>;
		xlnx,sat-2-x = <35>;
		xlnx,meas-6-root-id = <3>;
		xlnx,sat-10-y = <10501>;
		xlnx,sat-64-y = <2868>;
		xlnx,sat-2-y = <2868>;
		xlnx,meas-7-root-id = <4>;
		xlnx,sat-13-desc = "Clocking , column , satellite";
		xlnx,meas-8-root-id = <6>;
		xlnx,sat-6-desc = "VNOC , satellite";
		xlnx,meas-9-root-id = <9>;
		xlnx,sat-6-x = <6711>;
		xlnx,sat-6-y = <6649>;
		xlnx,sat-10-desc = "ME , satellite";
		xlnx,sat-3-desc = "XPIO , satellite";
		xlnx,meas-5-slr-number = <0>;
		xlnx,meas-10-aux-io-n = "LPD_MIO25_502";
		xlnx,meas-0-slr-number = <0>;
		xlnx,meas-10-aux-io-p = "LPD_MIO24_502";
		xlnx,sat-11-x = <2574>;
		xlnx,sat-3-x = <4458>;
		xlnx,sat-11-y = <9212>;
		xlnx,sat-3-y = <1535>;
		status = "okay";
		xlnx,meas-8-slr-number = <0>;
		xlnx,sat-8-desc = "ME , satellite";
		xlnx,sat-7-x = <6772>;
		xlnx,name = "blp_cips_pspmc_0_psv_pmc_sysmon_0";
		xlnx,sat-7-y = <10501>;
		xlnx,meas-3-slr-number = <0>;
		xlnx,sat-12-desc = "Clocking , column , satellite";
		xlnx,sat-5-desc = "VNOC , satellite";
		xlnx,sat-64-desc = "PS , LPD , satellite";
		xlnx,sat-2-desc = "PMC , user , ADC";
		xlnx,meas-6-slr-number = <0>;
		xlnx,sat-12-x = <2574>;
		xlnx,sat-4-x = <7500>;
		xlnx,sat-12-y = <7620>;
		xlnx,sat-4-y = <1535>;
		xlnx,meas-10-slr-number = <0>;
		xlnx,meas-1-slr-number = <0>;
		xlnx,sat-8-x = <4779>;
		xlnx,sat-8-y = <10501>;
		xlnx,meas-0 = "VCCAUX";
		xlnx,meas-10 = "VAUX_CH0";
		xlnx,meas-1 = "VCC_SOC";
		xlnx,meas-2 = "VCCO_302";
		xlnx,meas-3 = "VCCAUX_PMC";
		xlnx,meas-4 = "VCCO_500";
		xlnx,sat-7-desc = "ME , satellite";
		xlnx,meas-5 = "VCC_PMC";
		xlnx,meas-9-slr-number = <0>;
		xlnx,meas-6 = "VCC_PSFP";
		xlnx,meas-7 = "VCC_PSLP";
		xlnx,sat-63-x = <35>;
		xlnx,sat-1-x = <35>;
		xlnx,meas-4-slr-number = <0>;
		xlnx,meas-8 = "VP_VN";
		xlnx,sat-11-desc = "Clocking , column , satellite";
		xlnx,numchannels = /bits/8 <11>;
		xlnx,sat-63-y = <2868>;
		xlnx,sat-1-y = <2868>;
		xlnx,meas-9 = "VCCO_703";
		xlnx,sat-4-desc = "XPIO , satellite";
		xlnx,sat-13-x = <2574>;
		xlnx,sat-5-x = <6711>;
		xlnx,sat-13-y = <6037>;
		xlnx,sat-5-y = <3590>;
		supply@1 {
			reg = <1>;
			xlnx,name = "vccaux";
		};
		supply@5 {
			reg = <5>;
			xlnx,name = "vcc_soc";
		};
		supply@8 {
			reg = <8>;
			xlnx,name = "vcco_302";
		};
		supply@10 {
			reg = <10>;
			xlnx,name = "vccaux_pmc";
		};
		supply@7 {
			reg = <7>;
			xlnx,name = "vcco_500";
		};
		supply@2 {
			reg = <2>;
			xlnx,name = "vcc_pmc";
		};
		supply@3 {
			reg = <3>;
			xlnx,name = "vcc_psfp";
		};
		supply@4 {
			reg = <4>;
			xlnx,name = "vcc_pslp";
		};
		supply@6 {
			reg = <6>;
			xlnx,name = "vp_vn";
		};
		supply@9 {
			reg = <9>;
			xlnx,name = "vcco_703";
		};
		supply@0 {
			reg = <0>;
			xlnx,name = "vaux_ch0";
		};
	};
	&trng {
		xlnx,device-id = <0>;
		status = "okay";
		xlnx,ip-name = "psv_pmc_trng";
		xlnx,name = "blp_cips_pspmc_0_psv_pmc_trng";
	};
	&pmc_xmpu {
		status = "okay";
		xlnx,ip-name = "psv_pmc_xmpu";
		xlnx,name = "blp_cips_pspmc_0_psv_pmc_xmpu_0";
	};
	&pmc_xppu {
		status = "okay";
		xlnx,ip-name = "psv_pmc_xppu";
		xlnx,name = "blp_cips_pspmc_0_psv_pmc_xppu_0";
	};
	&pmc_xppu_npi {
		status = "okay";
		xlnx,ip-name = "psv_pmc_xppu_npi";
		xlnx,name = "blp_cips_pspmc_0_psv_pmc_xppu_npi_0";
	};
	&psv_r5_0_btcm_global {
		status = "okay";
		power-domains = <&versal_firmware 0x1831800c>;
		xlnx,ip-name = "psv_tcm_global";
		xlnx,name = "blp_cips_pspmc_0_psv_r5_0_btcm_global";
	};
	&psv_r5_1_atcm_global {
		status = "okay";
		power-domains = <&versal_firmware 0x1831800d>;
		xlnx,ip-name = "psv_tcm_global";
		xlnx,name = "blp_cips_pspmc_0_psv_r5_1_atcm_global";
	};
	&psv_r5_1_btcm_global {
		status = "okay";
		power-domains = <&versal_firmware 0x1831800e>;
		xlnx,ip-name = "psv_tcm_global";
		xlnx,name = "blp_cips_pspmc_0_psv_r5_1_btcm_global";
	};
	&psv_r5_0_atcm_global {
		status = "okay";
		power-domains = <&versal_firmware 0x1831800b>;
		xlnx,ip-name = "psv_tcm_global";
		xlnx,name = "blp_cips_pspmc_0_psv_r5_0_atcm_global";
	};
	&gic_a72 {
		status = "okay";
		xlnx,apu-gic-its-ctl = <0xf9020000>;
		xlnx,ip-name = "psv_acpu_gic";
		xlnx,name = "blp_cips_pspmc_0_psv_acpu_gic";
	};
	&gic_r5 {
		status = "okay";
		xlnx,ip-name = "psv_rcpu_gic";
		xlnx,name = "blp_cips_pspmc_0_psv_rcpu_gic";
	};
	&serial0 {
		xlnx,has-modem = <0>;
		xlnx,uart-clk-freq-hz = <99999908>;
		port-number = <0>;
		xlnx,ip-name = "psv_sbsauart";
		xlnx,uart-board-interface = "custom";
		xlnx,baudrate = <115200>;
		cts-override;
		u-boot,dm-pre-reloc;
		device_type = "serial";
		status = "okay";
		xlnx,clock-freq = <99999908>;
		xlnx,name = "blp_cips_pspmc_0_psv_sbsauart_0";
	};
	&serial1 {
		xlnx,has-modem = <0>;
		xlnx,uart-clk-freq-hz = <99999908>;
		port-number = <0>;
		xlnx,ip-name = "psv_sbsauart";
		xlnx,uart-board-interface = "custom";
		xlnx,baudrate = <115200>;
		cts-override;
		u-boot,dm-pre-reloc;
		device_type = "serial";
		status = "okay";
		xlnx,clock-freq = <99999908>;
		xlnx,name = "blp_cips_pspmc_0_psv_sbsauart_1";
	};
	&spi0 {
		status = "okay";
		xlnx,spi-board-interface = "custom";
		xlnx,has-ss0 = <1>;
		xlnx,ip-name = "psv_spi";
		xlnx,has-ss1 = <0>;
		num-cs = <1>;
		xlnx,spi-clk-freq-hz = <199999817>;
		xlnx,has-ss2 = <0>;
		xlnx,name = "blp_cips_pspmc_0_psv_spi_0";
	};
	&ttc0 {
		xlnx,ttc-board-interface = "custom";
		xlnx,ttc-clk2-freq-hz = <145454407>;
		xlnx,ttc-clk1-clksrc = <0>;
		status = "okay";
		xlnx,clock-freq = <145454407>;
		xlnx,ttc-clk2-clksrc = <0>;
		xlnx,ip-name = "psv_ttc";
		xlnx,ttc-clk0-freq-hz = <145454407>;
		xlnx,ttc-clk1-freq-hz = <145454407>;
		xlnx,ttc-clk0-clksrc = <0>;
		xlnx,name = "blp_cips_pspmc_0_psv_ttc_0";
	};
	&ttc1 {
		xlnx,ttc-board-interface = "custom";
		xlnx,ttc-clk2-freq-hz = <145454407>;
		xlnx,ttc-clk1-clksrc = <0>;
		status = "okay";
		xlnx,clock-freq = <145454407>;
		xlnx,ttc-clk2-clksrc = <0>;
		xlnx,ip-name = "psv_ttc";
		xlnx,ttc-clk0-freq-hz = <145454407>;
		xlnx,ttc-clk1-freq-hz = <145454407>;
		xlnx,ttc-clk0-clksrc = <0>;
		xlnx,name = "blp_cips_pspmc_0_psv_ttc_1";
	};
	&ttc2 {
		xlnx,ttc-board-interface = "custom";
		xlnx,ttc-clk2-freq-hz = <145454407>;
		xlnx,ttc-clk1-clksrc = <0>;
		status = "okay";
		xlnx,clock-freq = <145454407>;
		xlnx,ttc-clk2-clksrc = <0>;
		xlnx,ip-name = "psv_ttc";
		xlnx,ttc-clk0-freq-hz = <145454407>;
		xlnx,ttc-clk1-freq-hz = <145454407>;
		xlnx,ttc-clk0-clksrc = <0>;
		xlnx,name = "blp_cips_pspmc_0_psv_ttc_2";
	};
	&ttc3 {
		xlnx,ttc-board-interface = "custom";
		xlnx,ttc-clk2-freq-hz = <145454407>;
		xlnx,ttc-clk1-clksrc = <0>;
		status = "okay";
		xlnx,clock-freq = <145454407>;
		xlnx,ttc-clk2-clksrc = <0>;
		xlnx,ip-name = "psv_ttc";
		xlnx,ttc-clk0-freq-hz = <145454407>;
		xlnx,ttc-clk1-freq-hz = <145454407>;
		xlnx,ttc-clk0-clksrc = <0>;
		xlnx,name = "blp_cips_pspmc_0_psv_ttc_3";
	};
	&gic_its {
		status = "okay";
	};
	&sensor0 {
		io-channels = <&sysmon0 11>;
		io-channel-names = "sysmon-temp-channel";
	};
	&ref {
		clock-frequency = <33333300>;
	};
	&cpu_opp_table {
		/delete-node/ opp01;
		/delete-node/ opp02;
		/delete-node/ opp03;
		/delete-node/ opp00;
		opp-1350000000 {
			opp-hz = /bits/ 64 <1350000000>;
			clock-latency-ns = <500000>;
			opp-microvolt = <1000000>;
		};
		opp-675000000 {
			opp-hz = /bits/ 64 <675000000>;
			clock-latency-ns = <500000>;
			opp-microvolt = <1000000>;
		};
		opp-450000000 {
			opp-hz = /bits/ 64 <450000000>;
			clock-latency-ns = <500000>;
			opp-microvolt = <1000000>;
		};
		opp-337500000 {
			opp-hz = /bits/ 64 <337500000>;
			clock-latency-ns = <500000>;
			opp-microvolt = <1000000>;
		};
	};
	&psv_cortexr5_0 {
		xlnx,is-cache-coherent = <0>;
		xlnx,pss-ref-clk-freq = <33333300>;
		xlnx,ip-name = "psv_cortexr5";
		access-val = <0xff>;
		bus-handle = <&amba>;
		xlnx,cpu-clk-freq-hz = <574999451>;
		cpu-frequency = <574999451>;
	};
	&psv_cortexr5_1 {
		xlnx,is-cache-coherent = <0>;
		xlnx,pss-ref-clk-freq = <33333300>;
		xlnx,ip-name = "psv_cortexr5";
		access-val = <0xff>;
		bus-handle = <&amba>;
		xlnx,cpu-clk-freq-hz = <574999451>;
		cpu-frequency = <574999451>;
	};
