/* Generated automatically by the program `genattrtab'
   from the machine description file `md'.  */

#define IN_TARGET_CODE 1
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "backend.h"
#include "predict.h"
#include "tree.h"
#include "rtl.h"
#include "alias.h"
#include "options.h"
#include "varasm.h"
#include "stor-layout.h"
#include "calls.h"
#include "insn-attr.h"
#include "memmodel.h"
#include "tm_p.h"
#include "insn-config.h"
#include "recog.h"
#include "regs.h"
#include "real.h"
#include "output.h"
#include "toplev.h"
#include "flags.h"
#include "emit-rtl.h"

#define operands recog_data.operand

int
insn_default_latency (rtx_insn *insn ATTRIBUTE_UNUSED)
{
  enum attr_type cached_type ATTRIBUTE_UNUSED;
  enum attr_mode cached_mode ATTRIBUTE_UNUSED;

  switch (recog_memoized (insn))
    {
    case 362:  /* *zero_extendhidi2_zbb */
    case 361:  /* *zero_extendhisi2_zbb */
    case 360:  /* *extendhidi2_zbb */
    case 359:  /* *extendhisi2_zbb */
    case 358:  /* *extendhihi2_zbb */
    case 357:  /* *extendqidi2_zbb */
    case 356:  /* *extendqisi2_zbb */
    case 355:  /* *extendqihi2_zbb */
    case 354:  /* *zero_extendhidi2_bitmanip */
    case 353:  /* *zero_extendhisi2_bitmanip */
    case 331:  /* *zero_extendsidi2_bitmanip */
      extract_constrain_insn_cached (insn);
      if ((which_alternative == 1) && ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) || (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7))))))
        {
	  return 3;
        }
      else
        {
	  return 0;
        }

    case 245:  /* *movdidicc */
    case 244:  /* *movsidicc */
    case 243:  /* *movsisicc */
      if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7))))
        {
	  return 2;
        }
      else
        {
	  return 0;
        }

    case 612:  /* *th_mempair_store_di2 */
    case 611:  /* *th_mempair_store_si2 */
    case 301:  /* nop */
    case 300:  /* call_value_internal */
    case 299:  /* call_internal */
    case 298:  /* sibcall_value_internal */
    case 297:  /* sibcall_internal */
    case 293:  /* simple_return_internal */
    case 292:  /* simple_return */
    case 290:  /* tablejumpdi */
    case 289:  /* tablejumpsi */
    case 288:  /* indirect_jumpdi */
    case 287:  /* indirect_jumpsi */
    case 286:  /* jump */
    case 242:  /* *branchdi */
    case 241:  /* *branchsi */
    case 173:  /* auipcdi */
    case 172:  /* auipcsi */
      if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) || (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))))
        {
	  return 1;
        }
      else
        {
	  return 0;
        }

    case 614:  /* *th_mempair_load_zero_extendsidi2 */
    case 613:  /* *th_mempair_load_extendsidi2 */
    case 610:  /* *th_mempair_load_di2 */
    case 609:  /* *th_mempair_load_si2 */
    case 310:  /* *riscv_fsnvsnanhf2 */
    case 309:  /* *riscv_fsnvsnandf2 */
    case 308:  /* *riscv_fsnvsnansf2 */
    case 255:  /* *cstorehfdi4 */
    case 254:  /* *cstorehfsi4 */
    case 253:  /* *cstoredfdi4 */
    case 252:  /* *cstoredfsi4 */
    case 251:  /* *cstoresfdi4 */
    case 250:  /* *cstoresfsi4 */
    case 171:  /* got_load_tls_iedi */
    case 170:  /* got_load_tls_iesi */
    case 169:  /* got_load_tls_gddi */
    case 168:  /* got_load_tls_gdsi */
    case 165:  /* got_loaddi */
    case 164:  /* got_loadsi */
    case 163:  /* lroundhfdi2 */
    case 162:  /* lrinthfdi2 */
    case 161:  /* lroundhfsi2 */
    case 160:  /* lrinthfsi2 */
    case 159:  /* lrounddfdi2 */
    case 158:  /* lrintdfdi2 */
    case 157:  /* lrounddfsi2 */
    case 156:  /* lrintdfsi2 */
    case 155:  /* lroundsfdi2 */
    case 154:  /* lrintsfdi2 */
    case 153:  /* lroundsfsi2 */
    case 152:  /* lrintsfsi2 */
    case 151:  /* floatunsdihf2 */
    case 150:  /* floatunssihf2 */
    case 149:  /* floatunsdidf2 */
    case 148:  /* floatunssidf2 */
    case 147:  /* floatunsdisf2 */
    case 146:  /* floatunssisf2 */
    case 145:  /* floatdihf2 */
    case 144:  /* floatsihf2 */
    case 143:  /* floatdidf2 */
    case 142:  /* floatsidf2 */
    case 141:  /* floatdisf2 */
    case 140:  /* floatsisf2 */
    case 139:  /* fixuns_trunchfdi2 */
    case 138:  /* fixuns_trunchfsi2 */
    case 137:  /* fixuns_truncdfdi2 */
    case 136:  /* fixuns_truncdfsi2 */
    case 135:  /* fixuns_truncsfdi2 */
    case 134:  /* fixuns_truncsfsi2 */
    case 133:  /* fix_trunchfdi2 */
    case 132:  /* fix_trunchfsi2 */
    case 131:  /* fix_truncdfdi2 */
    case 130:  /* fix_truncdfsi2 */
    case 129:  /* fix_truncsfdi2 */
    case 128:  /* fix_truncsfsi2 */
    case 125:  /* extendhfdf2 */
    case 124:  /* extendsfdf2 */
    case 123:  /* extendhfsf2 */
    case 109:  /* truncdfhf2 */
    case 108:  /* truncsfhf2 */
    case 107:  /* truncdfsf2 */
    case 94:  /* smaxhf3 */
    case 93:  /* smaxdf3 */
    case 92:  /* smaxsf3 */
    case 91:  /* sminhf3 */
    case 90:  /* smindf3 */
    case 89:  /* sminsf3 */
    case 88:  /* fmaxhf3 */
    case 87:  /* fmaxdf3 */
    case 86:  /* fmaxsf3 */
    case 85:  /* fminhf3 */
    case 84:  /* fmindf3 */
    case 83:  /* fminsf3 */
    case 82:  /* neghf2 */
    case 81:  /* negdf2 */
    case 80:  /* negsf2 */
    case 79:  /* copysignhf3 */
    case 78:  /* copysigndf3 */
    case 77:  /* copysignsf3 */
    case 76:  /* abshf2 */
    case 75:  /* absdf2 */
    case 74:  /* abssf2 */
      if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) || (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))))
        {
	  return 3;
        }
      else
        {
	  return 0;
        }

    case 49:  /* sqrthf2 */
      if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC))))
        {
	  return 25 /* 0x19 */;
        }
      else
        {
	  return 0;
        }

    case 48:  /* sqrtdf2 */
      if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC))))
        {
	  return 25 /* 0x19 */;
        }
      else if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7))))
        {
	  return 56 /* 0x38 */;
        }
      else
        {
	  return 0;
        }

    case 47:  /* sqrtsf2 */
      if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC))))
        {
	  return 25 /* 0x19 */;
        }
      else if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7))))
        {
	  return 27 /* 0x1b */;
        }
      else
        {
	  return 0;
        }

    case 46:  /* divhf3 */
      if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC))))
        {
	  return 20 /* 0x14 */;
        }
      else
        {
	  return 0;
        }

    case 45:  /* divdf3 */
      if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC))))
        {
	  return 20 /* 0x14 */;
        }
      else if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7))))
        {
	  return 56 /* 0x38 */;
        }
      else
        {
	  return 0;
        }

    case 44:  /* divsf3 */
      if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC))))
        {
	  return 20 /* 0x14 */;
        }
      else if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7))))
        {
	  return 27 /* 0x1b */;
        }
      else
        {
	  return 0;
        }

    case 43:  /* *umodsi3_extended */
    case 42:  /* *modsi3_extended */
    case 41:  /* *udivsi3_extended */
    case 40:  /* *divsi3_extended */
    case 39:  /* umoddi3 */
    case 38:  /* moddi3 */
    case 37:  /* udivdi3 */
    case 36:  /* divdi3 */
      if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC))))
        {
	  return 66 /* 0x42 */;
        }
      else if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7))))
        {
	  return 16 /* 0x10 */;
        }
      else
        {
	  return 0;
        }

    case 35:  /* umodsi3 */
    case 34:  /* modsi3 */
    case 33:  /* udivsi3 */
    case 32:  /* divsi3 */
      if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC))))
        {
	  return 34 /* 0x22 */;
        }
      else if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7))))
        {
	  return 16 /* 0x10 */;
        }
      else
        {
	  return 0;
        }

    case 608:  /* *th_sextw_msubhisi4 */
    case 607:  /* *th_msubhisi4 */
    case 606:  /* *th_mulswsi2 */
    case 605:  /* *th_mulswsi */
    case 604:  /* *th_mulsdi */
    case 603:  /* *th_mulssi */
    case 602:  /* *th_sextw_maddhisi4 */
    case 601:  /* *th_maddhisi4 */
    case 600:  /* *th_mulawsi2 */
    case 599:  /* *th_mulawsi */
    case 598:  /* *th_muladi */
    case 597:  /* *th_mulasi */
    case 31:  /* usmulsi3_highpart */
    case 30:  /* umulsi3_highpart */
    case 29:  /* smulsi3_highpart */
    case 28:  /* usmuldi3_highpart */
    case 27:  /* umuldi3_highpart */
    case 26:  /* smuldi3_highpart */
    case 25:  /* *mulsi3_extended2 */
    case 24:  /* *mulsi3_extended */
    case 23:  /* muldi3 */
    case 22:  /* mulsi3 */
      if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC))))
        {
	  return 10 /* 0xa */;
        }
      else if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7))))
        {
	  return 3;
        }
      else
        {
	  return 0;
        }

    case 792:  /* *movvnx64bidi_lra */
    case 791:  /* *movvnx32bidi_lra */
    case 790:  /* *movvnx16bidi_lra */
    case 789:  /* *movvnx8bidi_lra */
    case 788:  /* *movvnx4bidi_lra */
    case 787:  /* *movvnx2bidi_lra */
    case 786:  /* *movvnx1bidi_lra */
    case 785:  /* *movvnx64bisi_lra */
    case 784:  /* *movvnx32bisi_lra */
    case 783:  /* *movvnx16bisi_lra */
    case 782:  /* *movvnx8bisi_lra */
    case 781:  /* *movvnx4bisi_lra */
    case 780:  /* *movvnx2bisi_lra */
    case 779:  /* *movvnx1bisi_lra */
    case 778:  /* *movvnx1sfdi_lra */
    case 777:  /* *movvnx1sfsi_lra */
    case 776:  /* *movvnx1sidi_lra */
    case 775:  /* *movvnx1sisi_lra */
    case 774:  /* *movvnx2hidi_lra */
    case 773:  /* *movvnx2hisi_lra */
    case 772:  /* *movvnx1hidi_lra */
    case 771:  /* *movvnx1hisi_lra */
    case 770:  /* *movvnx4qidi_lra */
    case 769:  /* *movvnx4qisi_lra */
    case 768:  /* *movvnx2qidi_lra */
    case 767:  /* *movvnx2qisi_lra */
    case 766:  /* *movvnx1qidi_lra */
    case 765:  /* *movvnx1qisi_lra */
    case 722:  /* vlmax_avldi */
    case 721:  /* vlmax_avlsi */
    case 720:  /* *vlmul_extx64vnx1qi */
    case 719:  /* *vlmul_extx32vnx1hi */
    case 718:  /* *vlmul_extx32vnx2qi */
    case 717:  /* *vlmul_extx32vnx1qi */
    case 716:  /* *vlmul_extx16vnx1sf */
    case 715:  /* *vlmul_extx16vnx1si */
    case 714:  /* *vlmul_extx16vnx2hi */
    case 713:  /* *vlmul_extx16vnx1hi */
    case 712:  /* *vlmul_extx16vnx4qi */
    case 711:  /* *vlmul_extx16vnx2qi */
    case 710:  /* *vlmul_extx16vnx1qi */
    case 709:  /* *vlmul_extx8vnx1df */
    case 708:  /* *vlmul_extx8vnx2sf */
    case 707:  /* *vlmul_extx8vnx1sf */
    case 706:  /* *vlmul_extx8vnx1di */
    case 705:  /* *vlmul_extx8vnx2si */
    case 704:  /* *vlmul_extx8vnx1si */
    case 703:  /* *vlmul_extx8vnx4hi */
    case 702:  /* *vlmul_extx8vnx2hi */
    case 701:  /* *vlmul_extx8vnx1hi */
    case 700:  /* *vlmul_extx8vnx8qi */
    case 699:  /* *vlmul_extx8vnx4qi */
    case 698:  /* *vlmul_extx8vnx2qi */
    case 697:  /* *vlmul_extx8vnx1qi */
    case 696:  /* *vlmul_extx4vnx2df */
    case 695:  /* *vlmul_extx4vnx1df */
    case 694:  /* *vlmul_extx4vnx4sf */
    case 693:  /* *vlmul_extx4vnx2sf */
    case 692:  /* *vlmul_extx4vnx1sf */
    case 691:  /* *vlmul_extx4vnx2di */
    case 690:  /* *vlmul_extx4vnx1di */
    case 689:  /* *vlmul_extx4vnx4si */
    case 688:  /* *vlmul_extx4vnx2si */
    case 687:  /* *vlmul_extx4vnx1si */
    case 686:  /* *vlmul_extx4vnx8hi */
    case 685:  /* *vlmul_extx4vnx4hi */
    case 684:  /* *vlmul_extx4vnx2hi */
    case 683:  /* *vlmul_extx4vnx1hi */
    case 682:  /* *vlmul_extx4vnx16qi */
    case 681:  /* *vlmul_extx4vnx8qi */
    case 680:  /* *vlmul_extx4vnx4qi */
    case 679:  /* *vlmul_extx4vnx2qi */
    case 678:  /* *vlmul_extx4vnx1qi */
    case 677:  /* *vlmul_extx2vnx4df */
    case 676:  /* *vlmul_extx2vnx2df */
    case 675:  /* *vlmul_extx2vnx1df */
    case 674:  /* *vlmul_extx2vnx8sf */
    case 673:  /* *vlmul_extx2vnx4sf */
    case 672:  /* *vlmul_extx2vnx2sf */
    case 671:  /* *vlmul_extx2vnx1sf */
    case 670:  /* *vlmul_extx2vnx4di */
    case 669:  /* *vlmul_extx2vnx2di */
    case 668:  /* *vlmul_extx2vnx1di */
    case 667:  /* *vlmul_extx2vnx8si */
    case 666:  /* *vlmul_extx2vnx4si */
    case 665:  /* *vlmul_extx2vnx2si */
    case 664:  /* *vlmul_extx2vnx1si */
    case 663:  /* *vlmul_extx2vnx16hi */
    case 662:  /* *vlmul_extx2vnx8hi */
    case 661:  /* *vlmul_extx2vnx4hi */
    case 660:  /* *vlmul_extx2vnx2hi */
    case 659:  /* *vlmul_extx2vnx1hi */
    case 658:  /* *vlmul_extx2vnx32qi */
    case 657:  /* *vlmul_extx2vnx16qi */
    case 656:  /* *vlmul_extx2vnx8qi */
    case 655:  /* *vlmul_extx2vnx4qi */
    case 654:  /* *vlmul_extx2vnx2qi */
    case 653:  /* *vlmul_extx2vnx1qi */
    case 652:  /* vundefinedvnx64bi */
    case 651:  /* vundefinedvnx32bi */
    case 650:  /* vundefinedvnx16bi */
    case 649:  /* vundefinedvnx8bi */
    case 648:  /* vundefinedvnx4bi */
    case 647:  /* vundefinedvnx2bi */
    case 646:  /* vundefinedvnx1bi */
    case 645:  /* vundefinedvnx8df */
    case 644:  /* vundefinedvnx4df */
    case 643:  /* vundefinedvnx2df */
    case 642:  /* vundefinedvnx1df */
    case 641:  /* vundefinedvnx16sf */
    case 640:  /* vundefinedvnx8sf */
    case 639:  /* vundefinedvnx4sf */
    case 638:  /* vundefinedvnx2sf */
    case 637:  /* vundefinedvnx1sf */
    case 636:  /* vundefinedvnx8di */
    case 635:  /* vundefinedvnx4di */
    case 634:  /* vundefinedvnx2di */
    case 633:  /* vundefinedvnx1di */
    case 632:  /* vundefinedvnx16si */
    case 631:  /* vundefinedvnx8si */
    case 630:  /* vundefinedvnx4si */
    case 629:  /* vundefinedvnx2si */
    case 628:  /* vundefinedvnx1si */
    case 627:  /* vundefinedvnx32hi */
    case 626:  /* vundefinedvnx16hi */
    case 625:  /* vundefinedvnx8hi */
    case 624:  /* vundefinedvnx4hi */
    case 623:  /* vundefinedvnx2hi */
    case 622:  /* vundefinedvnx1hi */
    case 621:  /* vundefinedvnx64qi */
    case 620:  /* vundefinedvnx32qi */
    case 619:  /* vundefinedvnx16qi */
    case 618:  /* vundefinedvnx8qi */
    case 617:  /* vundefinedvnx4qi */
    case 616:  /* vundefinedvnx2qi */
    case 615:  /* vundefinedvnx1qi */
    case 596:  /* th_fmv_x_hw */
    case 595:  /* th_fmv_x_w */
    case 594:  /* th_fmv_hw_w_x */
    case 571:  /* *local_pic_store_sfhf */
    case 570:  /* *local_pic_store_sfdf */
    case 569:  /* *local_pic_store_sfsf */
    case 568:  /* *local_pic_store_sfhf */
    case 567:  /* *local_pic_store_sfdf */
    case 566:  /* *local_pic_store_sfsf */
    case 565:  /* *local_pic_store_32dhf */
    case 564:  /* *local_pic_store_32ddf */
    case 563:  /* *local_pic_store_32dsf */
    case 562:  /* *local_pic_store_32dhf */
    case 561:  /* *local_pic_store_32ddf */
    case 560:  /* *local_pic_store_32dsf */
    case 559:  /* *local_pic_storehf */
    case 558:  /* *local_pic_storedf */
    case 557:  /* *local_pic_storesf */
    case 556:  /* *local_pic_storehf */
    case 555:  /* *local_pic_storedf */
    case 554:  /* *local_pic_storesf */
    case 553:  /* *local_pic_storedi */
    case 552:  /* *local_pic_storesi */
    case 551:  /* *local_pic_storehi */
    case 550:  /* *local_pic_storeqi */
    case 549:  /* *local_pic_storedi */
    case 548:  /* *local_pic_storesi */
    case 547:  /* *local_pic_storehi */
    case 546:  /* *local_pic_storeqi */
    case 545:  /* *local_pic_load_sfhf */
    case 544:  /* *local_pic_load_sfdf */
    case 543:  /* *local_pic_load_sfsf */
    case 542:  /* *local_pic_load_32dhf */
    case 541:  /* *local_pic_load_32ddf */
    case 540:  /* *local_pic_load_32dsf */
    case 539:  /* *local_pic_load_32dhf */
    case 538:  /* *local_pic_load_32ddf */
    case 537:  /* *local_pic_load_32dsf */
    case 536:  /* *local_pic_loadhf */
    case 535:  /* *local_pic_loaddf */
    case 534:  /* *local_pic_loadsf */
    case 533:  /* *local_pic_loadhf */
    case 532:  /* *local_pic_loaddf */
    case 531:  /* *local_pic_loadsf */
    case 530:  /* *local_pic_load_usi */
    case 529:  /* *local_pic_load_usi */
    case 528:  /* *local_pic_load_usi */
    case 527:  /* *local_pic_load_uhi */
    case 526:  /* *local_pic_load_uhi */
    case 525:  /* *local_pic_load_uhi */
    case 524:  /* *local_pic_load_uqi */
    case 523:  /* *local_pic_load_uqi */
    case 522:  /* *local_pic_load_uqi */
    case 521:  /* *local_pic_load_ssi */
    case 520:  /* *local_pic_load_ssi */
    case 519:  /* *local_pic_load_ssi */
    case 518:  /* *local_pic_load_shi */
    case 517:  /* *local_pic_load_shi */
    case 516:  /* *local_pic_load_shi */
    case 515:  /* *local_pic_load_sqi */
    case 514:  /* *local_pic_load_sqi */
    case 513:  /* *local_pic_load_sqi */
    case 512:  /* *local_pic_loaddi */
    case 511:  /* *local_pic_loadsi */
    case 510:  /* *local_pic_loadhi */
    case 509:  /* *local_pic_loadqi */
    case 508:  /* subword_atomic_cas_strong */
    case 505:  /* subword_atomic_exchange_strong */
    case 502:  /* subword_atomic_fetch_strong_nand */
    case 501:  /* subword_atomic_fetch_strong_and */
    case 500:  /* subword_atomic_fetch_strong_xor */
    case 499:  /* subword_atomic_fetch_strong_or */
    case 498:  /* subword_atomic_fetch_strong_add */
    case 477:  /* mem_thread_fence_1 */
    case 420:  /* *branchdi_mask_twobits_equals_singlebit */
    case 419:  /* *branchsi_mask_twobits_equals_singlebit */
    case 418:  /* *andidi_extrabit */
    case 417:  /* *andisi_extrabit */
    case 416:  /* *xoridi_extrabit */
    case 415:  /* *ioridi_extrabit */
    case 414:  /* *xorisi_extrabit */
    case 413:  /* *iorisi_extrabit */
    case 402:  /* *bclridisi_nottwobits */
    case 401:  /* *bclridi_nottwobits */
    case 400:  /* *bclrisi_nottwobits */
    case 384:  /* *minmax */
    case 383:  /* *minmax */
    case 382:  /* *minmax */
    case 381:  /* *minmax */
    case 370:  /* orcbdi2 */
    case 369:  /* orcbsi2 */
    case 334:  /* *andi_add.uw */
    case 330:  /* riscv_prefetchi_di */
    case 329:  /* riscv_prefetchi_si */
    case 328:  /* prefetch */
    case 327:  /* riscv_zero_di */
    case 326:  /* riscv_zero_si */
    case 325:  /* riscv_inval_di */
    case 324:  /* riscv_inval_si */
    case 323:  /* riscv_flush_di */
    case 322:  /* riscv_flush_si */
    case 321:  /* riscv_clean_di */
    case 320:  /* riscv_clean_si */
    case 319:  /* stack_protect_test_di */
    case 318:  /* stack_protect_test_si */
    case 317:  /* stack_protect_set_di */
    case 316:  /* stack_protect_set_si */
    case 315:  /* stack_tiedi */
    case 314:  /* stack_tiesi */
    case 313:  /* riscv_uret */
    case 312:  /* riscv_sret */
    case 311:  /* riscv_mret */
    case 307:  /* riscv_fsflags */
    case 306:  /* riscv_frflags */
    case 305:  /* gpr_restore_return */
    case 304:  /* gpr_restore */
    case 303:  /* gpr_save */
    case 302:  /* trap */
    case 296:  /* eh_return_internal */
    case 295:  /* eh_set_lr_di */
    case 294:  /* eh_set_lr_si */
    case 285:  /* *sleu_didi */
    case 284:  /* *sle_didi */
    case 283:  /* *sleu_disi */
    case 282:  /* *sle_disi */
    case 281:  /* *sleu_sisi */
    case 280:  /* *sle_sisi */
    case 279:  /* *sltu_didi */
    case 278:  /* *slt_didi */
    case 277:  /* *sltu_disi */
    case 276:  /* *slt_disi */
    case 275:  /* *sltu_sisi */
    case 274:  /* *slt_sisi */
    case 273:  /* *sgeu_didi */
    case 272:  /* *sge_didi */
    case 271:  /* *sgeu_disi */
    case 270:  /* *sge_disi */
    case 269:  /* *sgeu_sisi */
    case 268:  /* *sge_sisi */
    case 267:  /* *sgtu_didi */
    case 266:  /* *sgt_didi */
    case 265:  /* *sgtu_disi */
    case 264:  /* *sgt_disi */
    case 263:  /* *sgtu_sisi */
    case 262:  /* *sgt_sisi */
    case 261:  /* *sne_zero_didi */
    case 260:  /* *sne_zero_disi */
    case 259:  /* *sne_zero_sisi */
    case 258:  /* *seq_zero_didi */
    case 257:  /* *seq_zero_disi */
    case 256:  /* *seq_zero_sisi */
    case 249:  /* *branch_on_bit_rangedi */
    case 248:  /* *branch_on_bit_rangesi */
    case 247:  /* *branch_on_bitdi */
    case 246:  /* *branch_on_bitsi */
    case 240:  /* *branchdi_shiftedmask_equals_zero */
    case 239:  /* *branchsi_shiftedmask_equals_zero */
    case 238:  /* *branchhi_shiftedmask_equals_zero */
    case 237:  /* *branchqi_shiftedmask_equals_zero */
    case 236:  /* *branchdi_shiftedmask_equals_zero */
    case 235:  /* *branchsi_shiftedmask_equals_zero */
    case 234:  /* *branchhi_shiftedmask_equals_zero */
    case 233:  /* *branchqi_shiftedmask_equals_zero */
    case 232:  /* *branchdi_shiftedarith_equals_zero */
    case 231:  /* *branchsi_shiftedarith_equals_zero */
    case 230:  /* *branchhi_shiftedarith_equals_zero */
    case 229:  /* *branchqi_shiftedarith_equals_zero */
    case 228:  /* *branchsi_shiftedarith_equals_zero */
    case 227:  /* *branchhi_shiftedarith_equals_zero */
    case 226:  /* *branchqi_shiftedarith_equals_zero */
    case 225:  /* zero_extendsidi2_shifted */
    case 224:  /* *lshrsi3_zero_extend_3 */
    case 223:  /* *lshrsi3_zero_extend_2 */
    case 222:  /* *lshrsi3_zero_extend_1 */
    case 221:  /* *lshrsi3_extend_mask_1 */
    case 220:  /* *ashrsi3_extend_mask_1 */
    case 219:  /* *ashlsi3_extend_mask_1 */
    case 218:  /* *lshrsi3_extend_mask */
    case 217:  /* *ashrsi3_extend_mask */
    case 216:  /* *ashlsi3_extend_mask */
    case 215:  /* *lshrsi3_extend */
    case 214:  /* *ashrsi3_extend */
    case 213:  /* *ashlsi3_extend */
    case 212:  /* *lshrdi3_mask_1 */
    case 211:  /* *ashrdi3_mask_1 */
    case 210:  /* *ashldi3_mask_1 */
    case 209:  /* *lshrdi3_mask */
    case 208:  /* *ashrdi3_mask */
    case 207:  /* *ashldi3_mask */
    case 206:  /* lshrdi3 */
    case 205:  /* ashrdi3 */
    case 204:  /* ashldi3 */
    case 203:  /* *lshrsi3_mask_1 */
    case 202:  /* *ashrsi3_mask_1 */
    case 201:  /* *ashlsi3_mask_1 */
    case 200:  /* *lshrsi3_mask */
    case 199:  /* *ashrsi3_mask */
    case 198:  /* *ashlsi3_mask */
    case 197:  /* lshrsi3 */
    case 196:  /* ashrsi3 */
    case 195:  /* ashlsi3 */
    case 194:  /* riscv_pause */
    case 193:  /* fence_i */
    case 192:  /* fence */
    case 185:  /* *xorsihi3 */
    case 184:  /* *xorhihi3 */
    case 183:  /* *addsihi3 */
    case 182:  /* *addhihi3 */
    case 177:  /* *mvconst_internal */
    case 176:  /* *mvconst_internal */
    case 175:  /* *lowdi */
    case 174:  /* *lowsi */
    case 167:  /* tls_add_tp_ledi */
    case 166:  /* tls_add_tp_lesi */
    case 106:  /* *one_cmplsi2_internal */
    case 105:  /* one_cmpldi2 */
    case 104:  /* one_cmplsi2 */
    case 103:  /* *xorsi3_internal */
    case 102:  /* *iorsi3_internal */
    case 101:  /* *andsi3_internal */
    case 100:  /* xordi3 */
    case 99:  /* iordi3 */
    case 98:  /* anddi3 */
    case 97:  /* xorsi3 */
    case 96:  /* iorsi3 */
    case 95:  /* andsi3 */
    case 18:  /* *negsi2_extended2 */
    case 17:  /* *negsi2_extended */
    case 16:  /* negsi2 */
    case 15:  /* negdi2 */
    case 14:  /* *subsi3_extended2 */
    case 13:  /* *subsi3_extended */
    case 12:  /* subsi3 */
    case 11:  /* subdi3 */
    case 7:  /* *addsi3_extended2 */
    case 6:  /* *addsi3_extended */
    case 5:  /* adddi3 */
    case 4:  /* addsi3 */
      if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC))))
        {
	  return 1;
        }
      else if (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7))))
        {
	  return 2;
        }
      else
        {
	  return 0;
        }

    case 72:  /* *fnmadf4 */
    case 69:  /* *fnmsdf4 */
    case 66:  /* *fmsdf4 */
    case 63:  /* *fmadf4 */
    case 60:  /* fnmadf4 */
    case 57:  /* fnmsdf4 */
    case 54:  /* fmsdf4 */
    case 51:  /* fmadf4 */
    case 20:  /* muldf3 */
    case 9:  /* subdf3 */
    case 2:  /* adddf3 */
      if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) || (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))))
        {
	  return 7;
        }
      else
        {
	  return 0;
        }

    case 71:  /* *fnmasf4 */
    case 68:  /* *fnmssf4 */
    case 65:  /* *fmssf4 */
    case 62:  /* *fmasf4 */
    case 59:  /* fnmasf4 */
    case 56:  /* fnmssf4 */
    case 53:  /* fmssf4 */
    case 50:  /* fmasf4 */
    case 19:  /* mulsf3 */
    case 8:  /* subsf3 */
    case 1:  /* addsf3 */
      if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) || (((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))))
        {
	  return 5;
        }
      else
        {
	  return 0;
        }

    case -1:
      if (GET_CODE (PATTERN (insn)) != ASM_INPUT
          && asm_noperands (PATTERN (insn)) < 0)
        fatal_insn_not_found (insn);
      /* FALLTHRU */
    case 110:  /* *zero_extendsidi2_internal */
    case 111:  /* *zero_extendhisi2 */
    case 112:  /* *zero_extendhidi2 */
    case 113:  /* zero_extendqihi2 */
    case 114:  /* zero_extendqisi2 */
    case 115:  /* zero_extendqidi2 */
    case 116:  /* extendsidi2 */
    case 117:  /* *extendqihi2 */
    case 118:  /* *extendqisi2 */
    case 119:  /* *extendqidi2 */
    case 120:  /* *extendhihi2 */
    case 121:  /* *extendhisi2 */
    case 122:  /* *extendhidi2 */
    case 126:  /* *movhf_hardfloat */
    case 127:  /* *movhf_softfloat */
    case 178:  /* *movdi_32bit */
    case 179:  /* *movdi_64bit */
    case 180:  /* *movsi_internal */
    case 181:  /* *movhi_internal */
    case 186:  /* *movqi_internal */
    case 187:  /* *movsf_hardfloat */
    case 188:  /* *movsf_softfloat */
    case 189:  /* *movdf_hardfloat_rv32 */
    case 190:  /* *movdf_hardfloat_rv64 */
    case 191:  /* *movdf_softfloat */
      if ((cached_type = get_attr_type (insn)) == TYPE_GHOST)
        {
	  return 0;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) && ((cached_type == TYPE_UNKNOWN) || (cached_type == TYPE_CONST) || (cached_type == TYPE_ARITH) || (cached_type == TYPE_SHIFT) || (cached_type == TYPE_SLT) || (cached_type == TYPE_MULTI) || (cached_type == TYPE_AUIPC) || (cached_type == TYPE_NOP) || (cached_type == TYPE_LOGICAL) || (cached_type == TYPE_MOVE)))
        {
	  return 1;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) && ((cached_type == TYPE_LOAD) || (cached_type == TYPE_FPLOAD)))
        {
	  return 3;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) && ((cached_type == TYPE_STORE) || (cached_type == TYPE_FPSTORE)))
        {
	  return 1;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) && ((cached_type == TYPE_MFC) || (cached_type == TYPE_MTC) || (cached_type == TYPE_FCVT) || (cached_type == TYPE_FMOVE) || (cached_type == TYPE_FCMP)))
        {
	  return 3;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) && ((cached_type == TYPE_BRANCH) || (cached_type == TYPE_JUMP) || (cached_type == TYPE_CALL)))
        {
	  return 1;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) && (cached_type == TYPE_IMUL))
        {
	  return 10 /* 0xa */;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) && (cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_SI))
        {
	  return 34 /* 0x22 */;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) && (cached_type == TYPE_IDIV) && ((cached_mode = get_attr_mode (insn)) == MODE_DI))
        {
	  return 66 /* 0x42 */;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) && ((cached_type == TYPE_FADD) || (cached_type == TYPE_FMUL) || (cached_type == TYPE_FMADD)) && ((cached_mode = get_attr_mode (insn)) == MODE_SF))
        {
	  return 5;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) && ((cached_type == TYPE_FADD) || (cached_type == TYPE_FMUL) || (cached_type == TYPE_FMADD)) && ((cached_mode = get_attr_mode (insn)) == MODE_DF))
        {
	  return 7;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) && (cached_type == TYPE_FDIV))
        {
	  return 20 /* 0x14 */;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_GENERIC)))) && (cached_type == TYPE_FSQRT))
        {
	  return 25 /* 0x19 */;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && (cached_type == TYPE_LOAD))
        {
	  return 3;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && (cached_type == TYPE_FPLOAD))
        {
	  return 2;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && (cached_type == TYPE_STORE))
        {
	  return 1;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && (cached_type == TYPE_FPSTORE))
        {
	  return 1;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && (cached_type == TYPE_BRANCH))
        {
	  return 1;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && (cached_type == TYPE_SFB_ALU))
        {
	  return 2;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && ((cached_type == TYPE_JUMP) || (cached_type == TYPE_CALL)))
        {
	  return 1;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && (cached_type == TYPE_IMUL))
        {
	  return 3;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && (cached_type == TYPE_IDIV))
        {
	  return 16 /* 0x10 */;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && ((cached_type == TYPE_UNKNOWN) || (cached_type == TYPE_ARITH) || (cached_type == TYPE_SHIFT) || (cached_type == TYPE_SLT) || (cached_type == TYPE_MULTI) || (cached_type == TYPE_LOGICAL) || (cached_type == TYPE_MOVE)))
        {
	  return 2;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && ((cached_type == TYPE_NOP) || (cached_type == TYPE_CONST) || (cached_type == TYPE_AUIPC)))
        {
	  return 1;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && ((cached_type == TYPE_FADD) || (cached_type == TYPE_FMUL) || (cached_type == TYPE_FMADD)) && ((cached_mode = get_attr_mode (insn)) == MODE_SF))
        {
	  return 5;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && ((cached_type == TYPE_FADD) || (cached_type == TYPE_FMUL) || (cached_type == TYPE_FMADD)) && ((cached_mode = get_attr_mode (insn)) == MODE_DF))
        {
	  return 7;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && ((cached_type == TYPE_FCVT) || (cached_type == TYPE_FCMP) || (cached_type == TYPE_FMOVE)))
        {
	  return 3;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FSQRT)) && ((cached_mode = get_attr_mode (insn)) == MODE_SF))
        {
	  return 27 /* 0x1b */;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && ((cached_type == TYPE_FDIV) || (cached_type == TYPE_FSQRT)) && ((cached_mode = get_attr_mode (insn)) == MODE_DF))
        {
	  return 56 /* 0x38 */;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && (cached_type == TYPE_MTC))
        {
	  return 3;
        }
      else if ((((
#line 441 "../../../../../../../work-shared/gcc-13.4.0-r0/gcc-13.4.0/gcc/config/riscv/riscv.md"
(((enum attr_tune) riscv_microarchitecture))) == (
(TUNE_SIFIVE_7)))) && (cached_type == TYPE_MFC))
        {
	  return 3;
        }
      else
        {
	  return 0;
        }

    default:
      return 0;

    }
}

