/******************************************************************************
* Copyright (c) 2022 Xilinx, Inc.  All rights reserved.
* Copyright (c) 2022 - 2026 Advanced Micro Devices, Inc.  All rights reserved.
* SPDX-License-Identifier: MIT
*******************************************************************************/

/*****************************************************************************/
/**
*
* @file xocp_common.h
*
* This file contains the common definitions, structures and macros for the OCP library.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver   Who  Date       Changes
* ----- ---- ---------- -------------------------------------------------------
* 1.0   vns  06/27/2022 Initial release
* 1.1   am   01/10/2023 Added XOCP_DME_DEVICE_ID_SIZE_BYTES macro for dme
* 1.2   kpt  06/02/2023 Added XOcp_HwPcrLogInfo structure
*       kal  06/02/2023 Added SW PCR related structures and macros
*       am   08/18/2023 Added XOcp_OcpErrorStatus enum
*       am   09/04/2023 Added XOCP_DICE_CDI_SEED_ZERO enum
* 1.3   tri  10/09/2023 Added XOCP_ERR_CHUNK_BOUNDARY_CROSSED enum
*       kpt  02/21/2024 Added error codes related to secure state
*       kpt  02/21/2024 Added XOCP_ERR_DME_RESP_ALREADY_GENERATED and
*                       XOCP_ERR_DME_RESP_NOT_GENERATED
*       har  06/07/2024 Added XOCP_KEY_WRAP_DEVAK in XOcp_DevKey
* 1.7   rpu  02/18/2026 Fixed Doxygen warnings
* </pre>
*
* @note
*
******************************************************************************/

/**
 * @addtogroup xocp_definitions XilOcp Definitions
 * @{
 */

#ifndef XOCP_COMMON_H
#define XOCP_COMMON_H

#ifdef __cplusplus
extern "C" {
#endif

/***************************** Include Files *********************************/
#include "xstatus.h"

/************************** Constant Definitions *****************************/
#define XOCP_PCR_SIZE_WORDS			(12U) /**< PCR size in words */
#define XOCP_PCR_SIZE_BYTES			(48U) /**< PCR size in bytes */

#define XOCP_DME_DEVICE_ID_SIZE_WORDS		(12U) /**< Device id size in words */
#define XOCP_DME_DEVICE_ID_SIZE_BYTES		(XOCP_DME_DEVICE_ID_SIZE_WORDS << 2U) /**< Device id size in bytes */

#define XOCP_DME_NONCE_SIZE_WORDS		(8U) /**< Nonce size in words */
#define XOCP_DME_NONCE_SIZE_BYTES		(XOCP_DME_NONCE_SIZE_WORDS << 2U) /**< Nonce size in bytes */

#define XOCP_DME_MEASURE_SIZE_WORDS		(12U) /**< Measurement size in words */
#define XOCP_DME_MEASURE_SIZE_BYTES		(XOCP_DME_MEASURE_SIZE_WORDS << 2U) /**< Measurement size in bytes */

#define XOCP_ECC_P384_SIZE_WORDS		(12U) /**< Curve P384 size in words */
#define XOCP_ECC_P384_SIZE_BYTES		(48U) /**< Curve P384 size in bytes */
#define XOCP_SIZE_OF_ECC_P384_PUBLIC_KEY_BYTES	(96U) /**< Size of P384 public key in bytes */

#define XOCP_MAX_NUM_OF_HWPCR_EVENTS		(32U) /**< Maximum number of hardware PCR events */
#define XOCP_SHA3_LEN_IN_BYTES          	(48U) /**< Length of SHA3 hash in bytes */
#define XOCP_MAX_NUM_OF_SWPCRS			(0x40U) /**< Maximum number of software PCRs */
#define XOCP_NUM_OF_SWPCRS			(0x8U) /**< Number of software PCRs */
#define XOCP_EVENT_ID_NUM_OF_BYTES		(4U) /**< Number of bytes of PCR event ID*/
#define XOCP_VERSION_NUM_OF_BYTES		(1U) /**< Number of bytes of OCP version */
#define XOCP_GET_ALL_PCR_MASK			(0x000000FFU) /**< Maximum valid PCR mask */
/**************************** Type Definitions *******************************/

/**
 * Device key selection enumeration
 */
typedef enum {
	XOCP_DEVIK = 0, /**< Device Identity key */
	XOCP_DEVAK,	/**< Device attestation key */
	XOCP_KEY_WRAP_DEVAK /**< Key wrap Device attestation key */
}XOcp_DevKey;

/**
 * Hardware PCR selection
 */
typedef enum {
	XOCP_PCR_0 = 0, /**< PCR 0 */
	XOCP_PCR_1,	/**< PCR 1 */
	XOCP_PCR_2,	/**< PCR 2 */
	XOCP_PCR_3,	/**< PCR 3 */
	XOCP_PCR_4,	/**< PCR 4 */
	XOCP_PCR_5,	/**< PCR 5 */
	XOCP_PCR_6,	/**< PCR 6 */
	XOCP_PCR_7	/**< PCR 7 */
} XOcp_HwPcr;

/**
 * DME structure
 */
typedef struct {
	u32 DeviceID[XOCP_DME_DEVICE_ID_SIZE_WORDS];	/**< Device ID */
	u32 Nonce[XOCP_DME_NONCE_SIZE_WORDS];		/**< Nonce */
	u32 Measurement[XOCP_DME_MEASURE_SIZE_WORDS];	/**< Measurement */
} XOcp_Dme;

/**
 * DME response structure
 */
typedef struct {
	XOcp_Dme Dme;									/**< DME */
	u32 DmeSignatureR[XOCP_ECC_P384_SIZE_WORDS];	/**< Signature comp R */
	u32 DmeSignatureS[XOCP_ECC_P384_SIZE_WORDS];	/**< Signature comp S */
} XOcp_DmeResponse;

/**
 * Hardware PCR Event structure
 */
typedef struct {
	u8 PcrNo;					/**< HW PCR number */
	u8 Hash[XOCP_SHA3_LEN_IN_BYTES];		/**< Hash to be extended */
	u8 PcrValue[XOCP_SHA3_LEN_IN_BYTES];		/**< PCR value after extension */
} XOcp_HwPcrEvent;

/**
 * Hardware PCR Log information structure
 */
typedef struct {
	u32 RemainingHwPcrEvents;         /**< Number of HWPCR log events */
	u32 TotalHwPcrLogEvents;          /**< Total number of HWPCR log events */
	u32 OverflowCntSinceLastRd;       /**< Overflow count since last read */
	u32 HwPcrEventsRead;              /**< Number of events read in current request */
} XOcp_HwPcrLogInfo;

/**
 * Hardware PCR Log structure
 */
typedef struct {
	XOcp_HwPcrEvent Buffer[XOCP_MAX_NUM_OF_HWPCR_EVENTS]; /**< Stores hardware PCR events */
	XOcp_HwPcrLogInfo LogInfo; /**< Log information of hardware PCR */
	u32 HeadIndex; /**< Starting index of hardware PCR event */
	u32 TailIndex; /**< Last index of hardware PCR event */
} XOcp_HwPcrLog;
/**
 * Software PCR extend parameters structure
 */
typedef struct {
	u32 PcrNum;		/**< SW PCR number */
	u32 MeasurementIdx;	/**< Measurement index */
	u32 DataSize;		/**< Data size */
	u32 OverWrite;		/**< Digest to overwrite or not */
	u64 DataAddr;		/**< Address of the data to be extended */
} XOcp_SwPcrExtendParams;

/**
 * Software PCR Data read parameters structure
 */
typedef struct {
	u32 PcrNum;					/**< SW PCR number */
	u32 MeasurementIdx;				/**< Measurement Index */
	u32 DataStartIdx;				/**< Data Start Index to read */
	u32 BufSize;					/**< Buffer Size */
	u64 BufAddr;                                    /**< User provided Buffer Address */
	u32 ReturnedBytes;				/**< Returned bytes */
} XOcp_SwPcrReadData;

/**
 * Software PCR Measurement structure
 */
typedef struct {
	u32 EventId;					/**< Event Id */
	u32 Version;					/**< Version */
	u32 DataLength;                                 /**< Data length */
	u8 HashOfData[XOCP_PCR_SIZE_BYTES];		/**< Hash of the data */
	u8 MeasuredData[XOCP_PCR_SIZE_BYTES];		/**< PCR measurement with N-1 digest */
} XOcp_PcrMeasurement;

/**
 * Software PCR Log read data structure
 */
typedef struct {
	u32 PcrNum;					/**< SW PCR number */
	u32 LogSize;					/**< User provided buffer size */
	u64 PcrLogAddr;                                 /**< User provided buffer address */
	u32 DigestCount;				/**< Extended digest count*/
} XOcp_SwPcrLogReadData;

/**
 * X509 Certificate structure
 */
typedef struct {
	u64 CertAddr;		/**< Address of Certificate */
	u64 ActualLenAddr;	/**< Address of Actual Length of certificate */
	u32 CertSize;		/**< Size of certificate */
	XOcp_DevKey DevKeySel;	/**< Select Device key - DevIK/ DevAK */
	u32 IsCsr;		/**< Flag for Certificate Signing Request */
} XOcp_X509Cert;

/**
 * Attestation structure
 */
typedef struct {
	u64 HashAddr; /**< Address of the hash */
	u64 SignatureAddr; /**< Address of the signature */
	u32 Reserved; /**<  Reserved this field is not been used */
	u32 HashLen; /**< Length of the hash */
} XOcp_Attest;

/**
 * OCP Error Status enumeration
 */
typedef enum {
	XOCP_PCR_ERR_PCR_SELECT	= 0x02, /**< 0x02 Error in PCR selection */
	XOCP_PCR_ERR_NOT_COMPLETED,	/**< 0x03 PCR operation not completed */
	XOCP_PCR_ERR_OPERATION,		/**< 0x04 PCR operation error */
	XOCP_PCR_ERR_IN_UPDATE_LOG,	/**< 0x05 PCR log update error */
	XOCP_PCR_ERR_IN_GET_PCR,	/**< 0x06 Error in Get PCR */
	XOCP_PCR_ERR_IN_GET_PCR_LOG,	/**< 0x07 Error in Get PCR Log */
	XOCP_PCR_ERR_INVALID_LOG_READ_REQUEST,
					/**< 0x08 PCR log read request is invalid */
	XOCP_PCR_ERR_MEASURE_IDX_SELECT,/**< 0x09 SW PCR measurement index is invalid */
	XOCP_PCR_ERR_SWPCR_CONFIG_NOT_RECEIVED, /**< 0x0A SW PCR configuration is not done */
	XOCP_PCR_ERR_INSUFFICIENT_BUF_MEM, /**< 0x0B PCR insufficient buffer size provided */
	XOCP_PCR_ERR_SWPCR_DUP_EXTEND, /**< 0x0C Duplicate PCR extend request received */
	XOCP_PCR_ERR_DATA_IN_INVALID_MEM, /**< 0x0D SW PCR data is in upper DDR memory */

	XOCP_DICE_CDI_PARITY_ERROR = 0x20,	/**< 0x20 CDI parity error */
	XOCP_DME_ERR,		/**< 0x21 DME signing error */
	XOCP_DME_ROM_ERROR,		/**< 0x22 DME error in ROM */
	XOCP_ERR_DEVIK_NOT_READY,	/**< 0x23 DEVIK key not ready */
	XOCP_ERR_DEVAK_NOT_READY,	/**< 0x24 DEVAK key not ready */
	XOCP_ERR_INVALID_DEVAK_REQ,	/**< 0x25 Error when there is a invalid DEVAK request */
	XOCP_DICE_CDI_SEED_ZERO,	/**< 0x26 DICE CDI Seed is zero */
	XOCP_ERR_GLITCH_DETECTED,	/**< 0x27 Error glitch detected */
	XOCP_ERR_CHUNK_BOUNDARY_CROSSED,	/**< 0x28 Error when command length crossed chunk boundary */
	XOCP_ERR_SECURE_EFUSE_CONFIG,	/**< 0x29 Error when updating secure eFuse configuration */
	XOCP_ERR_SECURE_TAP_CONFIG,		/**< 0x2A Error when updating tap configuration */
	XOCP_ERR_SECURE_STATE_MEASUREMENT,	/**< 0x2B Error when calculating secure state hash */
	XOCP_ERR_DME_RESP_ALREADY_GENERATED,	/**< 0x2C Error when DME challenge request is made
	                                             when DME response is already generated */
	XOCP_ERR_DME_RESP_NOT_GENERATED,		/**< 0x2D Error when DME response not generated
	                                             and CSR is requested */
	XOCP_ERR_PUB_KEY_NOT_AVAIL,             /**< 0x2E Error when public key is not available during
	                                             keywrap attestation request */
	XOCP_ERR_INVALID_ATTEST_BUF_SIZE,        /**< 0x2F Error when invalid buffer size is provided during
	                                             keywrap attestation request */
	XOCP_ERR_SECURE_PPK_CONFIG,		/**< 0x30 Error when updating eFuse PPK configuration */

	XOCP_ERR_SECURE_SPK_REVOKE_CONFIG,	/**< 0x31 Error when updating eFuse SPK Revocation configuration */

	XOCP_ERR_SECURE_OTHER_REVOKE_CONFIG,	/**< 0x32 Error when updating eFuse OffChip revocation configuration */

	XOCP_ERR_SECURE_MISC_CONFIG,		/**< 0x33 Error when updating eFuse miscellaneous configuration */

	XOCP_ERR_READ_PPK_CONFIG,		/**< 0x34 Error when reading PPK eFuse configuration */

	XOCP_ERR_READ_SPK_REVOKE_CONFIG,	/**< 0x35 Error when reading SPK eFuse configuration */

	XOCP_ERR_READ_OTHER_REVOKE_CONFIG,	/**< 0x36 Error when reading Offchip revocation configuration */

	XOCP_ERR_IN_EXTEND_PPK_CONFIG,		/**< 0x37 Error when extending PPK eFuse configuration */

	XOCP_ERR_IN_EXTEND_SPK_REVOKE_CONFIG,	/**< 0x38 Error when extending SPK revocation eFuse configuration */

	XOCP_ERR_IN_EXTEND_OTHER_REVOKE_CONFIG,	/**< 0x39 Error when extending Offchip revocation eFuse configuration */

	XOCP_ERR_IN_EXTEND_MISC_CONFIG,		/**< 0x3A Error when extending Miscellaneous eFuse configuration */

	XOCP_ERR_IN_EXTEND_SECURE_STATE_CONFIG,	/**< 0x3B Error when extending secure state configuration */

	XOCP_ERR_IN_MEMCPY			/**< 0x3C Error in mem copy */

}XOcp_OcpErrorStatus;

/***************** Macros (Inline Functions) Definitions *********************/

/************************** Function Prototypes ******************************/

/************************** Variable Definitions *****************************/

#ifdef __cplusplus
}
#endif

#endif  /* XOCP_COMMON_H */
/** @} */