/* This file is autogenerated by scripts/decodetree.py.  */

typedef struct {
    int vm;
    int vn;
    int vd;
} arg_disas_vfp_uncond0;

typedef struct {
    int cc;
    int vm;
    int vn;
    int vd;
    int sz;
} arg_disas_vfp_uncond1;

typedef struct {
    int rm;
    int vm;
    int vd;
    int sz;
} arg_disas_vfp_uncond2;

typedef struct {
    int rm;
    int op;
    int vm;
    int vd;
    int sz;
} arg_disas_vfp_uncond3;

typedef struct {
    int vd;
    int vm;
} arg_disas_vfp_uncond4;

typedef arg_disas_vfp_uncond1 arg_VSEL;
static bool trans_VSEL(DisasContext *ctx, arg_VSEL *a);
typedef arg_disas_vfp_uncond0 arg_VMAXNM_hp;
static bool trans_VMAXNM_hp(DisasContext *ctx, arg_VMAXNM_hp *a);
typedef arg_disas_vfp_uncond0 arg_VMINNM_hp;
static bool trans_VMINNM_hp(DisasContext *ctx, arg_VMINNM_hp *a);
typedef arg_disas_vfp_uncond0 arg_VMAXNM_sp;
static bool trans_VMAXNM_sp(DisasContext *ctx, arg_VMAXNM_sp *a);
typedef arg_disas_vfp_uncond0 arg_VMINNM_sp;
static bool trans_VMINNM_sp(DisasContext *ctx, arg_VMINNM_sp *a);
typedef arg_disas_vfp_uncond0 arg_VMAXNM_dp;
static bool trans_VMAXNM_dp(DisasContext *ctx, arg_VMAXNM_dp *a);
typedef arg_disas_vfp_uncond0 arg_VMINNM_dp;
static bool trans_VMINNM_dp(DisasContext *ctx, arg_VMINNM_dp *a);
typedef arg_disas_vfp_uncond2 arg_VRINT;
static bool trans_VRINT(DisasContext *ctx, arg_VRINT *a);
typedef arg_disas_vfp_uncond3 arg_VCVT;
static bool trans_VCVT(DisasContext *ctx, arg_VCVT *a);
typedef arg_disas_vfp_uncond4 arg_VMOVX;
static bool trans_VMOVX(DisasContext *ctx, arg_VMOVX *a);
typedef arg_disas_vfp_uncond4 arg_VINS;
static bool trans_VINS(DisasContext *ctx, arg_VINS *a);

static void disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_10(DisasContext *ctx, arg_disas_vfp_uncond3 *a, uint32_t insn)
{
    a->op = extract32(insn, 7, 1);
    a->sz = 3;
    a->vm = deposit32(extract32(insn, 0, 4), 4, 28, extract32(insn, 5, 1));
    a->rm = extract32(insn, 16, 2);
    a->vd = deposit32(extract32(insn, 22, 1), 1, 31, extract32(insn, 12, 4));
}

static void disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_11(DisasContext *ctx, arg_disas_vfp_uncond4 *a, uint32_t insn)
{
    a->vm = deposit32(extract32(insn, 5, 1), 1, 31, extract32(insn, 0, 4));
    a->vd = deposit32(extract32(insn, 22, 1), 1, 31, extract32(insn, 12, 4));
}

static void disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_2(DisasContext *ctx, arg_disas_vfp_uncond1 *a, uint32_t insn)
{
    a->vn = deposit32(extract32(insn, 7, 1), 1, 31, extract32(insn, 16, 4));
    a->sz = 1;
    a->cc = extract32(insn, 20, 2);
    a->vm = deposit32(extract32(insn, 5, 1), 1, 31, extract32(insn, 0, 4));
    a->vd = deposit32(extract32(insn, 22, 1), 1, 31, extract32(insn, 12, 4));
}

static void disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_3(DisasContext *ctx, arg_disas_vfp_uncond1 *a, uint32_t insn)
{
    a->vn = deposit32(extract32(insn, 7, 1), 1, 31, extract32(insn, 16, 4));
    a->sz = 2;
    a->cc = extract32(insn, 20, 2);
    a->vm = deposit32(extract32(insn, 5, 1), 1, 31, extract32(insn, 0, 4));
    a->vd = deposit32(extract32(insn, 22, 1), 1, 31, extract32(insn, 12, 4));
}

static void disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_4(DisasContext *ctx, arg_disas_vfp_uncond1 *a, uint32_t insn)
{
    a->vn = deposit32(extract32(insn, 16, 4), 4, 28, extract32(insn, 7, 1));
    a->sz = 3;
    a->cc = extract32(insn, 20, 2);
    a->vm = deposit32(extract32(insn, 0, 4), 4, 28, extract32(insn, 5, 1));
    a->vd = deposit32(extract32(insn, 12, 4), 4, 28, extract32(insn, 22, 1));
}

static void disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_5(DisasContext *ctx, arg_disas_vfp_uncond2 *a, uint32_t insn)
{
    a->vm = deposit32(extract32(insn, 5, 1), 1, 31, extract32(insn, 0, 4));
    a->sz = 1;
    a->rm = extract32(insn, 16, 2);
    a->vd = deposit32(extract32(insn, 22, 1), 1, 31, extract32(insn, 12, 4));
}

static void disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_6(DisasContext *ctx, arg_disas_vfp_uncond2 *a, uint32_t insn)
{
    a->vm = deposit32(extract32(insn, 5, 1), 1, 31, extract32(insn, 0, 4));
    a->sz = 2;
    a->rm = extract32(insn, 16, 2);
    a->vd = deposit32(extract32(insn, 22, 1), 1, 31, extract32(insn, 12, 4));
}

static void disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_7(DisasContext *ctx, arg_disas_vfp_uncond2 *a, uint32_t insn)
{
    a->vm = deposit32(extract32(insn, 0, 4), 4, 28, extract32(insn, 5, 1));
    a->sz = 3;
    a->rm = extract32(insn, 16, 2);
    a->vd = deposit32(extract32(insn, 12, 4), 4, 28, extract32(insn, 22, 1));
}

static void disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_8(DisasContext *ctx, arg_disas_vfp_uncond3 *a, uint32_t insn)
{
    a->op = extract32(insn, 7, 1);
    a->sz = 1;
    a->vm = deposit32(extract32(insn, 5, 1), 1, 31, extract32(insn, 0, 4));
    a->rm = extract32(insn, 16, 2);
    a->vd = deposit32(extract32(insn, 22, 1), 1, 31, extract32(insn, 12, 4));
}

static void disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_9(DisasContext *ctx, arg_disas_vfp_uncond3 *a, uint32_t insn)
{
    a->op = extract32(insn, 7, 1);
    a->sz = 2;
    a->vm = deposit32(extract32(insn, 5, 1), 1, 31, extract32(insn, 0, 4));
    a->rm = extract32(insn, 16, 2);
    a->vd = deposit32(extract32(insn, 22, 1), 1, 31, extract32(insn, 12, 4));
}

static void disas_vfp_uncond_extract_vfp_dnm_d(DisasContext *ctx, arg_disas_vfp_uncond0 *a, uint32_t insn)
{
    a->vn = deposit32(extract32(insn, 16, 4), 4, 28, extract32(insn, 7, 1));
    a->vm = deposit32(extract32(insn, 0, 4), 4, 28, extract32(insn, 5, 1));
    a->vd = deposit32(extract32(insn, 12, 4), 4, 28, extract32(insn, 22, 1));
}

static void disas_vfp_uncond_extract_vfp_dnm_s(DisasContext *ctx, arg_disas_vfp_uncond0 *a, uint32_t insn)
{
    a->vn = deposit32(extract32(insn, 7, 1), 1, 31, extract32(insn, 16, 4));
    a->vm = deposit32(extract32(insn, 5, 1), 1, 31, extract32(insn, 0, 4));
    a->vd = deposit32(extract32(insn, 22, 1), 1, 31, extract32(insn, 12, 4));
}

bool disas_vfp_uncond(DisasContext *ctx, uint32_t insn)
{
    union {
        arg_disas_vfp_uncond0 f_disas_vfp_uncond0;
        arg_disas_vfp_uncond1 f_disas_vfp_uncond1;
        arg_disas_vfp_uncond2 f_disas_vfp_uncond2;
        arg_disas_vfp_uncond3 f_disas_vfp_uncond3;
        arg_disas_vfp_uncond4 f_disas_vfp_uncond4;
    } u;

    switch (insn & 0xff800f50u) {
    case 0xfe000900u:
        /* 11111110 0....... ....1001 .0.0.... */
        /* ../git/target/arm/tcg/vfp-uncond.decode:47 */
        disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_2(ctx, &u.f_disas_vfp_uncond1, insn);
        if (trans_VSEL(ctx, &u.f_disas_vfp_uncond1)) return true;
        break;
    case 0xfe000a00u:
        /* 11111110 0....... ....1010 .0.0.... */
        /* ../git/target/arm/tcg/vfp-uncond.decode:49 */
        disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_3(ctx, &u.f_disas_vfp_uncond1, insn);
        if (trans_VSEL(ctx, &u.f_disas_vfp_uncond1)) return true;
        break;
    case 0xfe000b00u:
        /* 11111110 0....... ....1011 .0.0.... */
        /* ../git/target/arm/tcg/vfp-uncond.decode:51 */
        disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_4(ctx, &u.f_disas_vfp_uncond1, insn);
        if (trans_VSEL(ctx, &u.f_disas_vfp_uncond1)) return true;
        break;
    case 0xfe800900u:
        /* 11111110 1....... ....1001 .0.0.... */
        disas_vfp_uncond_extract_vfp_dnm_s(ctx, &u.f_disas_vfp_uncond0, insn);
        switch ((insn >> 20) & 0x3) {
        case 0x0:
            /* 11111110 1.00.... ....1001 .0.0.... */
            /* ../git/target/arm/tcg/vfp-uncond.decode:54 */
            if (trans_VMAXNM_hp(ctx, &u.f_disas_vfp_uncond0)) return true;
            break;
        }
        break;
    case 0xfe800940u:
        /* 11111110 1....... ....1001 .1.0.... */
        switch ((insn >> 20) & 0x3) {
        case 0x0:
            /* 11111110 1.00.... ....1001 .1.0.... */
            /* ../git/target/arm/tcg/vfp-uncond.decode:55 */
            disas_vfp_uncond_extract_vfp_dnm_s(ctx, &u.f_disas_vfp_uncond0, insn);
            if (trans_VMINNM_hp(ctx, &u.f_disas_vfp_uncond0)) return true;
            break;
        case 0x3:
            /* 11111110 1.11.... ....1001 .1.0.... */
            switch ((insn >> 18) & 0x3) {
            case 0x2:
                /* 11111110 1.1110.. ....1001 .1.0.... */
                disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_5(ctx, &u.f_disas_vfp_uncond2, insn);
                switch ((insn >> 7) & 0x1) {
                case 0x0:
                    /* 11111110 1.1110.. ....1001 01.0.... */
                    /* ../git/target/arm/tcg/vfp-uncond.decode:63 */
                    if (trans_VRINT(ctx, &u.f_disas_vfp_uncond2)) return true;
                    break;
                }
                break;
            case 0x3:
                /* 11111110 1.1111.. ....1001 .1.0.... */
                /* ../git/target/arm/tcg/vfp-uncond.decode:71 */
                disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_8(ctx, &u.f_disas_vfp_uncond3, insn);
                if (trans_VCVT(ctx, &u.f_disas_vfp_uncond3)) return true;
                break;
            }
            break;
        }
        break;
    case 0xfe800a00u:
        /* 11111110 1....... ....1010 .0.0.... */
        disas_vfp_uncond_extract_vfp_dnm_s(ctx, &u.f_disas_vfp_uncond0, insn);
        switch ((insn >> 20) & 0x3) {
        case 0x0:
            /* 11111110 1.00.... ....1010 .0.0.... */
            /* ../git/target/arm/tcg/vfp-uncond.decode:57 */
            if (trans_VMAXNM_sp(ctx, &u.f_disas_vfp_uncond0)) return true;
            break;
        }
        break;
    case 0xfe800a40u:
        /* 11111110 1....... ....1010 .1.0.... */
        switch ((insn >> 20) & 0x3) {
        case 0x0:
            /* 11111110 1.00.... ....1010 .1.0.... */
            /* ../git/target/arm/tcg/vfp-uncond.decode:58 */
            disas_vfp_uncond_extract_vfp_dnm_s(ctx, &u.f_disas_vfp_uncond0, insn);
            if (trans_VMINNM_sp(ctx, &u.f_disas_vfp_uncond0)) return true;
            break;
        case 0x3:
            /* 11111110 1.11.... ....1010 .1.0.... */
            switch ((insn >> 18) & 0x3) {
            case 0x0:
                /* 11111110 1.1100.. ....1010 .1.0.... */
                disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_11(ctx, &u.f_disas_vfp_uncond4, insn);
                switch (insn & 0x00030080) {
                case 0x00000000:
                    /* 11111110 1.110000 ....1010 01.0.... */
                    /* ../git/target/arm/tcg/vfp-uncond.decode:78 */
                    if (trans_VMOVX(ctx, &u.f_disas_vfp_uncond4)) return true;
                    break;
                case 0x00000080:
                    /* 11111110 1.110000 ....1010 11.0.... */
                    /* ../git/target/arm/tcg/vfp-uncond.decode:81 */
                    if (trans_VINS(ctx, &u.f_disas_vfp_uncond4)) return true;
                    break;
                }
                break;
            case 0x2:
                /* 11111110 1.1110.. ....1010 .1.0.... */
                disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_6(ctx, &u.f_disas_vfp_uncond2, insn);
                switch ((insn >> 7) & 0x1) {
                case 0x0:
                    /* 11111110 1.1110.. ....1010 01.0.... */
                    /* ../git/target/arm/tcg/vfp-uncond.decode:65 */
                    if (trans_VRINT(ctx, &u.f_disas_vfp_uncond2)) return true;
                    break;
                }
                break;
            case 0x3:
                /* 11111110 1.1111.. ....1010 .1.0.... */
                /* ../git/target/arm/tcg/vfp-uncond.decode:73 */
                disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_9(ctx, &u.f_disas_vfp_uncond3, insn);
                if (trans_VCVT(ctx, &u.f_disas_vfp_uncond3)) return true;
                break;
            }
            break;
        }
        break;
    case 0xfe800b00u:
        /* 11111110 1....... ....1011 .0.0.... */
        disas_vfp_uncond_extract_vfp_dnm_d(ctx, &u.f_disas_vfp_uncond0, insn);
        switch ((insn >> 20) & 0x3) {
        case 0x0:
            /* 11111110 1.00.... ....1011 .0.0.... */
            /* ../git/target/arm/tcg/vfp-uncond.decode:60 */
            if (trans_VMAXNM_dp(ctx, &u.f_disas_vfp_uncond0)) return true;
            break;
        }
        break;
    case 0xfe800b40u:
        /* 11111110 1....... ....1011 .1.0.... */
        switch ((insn >> 20) & 0x3) {
        case 0x0:
            /* 11111110 1.00.... ....1011 .1.0.... */
            /* ../git/target/arm/tcg/vfp-uncond.decode:61 */
            disas_vfp_uncond_extract_vfp_dnm_d(ctx, &u.f_disas_vfp_uncond0, insn);
            if (trans_VMINNM_dp(ctx, &u.f_disas_vfp_uncond0)) return true;
            break;
        case 0x3:
            /* 11111110 1.11.... ....1011 .1.0.... */
            switch ((insn >> 18) & 0x3) {
            case 0x2:
                /* 11111110 1.1110.. ....1011 .1.0.... */
                disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_7(ctx, &u.f_disas_vfp_uncond2, insn);
                switch ((insn >> 7) & 0x1) {
                case 0x0:
                    /* 11111110 1.1110.. ....1011 01.0.... */
                    /* ../git/target/arm/tcg/vfp-uncond.decode:67 */
                    if (trans_VRINT(ctx, &u.f_disas_vfp_uncond2)) return true;
                    break;
                }
                break;
            case 0x3:
                /* 11111110 1.1111.. ....1011 .1.0.... */
                /* ../git/target/arm/tcg/vfp-uncond.decode:75 */
                disas_vfp_uncond_extract_disas_vfp_uncond_Fmt_10(ctx, &u.f_disas_vfp_uncond3, insn);
                if (trans_VCVT(ctx, &u.f_disas_vfp_uncond3)) return true;
                break;
            }
            break;
        }
        break;
    }
    return false;
}
