/* This file is autogenerated by scripts/decodetree.py.  */

typedef struct {
    int esz;
    int imm2;
    int imm1;
    int rd;
} arg_disas_sve29;

typedef struct {
    int esz;
    int rm;
    int imm;
    int rd;
} arg_disas_sve30;

typedef struct {
    int imm;
    int rd;
} arg_disas_sve31;

typedef struct {
    int rn;
    int rd;
} arg_disas_sve32;

typedef struct {
    int dbm;
    int rd;
} arg_disas_sve33;

typedef struct {
} arg_disas_sve34;

typedef struct {
    int esz;
    int u;
    int h;
    int rn;
    int rd;
} arg_disas_sve35;

typedef struct {
    int pg;
    int rn;
} arg_disas_sve36;

typedef struct {
    int rd;
} arg_disas_sve37;

typedef struct {
    int s;
    int pg;
    int rd;
} arg_disas_sve38;

typedef struct {
    int rn;
} arg_disas_sve39;

typedef struct {
    int sf;
    int rm;
    int rn;
    int ne;
} arg_disas_sve40;

typedef struct {
    int esz;
    int rm;
    int sf;
    int u;
    int lt;
    int rn;
    int eq;
    int rd;
} arg_disas_sve41;

typedef struct {
    int esz;
    int rm;
    int rn;
    int rw;
    int rd;
} arg_disas_sve42;

typedef struct {
    int esz;
    int imm;
    int rd;
} arg_disas_sve43;

typedef struct {
    int sz;
    int rm;
    int u;
    int rn;
    int rd;
    int ra;
} arg_disas_sve44;

typedef struct {
    int esz;
    int rm;
    int rot;
    int rn;
    int rd;
    int ra;
} arg_disas_sve45;

typedef struct {
    int index;
    int rm;
    int rot;
    int rn;
    int rd;
    int ra;
} arg_disas_sve46;

typedef struct {
    int esz;
    int rot;
    int pg;
    int rm;
    int rd;
    int rn;
} arg_disas_sve47;

typedef struct {
    int esz;
    int rm;
    int rot;
    int pg;
    int rn;
    int rd;
    int ra;
} arg_disas_sve48;

typedef struct {
    int index;
    int rm;
    int rot;
    int rn;
    int rd;
    int ra;
    int esz;
} arg_disas_sve49;

typedef struct {
    int rm;
} arg_disas_sve50;

typedef struct {
    int rd;
    int rn;
    int pat;
    int esz;
    int imm;
    int d;
    int u;
} arg_incdec2_cnt;

typedef struct {
    int rd;
    int rn;
    int pg;
    int esz;
    int d;
    int u;
} arg_incdec2_pred;

typedef struct {
    int rd;
    int pat;
    int esz;
    int imm;
    int d;
    int u;
} arg_incdec_cnt;

typedef struct {
    int rd;
    int pg;
    int esz;
    int d;
    int u;
} arg_incdec_pred;

typedef struct {
    int esz;
    int pd;
    int pn;
    int pm;
    int rv;
    int imm;
} arg_psel;

typedef struct {
    int rd;
    int esz;
    int pat;
    int s;
} arg_ptrue;

typedef struct {
    int rd;
    int pg;
    int rn;
    int esz;
} arg_rpr_esz;

typedef struct {
    int rd;
    int pg;
    int rn;
    int s;
} arg_rpr_s;

typedef struct {
    int rd;
    int pg;
    int rn;
    int imm;
    int esz;
} arg_rpri_esz;

typedef struct {
    int rd;
    int pg;
    int rn;
    int imm;
    int esz;
    int msz;
    int u;
    int ff;
} arg_rpri_gather_load;

typedef struct {
    int rd;
    int pg;
    int rn;
    int imm;
    int dtype;
    int nreg;
} arg_rpri_load;

typedef struct {
    int rd;
    int pg;
    int rn;
    int imm;
    int esz;
    int msz;
} arg_rpri_scatter_store;

typedef struct {
    int rd;
    int pg;
    int rn;
    int imm;
    int msz;
    int esz;
    int nreg;
} arg_rpri_store;

typedef struct {
    int rd;
    int pg;
    int rn;
    int rm;
    int esz;
} arg_rprr_esz;

typedef struct {
    int rd;
    int pg;
    int rn;
    int rm;
    int esz;
    int msz;
    int u;
    int ff;
    int xs;
    int scale;
} arg_rprr_gather_load;

typedef struct {
    int rd;
    int pg;
    int rn;
    int rm;
    int dtype;
    int nreg;
} arg_rprr_load;

typedef struct {
    int rd;
    int pg;
    int rn;
    int rm;
    int s;
} arg_rprr_s;

typedef struct {
    int rd;
    int pg;
    int rn;
    int rm;
    int esz;
    int msz;
    int xs;
    int scale;
} arg_rprr_scatter_store;

typedef struct {
    int rd;
    int pg;
    int rn;
    int rm;
    int msz;
    int esz;
    int nreg;
} arg_rprr_store;

typedef struct {
    int rd;
    int pg;
    int rn;
    int rm;
    int ra;
    int esz;
} arg_rprrr_esz;

typedef struct {
    int rd;
    int rn;
    int dbm;
} arg_rr_dbm;

typedef struct {
    int rd;
    int rn;
    int esz;
} arg_rr_esz;

typedef struct {
    int rd;
    int rn;
    int imm;
} arg_rri;

typedef struct {
    int rd;
    int rn;
    int imm;
    int esz;
} arg_rri_esz;

typedef struct {
    int rd;
    int rn;
    int rm;
    int esz;
} arg_rrr_esz;

typedef struct {
    int rd;
    int rn;
    int rm;
    int imm;
} arg_rrri;

typedef struct {
    int rd;
    int rn;
    int rm;
    int imm;
    int esz;
} arg_rrri_esz;

typedef struct {
    int rd;
    int ra;
    int rn;
    int rm;
    int esz;
} arg_rrrr_esz;

typedef struct {
    int rd;
    int rn;
    int rm;
    int index;
    int esz;
} arg_rrx_esz;

typedef struct {
    int rd;
    int rn;
    int rm;
    int ra;
    int index;
    int esz;
} arg_rrxr_esz;

typedef arg_rprr_esz arg_ORR_zpzz;
static bool trans_ORR_zpzz(DisasContext *ctx, arg_ORR_zpzz *a);
typedef arg_rprr_esz arg_EOR_zpzz;
static bool trans_EOR_zpzz(DisasContext *ctx, arg_EOR_zpzz *a);
typedef arg_rprr_esz arg_AND_zpzz;
static bool trans_AND_zpzz(DisasContext *ctx, arg_AND_zpzz *a);
typedef arg_rprr_esz arg_BIC_zpzz;
static bool trans_BIC_zpzz(DisasContext *ctx, arg_BIC_zpzz *a);
typedef arg_rprr_esz arg_ADD_zpzz;
static bool trans_ADD_zpzz(DisasContext *ctx, arg_ADD_zpzz *a);
typedef arg_rprr_esz arg_SUB_zpzz;
static bool trans_SUB_zpzz(DisasContext *ctx, arg_SUB_zpzz *a);
typedef arg_rprr_esz arg_SMAX_zpzz;
static bool trans_SMAX_zpzz(DisasContext *ctx, arg_SMAX_zpzz *a);
typedef arg_rprr_esz arg_UMAX_zpzz;
static bool trans_UMAX_zpzz(DisasContext *ctx, arg_UMAX_zpzz *a);
typedef arg_rprr_esz arg_SMIN_zpzz;
static bool trans_SMIN_zpzz(DisasContext *ctx, arg_SMIN_zpzz *a);
typedef arg_rprr_esz arg_UMIN_zpzz;
static bool trans_UMIN_zpzz(DisasContext *ctx, arg_UMIN_zpzz *a);
typedef arg_rprr_esz arg_SABD_zpzz;
static bool trans_SABD_zpzz(DisasContext *ctx, arg_SABD_zpzz *a);
typedef arg_rprr_esz arg_UABD_zpzz;
static bool trans_UABD_zpzz(DisasContext *ctx, arg_UABD_zpzz *a);
typedef arg_rprr_esz arg_MUL_zpzz;
static bool trans_MUL_zpzz(DisasContext *ctx, arg_MUL_zpzz *a);
typedef arg_rprr_esz arg_SMULH_zpzz;
static bool trans_SMULH_zpzz(DisasContext *ctx, arg_SMULH_zpzz *a);
typedef arg_rprr_esz arg_UMULH_zpzz;
static bool trans_UMULH_zpzz(DisasContext *ctx, arg_UMULH_zpzz *a);
typedef arg_rprr_esz arg_SDIV_zpzz;
static bool trans_SDIV_zpzz(DisasContext *ctx, arg_SDIV_zpzz *a);
typedef arg_rprr_esz arg_UDIV_zpzz;
static bool trans_UDIV_zpzz(DisasContext *ctx, arg_UDIV_zpzz *a);
typedef arg_rpr_esz arg_ORV;
static bool trans_ORV(DisasContext *ctx, arg_ORV *a);
typedef arg_rpr_esz arg_EORV;
static bool trans_EORV(DisasContext *ctx, arg_EORV *a);
typedef arg_rpr_esz arg_ANDV;
static bool trans_ANDV(DisasContext *ctx, arg_ANDV *a);
typedef arg_rpr_esz arg_MOVPRFX_z;
static bool trans_MOVPRFX_z(DisasContext *ctx, arg_MOVPRFX_z *a);
typedef arg_rpr_esz arg_MOVPRFX_m;
static bool trans_MOVPRFX_m(DisasContext *ctx, arg_MOVPRFX_m *a);
typedef arg_rpr_esz arg_UADDV;
static bool trans_UADDV(DisasContext *ctx, arg_UADDV *a);
typedef arg_rpr_esz arg_SADDV;
static bool trans_SADDV(DisasContext *ctx, arg_SADDV *a);
typedef arg_rpr_esz arg_SMAXV;
static bool trans_SMAXV(DisasContext *ctx, arg_SMAXV *a);
typedef arg_rpr_esz arg_UMAXV;
static bool trans_UMAXV(DisasContext *ctx, arg_UMAXV *a);
typedef arg_rpr_esz arg_SMINV;
static bool trans_SMINV(DisasContext *ctx, arg_SMINV *a);
typedef arg_rpr_esz arg_UMINV;
static bool trans_UMINV(DisasContext *ctx, arg_UMINV *a);
typedef arg_rpri_esz arg_ASR_zpzi;
static bool trans_ASR_zpzi(DisasContext *ctx, arg_ASR_zpzi *a);
typedef arg_rpri_esz arg_LSR_zpzi;
static bool trans_LSR_zpzi(DisasContext *ctx, arg_LSR_zpzi *a);
typedef arg_rpri_esz arg_LSL_zpzi;
static bool trans_LSL_zpzi(DisasContext *ctx, arg_LSL_zpzi *a);
typedef arg_rpri_esz arg_ASRD;
static bool trans_ASRD(DisasContext *ctx, arg_ASRD *a);
typedef arg_rpri_esz arg_SQSHL_zpzi;
static bool trans_SQSHL_zpzi(DisasContext *ctx, arg_SQSHL_zpzi *a);
typedef arg_rpri_esz arg_UQSHL_zpzi;
static bool trans_UQSHL_zpzi(DisasContext *ctx, arg_UQSHL_zpzi *a);
typedef arg_rpri_esz arg_SRSHR;
static bool trans_SRSHR(DisasContext *ctx, arg_SRSHR *a);
typedef arg_rpri_esz arg_URSHR;
static bool trans_URSHR(DisasContext *ctx, arg_URSHR *a);
typedef arg_rpri_esz arg_SQSHLU;
static bool trans_SQSHLU(DisasContext *ctx, arg_SQSHLU *a);
typedef arg_rprr_esz arg_ASR_zpzz;
static bool trans_ASR_zpzz(DisasContext *ctx, arg_ASR_zpzz *a);
typedef arg_rprr_esz arg_LSR_zpzz;
static bool trans_LSR_zpzz(DisasContext *ctx, arg_LSR_zpzz *a);
typedef arg_rprr_esz arg_LSL_zpzz;
static bool trans_LSL_zpzz(DisasContext *ctx, arg_LSL_zpzz *a);
typedef arg_rprr_esz arg_ASR_zpzw;
static bool trans_ASR_zpzw(DisasContext *ctx, arg_ASR_zpzw *a);
typedef arg_rprr_esz arg_LSR_zpzw;
static bool trans_LSR_zpzw(DisasContext *ctx, arg_LSR_zpzw *a);
typedef arg_rprr_esz arg_LSL_zpzw;
static bool trans_LSL_zpzw(DisasContext *ctx, arg_LSL_zpzw *a);
typedef arg_rpr_esz arg_CLS;
static bool trans_CLS(DisasContext *ctx, arg_CLS *a);
typedef arg_rpr_esz arg_CLZ;
static bool trans_CLZ(DisasContext *ctx, arg_CLZ *a);
typedef arg_rpr_esz arg_CNT_zpz;
static bool trans_CNT_zpz(DisasContext *ctx, arg_CNT_zpz *a);
typedef arg_rpr_esz arg_CNOT;
static bool trans_CNOT(DisasContext *ctx, arg_CNOT *a);
typedef arg_rpr_esz arg_NOT_zpz;
static bool trans_NOT_zpz(DisasContext *ctx, arg_NOT_zpz *a);
typedef arg_rpr_esz arg_FABS;
static bool trans_FABS(DisasContext *ctx, arg_FABS *a);
typedef arg_rpr_esz arg_FNEG;
static bool trans_FNEG(DisasContext *ctx, arg_FNEG *a);
typedef arg_rpr_esz arg_ABS;
static bool trans_ABS(DisasContext *ctx, arg_ABS *a);
typedef arg_rpr_esz arg_NEG;
static bool trans_NEG(DisasContext *ctx, arg_NEG *a);
typedef arg_rpr_esz arg_SXTB;
static bool trans_SXTB(DisasContext *ctx, arg_SXTB *a);
typedef arg_rpr_esz arg_UXTB;
static bool trans_UXTB(DisasContext *ctx, arg_UXTB *a);
typedef arg_rpr_esz arg_SXTH;
static bool trans_SXTH(DisasContext *ctx, arg_SXTH *a);
typedef arg_rpr_esz arg_UXTH;
static bool trans_UXTH(DisasContext *ctx, arg_UXTH *a);
typedef arg_rpr_esz arg_SXTW;
static bool trans_SXTW(DisasContext *ctx, arg_SXTW *a);
typedef arg_rpr_esz arg_UXTW;
static bool trans_UXTW(DisasContext *ctx, arg_UXTW *a);
typedef arg_rprr_esz arg_FCMGE_ppzz;
static bool trans_FCMGE_ppzz(DisasContext *ctx, arg_FCMGE_ppzz *a);
typedef arg_rprr_esz arg_FCMGT_ppzz;
static bool trans_FCMGT_ppzz(DisasContext *ctx, arg_FCMGT_ppzz *a);
typedef arg_rprr_esz arg_FCMEQ_ppzz;
static bool trans_FCMEQ_ppzz(DisasContext *ctx, arg_FCMEQ_ppzz *a);
typedef arg_rprr_esz arg_FCMNE_ppzz;
static bool trans_FCMNE_ppzz(DisasContext *ctx, arg_FCMNE_ppzz *a);
typedef arg_rprr_esz arg_FCMUO_ppzz;
static bool trans_FCMUO_ppzz(DisasContext *ctx, arg_FCMUO_ppzz *a);
typedef arg_rprr_esz arg_FACGE_ppzz;
static bool trans_FACGE_ppzz(DisasContext *ctx, arg_FACGE_ppzz *a);
typedef arg_rprr_esz arg_FACGT_ppzz;
static bool trans_FACGT_ppzz(DisasContext *ctx, arg_FACGT_ppzz *a);
typedef arg_rprrr_esz arg_MLA;
static bool trans_MLA(DisasContext *ctx, arg_MLA *a);
typedef arg_rprrr_esz arg_MLS;
static bool trans_MLS(DisasContext *ctx, arg_MLS *a);
typedef arg_rrr_esz arg_ADD_zzz;
static bool trans_ADD_zzz(DisasContext *ctx, arg_ADD_zzz *a);
typedef arg_rrr_esz arg_SUB_zzz;
static bool trans_SUB_zzz(DisasContext *ctx, arg_SUB_zzz *a);
typedef arg_rrr_esz arg_SQADD_zzz;
static bool trans_SQADD_zzz(DisasContext *ctx, arg_SQADD_zzz *a);
typedef arg_rrr_esz arg_UQADD_zzz;
static bool trans_UQADD_zzz(DisasContext *ctx, arg_UQADD_zzz *a);
typedef arg_rrr_esz arg_SQSUB_zzz;
static bool trans_SQSUB_zzz(DisasContext *ctx, arg_SQSUB_zzz *a);
typedef arg_rrr_esz arg_UQSUB_zzz;
static bool trans_UQSUB_zzz(DisasContext *ctx, arg_UQSUB_zzz *a);
typedef arg_rrr_esz arg_AND_zzz;
static bool trans_AND_zzz(DisasContext *ctx, arg_AND_zzz *a);
typedef arg_rrr_esz arg_ORR_zzz;
static bool trans_ORR_zzz(DisasContext *ctx, arg_ORR_zzz *a);
typedef arg_rrr_esz arg_EOR_zzz;
static bool trans_EOR_zzz(DisasContext *ctx, arg_EOR_zzz *a);
typedef arg_rrr_esz arg_BIC_zzz;
static bool trans_BIC_zzz(DisasContext *ctx, arg_BIC_zzz *a);
typedef arg_rrri_esz arg_XAR;
static bool trans_XAR(DisasContext *ctx, arg_XAR *a);
typedef arg_rrrr_esz arg_EOR3;
static bool trans_EOR3(DisasContext *ctx, arg_EOR3 *a);
typedef arg_rrrr_esz arg_BSL;
static bool trans_BSL(DisasContext *ctx, arg_BSL *a);
typedef arg_rrrr_esz arg_BCAX;
static bool trans_BCAX(DisasContext *ctx, arg_BCAX *a);
typedef arg_rrrr_esz arg_BSL1N;
static bool trans_BSL1N(DisasContext *ctx, arg_BSL1N *a);
typedef arg_rrrr_esz arg_BSL2N;
static bool trans_BSL2N(DisasContext *ctx, arg_BSL2N *a);
typedef arg_rrrr_esz arg_NBSL;
static bool trans_NBSL(DisasContext *ctx, arg_NBSL *a);
typedef arg_disas_sve29 arg_INDEX_ii;
static bool trans_INDEX_ii(DisasContext *ctx, arg_INDEX_ii *a);
typedef arg_disas_sve30 arg_INDEX_ir;
static bool trans_INDEX_ir(DisasContext *ctx, arg_INDEX_ir *a);
typedef arg_rri_esz arg_INDEX_ri;
static bool trans_INDEX_ri(DisasContext *ctx, arg_INDEX_ri *a);
typedef arg_rrr_esz arg_INDEX_rr;
static bool trans_INDEX_rr(DisasContext *ctx, arg_INDEX_rr *a);
typedef arg_rri arg_ADDVL;
static bool trans_ADDVL(DisasContext *ctx, arg_ADDVL *a);
typedef arg_rri arg_ADDSVL;
static bool trans_ADDSVL(DisasContext *ctx, arg_ADDSVL *a);
typedef arg_rri arg_ADDPL;
static bool trans_ADDPL(DisasContext *ctx, arg_ADDPL *a);
typedef arg_rri arg_ADDSPL;
static bool trans_ADDSPL(DisasContext *ctx, arg_ADDSPL *a);
typedef arg_disas_sve31 arg_RDVL;
static bool trans_RDVL(DisasContext *ctx, arg_RDVL *a);
typedef arg_disas_sve31 arg_RDSVL;
static bool trans_RDSVL(DisasContext *ctx, arg_RDSVL *a);
typedef arg_rri_esz arg_ASR_zzi;
static bool trans_ASR_zzi(DisasContext *ctx, arg_ASR_zzi *a);
typedef arg_rri_esz arg_LSR_zzi;
static bool trans_LSR_zzi(DisasContext *ctx, arg_LSR_zzi *a);
typedef arg_rri_esz arg_LSL_zzi;
static bool trans_LSL_zzi(DisasContext *ctx, arg_LSL_zzi *a);
typedef arg_rrr_esz arg_ASR_zzw;
static bool trans_ASR_zzw(DisasContext *ctx, arg_ASR_zzw *a);
typedef arg_rrr_esz arg_LSR_zzw;
static bool trans_LSR_zzw(DisasContext *ctx, arg_LSR_zzw *a);
typedef arg_rrr_esz arg_LSL_zzw;
static bool trans_LSL_zzw(DisasContext *ctx, arg_LSL_zzw *a);
typedef arg_rrri arg_ADR_s32;
static bool trans_ADR_s32(DisasContext *ctx, arg_ADR_s32 *a);
typedef arg_rrri arg_ADR_u32;
static bool trans_ADR_u32(DisasContext *ctx, arg_ADR_u32 *a);
typedef arg_rrri arg_ADR_p32;
static bool trans_ADR_p32(DisasContext *ctx, arg_ADR_p32 *a);
typedef arg_rrri arg_ADR_p64;
static bool trans_ADR_p64(DisasContext *ctx, arg_ADR_p64 *a);
typedef arg_disas_sve32 arg_MOVPRFX;
static bool trans_MOVPRFX(DisasContext *ctx, arg_MOVPRFX *a);
typedef arg_rr_esz arg_FEXPA;
static bool trans_FEXPA(DisasContext *ctx, arg_FEXPA *a);
typedef arg_rrr_esz arg_FTSSEL;
static bool trans_FTSSEL(DisasContext *ctx, arg_FTSSEL *a);
typedef arg_incdec_cnt arg_CNT_r;
static bool trans_CNT_r(DisasContext *ctx, arg_CNT_r *a);
typedef arg_incdec_cnt arg_INCDEC_r;
static bool trans_INCDEC_r(DisasContext *ctx, arg_INCDEC_r *a);
typedef arg_incdec_cnt arg_SINCDEC_r_32;
static bool trans_SINCDEC_r_32(DisasContext *ctx, arg_SINCDEC_r_32 *a);
typedef arg_incdec_cnt arg_SINCDEC_r_64;
static bool trans_SINCDEC_r_64(DisasContext *ctx, arg_SINCDEC_r_64 *a);
typedef arg_incdec2_cnt arg_INCDEC_v;
static bool trans_INCDEC_v(DisasContext *ctx, arg_INCDEC_v *a);
typedef arg_incdec2_cnt arg_SINCDEC_v;
static bool trans_SINCDEC_v(DisasContext *ctx, arg_SINCDEC_v *a);
typedef arg_rr_dbm arg_ORR_zzi;
static bool trans_ORR_zzi(DisasContext *ctx, arg_ORR_zzi *a);
typedef arg_rr_dbm arg_EOR_zzi;
static bool trans_EOR_zzi(DisasContext *ctx, arg_EOR_zzi *a);
typedef arg_rr_dbm arg_AND_zzi;
static bool trans_AND_zzi(DisasContext *ctx, arg_AND_zzi *a);
typedef arg_disas_sve33 arg_DUPM;
static bool trans_DUPM(DisasContext *ctx, arg_DUPM *a);
typedef arg_rpri_esz arg_FCPY;
static bool trans_FCPY(DisasContext *ctx, arg_FCPY *a);
typedef arg_disas_sve34 arg_INVALID;
static bool trans_INVALID(DisasContext *ctx, arg_INVALID *a);
typedef arg_rpri_esz arg_CPY_m_i;
static bool trans_CPY_m_i(DisasContext *ctx, arg_CPY_m_i *a);
typedef arg_rpri_esz arg_CPY_z_i;
static bool trans_CPY_z_i(DisasContext *ctx, arg_CPY_z_i *a);
typedef arg_rrri arg_EXT;
static bool trans_EXT(DisasContext *ctx, arg_EXT *a);
typedef arg_rri arg_EXT_sve2;
static bool trans_EXT_sve2(DisasContext *ctx, arg_EXT_sve2 *a);
typedef arg_rr_esz arg_DUP_s;
static bool trans_DUP_s(DisasContext *ctx, arg_DUP_s *a);
typedef arg_rri arg_DUP_x;
static bool trans_DUP_x(DisasContext *ctx, arg_DUP_x *a);
typedef arg_rrr_esz arg_INSR_f;
static bool trans_INSR_f(DisasContext *ctx, arg_INSR_f *a);
typedef arg_rrr_esz arg_INSR_r;
static bool trans_INSR_r(DisasContext *ctx, arg_INSR_r *a);
typedef arg_rr_esz arg_REV_v;
static bool trans_REV_v(DisasContext *ctx, arg_REV_v *a);
typedef arg_rrr_esz arg_TBL;
static bool trans_TBL(DisasContext *ctx, arg_TBL *a);
typedef arg_disas_sve35 arg_UNPK;
static bool trans_UNPK(DisasContext *ctx, arg_UNPK *a);
typedef arg_rrr_esz arg_TBL_sve2;
static bool trans_TBL_sve2(DisasContext *ctx, arg_TBL_sve2 *a);
typedef arg_rrr_esz arg_TBX;
static bool trans_TBX(DisasContext *ctx, arg_TBX *a);
typedef arg_rrr_esz arg_ZIP1_p;
static bool trans_ZIP1_p(DisasContext *ctx, arg_ZIP1_p *a);
typedef arg_rrr_esz arg_ZIP2_p;
static bool trans_ZIP2_p(DisasContext *ctx, arg_ZIP2_p *a);
typedef arg_rrr_esz arg_UZP1_p;
static bool trans_UZP1_p(DisasContext *ctx, arg_UZP1_p *a);
typedef arg_rrr_esz arg_UZP2_p;
static bool trans_UZP2_p(DisasContext *ctx, arg_UZP2_p *a);
typedef arg_rrr_esz arg_TRN1_p;
static bool trans_TRN1_p(DisasContext *ctx, arg_TRN1_p *a);
typedef arg_rrr_esz arg_TRN2_p;
static bool trans_TRN2_p(DisasContext *ctx, arg_TRN2_p *a);
typedef arg_rr_esz arg_REV_p;
static bool trans_REV_p(DisasContext *ctx, arg_REV_p *a);
typedef arg_rr_esz arg_PUNPKLO;
static bool trans_PUNPKLO(DisasContext *ctx, arg_PUNPKLO *a);
typedef arg_rr_esz arg_PUNPKHI;
static bool trans_PUNPKHI(DisasContext *ctx, arg_PUNPKHI *a);
typedef arg_rrr_esz arg_ZIP1_z;
static bool trans_ZIP1_z(DisasContext *ctx, arg_ZIP1_z *a);
typedef arg_rrr_esz arg_ZIP2_z;
static bool trans_ZIP2_z(DisasContext *ctx, arg_ZIP2_z *a);
typedef arg_rrr_esz arg_UZP1_z;
static bool trans_UZP1_z(DisasContext *ctx, arg_UZP1_z *a);
typedef arg_rrr_esz arg_UZP2_z;
static bool trans_UZP2_z(DisasContext *ctx, arg_UZP2_z *a);
typedef arg_rrr_esz arg_TRN1_z;
static bool trans_TRN1_z(DisasContext *ctx, arg_TRN1_z *a);
typedef arg_rrr_esz arg_TRN2_z;
static bool trans_TRN2_z(DisasContext *ctx, arg_TRN2_z *a);
typedef arg_rrr_esz arg_ZIP1_q;
static bool trans_ZIP1_q(DisasContext *ctx, arg_ZIP1_q *a);
typedef arg_rrr_esz arg_ZIP2_q;
static bool trans_ZIP2_q(DisasContext *ctx, arg_ZIP2_q *a);
typedef arg_rrr_esz arg_UZP1_q;
static bool trans_UZP1_q(DisasContext *ctx, arg_UZP1_q *a);
typedef arg_rrr_esz arg_UZP2_q;
static bool trans_UZP2_q(DisasContext *ctx, arg_UZP2_q *a);
typedef arg_rrr_esz arg_TRN1_q;
static bool trans_TRN1_q(DisasContext *ctx, arg_TRN1_q *a);
typedef arg_rrr_esz arg_TRN2_q;
static bool trans_TRN2_q(DisasContext *ctx, arg_TRN2_q *a);
typedef arg_rpr_esz arg_COMPACT;
static bool trans_COMPACT(DisasContext *ctx, arg_COMPACT *a);
typedef arg_rprr_esz arg_CLASTA_z;
static bool trans_CLASTA_z(DisasContext *ctx, arg_CLASTA_z *a);
typedef arg_rprr_esz arg_CLASTB_z;
static bool trans_CLASTB_z(DisasContext *ctx, arg_CLASTB_z *a);
typedef arg_rpr_esz arg_CLASTA_v;
static bool trans_CLASTA_v(DisasContext *ctx, arg_CLASTA_v *a);
typedef arg_rpr_esz arg_CLASTB_v;
static bool trans_CLASTB_v(DisasContext *ctx, arg_CLASTB_v *a);
typedef arg_rpr_esz arg_CLASTA_r;
static bool trans_CLASTA_r(DisasContext *ctx, arg_CLASTA_r *a);
typedef arg_rpr_esz arg_CLASTB_r;
static bool trans_CLASTB_r(DisasContext *ctx, arg_CLASTB_r *a);
typedef arg_rpr_esz arg_LASTA_v;
static bool trans_LASTA_v(DisasContext *ctx, arg_LASTA_v *a);
typedef arg_rpr_esz arg_LASTB_v;
static bool trans_LASTB_v(DisasContext *ctx, arg_LASTB_v *a);
typedef arg_rpr_esz arg_LASTA_r;
static bool trans_LASTA_r(DisasContext *ctx, arg_LASTA_r *a);
typedef arg_rpr_esz arg_LASTB_r;
static bool trans_LASTB_r(DisasContext *ctx, arg_LASTB_r *a);
typedef arg_rpr_esz arg_CPY_m_v;
static bool trans_CPY_m_v(DisasContext *ctx, arg_CPY_m_v *a);
typedef arg_rpr_esz arg_CPY_m_r;
static bool trans_CPY_m_r(DisasContext *ctx, arg_CPY_m_r *a);
typedef arg_rpr_esz arg_REVB;
static bool trans_REVB(DisasContext *ctx, arg_REVB *a);
typedef arg_rpr_esz arg_REVH;
static bool trans_REVH(DisasContext *ctx, arg_REVH *a);
typedef arg_rpr_esz arg_REVW;
static bool trans_REVW(DisasContext *ctx, arg_REVW *a);
typedef arg_rpr_esz arg_RBIT;
static bool trans_RBIT(DisasContext *ctx, arg_RBIT *a);
typedef arg_rpr_esz arg_REVD;
static bool trans_REVD(DisasContext *ctx, arg_REVD *a);
typedef arg_rprr_esz arg_SPLICE;
static bool trans_SPLICE(DisasContext *ctx, arg_SPLICE *a);
typedef arg_rpr_esz arg_SPLICE_sve2;
static bool trans_SPLICE_sve2(DisasContext *ctx, arg_SPLICE_sve2 *a);
typedef arg_rprr_esz arg_SEL_zpzz;
static bool trans_SEL_zpzz(DisasContext *ctx, arg_SEL_zpzz *a);
typedef arg_rprr_esz arg_CMPHS_ppzz;
static bool trans_CMPHS_ppzz(DisasContext *ctx, arg_CMPHS_ppzz *a);
typedef arg_rprr_esz arg_CMPHI_ppzz;
static bool trans_CMPHI_ppzz(DisasContext *ctx, arg_CMPHI_ppzz *a);
typedef arg_rprr_esz arg_CMPGE_ppzz;
static bool trans_CMPGE_ppzz(DisasContext *ctx, arg_CMPGE_ppzz *a);
typedef arg_rprr_esz arg_CMPGT_ppzz;
static bool trans_CMPGT_ppzz(DisasContext *ctx, arg_CMPGT_ppzz *a);
typedef arg_rprr_esz arg_CMPEQ_ppzz;
static bool trans_CMPEQ_ppzz(DisasContext *ctx, arg_CMPEQ_ppzz *a);
typedef arg_rprr_esz arg_CMPNE_ppzz;
static bool trans_CMPNE_ppzz(DisasContext *ctx, arg_CMPNE_ppzz *a);
typedef arg_rprr_esz arg_CMPEQ_ppzw;
static bool trans_CMPEQ_ppzw(DisasContext *ctx, arg_CMPEQ_ppzw *a);
typedef arg_rprr_esz arg_CMPNE_ppzw;
static bool trans_CMPNE_ppzw(DisasContext *ctx, arg_CMPNE_ppzw *a);
typedef arg_rprr_esz arg_CMPGE_ppzw;
static bool trans_CMPGE_ppzw(DisasContext *ctx, arg_CMPGE_ppzw *a);
typedef arg_rprr_esz arg_CMPGT_ppzw;
static bool trans_CMPGT_ppzw(DisasContext *ctx, arg_CMPGT_ppzw *a);
typedef arg_rprr_esz arg_CMPLT_ppzw;
static bool trans_CMPLT_ppzw(DisasContext *ctx, arg_CMPLT_ppzw *a);
typedef arg_rprr_esz arg_CMPLE_ppzw;
static bool trans_CMPLE_ppzw(DisasContext *ctx, arg_CMPLE_ppzw *a);
typedef arg_rprr_esz arg_CMPHS_ppzw;
static bool trans_CMPHS_ppzw(DisasContext *ctx, arg_CMPHS_ppzw *a);
typedef arg_rprr_esz arg_CMPHI_ppzw;
static bool trans_CMPHI_ppzw(DisasContext *ctx, arg_CMPHI_ppzw *a);
typedef arg_rprr_esz arg_CMPLO_ppzw;
static bool trans_CMPLO_ppzw(DisasContext *ctx, arg_CMPLO_ppzw *a);
typedef arg_rprr_esz arg_CMPLS_ppzw;
static bool trans_CMPLS_ppzw(DisasContext *ctx, arg_CMPLS_ppzw *a);
typedef arg_rpri_esz arg_CMPHS_ppzi;
static bool trans_CMPHS_ppzi(DisasContext *ctx, arg_CMPHS_ppzi *a);
typedef arg_rpri_esz arg_CMPHI_ppzi;
static bool trans_CMPHI_ppzi(DisasContext *ctx, arg_CMPHI_ppzi *a);
typedef arg_rpri_esz arg_CMPLO_ppzi;
static bool trans_CMPLO_ppzi(DisasContext *ctx, arg_CMPLO_ppzi *a);
typedef arg_rpri_esz arg_CMPLS_ppzi;
static bool trans_CMPLS_ppzi(DisasContext *ctx, arg_CMPLS_ppzi *a);
typedef arg_rpri_esz arg_CMPGE_ppzi;
static bool trans_CMPGE_ppzi(DisasContext *ctx, arg_CMPGE_ppzi *a);
typedef arg_rpri_esz arg_CMPGT_ppzi;
static bool trans_CMPGT_ppzi(DisasContext *ctx, arg_CMPGT_ppzi *a);
typedef arg_rpri_esz arg_CMPLT_ppzi;
static bool trans_CMPLT_ppzi(DisasContext *ctx, arg_CMPLT_ppzi *a);
typedef arg_rpri_esz arg_CMPLE_ppzi;
static bool trans_CMPLE_ppzi(DisasContext *ctx, arg_CMPLE_ppzi *a);
typedef arg_rpri_esz arg_CMPEQ_ppzi;
static bool trans_CMPEQ_ppzi(DisasContext *ctx, arg_CMPEQ_ppzi *a);
typedef arg_rpri_esz arg_CMPNE_ppzi;
static bool trans_CMPNE_ppzi(DisasContext *ctx, arg_CMPNE_ppzi *a);
typedef arg_rprr_s arg_AND_pppp;
static bool trans_AND_pppp(DisasContext *ctx, arg_AND_pppp *a);
typedef arg_rprr_s arg_BIC_pppp;
static bool trans_BIC_pppp(DisasContext *ctx, arg_BIC_pppp *a);
typedef arg_rprr_s arg_EOR_pppp;
static bool trans_EOR_pppp(DisasContext *ctx, arg_EOR_pppp *a);
typedef arg_rprr_s arg_SEL_pppp;
static bool trans_SEL_pppp(DisasContext *ctx, arg_SEL_pppp *a);
typedef arg_rprr_s arg_ORR_pppp;
static bool trans_ORR_pppp(DisasContext *ctx, arg_ORR_pppp *a);
typedef arg_rprr_s arg_ORN_pppp;
static bool trans_ORN_pppp(DisasContext *ctx, arg_ORN_pppp *a);
typedef arg_rprr_s arg_NOR_pppp;
static bool trans_NOR_pppp(DisasContext *ctx, arg_NOR_pppp *a);
typedef arg_rprr_s arg_NAND_pppp;
static bool trans_NAND_pppp(DisasContext *ctx, arg_NAND_pppp *a);
typedef arg_disas_sve36 arg_PTEST;
static bool trans_PTEST(DisasContext *ctx, arg_PTEST *a);
typedef arg_ptrue arg_PTRUE;
static bool trans_PTRUE(DisasContext *ctx, arg_PTRUE *a);
typedef arg_disas_sve34 arg_SETFFR;
static bool trans_SETFFR(DisasContext *ctx, arg_SETFFR *a);
typedef arg_disas_sve37 arg_PFALSE;
static bool trans_PFALSE(DisasContext *ctx, arg_PFALSE *a);
typedef arg_disas_sve38 arg_RDFFR_p;
static bool trans_RDFFR_p(DisasContext *ctx, arg_RDFFR_p *a);
typedef arg_disas_sve37 arg_RDFFR;
static bool trans_RDFFR(DisasContext *ctx, arg_RDFFR *a);
typedef arg_disas_sve39 arg_WRFFR;
static bool trans_WRFFR(DisasContext *ctx, arg_WRFFR *a);
typedef arg_rr_esz arg_PFIRST;
static bool trans_PFIRST(DisasContext *ctx, arg_PFIRST *a);
typedef arg_rr_esz arg_PNEXT;
static bool trans_PNEXT(DisasContext *ctx, arg_PNEXT *a);
typedef arg_rprr_s arg_BRKPA;
static bool trans_BRKPA(DisasContext *ctx, arg_BRKPA *a);
typedef arg_rprr_s arg_BRKPB;
static bool trans_BRKPB(DisasContext *ctx, arg_BRKPB *a);
typedef arg_rpr_s arg_BRKA_z;
static bool trans_BRKA_z(DisasContext *ctx, arg_BRKA_z *a);
typedef arg_rpr_s arg_BRKB_z;
static bool trans_BRKB_z(DisasContext *ctx, arg_BRKB_z *a);
typedef arg_rpr_s arg_BRKA_m;
static bool trans_BRKA_m(DisasContext *ctx, arg_BRKA_m *a);
typedef arg_rpr_s arg_BRKB_m;
static bool trans_BRKB_m(DisasContext *ctx, arg_BRKB_m *a);
typedef arg_rpr_s arg_BRKN;
static bool trans_BRKN(DisasContext *ctx, arg_BRKN *a);
typedef arg_rpr_esz arg_CNTP;
static bool trans_CNTP(DisasContext *ctx, arg_CNTP *a);
typedef arg_incdec_pred arg_INCDECP_r;
static bool trans_INCDECP_r(DisasContext *ctx, arg_INCDECP_r *a);
typedef arg_incdec2_pred arg_INCDECP_z;
static bool trans_INCDECP_z(DisasContext *ctx, arg_INCDECP_z *a);
typedef arg_incdec_pred arg_SINCDECP_r_32;
static bool trans_SINCDECP_r_32(DisasContext *ctx, arg_SINCDECP_r_32 *a);
typedef arg_incdec_pred arg_SINCDECP_r_64;
static bool trans_SINCDECP_r_64(DisasContext *ctx, arg_SINCDECP_r_64 *a);
typedef arg_incdec2_pred arg_SINCDECP_z;
static bool trans_SINCDECP_z(DisasContext *ctx, arg_SINCDECP_z *a);
typedef arg_disas_sve40 arg_CTERM;
static bool trans_CTERM(DisasContext *ctx, arg_CTERM *a);
typedef arg_disas_sve41 arg_WHILE;
static bool trans_WHILE(DisasContext *ctx, arg_WHILE *a);
typedef arg_disas_sve42 arg_WHILE_ptr;
static bool trans_WHILE_ptr(DisasContext *ctx, arg_WHILE_ptr *a);
typedef arg_disas_sve43 arg_FDUP;
static bool trans_FDUP(DisasContext *ctx, arg_FDUP *a);
typedef arg_disas_sve43 arg_DUP_i;
static bool trans_DUP_i(DisasContext *ctx, arg_DUP_i *a);
typedef arg_rri_esz arg_ADD_zzi;
static bool trans_ADD_zzi(DisasContext *ctx, arg_ADD_zzi *a);
typedef arg_rri_esz arg_SUB_zzi;
static bool trans_SUB_zzi(DisasContext *ctx, arg_SUB_zzi *a);
typedef arg_rri_esz arg_SUBR_zzi;
static bool trans_SUBR_zzi(DisasContext *ctx, arg_SUBR_zzi *a);
typedef arg_rri_esz arg_SQADD_zzi;
static bool trans_SQADD_zzi(DisasContext *ctx, arg_SQADD_zzi *a);
typedef arg_rri_esz arg_UQADD_zzi;
static bool trans_UQADD_zzi(DisasContext *ctx, arg_UQADD_zzi *a);
typedef arg_rri_esz arg_SQSUB_zzi;
static bool trans_SQSUB_zzi(DisasContext *ctx, arg_SQSUB_zzi *a);
typedef arg_rri_esz arg_UQSUB_zzi;
static bool trans_UQSUB_zzi(DisasContext *ctx, arg_UQSUB_zzi *a);
typedef arg_rri_esz arg_SMAX_zzi;
static bool trans_SMAX_zzi(DisasContext *ctx, arg_SMAX_zzi *a);
typedef arg_rri_esz arg_UMAX_zzi;
static bool trans_UMAX_zzi(DisasContext *ctx, arg_UMAX_zzi *a);
typedef arg_rri_esz arg_SMIN_zzi;
static bool trans_SMIN_zzi(DisasContext *ctx, arg_SMIN_zzi *a);
typedef arg_rri_esz arg_UMIN_zzi;
static bool trans_UMIN_zzi(DisasContext *ctx, arg_UMIN_zzi *a);
typedef arg_rri_esz arg_MUL_zzi;
static bool trans_MUL_zzi(DisasContext *ctx, arg_MUL_zzi *a);
typedef arg_disas_sve44 arg_DOT_zzzz;
static bool trans_DOT_zzzz(DisasContext *ctx, arg_DOT_zzzz *a);
typedef arg_disas_sve45 arg_CDOT_zzzz;
static bool trans_CDOT_zzzz(DisasContext *ctx, arg_CDOT_zzzz *a);
typedef arg_rrxr_esz arg_SDOT_zzxw_s;
static bool trans_SDOT_zzxw_s(DisasContext *ctx, arg_SDOT_zzxw_s *a);
typedef arg_rrxr_esz arg_SDOT_zzxw_d;
static bool trans_SDOT_zzxw_d(DisasContext *ctx, arg_SDOT_zzxw_d *a);
typedef arg_rrxr_esz arg_UDOT_zzxw_s;
static bool trans_UDOT_zzxw_s(DisasContext *ctx, arg_UDOT_zzxw_s *a);
typedef arg_rrxr_esz arg_UDOT_zzxw_d;
static bool trans_UDOT_zzxw_d(DisasContext *ctx, arg_UDOT_zzxw_d *a);
typedef arg_rrxr_esz arg_MLA_zzxz_h;
static bool trans_MLA_zzxz_h(DisasContext *ctx, arg_MLA_zzxz_h *a);
typedef arg_rrxr_esz arg_MLA_zzxz_s;
static bool trans_MLA_zzxz_s(DisasContext *ctx, arg_MLA_zzxz_s *a);
typedef arg_rrxr_esz arg_MLA_zzxz_d;
static bool trans_MLA_zzxz_d(DisasContext *ctx, arg_MLA_zzxz_d *a);
typedef arg_rrxr_esz arg_MLS_zzxz_h;
static bool trans_MLS_zzxz_h(DisasContext *ctx, arg_MLS_zzxz_h *a);
typedef arg_rrxr_esz arg_MLS_zzxz_s;
static bool trans_MLS_zzxz_s(DisasContext *ctx, arg_MLS_zzxz_s *a);
typedef arg_rrxr_esz arg_MLS_zzxz_d;
static bool trans_MLS_zzxz_d(DisasContext *ctx, arg_MLS_zzxz_d *a);
typedef arg_rrxr_esz arg_SQRDMLAH_zzxz_h;
static bool trans_SQRDMLAH_zzxz_h(DisasContext *ctx, arg_SQRDMLAH_zzxz_h *a);
typedef arg_rrxr_esz arg_SQRDMLAH_zzxz_s;
static bool trans_SQRDMLAH_zzxz_s(DisasContext *ctx, arg_SQRDMLAH_zzxz_s *a);
typedef arg_rrxr_esz arg_SQRDMLAH_zzxz_d;
static bool trans_SQRDMLAH_zzxz_d(DisasContext *ctx, arg_SQRDMLAH_zzxz_d *a);
typedef arg_rrxr_esz arg_SQRDMLSH_zzxz_h;
static bool trans_SQRDMLSH_zzxz_h(DisasContext *ctx, arg_SQRDMLSH_zzxz_h *a);
typedef arg_rrxr_esz arg_SQRDMLSH_zzxz_s;
static bool trans_SQRDMLSH_zzxz_s(DisasContext *ctx, arg_SQRDMLSH_zzxz_s *a);
typedef arg_rrxr_esz arg_SQRDMLSH_zzxz_d;
static bool trans_SQRDMLSH_zzxz_d(DisasContext *ctx, arg_SQRDMLSH_zzxz_d *a);
typedef arg_rrxr_esz arg_USDOT_zzxw_s;
static bool trans_USDOT_zzxw_s(DisasContext *ctx, arg_USDOT_zzxw_s *a);
typedef arg_rrxr_esz arg_SUDOT_zzxw_s;
static bool trans_SUDOT_zzxw_s(DisasContext *ctx, arg_SUDOT_zzxw_s *a);
typedef arg_rrxr_esz arg_SQDMLALB_zzxw_s;
static bool trans_SQDMLALB_zzxw_s(DisasContext *ctx, arg_SQDMLALB_zzxw_s *a);
typedef arg_rrxr_esz arg_SQDMLALB_zzxw_d;
static bool trans_SQDMLALB_zzxw_d(DisasContext *ctx, arg_SQDMLALB_zzxw_d *a);
typedef arg_rrxr_esz arg_SQDMLALT_zzxw_s;
static bool trans_SQDMLALT_zzxw_s(DisasContext *ctx, arg_SQDMLALT_zzxw_s *a);
typedef arg_rrxr_esz arg_SQDMLALT_zzxw_d;
static bool trans_SQDMLALT_zzxw_d(DisasContext *ctx, arg_SQDMLALT_zzxw_d *a);
typedef arg_rrxr_esz arg_SQDMLSLB_zzxw_s;
static bool trans_SQDMLSLB_zzxw_s(DisasContext *ctx, arg_SQDMLSLB_zzxw_s *a);
typedef arg_rrxr_esz arg_SQDMLSLB_zzxw_d;
static bool trans_SQDMLSLB_zzxw_d(DisasContext *ctx, arg_SQDMLSLB_zzxw_d *a);
typedef arg_rrxr_esz arg_SQDMLSLT_zzxw_s;
static bool trans_SQDMLSLT_zzxw_s(DisasContext *ctx, arg_SQDMLSLT_zzxw_s *a);
typedef arg_rrxr_esz arg_SQDMLSLT_zzxw_d;
static bool trans_SQDMLSLT_zzxw_d(DisasContext *ctx, arg_SQDMLSLT_zzxw_d *a);
typedef arg_disas_sve46 arg_CDOT_zzxw_s;
static bool trans_CDOT_zzxw_s(DisasContext *ctx, arg_CDOT_zzxw_s *a);
typedef arg_disas_sve46 arg_CDOT_zzxw_d;
static bool trans_CDOT_zzxw_d(DisasContext *ctx, arg_CDOT_zzxw_d *a);
typedef arg_disas_sve46 arg_CMLA_zzxz_h;
static bool trans_CMLA_zzxz_h(DisasContext *ctx, arg_CMLA_zzxz_h *a);
typedef arg_disas_sve46 arg_CMLA_zzxz_s;
static bool trans_CMLA_zzxz_s(DisasContext *ctx, arg_CMLA_zzxz_s *a);
typedef arg_disas_sve46 arg_SQRDCMLAH_zzxz_h;
static bool trans_SQRDCMLAH_zzxz_h(DisasContext *ctx, arg_SQRDCMLAH_zzxz_h *a);
typedef arg_disas_sve46 arg_SQRDCMLAH_zzxz_s;
static bool trans_SQRDCMLAH_zzxz_s(DisasContext *ctx, arg_SQRDCMLAH_zzxz_s *a);
typedef arg_rrxr_esz arg_SMLALB_zzxw_s;
static bool trans_SMLALB_zzxw_s(DisasContext *ctx, arg_SMLALB_zzxw_s *a);
typedef arg_rrxr_esz arg_SMLALB_zzxw_d;
static bool trans_SMLALB_zzxw_d(DisasContext *ctx, arg_SMLALB_zzxw_d *a);
typedef arg_rrxr_esz arg_SMLALT_zzxw_s;
static bool trans_SMLALT_zzxw_s(DisasContext *ctx, arg_SMLALT_zzxw_s *a);
typedef arg_rrxr_esz arg_SMLALT_zzxw_d;
static bool trans_SMLALT_zzxw_d(DisasContext *ctx, arg_SMLALT_zzxw_d *a);
typedef arg_rrxr_esz arg_UMLALB_zzxw_s;
static bool trans_UMLALB_zzxw_s(DisasContext *ctx, arg_UMLALB_zzxw_s *a);
typedef arg_rrxr_esz arg_UMLALB_zzxw_d;
static bool trans_UMLALB_zzxw_d(DisasContext *ctx, arg_UMLALB_zzxw_d *a);
typedef arg_rrxr_esz arg_UMLALT_zzxw_s;
static bool trans_UMLALT_zzxw_s(DisasContext *ctx, arg_UMLALT_zzxw_s *a);
typedef arg_rrxr_esz arg_UMLALT_zzxw_d;
static bool trans_UMLALT_zzxw_d(DisasContext *ctx, arg_UMLALT_zzxw_d *a);
typedef arg_rrxr_esz arg_SMLSLB_zzxw_s;
static bool trans_SMLSLB_zzxw_s(DisasContext *ctx, arg_SMLSLB_zzxw_s *a);
typedef arg_rrxr_esz arg_SMLSLB_zzxw_d;
static bool trans_SMLSLB_zzxw_d(DisasContext *ctx, arg_SMLSLB_zzxw_d *a);
typedef arg_rrxr_esz arg_SMLSLT_zzxw_s;
static bool trans_SMLSLT_zzxw_s(DisasContext *ctx, arg_SMLSLT_zzxw_s *a);
typedef arg_rrxr_esz arg_SMLSLT_zzxw_d;
static bool trans_SMLSLT_zzxw_d(DisasContext *ctx, arg_SMLSLT_zzxw_d *a);
typedef arg_rrxr_esz arg_UMLSLB_zzxw_s;
static bool trans_UMLSLB_zzxw_s(DisasContext *ctx, arg_UMLSLB_zzxw_s *a);
typedef arg_rrxr_esz arg_UMLSLB_zzxw_d;
static bool trans_UMLSLB_zzxw_d(DisasContext *ctx, arg_UMLSLB_zzxw_d *a);
typedef arg_rrxr_esz arg_UMLSLT_zzxw_s;
static bool trans_UMLSLT_zzxw_s(DisasContext *ctx, arg_UMLSLT_zzxw_s *a);
typedef arg_rrxr_esz arg_UMLSLT_zzxw_d;
static bool trans_UMLSLT_zzxw_d(DisasContext *ctx, arg_UMLSLT_zzxw_d *a);
typedef arg_rrx_esz arg_SMULLB_zzx_s;
static bool trans_SMULLB_zzx_s(DisasContext *ctx, arg_SMULLB_zzx_s *a);
typedef arg_rrx_esz arg_SMULLB_zzx_d;
static bool trans_SMULLB_zzx_d(DisasContext *ctx, arg_SMULLB_zzx_d *a);
typedef arg_rrx_esz arg_SMULLT_zzx_s;
static bool trans_SMULLT_zzx_s(DisasContext *ctx, arg_SMULLT_zzx_s *a);
typedef arg_rrx_esz arg_SMULLT_zzx_d;
static bool trans_SMULLT_zzx_d(DisasContext *ctx, arg_SMULLT_zzx_d *a);
typedef arg_rrx_esz arg_UMULLB_zzx_s;
static bool trans_UMULLB_zzx_s(DisasContext *ctx, arg_UMULLB_zzx_s *a);
typedef arg_rrx_esz arg_UMULLB_zzx_d;
static bool trans_UMULLB_zzx_d(DisasContext *ctx, arg_UMULLB_zzx_d *a);
typedef arg_rrx_esz arg_UMULLT_zzx_s;
static bool trans_UMULLT_zzx_s(DisasContext *ctx, arg_UMULLT_zzx_s *a);
typedef arg_rrx_esz arg_UMULLT_zzx_d;
static bool trans_UMULLT_zzx_d(DisasContext *ctx, arg_UMULLT_zzx_d *a);
typedef arg_rrx_esz arg_SQDMULLB_zzx_s;
static bool trans_SQDMULLB_zzx_s(DisasContext *ctx, arg_SQDMULLB_zzx_s *a);
typedef arg_rrx_esz arg_SQDMULLB_zzx_d;
static bool trans_SQDMULLB_zzx_d(DisasContext *ctx, arg_SQDMULLB_zzx_d *a);
typedef arg_rrx_esz arg_SQDMULLT_zzx_s;
static bool trans_SQDMULLT_zzx_s(DisasContext *ctx, arg_SQDMULLT_zzx_s *a);
typedef arg_rrx_esz arg_SQDMULLT_zzx_d;
static bool trans_SQDMULLT_zzx_d(DisasContext *ctx, arg_SQDMULLT_zzx_d *a);
typedef arg_rrx_esz arg_SQDMULH_zzx_h;
static bool trans_SQDMULH_zzx_h(DisasContext *ctx, arg_SQDMULH_zzx_h *a);
typedef arg_rrx_esz arg_SQDMULH_zzx_s;
static bool trans_SQDMULH_zzx_s(DisasContext *ctx, arg_SQDMULH_zzx_s *a);
typedef arg_rrx_esz arg_SQDMULH_zzx_d;
static bool trans_SQDMULH_zzx_d(DisasContext *ctx, arg_SQDMULH_zzx_d *a);
typedef arg_rrx_esz arg_SQRDMULH_zzx_h;
static bool trans_SQRDMULH_zzx_h(DisasContext *ctx, arg_SQRDMULH_zzx_h *a);
typedef arg_rrx_esz arg_SQRDMULH_zzx_s;
static bool trans_SQRDMULH_zzx_s(DisasContext *ctx, arg_SQRDMULH_zzx_s *a);
typedef arg_rrx_esz arg_SQRDMULH_zzx_d;
static bool trans_SQRDMULH_zzx_d(DisasContext *ctx, arg_SQRDMULH_zzx_d *a);
typedef arg_rrx_esz arg_MUL_zzx_h;
static bool trans_MUL_zzx_h(DisasContext *ctx, arg_MUL_zzx_h *a);
typedef arg_rrx_esz arg_MUL_zzx_s;
static bool trans_MUL_zzx_s(DisasContext *ctx, arg_MUL_zzx_s *a);
typedef arg_rrx_esz arg_MUL_zzx_d;
static bool trans_MUL_zzx_d(DisasContext *ctx, arg_MUL_zzx_d *a);
typedef arg_disas_sve47 arg_FCADD;
static bool trans_FCADD(DisasContext *ctx, arg_FCADD *a);
typedef arg_disas_sve48 arg_FCMLA_zpzzz;
static bool trans_FCMLA_zpzzz(DisasContext *ctx, arg_FCMLA_zpzzz *a);
typedef arg_disas_sve49 arg_FCMLA_zzxz;
static bool trans_FCMLA_zzxz(DisasContext *ctx, arg_FCMLA_zzxz *a);
typedef arg_rrxr_esz arg_FMLA_zzxz;
static bool trans_FMLA_zzxz(DisasContext *ctx, arg_FMLA_zzxz *a);
typedef arg_rrxr_esz arg_FMLS_zzxz;
static bool trans_FMLS_zzxz(DisasContext *ctx, arg_FMLS_zzxz *a);
typedef arg_rrx_esz arg_FMUL_zzx;
static bool trans_FMUL_zzx(DisasContext *ctx, arg_FMUL_zzx *a);
typedef arg_rpr_esz arg_FADDV;
static bool trans_FADDV(DisasContext *ctx, arg_FADDV *a);
typedef arg_rpr_esz arg_FMAXNMV;
static bool trans_FMAXNMV(DisasContext *ctx, arg_FMAXNMV *a);
typedef arg_rpr_esz arg_FMINNMV;
static bool trans_FMINNMV(DisasContext *ctx, arg_FMINNMV *a);
typedef arg_rpr_esz arg_FMAXV;
static bool trans_FMAXV(DisasContext *ctx, arg_FMAXV *a);
typedef arg_rpr_esz arg_FMINV;
static bool trans_FMINV(DisasContext *ctx, arg_FMINV *a);
typedef arg_rr_esz arg_FRECPE;
static bool trans_FRECPE(DisasContext *ctx, arg_FRECPE *a);
typedef arg_rr_esz arg_FRSQRTE;
static bool trans_FRSQRTE(DisasContext *ctx, arg_FRSQRTE *a);
typedef arg_rpr_esz arg_FCMGE_ppz0;
static bool trans_FCMGE_ppz0(DisasContext *ctx, arg_FCMGE_ppz0 *a);
typedef arg_rpr_esz arg_FCMGT_ppz0;
static bool trans_FCMGT_ppz0(DisasContext *ctx, arg_FCMGT_ppz0 *a);
typedef arg_rpr_esz arg_FCMLT_ppz0;
static bool trans_FCMLT_ppz0(DisasContext *ctx, arg_FCMLT_ppz0 *a);
typedef arg_rpr_esz arg_FCMLE_ppz0;
static bool trans_FCMLE_ppz0(DisasContext *ctx, arg_FCMLE_ppz0 *a);
typedef arg_rpr_esz arg_FCMEQ_ppz0;
static bool trans_FCMEQ_ppz0(DisasContext *ctx, arg_FCMEQ_ppz0 *a);
typedef arg_rpr_esz arg_FCMNE_ppz0;
static bool trans_FCMNE_ppz0(DisasContext *ctx, arg_FCMNE_ppz0 *a);
typedef arg_rprr_esz arg_FADDA;
static bool trans_FADDA(DisasContext *ctx, arg_FADDA *a);
typedef arg_rrr_esz arg_FADD_zzz;
static bool trans_FADD_zzz(DisasContext *ctx, arg_FADD_zzz *a);
typedef arg_rrr_esz arg_FSUB_zzz;
static bool trans_FSUB_zzz(DisasContext *ctx, arg_FSUB_zzz *a);
typedef arg_rrr_esz arg_FMUL_zzz;
static bool trans_FMUL_zzz(DisasContext *ctx, arg_FMUL_zzz *a);
typedef arg_rrr_esz arg_FTSMUL;
static bool trans_FTSMUL(DisasContext *ctx, arg_FTSMUL *a);
typedef arg_rrr_esz arg_FRECPS;
static bool trans_FRECPS(DisasContext *ctx, arg_FRECPS *a);
typedef arg_rrr_esz arg_FRSQRTS;
static bool trans_FRSQRTS(DisasContext *ctx, arg_FRSQRTS *a);
typedef arg_rprr_esz arg_FADD_zpzz;
static bool trans_FADD_zpzz(DisasContext *ctx, arg_FADD_zpzz *a);
typedef arg_rprr_esz arg_FSUB_zpzz;
static bool trans_FSUB_zpzz(DisasContext *ctx, arg_FSUB_zpzz *a);
typedef arg_rprr_esz arg_FMUL_zpzz;
static bool trans_FMUL_zpzz(DisasContext *ctx, arg_FMUL_zpzz *a);
typedef arg_rprr_esz arg_FMAXNM_zpzz;
static bool trans_FMAXNM_zpzz(DisasContext *ctx, arg_FMAXNM_zpzz *a);
typedef arg_rprr_esz arg_FMINNM_zpzz;
static bool trans_FMINNM_zpzz(DisasContext *ctx, arg_FMINNM_zpzz *a);
typedef arg_rprr_esz arg_FMAX_zpzz;
static bool trans_FMAX_zpzz(DisasContext *ctx, arg_FMAX_zpzz *a);
typedef arg_rprr_esz arg_FMIN_zpzz;
static bool trans_FMIN_zpzz(DisasContext *ctx, arg_FMIN_zpzz *a);
typedef arg_rprr_esz arg_FABD;
static bool trans_FABD(DisasContext *ctx, arg_FABD *a);
typedef arg_rprr_esz arg_FSCALE;
static bool trans_FSCALE(DisasContext *ctx, arg_FSCALE *a);
typedef arg_rprr_esz arg_FMULX;
static bool trans_FMULX(DisasContext *ctx, arg_FMULX *a);
typedef arg_rprr_esz arg_FDIV;
static bool trans_FDIV(DisasContext *ctx, arg_FDIV *a);
typedef arg_rpri_esz arg_FADD_zpzi;
static bool trans_FADD_zpzi(DisasContext *ctx, arg_FADD_zpzi *a);
typedef arg_rpri_esz arg_FSUB_zpzi;
static bool trans_FSUB_zpzi(DisasContext *ctx, arg_FSUB_zpzi *a);
typedef arg_rpri_esz arg_FMUL_zpzi;
static bool trans_FMUL_zpzi(DisasContext *ctx, arg_FMUL_zpzi *a);
typedef arg_rpri_esz arg_FSUBR_zpzi;
static bool trans_FSUBR_zpzi(DisasContext *ctx, arg_FSUBR_zpzi *a);
typedef arg_rpri_esz arg_FMAXNM_zpzi;
static bool trans_FMAXNM_zpzi(DisasContext *ctx, arg_FMAXNM_zpzi *a);
typedef arg_rpri_esz arg_FMINNM_zpzi;
static bool trans_FMINNM_zpzi(DisasContext *ctx, arg_FMINNM_zpzi *a);
typedef arg_rpri_esz arg_FMAX_zpzi;
static bool trans_FMAX_zpzi(DisasContext *ctx, arg_FMAX_zpzi *a);
typedef arg_rpri_esz arg_FMIN_zpzi;
static bool trans_FMIN_zpzi(DisasContext *ctx, arg_FMIN_zpzi *a);
typedef arg_rrri_esz arg_FTMAD;
static bool trans_FTMAD(DisasContext *ctx, arg_FTMAD *a);
typedef arg_rprrr_esz arg_FMLA_zpzzz;
static bool trans_FMLA_zpzzz(DisasContext *ctx, arg_FMLA_zpzzz *a);
typedef arg_rprrr_esz arg_FMLS_zpzzz;
static bool trans_FMLS_zpzzz(DisasContext *ctx, arg_FMLS_zpzzz *a);
typedef arg_rprrr_esz arg_FNMLA_zpzzz;
static bool trans_FNMLA_zpzzz(DisasContext *ctx, arg_FNMLA_zpzzz *a);
typedef arg_rprrr_esz arg_FNMLS_zpzzz;
static bool trans_FNMLS_zpzzz(DisasContext *ctx, arg_FNMLS_zpzzz *a);
typedef arg_rpr_esz arg_FCVT_sh;
static bool trans_FCVT_sh(DisasContext *ctx, arg_FCVT_sh *a);
typedef arg_rpr_esz arg_FCVT_hs;
static bool trans_FCVT_hs(DisasContext *ctx, arg_FCVT_hs *a);
typedef arg_rpr_esz arg_BFCVT;
static bool trans_BFCVT(DisasContext *ctx, arg_BFCVT *a);
typedef arg_rpr_esz arg_FCVT_dh;
static bool trans_FCVT_dh(DisasContext *ctx, arg_FCVT_dh *a);
typedef arg_rpr_esz arg_FCVT_hd;
static bool trans_FCVT_hd(DisasContext *ctx, arg_FCVT_hd *a);
typedef arg_rpr_esz arg_FCVT_ds;
static bool trans_FCVT_ds(DisasContext *ctx, arg_FCVT_ds *a);
typedef arg_rpr_esz arg_FCVT_sd;
static bool trans_FCVT_sd(DisasContext *ctx, arg_FCVT_sd *a);
typedef arg_rpr_esz arg_FCVTZS_hh;
static bool trans_FCVTZS_hh(DisasContext *ctx, arg_FCVTZS_hh *a);
typedef arg_rpr_esz arg_FCVTZU_hh;
static bool trans_FCVTZU_hh(DisasContext *ctx, arg_FCVTZU_hh *a);
typedef arg_rpr_esz arg_FCVTZS_hs;
static bool trans_FCVTZS_hs(DisasContext *ctx, arg_FCVTZS_hs *a);
typedef arg_rpr_esz arg_FCVTZU_hs;
static bool trans_FCVTZU_hs(DisasContext *ctx, arg_FCVTZU_hs *a);
typedef arg_rpr_esz arg_FCVTZS_hd;
static bool trans_FCVTZS_hd(DisasContext *ctx, arg_FCVTZS_hd *a);
typedef arg_rpr_esz arg_FCVTZU_hd;
static bool trans_FCVTZU_hd(DisasContext *ctx, arg_FCVTZU_hd *a);
typedef arg_rpr_esz arg_FCVTZS_ss;
static bool trans_FCVTZS_ss(DisasContext *ctx, arg_FCVTZS_ss *a);
typedef arg_rpr_esz arg_FCVTZU_ss;
static bool trans_FCVTZU_ss(DisasContext *ctx, arg_FCVTZU_ss *a);
typedef arg_rpr_esz arg_FCVTZS_ds;
static bool trans_FCVTZS_ds(DisasContext *ctx, arg_FCVTZS_ds *a);
typedef arg_rpr_esz arg_FCVTZU_ds;
static bool trans_FCVTZU_ds(DisasContext *ctx, arg_FCVTZU_ds *a);
typedef arg_rpr_esz arg_FCVTZS_sd;
static bool trans_FCVTZS_sd(DisasContext *ctx, arg_FCVTZS_sd *a);
typedef arg_rpr_esz arg_FCVTZU_sd;
static bool trans_FCVTZU_sd(DisasContext *ctx, arg_FCVTZU_sd *a);
typedef arg_rpr_esz arg_FCVTZS_dd;
static bool trans_FCVTZS_dd(DisasContext *ctx, arg_FCVTZS_dd *a);
typedef arg_rpr_esz arg_FCVTZU_dd;
static bool trans_FCVTZU_dd(DisasContext *ctx, arg_FCVTZU_dd *a);
typedef arg_rpr_esz arg_FRINTN;
static bool trans_FRINTN(DisasContext *ctx, arg_FRINTN *a);
typedef arg_rpr_esz arg_FRINTP;
static bool trans_FRINTP(DisasContext *ctx, arg_FRINTP *a);
typedef arg_rpr_esz arg_FRINTM;
static bool trans_FRINTM(DisasContext *ctx, arg_FRINTM *a);
typedef arg_rpr_esz arg_FRINTZ;
static bool trans_FRINTZ(DisasContext *ctx, arg_FRINTZ *a);
typedef arg_rpr_esz arg_FRINTA;
static bool trans_FRINTA(DisasContext *ctx, arg_FRINTA *a);
typedef arg_rpr_esz arg_FRINTX;
static bool trans_FRINTX(DisasContext *ctx, arg_FRINTX *a);
typedef arg_rpr_esz arg_FRINTI;
static bool trans_FRINTI(DisasContext *ctx, arg_FRINTI *a);
typedef arg_rpr_esz arg_FRECPX;
static bool trans_FRECPX(DisasContext *ctx, arg_FRECPX *a);
typedef arg_rpr_esz arg_FSQRT;
static bool trans_FSQRT(DisasContext *ctx, arg_FSQRT *a);
typedef arg_rpr_esz arg_SCVTF_hh;
static bool trans_SCVTF_hh(DisasContext *ctx, arg_SCVTF_hh *a);
typedef arg_rpr_esz arg_SCVTF_sh;
static bool trans_SCVTF_sh(DisasContext *ctx, arg_SCVTF_sh *a);
typedef arg_rpr_esz arg_SCVTF_dh;
static bool trans_SCVTF_dh(DisasContext *ctx, arg_SCVTF_dh *a);
typedef arg_rpr_esz arg_SCVTF_ss;
static bool trans_SCVTF_ss(DisasContext *ctx, arg_SCVTF_ss *a);
typedef arg_rpr_esz arg_SCVTF_sd;
static bool trans_SCVTF_sd(DisasContext *ctx, arg_SCVTF_sd *a);
typedef arg_rpr_esz arg_SCVTF_ds;
static bool trans_SCVTF_ds(DisasContext *ctx, arg_SCVTF_ds *a);
typedef arg_rpr_esz arg_SCVTF_dd;
static bool trans_SCVTF_dd(DisasContext *ctx, arg_SCVTF_dd *a);
typedef arg_rpr_esz arg_UCVTF_hh;
static bool trans_UCVTF_hh(DisasContext *ctx, arg_UCVTF_hh *a);
typedef arg_rpr_esz arg_UCVTF_sh;
static bool trans_UCVTF_sh(DisasContext *ctx, arg_UCVTF_sh *a);
typedef arg_rpr_esz arg_UCVTF_dh;
static bool trans_UCVTF_dh(DisasContext *ctx, arg_UCVTF_dh *a);
typedef arg_rpr_esz arg_UCVTF_ss;
static bool trans_UCVTF_ss(DisasContext *ctx, arg_UCVTF_ss *a);
typedef arg_rpr_esz arg_UCVTF_sd;
static bool trans_UCVTF_sd(DisasContext *ctx, arg_UCVTF_sd *a);
typedef arg_rpr_esz arg_UCVTF_ds;
static bool trans_UCVTF_ds(DisasContext *ctx, arg_UCVTF_ds *a);
typedef arg_rpr_esz arg_UCVTF_dd;
static bool trans_UCVTF_dd(DisasContext *ctx, arg_UCVTF_dd *a);
typedef arg_rri arg_LDR_pri;
static bool trans_LDR_pri(DisasContext *ctx, arg_LDR_pri *a);
typedef arg_rri arg_LDR_zri;
static bool trans_LDR_zri(DisasContext *ctx, arg_LDR_zri *a);
typedef arg_rpri_load arg_LD1R_zpri;
static bool trans_LD1R_zpri(DisasContext *ctx, arg_LD1R_zpri *a);
typedef arg_rprr_gather_load arg_LD1_zprz;
static bool trans_LD1_zprz(DisasContext *ctx, arg_LD1_zprz *a);
typedef arg_rpri_gather_load arg_LD1_zpiz;
static bool trans_LD1_zpiz(DisasContext *ctx, arg_LD1_zpiz *a);
typedef arg_rprr_load arg_LD_zprr;
static bool trans_LD_zprr(DisasContext *ctx, arg_LD_zprr *a);
typedef arg_rprr_load arg_LDFF1_zprr;
static bool trans_LDFF1_zprr(DisasContext *ctx, arg_LDFF1_zprr *a);
typedef arg_rpri_load arg_LD_zpri;
static bool trans_LD_zpri(DisasContext *ctx, arg_LD_zpri *a);
typedef arg_rpri_load arg_LDNF1_zpri;
static bool trans_LDNF1_zpri(DisasContext *ctx, arg_LDNF1_zpri *a);
typedef arg_rprr_load arg_LD1RQ_zprr;
static bool trans_LD1RQ_zprr(DisasContext *ctx, arg_LD1RQ_zprr *a);
typedef arg_rprr_load arg_LD1RO_zprr;
static bool trans_LD1RO_zprr(DisasContext *ctx, arg_LD1RO_zprr *a);
typedef arg_rpri_load arg_LD1RQ_zpri;
static bool trans_LD1RQ_zpri(DisasContext *ctx, arg_LD1RQ_zpri *a);
typedef arg_rpri_load arg_LD1RO_zpri;
static bool trans_LD1RO_zpri(DisasContext *ctx, arg_LD1RO_zpri *a);
typedef arg_disas_sve34 arg_PRF_ns;
static bool trans_PRF_ns(DisasContext *ctx, arg_PRF_ns *a);
typedef arg_disas_sve34 arg_PRF;
static bool trans_PRF(DisasContext *ctx, arg_PRF *a);
typedef arg_disas_sve50 arg_PRF_rr;
static bool trans_PRF_rr(DisasContext *ctx, arg_PRF_rr *a);
typedef arg_rri arg_STR_pri;
static bool trans_STR_pri(DisasContext *ctx, arg_STR_pri *a);
typedef arg_rri arg_STR_zri;
static bool trans_STR_zri(DisasContext *ctx, arg_STR_zri *a);
typedef arg_rpri_store arg_ST_zpri;
static bool trans_ST_zpri(DisasContext *ctx, arg_ST_zpri *a);
typedef arg_rprr_store arg_ST_zprr;
static bool trans_ST_zprr(DisasContext *ctx, arg_ST_zprr *a);
typedef arg_rprr_scatter_store arg_ST1_zprz;
static bool trans_ST1_zprz(DisasContext *ctx, arg_ST1_zprz *a);
typedef arg_rpri_scatter_store arg_ST1_zpiz;
static bool trans_ST1_zpiz(DisasContext *ctx, arg_ST1_zpiz *a);
typedef arg_rrr_esz arg_MUL_zzz;
static bool trans_MUL_zzz(DisasContext *ctx, arg_MUL_zzz *a);
typedef arg_rrr_esz arg_SMULH_zzz;
static bool trans_SMULH_zzz(DisasContext *ctx, arg_SMULH_zzz *a);
typedef arg_rrr_esz arg_UMULH_zzz;
static bool trans_UMULH_zzz(DisasContext *ctx, arg_UMULH_zzz *a);
typedef arg_rrr_esz arg_PMUL_zzz;
static bool trans_PMUL_zzz(DisasContext *ctx, arg_PMUL_zzz *a);
typedef arg_rrr_esz arg_SQDMULH_zzz;
static bool trans_SQDMULH_zzz(DisasContext *ctx, arg_SQDMULH_zzz *a);
typedef arg_rrr_esz arg_SQRDMULH_zzz;
static bool trans_SQRDMULH_zzz(DisasContext *ctx, arg_SQRDMULH_zzz *a);
typedef arg_rprr_esz arg_SADALP_zpzz;
static bool trans_SADALP_zpzz(DisasContext *ctx, arg_SADALP_zpzz *a);
typedef arg_rprr_esz arg_UADALP_zpzz;
static bool trans_UADALP_zpzz(DisasContext *ctx, arg_UADALP_zpzz *a);
typedef arg_rpr_esz arg_URECPE;
static bool trans_URECPE(DisasContext *ctx, arg_URECPE *a);
typedef arg_rpr_esz arg_URSQRTE;
static bool trans_URSQRTE(DisasContext *ctx, arg_URSQRTE *a);
typedef arg_rpr_esz arg_SQABS;
static bool trans_SQABS(DisasContext *ctx, arg_SQABS *a);
typedef arg_rpr_esz arg_SQNEG;
static bool trans_SQNEG(DisasContext *ctx, arg_SQNEG *a);
typedef arg_rprr_esz arg_SRSHL;
static bool trans_SRSHL(DisasContext *ctx, arg_SRSHL *a);
typedef arg_rprr_esz arg_URSHL;
static bool trans_URSHL(DisasContext *ctx, arg_URSHL *a);
typedef arg_rprr_esz arg_SQSHL;
static bool trans_SQSHL(DisasContext *ctx, arg_SQSHL *a);
typedef arg_rprr_esz arg_UQSHL;
static bool trans_UQSHL(DisasContext *ctx, arg_UQSHL *a);
typedef arg_rprr_esz arg_SQRSHL;
static bool trans_SQRSHL(DisasContext *ctx, arg_SQRSHL *a);
typedef arg_rprr_esz arg_UQRSHL;
static bool trans_UQRSHL(DisasContext *ctx, arg_UQRSHL *a);
typedef arg_rprr_esz arg_SHADD;
static bool trans_SHADD(DisasContext *ctx, arg_SHADD *a);
typedef arg_rprr_esz arg_UHADD;
static bool trans_UHADD(DisasContext *ctx, arg_UHADD *a);
typedef arg_rprr_esz arg_SHSUB;
static bool trans_SHSUB(DisasContext *ctx, arg_SHSUB *a);
typedef arg_rprr_esz arg_UHSUB;
static bool trans_UHSUB(DisasContext *ctx, arg_UHSUB *a);
typedef arg_rprr_esz arg_SRHADD;
static bool trans_SRHADD(DisasContext *ctx, arg_SRHADD *a);
typedef arg_rprr_esz arg_URHADD;
static bool trans_URHADD(DisasContext *ctx, arg_URHADD *a);
typedef arg_rprr_esz arg_ADDP;
static bool trans_ADDP(DisasContext *ctx, arg_ADDP *a);
typedef arg_rprr_esz arg_SMAXP;
static bool trans_SMAXP(DisasContext *ctx, arg_SMAXP *a);
typedef arg_rprr_esz arg_UMAXP;
static bool trans_UMAXP(DisasContext *ctx, arg_UMAXP *a);
typedef arg_rprr_esz arg_SMINP;
static bool trans_SMINP(DisasContext *ctx, arg_SMINP *a);
typedef arg_rprr_esz arg_UMINP;
static bool trans_UMINP(DisasContext *ctx, arg_UMINP *a);
typedef arg_rprr_esz arg_SQADD_zpzz;
static bool trans_SQADD_zpzz(DisasContext *ctx, arg_SQADD_zpzz *a);
typedef arg_rprr_esz arg_UQADD_zpzz;
static bool trans_UQADD_zpzz(DisasContext *ctx, arg_UQADD_zpzz *a);
typedef arg_rprr_esz arg_SQSUB_zpzz;
static bool trans_SQSUB_zpzz(DisasContext *ctx, arg_SQSUB_zpzz *a);
typedef arg_rprr_esz arg_UQSUB_zpzz;
static bool trans_UQSUB_zpzz(DisasContext *ctx, arg_UQSUB_zpzz *a);
typedef arg_rprr_esz arg_SUQADD;
static bool trans_SUQADD(DisasContext *ctx, arg_SUQADD *a);
typedef arg_rprr_esz arg_USQADD;
static bool trans_USQADD(DisasContext *ctx, arg_USQADD *a);
typedef arg_rrr_esz arg_SADDLB;
static bool trans_SADDLB(DisasContext *ctx, arg_SADDLB *a);
typedef arg_rrr_esz arg_SADDLT;
static bool trans_SADDLT(DisasContext *ctx, arg_SADDLT *a);
typedef arg_rrr_esz arg_UADDLB;
static bool trans_UADDLB(DisasContext *ctx, arg_UADDLB *a);
typedef arg_rrr_esz arg_UADDLT;
static bool trans_UADDLT(DisasContext *ctx, arg_UADDLT *a);
typedef arg_rrr_esz arg_SSUBLB;
static bool trans_SSUBLB(DisasContext *ctx, arg_SSUBLB *a);
typedef arg_rrr_esz arg_SSUBLT;
static bool trans_SSUBLT(DisasContext *ctx, arg_SSUBLT *a);
typedef arg_rrr_esz arg_USUBLB;
static bool trans_USUBLB(DisasContext *ctx, arg_USUBLB *a);
typedef arg_rrr_esz arg_USUBLT;
static bool trans_USUBLT(DisasContext *ctx, arg_USUBLT *a);
typedef arg_rrr_esz arg_SABDLB;
static bool trans_SABDLB(DisasContext *ctx, arg_SABDLB *a);
typedef arg_rrr_esz arg_SABDLT;
static bool trans_SABDLT(DisasContext *ctx, arg_SABDLT *a);
typedef arg_rrr_esz arg_UABDLB;
static bool trans_UABDLB(DisasContext *ctx, arg_UABDLB *a);
typedef arg_rrr_esz arg_UABDLT;
static bool trans_UABDLT(DisasContext *ctx, arg_UABDLT *a);
typedef arg_rrr_esz arg_SADDLBT;
static bool trans_SADDLBT(DisasContext *ctx, arg_SADDLBT *a);
typedef arg_rrr_esz arg_SSUBLBT;
static bool trans_SSUBLBT(DisasContext *ctx, arg_SSUBLBT *a);
typedef arg_rrr_esz arg_SSUBLTB;
static bool trans_SSUBLTB(DisasContext *ctx, arg_SSUBLTB *a);
typedef arg_rrr_esz arg_SADDWB;
static bool trans_SADDWB(DisasContext *ctx, arg_SADDWB *a);
typedef arg_rrr_esz arg_SADDWT;
static bool trans_SADDWT(DisasContext *ctx, arg_SADDWT *a);
typedef arg_rrr_esz arg_UADDWB;
static bool trans_UADDWB(DisasContext *ctx, arg_UADDWB *a);
typedef arg_rrr_esz arg_UADDWT;
static bool trans_UADDWT(DisasContext *ctx, arg_UADDWT *a);
typedef arg_rrr_esz arg_SSUBWB;
static bool trans_SSUBWB(DisasContext *ctx, arg_SSUBWB *a);
typedef arg_rrr_esz arg_SSUBWT;
static bool trans_SSUBWT(DisasContext *ctx, arg_SSUBWT *a);
typedef arg_rrr_esz arg_USUBWB;
static bool trans_USUBWB(DisasContext *ctx, arg_USUBWB *a);
typedef arg_rrr_esz arg_USUBWT;
static bool trans_USUBWT(DisasContext *ctx, arg_USUBWT *a);
typedef arg_rrr_esz arg_SQDMULLB_zzz;
static bool trans_SQDMULLB_zzz(DisasContext *ctx, arg_SQDMULLB_zzz *a);
typedef arg_rrr_esz arg_SQDMULLT_zzz;
static bool trans_SQDMULLT_zzz(DisasContext *ctx, arg_SQDMULLT_zzz *a);
typedef arg_rrr_esz arg_PMULLB;
static bool trans_PMULLB(DisasContext *ctx, arg_PMULLB *a);
typedef arg_rrr_esz arg_PMULLT;
static bool trans_PMULLT(DisasContext *ctx, arg_PMULLT *a);
typedef arg_rrr_esz arg_SMULLB_zzz;
static bool trans_SMULLB_zzz(DisasContext *ctx, arg_SMULLB_zzz *a);
typedef arg_rrr_esz arg_SMULLT_zzz;
static bool trans_SMULLT_zzz(DisasContext *ctx, arg_SMULLT_zzz *a);
typedef arg_rrr_esz arg_UMULLB_zzz;
static bool trans_UMULLB_zzz(DisasContext *ctx, arg_UMULLB_zzz *a);
typedef arg_rrr_esz arg_UMULLT_zzz;
static bool trans_UMULLT_zzz(DisasContext *ctx, arg_UMULLT_zzz *a);
typedef arg_rri_esz arg_SSHLLB;
static bool trans_SSHLLB(DisasContext *ctx, arg_SSHLLB *a);
typedef arg_rri_esz arg_SSHLLT;
static bool trans_SSHLLT(DisasContext *ctx, arg_SSHLLT *a);
typedef arg_rri_esz arg_USHLLB;
static bool trans_USHLLB(DisasContext *ctx, arg_USHLLB *a);
typedef arg_rri_esz arg_USHLLT;
static bool trans_USHLLT(DisasContext *ctx, arg_USHLLT *a);
typedef arg_rrr_esz arg_EORBT;
static bool trans_EORBT(DisasContext *ctx, arg_EORBT *a);
typedef arg_rrr_esz arg_EORTB;
static bool trans_EORTB(DisasContext *ctx, arg_EORTB *a);
typedef arg_rrrr_esz arg_SMMLA;
static bool trans_SMMLA(DisasContext *ctx, arg_SMMLA *a);
typedef arg_rrrr_esz arg_USMMLA;
static bool trans_USMMLA(DisasContext *ctx, arg_USMMLA *a);
typedef arg_rrrr_esz arg_UMMLA;
static bool trans_UMMLA(DisasContext *ctx, arg_UMMLA *a);
typedef arg_rrr_esz arg_BEXT;
static bool trans_BEXT(DisasContext *ctx, arg_BEXT *a);
typedef arg_rrr_esz arg_BDEP;
static bool trans_BDEP(DisasContext *ctx, arg_BDEP *a);
typedef arg_rrr_esz arg_BGRP;
static bool trans_BGRP(DisasContext *ctx, arg_BGRP *a);
typedef arg_rrr_esz arg_CADD_rot90;
static bool trans_CADD_rot90(DisasContext *ctx, arg_CADD_rot90 *a);
typedef arg_rrr_esz arg_CADD_rot270;
static bool trans_CADD_rot270(DisasContext *ctx, arg_CADD_rot270 *a);
typedef arg_rrr_esz arg_SQCADD_rot90;
static bool trans_SQCADD_rot90(DisasContext *ctx, arg_SQCADD_rot90 *a);
typedef arg_rrr_esz arg_SQCADD_rot270;
static bool trans_SQCADD_rot270(DisasContext *ctx, arg_SQCADD_rot270 *a);
typedef arg_rrrr_esz arg_SABALB;
static bool trans_SABALB(DisasContext *ctx, arg_SABALB *a);
typedef arg_rrrr_esz arg_SABALT;
static bool trans_SABALT(DisasContext *ctx, arg_SABALT *a);
typedef arg_rrrr_esz arg_UABALB;
static bool trans_UABALB(DisasContext *ctx, arg_UABALB *a);
typedef arg_rrrr_esz arg_UABALT;
static bool trans_UABALT(DisasContext *ctx, arg_UABALT *a);
typedef arg_rrrr_esz arg_ADCLB;
static bool trans_ADCLB(DisasContext *ctx, arg_ADCLB *a);
typedef arg_rrrr_esz arg_ADCLT;
static bool trans_ADCLT(DisasContext *ctx, arg_ADCLT *a);
typedef arg_rri_esz arg_SSRA;
static bool trans_SSRA(DisasContext *ctx, arg_SSRA *a);
typedef arg_rri_esz arg_USRA;
static bool trans_USRA(DisasContext *ctx, arg_USRA *a);
typedef arg_rri_esz arg_SRSRA;
static bool trans_SRSRA(DisasContext *ctx, arg_SRSRA *a);
typedef arg_rri_esz arg_URSRA;
static bool trans_URSRA(DisasContext *ctx, arg_URSRA *a);
typedef arg_rri_esz arg_SRI;
static bool trans_SRI(DisasContext *ctx, arg_SRI *a);
typedef arg_rri_esz arg_SLI;
static bool trans_SLI(DisasContext *ctx, arg_SLI *a);
typedef arg_rrr_esz arg_SABA;
static bool trans_SABA(DisasContext *ctx, arg_SABA *a);
typedef arg_rrr_esz arg_UABA;
static bool trans_UABA(DisasContext *ctx, arg_UABA *a);
typedef arg_rri_esz arg_SQXTNB;
static bool trans_SQXTNB(DisasContext *ctx, arg_SQXTNB *a);
typedef arg_rri_esz arg_SQXTNT;
static bool trans_SQXTNT(DisasContext *ctx, arg_SQXTNT *a);
typedef arg_rri_esz arg_UQXTNB;
static bool trans_UQXTNB(DisasContext *ctx, arg_UQXTNB *a);
typedef arg_rri_esz arg_UQXTNT;
static bool trans_UQXTNT(DisasContext *ctx, arg_UQXTNT *a);
typedef arg_rri_esz arg_SQXTUNB;
static bool trans_SQXTUNB(DisasContext *ctx, arg_SQXTUNB *a);
typedef arg_rri_esz arg_SQXTUNT;
static bool trans_SQXTUNT(DisasContext *ctx, arg_SQXTUNT *a);
typedef arg_rri_esz arg_SQSHRUNB;
static bool trans_SQSHRUNB(DisasContext *ctx, arg_SQSHRUNB *a);
typedef arg_rri_esz arg_SQSHRUNT;
static bool trans_SQSHRUNT(DisasContext *ctx, arg_SQSHRUNT *a);
typedef arg_rri_esz arg_SQRSHRUNB;
static bool trans_SQRSHRUNB(DisasContext *ctx, arg_SQRSHRUNB *a);
typedef arg_rri_esz arg_SQRSHRUNT;
static bool trans_SQRSHRUNT(DisasContext *ctx, arg_SQRSHRUNT *a);
typedef arg_rri_esz arg_SHRNB;
static bool trans_SHRNB(DisasContext *ctx, arg_SHRNB *a);
typedef arg_rri_esz arg_SHRNT;
static bool trans_SHRNT(DisasContext *ctx, arg_SHRNT *a);
typedef arg_rri_esz arg_RSHRNB;
static bool trans_RSHRNB(DisasContext *ctx, arg_RSHRNB *a);
typedef arg_rri_esz arg_RSHRNT;
static bool trans_RSHRNT(DisasContext *ctx, arg_RSHRNT *a);
typedef arg_rri_esz arg_SQSHRNB;
static bool trans_SQSHRNB(DisasContext *ctx, arg_SQSHRNB *a);
typedef arg_rri_esz arg_SQSHRNT;
static bool trans_SQSHRNT(DisasContext *ctx, arg_SQSHRNT *a);
typedef arg_rri_esz arg_SQRSHRNB;
static bool trans_SQRSHRNB(DisasContext *ctx, arg_SQRSHRNB *a);
typedef arg_rri_esz arg_SQRSHRNT;
static bool trans_SQRSHRNT(DisasContext *ctx, arg_SQRSHRNT *a);
typedef arg_rri_esz arg_UQSHRNB;
static bool trans_UQSHRNB(DisasContext *ctx, arg_UQSHRNB *a);
typedef arg_rri_esz arg_UQSHRNT;
static bool trans_UQSHRNT(DisasContext *ctx, arg_UQSHRNT *a);
typedef arg_rri_esz arg_UQRSHRNB;
static bool trans_UQRSHRNB(DisasContext *ctx, arg_UQRSHRNB *a);
typedef arg_rri_esz arg_UQRSHRNT;
static bool trans_UQRSHRNT(DisasContext *ctx, arg_UQRSHRNT *a);
typedef arg_rrr_esz arg_ADDHNB;
static bool trans_ADDHNB(DisasContext *ctx, arg_ADDHNB *a);
typedef arg_rrr_esz arg_ADDHNT;
static bool trans_ADDHNT(DisasContext *ctx, arg_ADDHNT *a);
typedef arg_rrr_esz arg_RADDHNB;
static bool trans_RADDHNB(DisasContext *ctx, arg_RADDHNB *a);
typedef arg_rrr_esz arg_RADDHNT;
static bool trans_RADDHNT(DisasContext *ctx, arg_RADDHNT *a);
typedef arg_rrr_esz arg_SUBHNB;
static bool trans_SUBHNB(DisasContext *ctx, arg_SUBHNB *a);
typedef arg_rrr_esz arg_SUBHNT;
static bool trans_SUBHNT(DisasContext *ctx, arg_SUBHNT *a);
typedef arg_rrr_esz arg_RSUBHNB;
static bool trans_RSUBHNB(DisasContext *ctx, arg_RSUBHNB *a);
typedef arg_rrr_esz arg_RSUBHNT;
static bool trans_RSUBHNT(DisasContext *ctx, arg_RSUBHNT *a);
typedef arg_rprr_esz arg_MATCH;
static bool trans_MATCH(DisasContext *ctx, arg_MATCH *a);
typedef arg_rprr_esz arg_NMATCH;
static bool trans_NMATCH(DisasContext *ctx, arg_NMATCH *a);
typedef arg_rprr_esz arg_HISTCNT;
static bool trans_HISTCNT(DisasContext *ctx, arg_HISTCNT *a);
typedef arg_rrr_esz arg_HISTSEG;
static bool trans_HISTSEG(DisasContext *ctx, arg_HISTSEG *a);
typedef arg_rprr_esz arg_FADDP;
static bool trans_FADDP(DisasContext *ctx, arg_FADDP *a);
typedef arg_rprr_esz arg_FMAXNMP;
static bool trans_FMAXNMP(DisasContext *ctx, arg_FMAXNMP *a);
typedef arg_rprr_esz arg_FMINNMP;
static bool trans_FMINNMP(DisasContext *ctx, arg_FMINNMP *a);
typedef arg_rprr_esz arg_FMAXP;
static bool trans_FMAXP(DisasContext *ctx, arg_FMAXP *a);
typedef arg_rprr_esz arg_FMINP;
static bool trans_FMINP(DisasContext *ctx, arg_FMINP *a);
typedef arg_rrrr_esz arg_SQDMLALB_zzzw;
static bool trans_SQDMLALB_zzzw(DisasContext *ctx, arg_SQDMLALB_zzzw *a);
typedef arg_rrrr_esz arg_SQDMLALT_zzzw;
static bool trans_SQDMLALT_zzzw(DisasContext *ctx, arg_SQDMLALT_zzzw *a);
typedef arg_rrrr_esz arg_SQDMLSLB_zzzw;
static bool trans_SQDMLSLB_zzzw(DisasContext *ctx, arg_SQDMLSLB_zzzw *a);
typedef arg_rrrr_esz arg_SQDMLSLT_zzzw;
static bool trans_SQDMLSLT_zzzw(DisasContext *ctx, arg_SQDMLSLT_zzzw *a);
typedef arg_rrrr_esz arg_SQDMLALBT;
static bool trans_SQDMLALBT(DisasContext *ctx, arg_SQDMLALBT *a);
typedef arg_rrrr_esz arg_SQDMLSLBT;
static bool trans_SQDMLSLBT(DisasContext *ctx, arg_SQDMLSLBT *a);
typedef arg_rrrr_esz arg_SQRDMLAH_zzzz;
static bool trans_SQRDMLAH_zzzz(DisasContext *ctx, arg_SQRDMLAH_zzzz *a);
typedef arg_rrrr_esz arg_SQRDMLSH_zzzz;
static bool trans_SQRDMLSH_zzzz(DisasContext *ctx, arg_SQRDMLSH_zzzz *a);
typedef arg_rrrr_esz arg_SMLALB_zzzw;
static bool trans_SMLALB_zzzw(DisasContext *ctx, arg_SMLALB_zzzw *a);
typedef arg_rrrr_esz arg_SMLALT_zzzw;
static bool trans_SMLALT_zzzw(DisasContext *ctx, arg_SMLALT_zzzw *a);
typedef arg_rrrr_esz arg_UMLALB_zzzw;
static bool trans_UMLALB_zzzw(DisasContext *ctx, arg_UMLALB_zzzw *a);
typedef arg_rrrr_esz arg_UMLALT_zzzw;
static bool trans_UMLALT_zzzw(DisasContext *ctx, arg_UMLALT_zzzw *a);
typedef arg_rrrr_esz arg_SMLSLB_zzzw;
static bool trans_SMLSLB_zzzw(DisasContext *ctx, arg_SMLSLB_zzzw *a);
typedef arg_rrrr_esz arg_SMLSLT_zzzw;
static bool trans_SMLSLT_zzzw(DisasContext *ctx, arg_SMLSLT_zzzw *a);
typedef arg_rrrr_esz arg_UMLSLB_zzzw;
static bool trans_UMLSLB_zzzw(DisasContext *ctx, arg_UMLSLB_zzzw *a);
typedef arg_rrrr_esz arg_UMLSLT_zzzw;
static bool trans_UMLSLT_zzzw(DisasContext *ctx, arg_UMLSLT_zzzw *a);
typedef arg_disas_sve45 arg_CMLA_zzzz;
static bool trans_CMLA_zzzz(DisasContext *ctx, arg_CMLA_zzzz *a);
typedef arg_disas_sve45 arg_SQRDCMLAH_zzzz;
static bool trans_SQRDCMLAH_zzzz(DisasContext *ctx, arg_SQRDCMLAH_zzzz *a);
typedef arg_rrrr_esz arg_USDOT_zzzz;
static bool trans_USDOT_zzzz(DisasContext *ctx, arg_USDOT_zzzz *a);
typedef arg_rrrr_esz arg_BFMMLA;
static bool trans_BFMMLA(DisasContext *ctx, arg_BFMMLA *a);
typedef arg_rrrr_esz arg_FMMLA_s;
static bool trans_FMMLA_s(DisasContext *ctx, arg_FMMLA_s *a);
typedef arg_rrrr_esz arg_FMMLA_d;
static bool trans_FMMLA_d(DisasContext *ctx, arg_FMMLA_d *a);
typedef arg_rprr_gather_load arg_LDNT1_zprz;
static bool trans_LDNT1_zprz(DisasContext *ctx, arg_LDNT1_zprz *a);
typedef arg_rprr_scatter_store arg_STNT1_zprz;
static bool trans_STNT1_zprz(DisasContext *ctx, arg_STNT1_zprz *a);
typedef arg_disas_sve37 arg_AESMC;
static bool trans_AESMC(DisasContext *ctx, arg_AESMC *a);
typedef arg_disas_sve37 arg_AESIMC;
static bool trans_AESIMC(DisasContext *ctx, arg_AESIMC *a);
typedef arg_rrr_esz arg_AESE;
static bool trans_AESE(DisasContext *ctx, arg_AESE *a);
typedef arg_rrr_esz arg_AESD;
static bool trans_AESD(DisasContext *ctx, arg_AESD *a);
typedef arg_rrr_esz arg_SM4E;
static bool trans_SM4E(DisasContext *ctx, arg_SM4E *a);
typedef arg_rrr_esz arg_SM4EKEY;
static bool trans_SM4EKEY(DisasContext *ctx, arg_SM4EKEY *a);
typedef arg_rrr_esz arg_RAX1;
static bool trans_RAX1(DisasContext *ctx, arg_RAX1 *a);
typedef arg_rpr_esz arg_FCVTXNT_ds;
static bool trans_FCVTXNT_ds(DisasContext *ctx, arg_FCVTXNT_ds *a);
typedef arg_rpr_esz arg_FCVTX_ds;
static bool trans_FCVTX_ds(DisasContext *ctx, arg_FCVTX_ds *a);
typedef arg_rpr_esz arg_FCVTNT_sh;
static bool trans_FCVTNT_sh(DisasContext *ctx, arg_FCVTNT_sh *a);
typedef arg_rpr_esz arg_BFCVTNT;
static bool trans_BFCVTNT(DisasContext *ctx, arg_BFCVTNT *a);
typedef arg_rpr_esz arg_FCVTLT_hs;
static bool trans_FCVTLT_hs(DisasContext *ctx, arg_FCVTLT_hs *a);
typedef arg_rpr_esz arg_FCVTNT_ds;
static bool trans_FCVTNT_ds(DisasContext *ctx, arg_FCVTNT_ds *a);
typedef arg_rpr_esz arg_FCVTLT_sd;
static bool trans_FCVTLT_sd(DisasContext *ctx, arg_FCVTLT_sd *a);
typedef arg_rpr_esz arg_FLOGB;
static bool trans_FLOGB(DisasContext *ctx, arg_FLOGB *a);
typedef arg_rrrr_esz arg_FMLALB_zzzw;
static bool trans_FMLALB_zzzw(DisasContext *ctx, arg_FMLALB_zzzw *a);
typedef arg_rrrr_esz arg_FMLALT_zzzw;
static bool trans_FMLALT_zzzw(DisasContext *ctx, arg_FMLALT_zzzw *a);
typedef arg_rrrr_esz arg_FMLSLB_zzzw;
static bool trans_FMLSLB_zzzw(DisasContext *ctx, arg_FMLSLB_zzzw *a);
typedef arg_rrrr_esz arg_FMLSLT_zzzw;
static bool trans_FMLSLT_zzzw(DisasContext *ctx, arg_FMLSLT_zzzw *a);
typedef arg_rrrr_esz arg_BFMLALB_zzzw;
static bool trans_BFMLALB_zzzw(DisasContext *ctx, arg_BFMLALB_zzzw *a);
typedef arg_rrrr_esz arg_BFMLALT_zzzw;
static bool trans_BFMLALT_zzzw(DisasContext *ctx, arg_BFMLALT_zzzw *a);
typedef arg_rrrr_esz arg_BFDOT_zzzz;
static bool trans_BFDOT_zzzz(DisasContext *ctx, arg_BFDOT_zzzz *a);
typedef arg_rrxr_esz arg_FMLALB_zzxw;
static bool trans_FMLALB_zzxw(DisasContext *ctx, arg_FMLALB_zzxw *a);
typedef arg_rrxr_esz arg_FMLALT_zzxw;
static bool trans_FMLALT_zzxw(DisasContext *ctx, arg_FMLALT_zzxw *a);
typedef arg_rrxr_esz arg_FMLSLB_zzxw;
static bool trans_FMLSLB_zzxw(DisasContext *ctx, arg_FMLSLB_zzxw *a);
typedef arg_rrxr_esz arg_FMLSLT_zzxw;
static bool trans_FMLSLT_zzxw(DisasContext *ctx, arg_FMLSLT_zzxw *a);
typedef arg_rrxr_esz arg_BFMLALB_zzxw;
static bool trans_BFMLALB_zzxw(DisasContext *ctx, arg_BFMLALB_zzxw *a);
typedef arg_rrxr_esz arg_BFMLALT_zzxw;
static bool trans_BFMLALT_zzxw(DisasContext *ctx, arg_BFMLALT_zzxw *a);
typedef arg_rrxr_esz arg_BFDOT_zzxz;
static bool trans_BFDOT_zzxz(DisasContext *ctx, arg_BFDOT_zzxz *a);
typedef arg_psel arg_PSEL;
static bool trans_PSEL(DisasContext *ctx, arg_PSEL *a);
typedef arg_rrrr_esz arg_SCLAMP;
static bool trans_SCLAMP(DisasContext *ctx, arg_SCLAMP *a);
typedef arg_rrrr_esz arg_UCLAMP;
static bool trans_UCLAMP(DisasContext *ctx, arg_UCLAMP *a);

static void disas_sve_extract_disas_sve_Fmt_100(DisasContext *ctx, arg_disas_sve49 *a, uint32_t insn)
{
    a->ra = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->esz = 1;
    a->rm = extract32(insn, 16, 3);
    a->rd = extract32(insn, 0, 5);
    a->index = extract32(insn, 19, 2);
    a->rot = extract32(insn, 10, 2);
}

static void disas_sve_extract_disas_sve_Fmt_101(DisasContext *ctx, arg_disas_sve49 *a, uint32_t insn)
{
    a->ra = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->esz = 2;
    a->rm = extract32(insn, 16, 4);
    a->rd = extract32(insn, 0, 5);
    a->index = extract32(insn, 20, 1);
    a->rot = extract32(insn, 10, 2);
}

static void disas_sve_extract_disas_sve_Fmt_102(DisasContext *ctx, arg_rrri_esz *a, uint32_t insn)
{
    a->imm = extract32(insn, 16, 3);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 0, 5);
    a->rm = extract32(insn, 5, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_disas_sve_Fmt_103(DisasContext *ctx, arg_rpri_load *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->nreg = 0;
    a->dtype = deposit32(extract32(insn, 13, 2), 2, 30, extract32(insn, 23, 2));
    a->imm = extract32(insn, 16, 6);
    a->rn = extract32(insn, 5, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_disas_sve_Fmt_104(DisasContext *ctx, arg_disas_sve50 *a, uint32_t insn)
{
    a->rm = extract32(insn, 16, 5);
}

static void disas_sve_extract_disas_sve_Fmt_105(DisasContext *ctx, arg_rprr_gather_load *a, uint32_t insn)
{
    a->u = extract32(insn, 14, 1);
    a->pg = extract32(insn, 10, 3);
    a->xs = 2;
    a->rn = extract32(insn, 5, 5);
    a->esz = 3;
    a->rm = extract32(insn, 16, 5);
    a->msz = extract32(insn, 23, 2);
    a->ff = 0;
    a->rd = extract32(insn, 0, 5);
    a->scale = 0;
}

static void disas_sve_extract_disas_sve_Fmt_106(DisasContext *ctx, arg_rprr_gather_load *a, uint32_t insn)
{
    a->u = extract32(insn, 13, 1);
    a->pg = extract32(insn, 10, 3);
    a->xs = 0;
    a->rn = extract32(insn, 5, 5);
    a->esz = 2;
    a->rm = extract32(insn, 16, 5);
    a->msz = extract32(insn, 23, 2);
    a->ff = 0;
    a->rd = extract32(insn, 0, 5);
    a->scale = 0;
}

static void disas_sve_extract_disas_sve_Fmt_107(DisasContext *ctx, arg_disas_sve37 *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_disas_sve_Fmt_108(DisasContext *ctx, arg_rpr_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 17, 2);
    a->rn = extract32(insn, 5, 5);
    a->pg = extract32(insn, 10, 3);
}

static void disas_sve_extract_disas_sve_Fmt_72(DisasContext *ctx, arg_rrri_esz *a, uint32_t insn)
{
    a->imm = tszimm_shr(ctx, deposit32(extract32(insn, 16, 5), 5, 27, extract32(insn, 22, 2)));
    a->rn = extract32(insn, 0, 5);
    a->esz = tszimm_esz(ctx, deposit32(extract32(insn, 16, 5), 5, 27, extract32(insn, 22, 2)));
    a->rm = extract32(insn, 5, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_disas_sve_Fmt_73(DisasContext *ctx, arg_disas_sve29 *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->imm2 = sextract32(insn, 16, 5);
    a->esz = extract32(insn, 22, 2);
    a->imm1 = sextract32(insn, 5, 5);
}

static void disas_sve_extract_disas_sve_Fmt_74(DisasContext *ctx, arg_disas_sve30 *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rm = extract32(insn, 16, 5);
    a->imm = sextract32(insn, 5, 5);
}

static void disas_sve_extract_disas_sve_Fmt_75(DisasContext *ctx, arg_rri_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->imm = sextract32(insn, 16, 5);
}

static void disas_sve_extract_disas_sve_Fmt_76(DisasContext *ctx, arg_disas_sve31 *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->imm = sextract32(insn, 5, 6);
}

static void disas_sve_extract_disas_sve_Fmt_77(DisasContext *ctx, arg_disas_sve32 *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
}

static void disas_sve_extract_disas_sve_Fmt_78(DisasContext *ctx, arg_disas_sve33 *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->dbm = extract32(insn, 5, 13);
}

static void disas_sve_extract_disas_sve_Fmt_79(DisasContext *ctx, arg_disas_sve34 *a, uint32_t insn)
{
}

static void disas_sve_extract_disas_sve_Fmt_80(DisasContext *ctx, arg_rrri *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->rn = extract32(insn, 0, 5);
    a->rm = extract32(insn, 5, 5);
    a->imm = deposit32(extract32(insn, 10, 3), 3, 29, extract32(insn, 16, 5));
}

static void disas_sve_extract_disas_sve_Fmt_81(DisasContext *ctx, arg_rri *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->imm = deposit32(extract32(insn, 10, 3), 3, 29, extract32(insn, 16, 5));
}

static void disas_sve_extract_disas_sve_Fmt_82(DisasContext *ctx, arg_rri *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->imm = deposit32(extract32(insn, 16, 5), 5, 27, extract32(insn, 22, 2));
}

static void disas_sve_extract_disas_sve_Fmt_83(DisasContext *ctx, arg_disas_sve35 *a, uint32_t insn)
{
    a->u = extract32(insn, 17, 1);
    a->h = extract32(insn, 16, 1);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_disas_sve_Fmt_84(DisasContext *ctx, arg_disas_sve36 *a, uint32_t insn)
{
    a->rn = extract32(insn, 5, 4);
    a->pg = extract32(insn, 10, 4);
}

static void disas_sve_extract_disas_sve_Fmt_85(DisasContext *ctx, arg_ptrue *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 4);
    a->pat = extract32(insn, 5, 5);
    a->esz = extract32(insn, 22, 2);
    a->s = extract32(insn, 16, 1);
}

static void disas_sve_extract_disas_sve_Fmt_86(DisasContext *ctx, arg_disas_sve37 *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 4);
}

static void disas_sve_extract_disas_sve_Fmt_87(DisasContext *ctx, arg_disas_sve38 *a, uint32_t insn)
{
    a->pg = extract32(insn, 5, 4);
    a->rd = extract32(insn, 0, 4);
    a->s = extract32(insn, 22, 1);
}

static void disas_sve_extract_disas_sve_Fmt_88(DisasContext *ctx, arg_disas_sve39 *a, uint32_t insn)
{
    a->rn = extract32(insn, 5, 4);
}

static void disas_sve_extract_disas_sve_Fmt_89(DisasContext *ctx, arg_disas_sve40 *a, uint32_t insn)
{
    a->rm = extract32(insn, 16, 5);
    a->rn = extract32(insn, 5, 5);
    a->sf = extract32(insn, 22, 1);
    a->ne = extract32(insn, 4, 1);
}

static void disas_sve_extract_disas_sve_Fmt_90(DisasContext *ctx, arg_disas_sve41 *a, uint32_t insn)
{
    a->u = extract32(insn, 11, 1);
    a->eq = extract32(insn, 4, 1);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->sf = extract32(insn, 12, 1);
    a->lt = extract32(insn, 10, 1);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 4);
}

static void disas_sve_extract_disas_sve_Fmt_91(DisasContext *ctx, arg_disas_sve42 *a, uint32_t insn)
{
    a->rw = extract32(insn, 4, 1);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 4);
}

static void disas_sve_extract_disas_sve_Fmt_92(DisasContext *ctx, arg_disas_sve43 *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->imm = extract32(insn, 5, 8);
}

static void disas_sve_extract_disas_sve_Fmt_93(DisasContext *ctx, arg_disas_sve43 *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->imm = expand_imm_sh8s(ctx, extract32(insn, 5, 9));
}

static void disas_sve_extract_disas_sve_Fmt_94(DisasContext *ctx, arg_disas_sve44 *a, uint32_t insn)
{
    a->u = extract32(insn, 10, 1);
    a->sz = extract32(insn, 22, 1);
    a->ra = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_disas_sve_Fmt_95(DisasContext *ctx, arg_disas_sve45 *a, uint32_t insn)
{
    a->ra = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
    a->rot = extract32(insn, 10, 2);
}

static void disas_sve_extract_disas_sve_Fmt_96(DisasContext *ctx, arg_disas_sve46 *a, uint32_t insn)
{
    a->ra = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 3);
    a->rd = extract32(insn, 0, 5);
    a->index = extract32(insn, 19, 2);
    a->rot = extract32(insn, 10, 2);
}

static void disas_sve_extract_disas_sve_Fmt_97(DisasContext *ctx, arg_disas_sve46 *a, uint32_t insn)
{
    a->ra = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 4);
    a->rd = extract32(insn, 0, 5);
    a->index = extract32(insn, 20, 1);
    a->rot = extract32(insn, 10, 2);
}

static void disas_sve_extract_disas_sve_Fmt_98(DisasContext *ctx, arg_disas_sve47 *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 0, 5);
    a->rm = extract32(insn, 5, 5);
    a->rd = extract32(insn, 0, 5);
    a->rot = extract32(insn, 16, 1);
}

static void disas_sve_extract_disas_sve_Fmt_99(DisasContext *ctx, arg_disas_sve48 *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->ra = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
    a->rot = extract32(insn, 13, 2);
}

static void disas_sve_extract_incdec2_cnt(DisasContext *ctx, arg_incdec2_cnt *a, uint32_t insn)
{
    a->pat = extract32(insn, 5, 5);
    a->imm = plus_1(ctx, extract32(insn, 16, 4));
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 0, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_incdec2_pred(DisasContext *ctx, arg_incdec2_pred *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 0, 5);
    a->pg = extract32(insn, 5, 4);
}

static void disas_sve_extract_incdec_cnt(DisasContext *ctx, arg_incdec_cnt *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->pat = extract32(insn, 5, 5);
    a->imm = plus_1(ctx, extract32(insn, 16, 4));
}

static void disas_sve_extract_incdec_pred(DisasContext *ctx, arg_incdec_pred *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->pg = extract32(insn, 5, 4);
}

static void disas_sve_extract_pd_pg_pn_pm_s(DisasContext *ctx, arg_rprr_s *a, uint32_t insn)
{
    a->s = extract32(insn, 22, 1);
    a->pg = extract32(insn, 10, 4);
    a->rn = extract32(insn, 5, 4);
    a->rm = extract32(insn, 16, 4);
    a->rd = extract32(insn, 0, 4);
}

static void disas_sve_extract_pd_pg_pn_s(DisasContext *ctx, arg_rpr_s *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 4);
    a->rn = extract32(insn, 5, 4);
    a->s = extract32(insn, 22, 1);
    a->rd = extract32(insn, 0, 4);
}

static void disas_sve_extract_pd_pg_pn_s0(DisasContext *ctx, arg_rpr_s *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 4);
    a->s = 0;
    a->rn = extract32(insn, 5, 4);
    a->pg = extract32(insn, 10, 4);
}

static void disas_sve_extract_pd_pg_rn(DisasContext *ctx, arg_rpr_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 4);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->pg = extract32(insn, 10, 3);
}

static void disas_sve_extract_pd_pg_rn_i5(DisasContext *ctx, arg_rpri_esz *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->imm = sextract32(insn, 16, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->rd = extract32(insn, 0, 4);
}

static void disas_sve_extract_pd_pg_rn_i7(DisasContext *ctx, arg_rpri_esz *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->imm = extract32(insn, 14, 7);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->rd = extract32(insn, 0, 4);
}

static void disas_sve_extract_pd_pg_rn_rm(DisasContext *ctx, arg_rprr_esz *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 4);
}

static void disas_sve_extract_pd_pn(DisasContext *ctx, arg_rr_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 4);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 4);
}

static void disas_sve_extract_pd_pn_e0(DisasContext *ctx, arg_rr_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 4);
    a->rn = extract32(insn, 5, 4);
    a->esz = 0;
}

static void disas_sve_extract_pd_pn_pm(DisasContext *ctx, arg_rrr_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 4);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 4);
    a->rm = extract32(insn, 16, 4);
}

static void disas_sve_extract_pd_rn_i9(DisasContext *ctx, arg_rri *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 4);
    a->rn = extract32(insn, 5, 5);
    a->imm = deposit32(extract32(insn, 10, 3), 3, 29, sextract32(insn, 16, 6));
}

static void disas_sve_extract_psel(DisasContext *ctx, arg_psel *a, uint32_t insn)
{
    a->pd = extract32(insn, 0, 4);
    a->rv = plus_12(ctx, extract32(insn, 16, 2));
    a->pm = extract32(insn, 5, 4);
    a->pn = extract32(insn, 10, 4);
}

static void disas_sve_extract_rd_pg4_pn(DisasContext *ctx, arg_rpr_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 4);
    a->pg = extract32(insn, 10, 4);
}

static void disas_sve_extract_rd_pg4_rn_rm(DisasContext *ctx, arg_rprr_esz *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 4);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rd_pg_rn(DisasContext *ctx, arg_rpr_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->pg = extract32(insn, 10, 3);
}

static void disas_sve_extract_rd_pg_rn_e0(DisasContext *ctx, arg_rpr_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->pg = extract32(insn, 10, 3);
    a->esz = 0;
}

static void disas_sve_extract_rd_pg_rn_rm(DisasContext *ctx, arg_rprr_esz *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rd_rn(DisasContext *ctx, arg_rr_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
}

static void disas_sve_extract_rd_rn_i6(DisasContext *ctx, arg_rri *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->rn = extract32(insn, 16, 5);
    a->imm = sextract32(insn, 5, 6);
}

static void disas_sve_extract_rd_rn_i9(DisasContext *ctx, arg_rri *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->imm = deposit32(extract32(insn, 10, 3), 3, 29, sextract32(insn, 16, 6));
}

static void disas_sve_extract_rd_rn_msz_rm(DisasContext *ctx, arg_rrri *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->imm = extract32(insn, 10, 2);
}

static void disas_sve_extract_rd_rn_rm(DisasContext *ctx, arg_rrr_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
}

static void disas_sve_extract_rd_rn_rm_e0(DisasContext *ctx, arg_rrr_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->esz = 0;
}

static void disas_sve_extract_rd_rn_tszimm_shl(DisasContext *ctx, arg_rri_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->esz = tszimm_esz(ctx, deposit32(extract32(insn, 16, 5), 5, 27, extract32(insn, 22, 2)));
    a->imm = tszimm_shl(ctx, deposit32(extract32(insn, 16, 5), 5, 27, extract32(insn, 22, 2)));
}

static void disas_sve_extract_rd_rn_tszimm_shr(DisasContext *ctx, arg_rri_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->esz = tszimm_esz(ctx, deposit32(extract32(insn, 16, 5), 5, 27, extract32(insn, 22, 2)));
    a->imm = tszimm_shr(ctx, deposit32(extract32(insn, 16, 5), 5, 27, extract32(insn, 22, 2)));
}

static void disas_sve_extract_rda_pg_rn_rm(DisasContext *ctx, arg_rprrr_esz *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->ra = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rda_rn_rm(DisasContext *ctx, arg_rrrr_esz *a, uint32_t insn)
{
    a->ra = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rda_rn_rm_e0(DisasContext *ctx, arg_rrrr_esz *a, uint32_t insn)
{
    a->ra = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->esz = 0;
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rdm_pg_rn(DisasContext *ctx, arg_rprr_esz *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 0, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rdn_dbm(DisasContext *ctx, arg_rr_dbm *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->rn = extract32(insn, 0, 5);
    a->dbm = extract32(insn, 5, 13);
}

static void disas_sve_extract_rdn_i1(DisasContext *ctx, arg_rpri_esz *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->imm = extract32(insn, 5, 1);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 0, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rdn_i8s(DisasContext *ctx, arg_rri_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 0, 5);
    a->imm = sextract32(insn, 5, 8);
}

static void disas_sve_extract_rdn_i8u(DisasContext *ctx, arg_rri_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 0, 5);
    a->imm = extract32(insn, 5, 8);
}

static void disas_sve_extract_rdn_pg4(DisasContext *ctx, arg_rpri_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 0, 5);
    a->pg = extract32(insn, 16, 4);
}

static void disas_sve_extract_rdn_pg_ra_rm(DisasContext *ctx, arg_rprrr_esz *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->ra = extract32(insn, 5, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 0, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rdn_pg_rm(DisasContext *ctx, arg_rprr_esz *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 0, 5);
    a->rm = extract32(insn, 5, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rdn_pg_rm_ra(DisasContext *ctx, arg_rprrr_esz *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->ra = extract32(insn, 16, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 0, 5);
    a->rm = extract32(insn, 5, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rdn_pg_tszimm_shl(DisasContext *ctx, arg_rpri_esz *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->imm = tszimm_shl(ctx, deposit32(extract32(insn, 5, 5), 5, 27, extract32(insn, 22, 2)));
    a->rn = extract32(insn, 0, 5);
    a->esz = tszimm_esz(ctx, deposit32(extract32(insn, 5, 5), 5, 27, extract32(insn, 22, 2)));
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rdn_pg_tszimm_shr(DisasContext *ctx, arg_rpri_esz *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->imm = tszimm_shr(ctx, deposit32(extract32(insn, 5, 5), 5, 27, extract32(insn, 22, 2)));
    a->rn = extract32(insn, 0, 5);
    a->esz = tszimm_esz(ctx, deposit32(extract32(insn, 5, 5), 5, 27, extract32(insn, 22, 2)));
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rdn_ra_rm_e0(DisasContext *ctx, arg_rrrr_esz *a, uint32_t insn)
{
    a->ra = extract32(insn, 5, 5);
    a->esz = 0;
    a->rn = extract32(insn, 0, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rdn_rm(DisasContext *ctx, arg_rrr_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 0, 5);
    a->rm = extract32(insn, 5, 5);
}

static void disas_sve_extract_rdn_rm_e0(DisasContext *ctx, arg_rrr_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->rn = extract32(insn, 0, 5);
    a->rm = extract32(insn, 5, 5);
    a->esz = 0;
}

static void disas_sve_extract_rdn_sh_i8u(DisasContext *ctx, arg_rri_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 0, 5);
    a->imm = expand_imm_sh8u(ctx, extract32(insn, 5, 9));
}

static void disas_sve_extract_rpri_g_load(DisasContext *ctx, arg_rpri_gather_load *a, uint32_t insn)
{
    a->u = extract32(insn, 14, 1);
    a->pg = extract32(insn, 10, 3);
    a->imm = extract32(insn, 16, 5);
    a->ff = extract32(insn, 13, 1);
    a->rn = extract32(insn, 5, 5);
    a->msz = extract32(insn, 23, 2);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rpri_load_dt(DisasContext *ctx, arg_rpri_load *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->dtype = extract32(insn, 21, 4);
    a->imm = sextract32(insn, 16, 4);
    a->rn = extract32(insn, 5, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rpri_load_msz(DisasContext *ctx, arg_rpri_load *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->dtype = msz_dtype(ctx, extract32(insn, 23, 2));
    a->imm = sextract32(insn, 16, 4);
    a->rn = extract32(insn, 5, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rpri_scatter_store(DisasContext *ctx, arg_rpri_scatter_store *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->imm = extract32(insn, 16, 5);
    a->rn = extract32(insn, 5, 5);
    a->msz = extract32(insn, 23, 2);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rpri_store_msz(DisasContext *ctx, arg_rpri_store *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->imm = sextract32(insn, 16, 4);
    a->rn = extract32(insn, 5, 5);
    a->msz = extract32(insn, 23, 2);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rprr_g_load_sc(DisasContext *ctx, arg_rprr_gather_load *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->xs = 2;
    a->ff = extract32(insn, 13, 1);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
    a->scale = extract32(insn, 21, 1);
}

static void disas_sve_extract_rprr_g_load_u(DisasContext *ctx, arg_rprr_gather_load *a, uint32_t insn)
{
    a->u = extract32(insn, 14, 1);
    a->pg = extract32(insn, 10, 3);
    a->xs = 2;
    a->ff = extract32(insn, 13, 1);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rprr_g_load_u_sc(DisasContext *ctx, arg_rprr_gather_load *a, uint32_t insn)
{
    a->u = extract32(insn, 14, 1);
    a->pg = extract32(insn, 10, 3);
    a->xs = 2;
    a->ff = extract32(insn, 13, 1);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
    a->scale = extract32(insn, 21, 1);
}

static void disas_sve_extract_rprr_g_load_xs_sc(DisasContext *ctx, arg_rprr_gather_load *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->xs = extract32(insn, 22, 1);
    a->ff = extract32(insn, 13, 1);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
    a->scale = extract32(insn, 21, 1);
}

static void disas_sve_extract_rprr_g_load_xs_u(DisasContext *ctx, arg_rprr_gather_load *a, uint32_t insn)
{
    a->u = extract32(insn, 14, 1);
    a->pg = extract32(insn, 10, 3);
    a->xs = extract32(insn, 22, 1);
    a->ff = extract32(insn, 13, 1);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rprr_g_load_xs_u_sc(DisasContext *ctx, arg_rprr_gather_load *a, uint32_t insn)
{
    a->u = extract32(insn, 14, 1);
    a->pg = extract32(insn, 10, 3);
    a->xs = extract32(insn, 22, 1);
    a->ff = extract32(insn, 13, 1);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
    a->scale = extract32(insn, 21, 1);
}

static void disas_sve_extract_rprr_load_dt(DisasContext *ctx, arg_rprr_load *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->dtype = extract32(insn, 21, 4);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rprr_load_msz(DisasContext *ctx, arg_rprr_load *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->dtype = msz_dtype(ctx, extract32(insn, 23, 2));
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rprr_scatter_store(DisasContext *ctx, arg_rprr_scatter_store *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->msz = extract32(insn, 23, 2);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rprr_store(DisasContext *ctx, arg_rprr_store *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rprr_store_esz_n0(DisasContext *ctx, arg_rprr_store *a, uint32_t insn)
{
    a->pg = extract32(insn, 10, 3);
    a->nreg = 0;
    a->esz = extract32(insn, 21, 2);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->rd = extract32(insn, 0, 5);
}

static void disas_sve_extract_rrx_1(DisasContext *ctx, arg_rrx_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->index = extract32(insn, 20, 1);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 4);
}

static void disas_sve_extract_rrx_2(DisasContext *ctx, arg_rrx_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->index = extract32(insn, 19, 2);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 3);
}

static void disas_sve_extract_rrx_2a(DisasContext *ctx, arg_rrx_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->index = deposit32(extract32(insn, 11, 1), 1, 31, extract32(insn, 20, 1));
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 4);
}

static void disas_sve_extract_rrx_3(DisasContext *ctx, arg_rrx_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->index = deposit32(extract32(insn, 19, 2), 2, 30, extract32(insn, 22, 1));
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 3);
}

static void disas_sve_extract_rrx_3a(DisasContext *ctx, arg_rrx_esz *a, uint32_t insn)
{
    a->rd = extract32(insn, 0, 5);
    a->index = deposit32(extract32(insn, 11, 1), 1, 31, extract32(insn, 19, 2));
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 3);
}

static void disas_sve_extract_rrxr_1(DisasContext *ctx, arg_rrxr_esz *a, uint32_t insn)
{
    a->ra = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 4);
    a->rd = extract32(insn, 0, 5);
    a->index = extract32(insn, 20, 1);
}

static void disas_sve_extract_rrxr_2(DisasContext *ctx, arg_rrxr_esz *a, uint32_t insn)
{
    a->ra = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 3);
    a->rd = extract32(insn, 0, 5);
    a->index = extract32(insn, 19, 2);
}

static void disas_sve_extract_rrxr_2a(DisasContext *ctx, arg_rrxr_esz *a, uint32_t insn)
{
    a->ra = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 4);
    a->rd = extract32(insn, 0, 5);
    a->index = deposit32(extract32(insn, 11, 1), 1, 31, extract32(insn, 20, 1));
}

static void disas_sve_extract_rrxr_3(DisasContext *ctx, arg_rrxr_esz *a, uint32_t insn)
{
    a->ra = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 3);
    a->rd = extract32(insn, 0, 5);
    a->index = deposit32(extract32(insn, 19, 2), 2, 30, extract32(insn, 22, 1));
}

static void disas_sve_extract_rrxr_3a(DisasContext *ctx, arg_rrxr_esz *a, uint32_t insn)
{
    a->ra = extract32(insn, 0, 5);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 3);
    a->rd = extract32(insn, 0, 5);
    a->index = deposit32(extract32(insn, 11, 1), 1, 31, extract32(insn, 19, 2));
}

bool disas_sve(DisasContext *ctx, uint32_t insn)
{
    union {
        arg_disas_sve29 f_disas_sve29;
        arg_disas_sve30 f_disas_sve30;
        arg_disas_sve31 f_disas_sve31;
        arg_disas_sve32 f_disas_sve32;
        arg_disas_sve33 f_disas_sve33;
        arg_disas_sve34 f_disas_sve34;
        arg_disas_sve35 f_disas_sve35;
        arg_disas_sve36 f_disas_sve36;
        arg_disas_sve37 f_disas_sve37;
        arg_disas_sve38 f_disas_sve38;
        arg_disas_sve39 f_disas_sve39;
        arg_disas_sve40 f_disas_sve40;
        arg_disas_sve41 f_disas_sve41;
        arg_disas_sve42 f_disas_sve42;
        arg_disas_sve43 f_disas_sve43;
        arg_disas_sve44 f_disas_sve44;
        arg_disas_sve45 f_disas_sve45;
        arg_disas_sve46 f_disas_sve46;
        arg_disas_sve47 f_disas_sve47;
        arg_disas_sve48 f_disas_sve48;
        arg_disas_sve49 f_disas_sve49;
        arg_disas_sve50 f_disas_sve50;
        arg_incdec2_cnt f_incdec2_cnt;
        arg_incdec2_pred f_incdec2_pred;
        arg_incdec_cnt f_incdec_cnt;
        arg_incdec_pred f_incdec_pred;
        arg_psel f_psel;
        arg_ptrue f_ptrue;
        arg_rpr_esz f_rpr_esz;
        arg_rpr_s f_rpr_s;
        arg_rpri_esz f_rpri_esz;
        arg_rpri_gather_load f_rpri_gather_load;
        arg_rpri_load f_rpri_load;
        arg_rpri_scatter_store f_rpri_scatter_store;
        arg_rpri_store f_rpri_store;
        arg_rprr_esz f_rprr_esz;
        arg_rprr_gather_load f_rprr_gather_load;
        arg_rprr_load f_rprr_load;
        arg_rprr_s f_rprr_s;
        arg_rprr_scatter_store f_rprr_scatter_store;
        arg_rprr_store f_rprr_store;
        arg_rprrr_esz f_rprrr_esz;
        arg_rr_dbm f_rr_dbm;
        arg_rr_esz f_rr_esz;
        arg_rri f_rri;
        arg_rri_esz f_rri_esz;
        arg_rrr_esz f_rrr_esz;
        arg_rrri f_rrri;
        arg_rrri_esz f_rrri_esz;
        arg_rrrr_esz f_rrrr_esz;
        arg_rrx_esz f_rrx_esz;
        arg_rrxr_esz f_rrxr_esz;
    } u;

    switch ((insn >> 25) & 0x7f) {
    case 0x2:
        /* 0000010. ........ ........ ........ */
        switch (insn & 0x01200000) {
        case 0x00000000:
            /* 00000100 ..0..... ........ ........ */
            switch ((insn >> 13) & 0x7) {
            case 0x0:
                /* 00000100 ..0..... 000..... ........ */
                switch ((insn >> 16) & 0x1f) {
                case 0x0:
                    /* 00000100 ..000000 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:294 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_ADD_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x1:
                    /* 00000100 ..000001 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:295 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_SUB_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x3:
                    /* 00000100 ..000011 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:296 */
                    disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                    if (trans_SUB_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x8:
                    /* 00000100 ..001000 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:299 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_SMAX_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x9:
                    /* 00000100 ..001001 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:300 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_UMAX_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0xa:
                    /* 00000100 ..001010 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:301 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_SMIN_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0xb:
                    /* 00000100 ..001011 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:302 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_UMIN_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0xc:
                    /* 00000100 ..001100 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:303 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_SABD_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0xd:
                    /* 00000100 ..001101 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:304 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_UABD_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x10:
                    /* 00000100 ..010000 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:307 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_MUL_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x12:
                    /* 00000100 ..010010 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:308 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_SMULH_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x13:
                    /* 00000100 ..010011 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:309 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_UMULH_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x14:
                    /* 00000100 ..010100 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:311 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_SDIV_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x15:
                    /* 00000100 ..010101 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:312 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_UDIV_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x16:
                    /* 00000100 ..010110 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:313 */
                    disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                    if (trans_SDIV_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x17:
                    /* 00000100 ..010111 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:314 */
                    disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                    if (trans_UDIV_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x18:
                    /* 00000100 ..011000 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:288 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_ORR_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x19:
                    /* 00000100 ..011001 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:289 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_EOR_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x1a:
                    /* 00000100 ..011010 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:290 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_AND_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x1b:
                    /* 00000100 ..011011 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:291 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_BIC_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                }
                break;
            case 0x1:
                /* 00000100 ..0..... 001..... ........ */
                disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                switch ((insn >> 16) & 0x1f) {
                case 0x0:
                    /* 00000100 ..000000 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:330 */
                    if (trans_SADDV(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x1:
                    /* 00000100 ..000001 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:329 */
                    if (trans_UADDV(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x8:
                    /* 00000100 ..001000 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:333 */
                    if (trans_SMAXV(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x9:
                    /* 00000100 ..001001 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:334 */
                    if (trans_UMAXV(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0xa:
                    /* 00000100 ..001010 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:335 */
                    if (trans_SMINV(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0xb:
                    /* 00000100 ..001011 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:336 */
                    if (trans_UMINV(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x10:
                    /* 00000100 ..010000 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:324 */
                    if (trans_MOVPRFX_z(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x11:
                    /* 00000100 ..010001 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:325 */
                    if (trans_MOVPRFX_m(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x18:
                    /* 00000100 ..011000 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:319 */
                    if (trans_ORV(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x19:
                    /* 00000100 ..011001 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:320 */
                    if (trans_EORV(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x1a:
                    /* 00000100 ..011010 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:321 */
                    if (trans_ANDV(ctx, &u.f_rpr_esz)) return true;
                    break;
                }
                break;
            case 0x2:
                /* 00000100 ..0..... 010..... ........ */
                /* ../git/target/arm/tcg/sve.decode:402 */
                disas_sve_extract_rda_pg_rn_rm(ctx, &u.f_rprrr_esz, insn);
                if (trans_MLA(ctx, &u.f_rprrr_esz)) return true;
                break;
            case 0x3:
                /* 00000100 ..0..... 011..... ........ */
                /* ../git/target/arm/tcg/sve.decode:403 */
                disas_sve_extract_rda_pg_rn_rm(ctx, &u.f_rprrr_esz, insn);
                if (trans_MLS(ctx, &u.f_rprrr_esz)) return true;
                break;
            case 0x4:
                /* 00000100 ..0..... 100..... ........ */
                switch ((insn >> 16) & 0x1f) {
                case 0x0:
                    /* 00000100 ..000000 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:341 */
                    disas_sve_extract_rdn_pg_tszimm_shr(ctx, &u.f_rpri_esz, insn);
                    if (trans_ASR_zpzi(ctx, &u.f_rpri_esz)) return true;
                    break;
                case 0x1:
                    /* 00000100 ..000001 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:342 */
                    disas_sve_extract_rdn_pg_tszimm_shr(ctx, &u.f_rpri_esz, insn);
                    if (trans_LSR_zpzi(ctx, &u.f_rpri_esz)) return true;
                    break;
                case 0x3:
                    /* 00000100 ..000011 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:343 */
                    disas_sve_extract_rdn_pg_tszimm_shl(ctx, &u.f_rpri_esz, insn);
                    if (trans_LSL_zpzi(ctx, &u.f_rpri_esz)) return true;
                    break;
                case 0x4:
                    /* 00000100 ..000100 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:344 */
                    disas_sve_extract_rdn_pg_tszimm_shr(ctx, &u.f_rpri_esz, insn);
                    if (trans_ASRD(ctx, &u.f_rpri_esz)) return true;
                    break;
                case 0x6:
                    /* 00000100 ..000110 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:345 */
                    disas_sve_extract_rdn_pg_tszimm_shl(ctx, &u.f_rpri_esz, insn);
                    if (trans_SQSHL_zpzi(ctx, &u.f_rpri_esz)) return true;
                    break;
                case 0x7:
                    /* 00000100 ..000111 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:346 */
                    disas_sve_extract_rdn_pg_tszimm_shl(ctx, &u.f_rpri_esz, insn);
                    if (trans_UQSHL_zpzi(ctx, &u.f_rpri_esz)) return true;
                    break;
                case 0xc:
                    /* 00000100 ..001100 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:347 */
                    disas_sve_extract_rdn_pg_tszimm_shr(ctx, &u.f_rpri_esz, insn);
                    if (trans_SRSHR(ctx, &u.f_rpri_esz)) return true;
                    break;
                case 0xd:
                    /* 00000100 ..001101 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:348 */
                    disas_sve_extract_rdn_pg_tszimm_shr(ctx, &u.f_rpri_esz, insn);
                    if (trans_URSHR(ctx, &u.f_rpri_esz)) return true;
                    break;
                case 0xf:
                    /* 00000100 ..001111 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:349 */
                    disas_sve_extract_rdn_pg_tszimm_shl(ctx, &u.f_rpri_esz, insn);
                    if (trans_SQSHLU(ctx, &u.f_rpri_esz)) return true;
                    break;
                case 0x10:
                    /* 00000100 ..010000 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:352 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_ASR_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x11:
                    /* 00000100 ..010001 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:353 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_LSR_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x13:
                    /* 00000100 ..010011 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:354 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_LSL_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x14:
                    /* 00000100 ..010100 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:355 */
                    disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                    if (trans_ASR_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x15:
                    /* 00000100 ..010101 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:356 */
                    disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                    if (trans_LSR_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x17:
                    /* 00000100 ..010111 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:357 */
                    disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                    if (trans_LSL_zpzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x18:
                    /* 00000100 ..011000 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:361 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_ASR_zpzw(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x19:
                    /* 00000100 ..011001 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:362 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_LSR_zpzw(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x1b:
                    /* 00000100 ..011011 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:363 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_LSL_zpzw(ctx, &u.f_rprr_esz)) return true;
                    break;
                }
                break;
            case 0x5:
                /* 00000100 ..0..... 101..... ........ */
                disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                switch ((insn >> 16) & 0x1f) {
                case 0x10:
                    /* 00000100 ..010000 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:381 */
                    if (trans_SXTB(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x11:
                    /* 00000100 ..010001 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:382 */
                    if (trans_UXTB(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x12:
                    /* 00000100 ..010010 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:383 */
                    if (trans_SXTH(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x13:
                    /* 00000100 ..010011 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:384 */
                    if (trans_UXTH(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x14:
                    /* 00000100 ..010100 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:385 */
                    if (trans_SXTW(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x15:
                    /* 00000100 ..010101 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:386 */
                    if (trans_UXTW(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x16:
                    /* 00000100 ..010110 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:379 */
                    if (trans_ABS(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x17:
                    /* 00000100 ..010111 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:380 */
                    if (trans_NEG(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x18:
                    /* 00000100 ..011000 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:369 */
                    if (trans_CLS(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x19:
                    /* 00000100 ..011001 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:370 */
                    if (trans_CLZ(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x1a:
                    /* 00000100 ..011010 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:371 */
                    if (trans_CNT_zpz(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x1b:
                    /* 00000100 ..011011 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:372 */
                    if (trans_CNOT(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x1c:
                    /* 00000100 ..011100 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:374 */
                    if (trans_FABS(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x1d:
                    /* 00000100 ..011101 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:375 */
                    if (trans_FNEG(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x1e:
                    /* 00000100 ..011110 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:373 */
                    if (trans_NOT_zpz(ctx, &u.f_rpr_esz)) return true;
                    break;
                }
                break;
            case 0x6:
                /* 00000100 ..0..... 110..... ........ */
                /* ../git/target/arm/tcg/sve.decode:406 */
                disas_sve_extract_rdn_pg_ra_rm(ctx, &u.f_rprrr_esz, insn);
                if (trans_MLA(ctx, &u.f_rprrr_esz)) return true;
                break;
            case 0x7:
                /* 00000100 ..0..... 111..... ........ */
                /* ../git/target/arm/tcg/sve.decode:407 */
                disas_sve_extract_rdn_pg_ra_rm(ctx, &u.f_rprrr_esz, insn);
                if (trans_MLS(ctx, &u.f_rprrr_esz)) return true;
                break;
            }
            break;
        case 0x00200000:
            /* 00000100 ..1..... ........ ........ */
            switch ((insn >> 12) & 0xf) {
            case 0x0:
                /* 00000100 ..1..... 0000.... ........ */
                disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                switch ((insn >> 10) & 0x3) {
                case 0x0:
                    /* 00000100 ..1..... 000000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:412 */
                    if (trans_ADD_zzz(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x1:
                    /* 00000100 ..1..... 000001.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:413 */
                    if (trans_SUB_zzz(ctx, &u.f_rrr_esz)) return true;
                    break;
                }
                break;
            case 0x1:
                /* 00000100 ..1..... 0001.... ........ */
                disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                switch ((insn >> 10) & 0x3) {
                case 0x0:
                    /* 00000100 ..1..... 000100.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:414 */
                    if (trans_SQADD_zzz(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x1:
                    /* 00000100 ..1..... 000101.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:415 */
                    if (trans_UQADD_zzz(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x2:
                    /* 00000100 ..1..... 000110.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:416 */
                    if (trans_SQSUB_zzz(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x3:
                    /* 00000100 ..1..... 000111.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:417 */
                    if (trans_UQSUB_zzz(ctx, &u.f_rrr_esz)) return true;
                    break;
                }
                break;
            case 0x3:
                /* 00000100 ..1..... 0011.... ........ */
                switch ((insn >> 10) & 0x3) {
                case 0x0:
                    /* 00000100 ..1..... 001100.. ........ */
                    disas_sve_extract_rd_rn_rm_e0(ctx, &u.f_rrr_esz, insn);
                    switch ((insn >> 22) & 0x3) {
                    case 0x0:
                        /* 00000100 001..... 001100.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:422 */
                        if (trans_AND_zzz(ctx, &u.f_rrr_esz)) return true;
                        break;
                    case 0x1:
                        /* 00000100 011..... 001100.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:423 */
                        if (trans_ORR_zzz(ctx, &u.f_rrr_esz)) return true;
                        break;
                    case 0x2:
                        /* 00000100 101..... 001100.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:424 */
                        if (trans_EOR_zzz(ctx, &u.f_rrr_esz)) return true;
                        break;
                    case 0x3:
                        /* 00000100 111..... 001100.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:425 */
                        if (trans_BIC_zzz(ctx, &u.f_rrr_esz)) return true;
                        break;
                    }
                    break;
                case 0x1:
                    /* 00000100 ..1..... 001101.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:427 */
                    disas_sve_extract_disas_sve_Fmt_72(ctx, &u.f_rrri_esz, insn);
                    if (trans_XAR(ctx, &u.f_rrri_esz)) return true;
                    break;
                case 0x2:
                    /* 00000100 ..1..... 001110.. ........ */
                    disas_sve_extract_rdn_ra_rm_e0(ctx, &u.f_rrrr_esz, insn);
                    switch ((insn >> 22) & 0x3) {
                    case 0x0:
                        /* 00000100 001..... 001110.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:431 */
                        if (trans_EOR3(ctx, &u.f_rrrr_esz)) return true;
                        break;
                    case 0x1:
                        /* 00000100 011..... 001110.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:433 */
                        if (trans_BCAX(ctx, &u.f_rrrr_esz)) return true;
                        break;
                    }
                    break;
                case 0x3:
                    /* 00000100 ..1..... 001111.. ........ */
                    disas_sve_extract_rdn_ra_rm_e0(ctx, &u.f_rrrr_esz, insn);
                    switch ((insn >> 22) & 0x3) {
                    case 0x0:
                        /* 00000100 001..... 001111.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:432 */
                        if (trans_BSL(ctx, &u.f_rrrr_esz)) return true;
                        break;
                    case 0x1:
                        /* 00000100 011..... 001111.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:434 */
                        if (trans_BSL1N(ctx, &u.f_rrrr_esz)) return true;
                        break;
                    case 0x2:
                        /* 00000100 101..... 001111.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:435 */
                        if (trans_BSL2N(ctx, &u.f_rrrr_esz)) return true;
                        break;
                    case 0x3:
                        /* 00000100 111..... 001111.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:436 */
                        if (trans_NBSL(ctx, &u.f_rrrr_esz)) return true;
                        break;
                    }
                    break;
                }
                break;
            case 0x4:
                /* 00000100 ..1..... 0100.... ........ */
                switch ((insn >> 10) & 0x3) {
                case 0x0:
                    /* 00000100 ..1..... 010000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:441 */
                    disas_sve_extract_disas_sve_Fmt_73(ctx, &u.f_disas_sve29, insn);
                    if (trans_INDEX_ii(ctx, &u.f_disas_sve29)) return true;
                    break;
                case 0x1:
                    /* 00000100 ..1..... 010001.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:447 */
                    disas_sve_extract_disas_sve_Fmt_75(ctx, &u.f_rri_esz, insn);
                    if (trans_INDEX_ri(ctx, &u.f_rri_esz)) return true;
                    break;
                case 0x2:
                    /* 00000100 ..1..... 010010.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:444 */
                    disas_sve_extract_disas_sve_Fmt_74(ctx, &u.f_disas_sve30, insn);
                    if (trans_INDEX_ir(ctx, &u.f_disas_sve30)) return true;
                    break;
                case 0x3:
                    /* 00000100 ..1..... 010011.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:450 */
                    disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                    if (trans_INDEX_rr(ctx, &u.f_rrr_esz)) return true;
                    break;
                }
                break;
            case 0x5:
                /* 00000100 ..1..... 0101.... ........ */
                switch (insn & 0x00c00800) {
                case 0x00000000:
                    /* 00000100 001..... 01010... ........ */
                    /* ../git/target/arm/tcg/sve.decode:455 */
                    disas_sve_extract_rd_rn_i6(ctx, &u.f_rri, insn);
                    if (trans_ADDVL(ctx, &u.f_rri)) return true;
                    break;
                case 0x00000800:
                    /* 00000100 001..... 01011... ........ */
                    /* ../git/target/arm/tcg/sve.decode:456 */
                    disas_sve_extract_rd_rn_i6(ctx, &u.f_rri, insn);
                    if (trans_ADDSVL(ctx, &u.f_rri)) return true;
                    break;
                case 0x00400000:
                    /* 00000100 011..... 01010... ........ */
                    /* ../git/target/arm/tcg/sve.decode:457 */
                    disas_sve_extract_rd_rn_i6(ctx, &u.f_rri, insn);
                    if (trans_ADDPL(ctx, &u.f_rri)) return true;
                    break;
                case 0x00400800:
                    /* 00000100 011..... 01011... ........ */
                    /* ../git/target/arm/tcg/sve.decode:458 */
                    disas_sve_extract_rd_rn_i6(ctx, &u.f_rri, insn);
                    if (trans_ADDSPL(ctx, &u.f_rri)) return true;
                    break;
                case 0x00800000:
                    /* 00000100 101..... 01010... ........ */
                    disas_sve_extract_disas_sve_Fmt_76(ctx, &u.f_disas_sve31, insn);
                    switch ((insn >> 16) & 0x1f) {
                    case 0x1f:
                        /* 00000100 10111111 01010... ........ */
                        /* ../git/target/arm/tcg/sve.decode:461 */
                        if (trans_RDVL(ctx, &u.f_disas_sve31)) return true;
                        break;
                    }
                    break;
                case 0x00800800:
                    /* 00000100 101..... 01011... ........ */
                    disas_sve_extract_disas_sve_Fmt_76(ctx, &u.f_disas_sve31, insn);
                    switch ((insn >> 16) & 0x1f) {
                    case 0x1f:
                        /* 00000100 10111111 01011... ........ */
                        /* ../git/target/arm/tcg/sve.decode:462 */
                        if (trans_RDSVL(ctx, &u.f_disas_sve31)) return true;
                        break;
                    }
                    break;
                }
                break;
            case 0x6:
                /* 00000100 ..1..... 0110.... ........ */
                switch ((insn >> 10) & 0x3) {
                case 0x0:
                    /* 00000100 ..1..... 011000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1322 */
                    disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                    if (trans_MUL_zzz(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x1:
                    /* 00000100 ..1..... 011001.. ........ */
                    disas_sve_extract_rd_rn_rm_e0(ctx, &u.f_rrr_esz, insn);
                    switch ((insn >> 22) & 0x3) {
                    case 0x0:
                        /* 00000100 001..... 011001.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:1325 */
                        if (trans_PMUL_zzz(ctx, &u.f_rrr_esz)) return true;
                        break;
                    }
                    break;
                case 0x2:
                    /* 00000100 ..1..... 011010.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1323 */
                    disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                    if (trans_SMULH_zzz(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x3:
                    /* 00000100 ..1..... 011011.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1324 */
                    disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                    if (trans_UMULH_zzz(ctx, &u.f_rrr_esz)) return true;
                    break;
                }
                break;
            case 0x7:
                /* 00000100 ..1..... 0111.... ........ */
                disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                switch ((insn >> 10) & 0x3) {
                case 0x0:
                    /* 00000100 ..1..... 011100.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1328 */
                    if (trans_SQDMULH_zzz(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x1:
                    /* 00000100 ..1..... 011101.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1329 */
                    if (trans_SQRDMULH_zzz(ctx, &u.f_rrr_esz)) return true;
                    break;
                }
                break;
            case 0x8:
                /* 00000100 ..1..... 1000.... ........ */
                disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                switch ((insn >> 10) & 0x3) {
                case 0x0:
                    /* 00000100 ..1..... 100000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:473 */
                    if (trans_ASR_zzw(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x1:
                    /* 00000100 ..1..... 100001.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:474 */
                    if (trans_LSR_zzw(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x3:
                    /* 00000100 ..1..... 100011.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:475 */
                    if (trans_LSL_zzw(ctx, &u.f_rrr_esz)) return true;
                    break;
                }
                break;
            case 0x9:
                /* 00000100 ..1..... 1001.... ........ */
                switch ((insn >> 10) & 0x3) {
                case 0x0:
                    /* 00000100 ..1..... 100100.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:467 */
                    disas_sve_extract_rd_rn_tszimm_shr(ctx, &u.f_rri_esz, insn);
                    if (trans_ASR_zzi(ctx, &u.f_rri_esz)) return true;
                    break;
                case 0x1:
                    /* 00000100 ..1..... 100101.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:468 */
                    disas_sve_extract_rd_rn_tszimm_shr(ctx, &u.f_rri_esz, insn);
                    if (trans_LSR_zzi(ctx, &u.f_rri_esz)) return true;
                    break;
                case 0x3:
                    /* 00000100 ..1..... 100111.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:469 */
                    disas_sve_extract_rd_rn_tszimm_shl(ctx, &u.f_rri_esz, insn);
                    if (trans_LSL_zzi(ctx, &u.f_rri_esz)) return true;
                    break;
                }
                break;
            case 0xa:
                /* 00000100 ..1..... 1010.... ........ */
                disas_sve_extract_rd_rn_msz_rm(ctx, &u.f_rrri, insn);
                switch ((insn >> 22) & 0x3) {
                case 0x0:
                    /* 00000100 001..... 1010.... ........ */
                    /* ../git/target/arm/tcg/sve.decode:480 */
                    if (trans_ADR_s32(ctx, &u.f_rrri)) return true;
                    break;
                case 0x1:
                    /* 00000100 011..... 1010.... ........ */
                    /* ../git/target/arm/tcg/sve.decode:481 */
                    if (trans_ADR_u32(ctx, &u.f_rrri)) return true;
                    break;
                case 0x2:
                    /* 00000100 101..... 1010.... ........ */
                    /* ../git/target/arm/tcg/sve.decode:482 */
                    if (trans_ADR_p32(ctx, &u.f_rrri)) return true;
                    break;
                case 0x3:
                    /* 00000100 111..... 1010.... ........ */
                    /* ../git/target/arm/tcg/sve.decode:483 */
                    if (trans_ADR_p64(ctx, &u.f_rrri)) return true;
                    break;
                }
                break;
            case 0xb:
                /* 00000100 ..1..... 1011.... ........ */
                switch ((insn >> 10) & 0x3) {
                case 0x0:
                    /* 00000100 ..1..... 101100.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:496 */
                    disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                    if (trans_FTSSEL(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x2:
                    /* 00000100 ..1..... 101110.. ........ */
                    disas_sve_extract_rd_rn(ctx, &u.f_rr_esz, insn);
                    switch ((insn >> 16) & 0x1f) {
                    case 0x0:
                        /* 00000100 ..100000 101110.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:492 */
                        if (trans_FEXPA(ctx, &u.f_rr_esz)) return true;
                        break;
                    }
                    break;
                case 0x3:
                    /* 00000100 ..1..... 101111.. ........ */
                    disas_sve_extract_disas_sve_Fmt_77(ctx, &u.f_disas_sve32, insn);
                    switch (insn & 0x00df0000) {
                    case 0x00000000:
                        /* 00000100 00100000 101111.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:488 */
                        if (trans_MOVPRFX(ctx, &u.f_disas_sve32)) return true;
                        break;
                    }
                    break;
                }
                break;
            case 0xc:
                /* 00000100 ..1..... 1100.... ........ */
                disas_sve_extract_incdec2_cnt(ctx, &u.f_incdec2_cnt, insn);
                switch ((insn >> 20) & 0x1) {
                case 0x0:
                    /* 00000100 ..10.... 1100.... ........ */
                    /* ../git/target/arm/tcg/sve.decode:516 */
                    u.f_incdec2_cnt.d = extract32(insn, 11, 1);
                    u.f_incdec2_cnt.u = extract32(insn, 10, 1);
                    if (trans_SINCDEC_v(ctx, &u.f_incdec2_cnt)) return true;
                    break;
                case 0x1:
                    /* 00000100 ..11.... 1100.... ........ */
                    switch ((insn >> 11) & 0x1) {
                    case 0x0:
                        /* 00000100 ..11.... 11000... ........ */
                        /* ../git/target/arm/tcg/sve.decode:512 */
                        u.f_incdec2_cnt.d = extract32(insn, 10, 1);
                        u.f_incdec2_cnt.u = 1;
                        if (trans_INCDEC_v(ctx, &u.f_incdec2_cnt)) return true;
                        break;
                    }
                    break;
                }
                break;
            case 0xe:
                /* 00000100 ..1..... 1110.... ........ */
                disas_sve_extract_incdec_cnt(ctx, &u.f_incdec_cnt, insn);
                switch (insn & 0x00100800) {
                case 0x00000000:
                    /* 00000100 ..10.... 11100... ........ */
                    switch ((insn >> 10) & 0x1) {
                    case 0x0:
                        /* 00000100 ..10.... 111000.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:501 */
                        u.f_incdec_cnt.d = 0;
                        u.f_incdec_cnt.u = 1;
                        if (trans_CNT_r(ctx, &u.f_incdec_cnt)) return true;
                        break;
                    }
                    break;
                case 0x00100000:
                    /* 00000100 ..11.... 11100... ........ */
                    /* ../git/target/arm/tcg/sve.decode:504 */
                    u.f_incdec_cnt.d = extract32(insn, 10, 1);
                    u.f_incdec_cnt.u = 1;
                    if (trans_INCDEC_r(ctx, &u.f_incdec_cnt)) return true;
                    break;
                }
                break;
            case 0xf:
                /* 00000100 ..1..... 1111.... ........ */
                disas_sve_extract_incdec_cnt(ctx, &u.f_incdec_cnt, insn);
                switch ((insn >> 20) & 0x1) {
                case 0x0:
                    /* 00000100 ..10.... 1111.... ........ */
                    /* ../git/target/arm/tcg/sve.decode:507 */
                    u.f_incdec_cnt.d = extract32(insn, 11, 1);
                    u.f_incdec_cnt.u = extract32(insn, 10, 1);
                    if (trans_SINCDEC_r_32(ctx, &u.f_incdec_cnt)) return true;
                    break;
                case 0x1:
                    /* 00000100 ..11.... 1111.... ........ */
                    /* ../git/target/arm/tcg/sve.decode:508 */
                    u.f_incdec_cnt.d = extract32(insn, 11, 1);
                    u.f_incdec_cnt.u = extract32(insn, 10, 1);
                    if (trans_SINCDEC_r_64(ctx, &u.f_incdec_cnt)) return true;
                    break;
                }
                break;
            }
            break;
        case 0x01000000:
            /* 00000101 ..0..... ........ ........ */
            switch ((insn >> 20) & 0x1) {
            case 0x0:
                /* 00000101 ..00.... ........ ........ */
                switch (insn & 0x00cc0000) {
                case 0x00000000:
                    /* 00000101 000000.. ........ ........ */
                    /* ../git/target/arm/tcg/sve.decode:521 */
                    disas_sve_extract_rdn_dbm(ctx, &u.f_rr_dbm, insn);
                    if (trans_ORR_zzi(ctx, &u.f_rr_dbm)) return true;
                    break;
                case 0x00400000:
                    /* 00000101 010000.. ........ ........ */
                    /* ../git/target/arm/tcg/sve.decode:522 */
                    disas_sve_extract_rdn_dbm(ctx, &u.f_rr_dbm, insn);
                    if (trans_EOR_zzi(ctx, &u.f_rr_dbm)) return true;
                    break;
                case 0x00800000:
                    /* 00000101 100000.. ........ ........ */
                    /* ../git/target/arm/tcg/sve.decode:523 */
                    disas_sve_extract_rdn_dbm(ctx, &u.f_rr_dbm, insn);
                    if (trans_AND_zzi(ctx, &u.f_rr_dbm)) return true;
                    break;
                case 0x00c00000:
                    /* 00000101 110000.. ........ ........ */
                    /* ../git/target/arm/tcg/sve.decode:526 */
                    disas_sve_extract_disas_sve_Fmt_78(ctx, &u.f_disas_sve33, insn);
                    if (trans_DUPM(ctx, &u.f_disas_sve33)) return true;
                    break;
                }
                break;
            case 0x1:
                /* 00000101 ..01.... ........ ........ */
                switch ((insn >> 14) & 0x3) {
                case 0x0:
                    /* 00000101 ..01.... 00...... ........ */
                    if ((insn & 0x00c02000) == 0x00002000) {
                        /* 00000101 0001.... 001..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:539 */
                        disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                        if (trans_INVALID(ctx, &u.f_disas_sve34)) return true;
                    }
                    /* ../git/target/arm/tcg/sve.decode:540 */
                    disas_sve_extract_rdn_pg4(ctx, &u.f_rpri_esz, insn);
                    u.f_rpri_esz.imm = expand_imm_sh8s(ctx, extract32(insn, 5, 9));
                    if (trans_CPY_z_i(ctx, &u.f_rpri_esz)) return true;
                    break;
                case 0x1:
                    /* 00000101 ..01.... 01...... ........ */
                    if ((insn & 0x00c02000) == 0x00002000) {
                        /* 00000101 0001.... 011..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:535 */
                        disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                        if (trans_INVALID(ctx, &u.f_disas_sve34)) return true;
                    }
                    /* ../git/target/arm/tcg/sve.decode:536 */
                    disas_sve_extract_rdn_pg4(ctx, &u.f_rpri_esz, insn);
                    u.f_rpri_esz.imm = expand_imm_sh8s(ctx, extract32(insn, 5, 9));
                    if (trans_CPY_m_i(ctx, &u.f_rpri_esz)) return true;
                    break;
                case 0x3:
                    /* 00000101 ..01.... 11...... ........ */
                    disas_sve_extract_rdn_pg4(ctx, &u.f_rpri_esz, insn);
                    switch ((insn >> 13) & 0x1) {
                    case 0x0:
                        /* 00000101 ..01.... 110..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:531 */
                        u.f_rpri_esz.imm = extract32(insn, 5, 8);
                        if (trans_FCPY(ctx, &u.f_rpri_esz)) return true;
                        break;
                    }
                    break;
                }
                break;
            }
            break;
        case 0x01200000:
            /* 00000101 ..1..... ........ ........ */
            switch ((insn >> 14) & 0x3) {
            case 0x0:
                /* 00000101 ..1..... 00...... ........ */
                switch ((insn >> 13) & 0x1) {
                case 0x0:
                    /* 00000101 ..1..... 000..... ........ */
                    switch ((insn >> 22) & 0x3) {
                    case 0x0:
                        /* 00000101 001..... 000..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:546 */
                        disas_sve_extract_disas_sve_Fmt_80(ctx, &u.f_rrri, insn);
                        if (trans_EXT(ctx, &u.f_rrri)) return true;
                        break;
                    case 0x1:
                        /* 00000101 011..... 000..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:550 */
                        disas_sve_extract_disas_sve_Fmt_81(ctx, &u.f_rri, insn);
                        if (trans_EXT_sve2(ctx, &u.f_rri)) return true;
                        break;
                    case 0x2:
                        /* 00000101 101..... 000..... ........ */
                        disas_sve_extract_rd_rn_rm_e0(ctx, &u.f_rrr_esz, insn);
                        switch ((insn >> 10) & 0x7) {
                        case 0x0:
                            /* 00000101 101..... 000000.. ........ */
                            /* ../git/target/arm/tcg/sve.decode:610 */
                            if (trans_ZIP1_q(ctx, &u.f_rrr_esz)) return true;
                            break;
                        case 0x1:
                            /* 00000101 101..... 000001.. ........ */
                            /* ../git/target/arm/tcg/sve.decode:611 */
                            if (trans_ZIP2_q(ctx, &u.f_rrr_esz)) return true;
                            break;
                        case 0x2:
                            /* 00000101 101..... 000010.. ........ */
                            /* ../git/target/arm/tcg/sve.decode:612 */
                            if (trans_UZP1_q(ctx, &u.f_rrr_esz)) return true;
                            break;
                        case 0x3:
                            /* 00000101 101..... 000011.. ........ */
                            /* ../git/target/arm/tcg/sve.decode:613 */
                            if (trans_UZP2_q(ctx, &u.f_rrr_esz)) return true;
                            break;
                        case 0x6:
                            /* 00000101 101..... 000110.. ........ */
                            /* ../git/target/arm/tcg/sve.decode:614 */
                            if (trans_TRN1_q(ctx, &u.f_rrr_esz)) return true;
                            break;
                        case 0x7:
                            /* 00000101 101..... 000111.. ........ */
                            /* ../git/target/arm/tcg/sve.decode:615 */
                            if (trans_TRN2_q(ctx, &u.f_rrr_esz)) return true;
                            break;
                        }
                        break;
                    }
                    break;
                case 0x1:
                    /* 00000101 ..1..... 001..... ........ */
                    switch ((insn >> 10) & 0x7) {
                    case 0x0:
                        /* 00000101 ..1..... 001000.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:559 */
                        disas_sve_extract_disas_sve_Fmt_82(ctx, &u.f_rri, insn);
                        if (trans_DUP_x(ctx, &u.f_rri)) return true;
                        break;
                    case 0x2:
                        /* 00000101 ..1..... 001010.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:579 */
                        disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                        if (trans_TBL_sve2(ctx, &u.f_rrr_esz)) return true;
                        break;
                    case 0x3:
                        /* 00000101 ..1..... 001011.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:580 */
                        disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                        if (trans_TBX(ctx, &u.f_rrr_esz)) return true;
                        break;
                    case 0x4:
                        /* 00000101 ..1..... 001100.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:572 */
                        disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                        if (trans_TBL(ctx, &u.f_rrr_esz)) return true;
                        break;
                    case 0x6:
                        /* 00000101 ..1..... 001110.. ........ */
                        switch ((insn >> 18) & 0x7) {
                        case 0x0:
                            /* 00000101 ..1000.. 001110.. ........ */
                            disas_sve_extract_rd_rn(ctx, &u.f_rr_esz, insn);
                            switch ((insn >> 16) & 0x3) {
                            case 0x0:
                                /* 00000101 ..100000 001110.. ........ */
                                /* ../git/target/arm/tcg/sve.decode:556 */
                                if (trans_DUP_s(ctx, &u.f_rr_esz)) return true;
                                break;
                            }
                            break;
                        case 0x1:
                            /* 00000101 ..1001.. 001110.. ........ */
                            disas_sve_extract_rdn_rm(ctx, &u.f_rrr_esz, insn);
                            switch ((insn >> 16) & 0x3) {
                            case 0x0:
                                /* 00000101 ..100100 001110.. ........ */
                                /* ../git/target/arm/tcg/sve.decode:566 */
                                if (trans_INSR_r(ctx, &u.f_rrr_esz)) return true;
                                break;
                            }
                            break;
                        case 0x4:
                            /* 00000101 ..1100.. 001110.. ........ */
                            /* ../git/target/arm/tcg/sve.decode:575 */
                            disas_sve_extract_disas_sve_Fmt_83(ctx, &u.f_disas_sve35, insn);
                            if (trans_UNPK(ctx, &u.f_disas_sve35)) return true;
                            break;
                        case 0x5:
                            /* 00000101 ..1101.. 001110.. ........ */
                            disas_sve_extract_rdn_rm(ctx, &u.f_rrr_esz, insn);
                            switch ((insn >> 16) & 0x3) {
                            case 0x0:
                                /* 00000101 ..110100 001110.. ........ */
                                /* ../git/target/arm/tcg/sve.decode:563 */
                                if (trans_INSR_f(ctx, &u.f_rrr_esz)) return true;
                                break;
                            }
                            break;
                        case 0x6:
                            /* 00000101 ..1110.. 001110.. ........ */
                            disas_sve_extract_rd_rn(ctx, &u.f_rr_esz, insn);
                            switch ((insn >> 16) & 0x3) {
                            case 0x0:
                                /* 00000101 ..111000 001110.. ........ */
                                /* ../git/target/arm/tcg/sve.decode:569 */
                                if (trans_REV_v(ctx, &u.f_rr_esz)) return true;
                                break;
                            }
                            break;
                        }
                        break;
                    }
                    break;
                }
                break;
            case 0x1:
                /* 00000101 ..1..... 01...... ........ */
                switch ((insn >> 10) & 0xf) {
                case 0x0:
                    /* 00000101 ..1..... 010000.. ........ */
                    switch (insn & 0x00100210) {
                    case 0x00000000:
                        /* 00000101 ..10.... 0100000. ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:585 */
                        disas_sve_extract_pd_pn_pm(ctx, &u.f_rrr_esz, insn);
                        if (trans_ZIP1_p(ctx, &u.f_rrr_esz)) return true;
                        break;
                    case 0x00100000:
                        /* 00000101 ..11.... 0100000. ...0.... */
                        switch ((insn >> 16) & 0xf) {
                        case 0x0:
                            /* 00000101 ..110000 0100000. ...0.... */
                            disas_sve_extract_pd_pn_e0(ctx, &u.f_rr_esz, insn);
                            switch ((insn >> 22) & 0x3) {
                            case 0x0:
                                /* 00000101 00110000 0100000. ...0.... */
                                /* ../git/target/arm/tcg/sve.decode:596 */
                                if (trans_PUNPKLO(ctx, &u.f_rr_esz)) return true;
                                break;
                            }
                            break;
                        case 0x1:
                            /* 00000101 ..110001 0100000. ...0.... */
                            disas_sve_extract_pd_pn_e0(ctx, &u.f_rr_esz, insn);
                            switch ((insn >> 22) & 0x3) {
                            case 0x0:
                                /* 00000101 00110001 0100000. ...0.... */
                                /* ../git/target/arm/tcg/sve.decode:597 */
                                if (trans_PUNPKHI(ctx, &u.f_rr_esz)) return true;
                                break;
                            }
                            break;
                        case 0x4:
                            /* 00000101 ..110100 0100000. ...0.... */
                            /* ../git/target/arm/tcg/sve.decode:593 */
                            disas_sve_extract_pd_pn(ctx, &u.f_rr_esz, insn);
                            if (trans_REV_p(ctx, &u.f_rr_esz)) return true;
                            break;
                        }
                        break;
                    }
                    break;
                case 0x1:
                    /* 00000101 ..1..... 010001.. ........ */
                    disas_sve_extract_pd_pn_pm(ctx, &u.f_rrr_esz, insn);
                    switch (insn & 0x00100210) {
                    case 0x00000000:
                        /* 00000101 ..10.... 0100010. ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:586 */
                        if (trans_ZIP2_p(ctx, &u.f_rrr_esz)) return true;
                        break;
                    }
                    break;
                case 0x2:
                    /* 00000101 ..1..... 010010.. ........ */
                    disas_sve_extract_pd_pn_pm(ctx, &u.f_rrr_esz, insn);
                    switch (insn & 0x00100210) {
                    case 0x00000000:
                        /* 00000101 ..10.... 0100100. ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:587 */
                        if (trans_UZP1_p(ctx, &u.f_rrr_esz)) return true;
                        break;
                    }
                    break;
                case 0x3:
                    /* 00000101 ..1..... 010011.. ........ */
                    disas_sve_extract_pd_pn_pm(ctx, &u.f_rrr_esz, insn);
                    switch (insn & 0x00100210) {
                    case 0x00000000:
                        /* 00000101 ..10.... 0100110. ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:588 */
                        if (trans_UZP2_p(ctx, &u.f_rrr_esz)) return true;
                        break;
                    }
                    break;
                case 0x4:
                    /* 00000101 ..1..... 010100.. ........ */
                    disas_sve_extract_pd_pn_pm(ctx, &u.f_rrr_esz, insn);
                    switch (insn & 0x00100210) {
                    case 0x00000000:
                        /* 00000101 ..10.... 0101000. ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:589 */
                        if (trans_TRN1_p(ctx, &u.f_rrr_esz)) return true;
                        break;
                    }
                    break;
                case 0x5:
                    /* 00000101 ..1..... 010101.. ........ */
                    disas_sve_extract_pd_pn_pm(ctx, &u.f_rrr_esz, insn);
                    switch (insn & 0x00100210) {
                    case 0x00000000:
                        /* 00000101 ..10.... 0101010. ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:590 */
                        if (trans_TRN2_p(ctx, &u.f_rrr_esz)) return true;
                        break;
                    }
                    break;
                case 0x8:
                    /* 00000101 ..1..... 011000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:602 */
                    disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                    if (trans_ZIP1_z(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x9:
                    /* 00000101 ..1..... 011001.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:603 */
                    disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                    if (trans_ZIP2_z(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0xa:
                    /* 00000101 ..1..... 011010.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:604 */
                    disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                    if (trans_UZP1_z(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0xb:
                    /* 00000101 ..1..... 011011.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:605 */
                    disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                    if (trans_UZP2_z(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0xc:
                    /* 00000101 ..1..... 011100.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:606 */
                    disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                    if (trans_TRN1_z(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0xd:
                    /* 00000101 ..1..... 011101.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:607 */
                    disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                    if (trans_TRN2_z(ctx, &u.f_rrr_esz)) return true;
                    break;
                }
                break;
            case 0x2:
                /* 00000101 ..1..... 10...... ........ */
                switch (insn & 0x001f2000) {
                case 0x00000000:
                    /* 00000101 ..100000 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:644 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_CPY_m_v(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00002000:
                    /* 00000101 ..100000 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:640 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_LASTA_r(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00010000:
                    /* 00000101 ..100001 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:621 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_COMPACT(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00012000:
                    /* 00000101 ..100001 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:641 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_LASTB_r(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00020000:
                    /* 00000101 ..100010 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:636 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_LASTA_v(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00030000:
                    /* 00000101 ..100011 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:637 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_LASTB_v(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00040000:
                    /* 00000101 ..100100 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:651 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_REVB(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00050000:
                    /* 00000101 ..100101 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:652 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_REVH(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00060000:
                    /* 00000101 ..100110 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:653 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_REVW(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00070000:
                    /* 00000101 ..100111 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:654 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_RBIT(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00080000:
                    /* 00000101 ..101000 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:624 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_CLASTA_z(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x00082000:
                    /* 00000101 ..101000 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:647 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_CPY_m_r(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00090000:
                    /* 00000101 ..101001 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:625 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_CLASTB_z(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x000a0000:
                    /* 00000101 ..101010 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:628 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_CLASTA_v(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x000b0000:
                    /* 00000101 ..101011 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:629 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_CLASTB_v(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x000c0000:
                    /* 00000101 ..101100 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:658 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_SPLICE(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x000d0000:
                    /* 00000101 ..101101 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:661 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_SPLICE_sve2(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x000e0000:
                    /* 00000101 ..101110 100..... ........ */
                    disas_sve_extract_rd_pg_rn_e0(ctx, &u.f_rpr_esz, insn);
                    switch ((insn >> 22) & 0x3) {
                    case 0x0:
                        /* 00000101 00101110 100..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:655 */
                        if (trans_REVD(ctx, &u.f_rpr_esz)) return true;
                        break;
                    }
                    break;
                case 0x00102000:
                    /* 00000101 ..110000 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:632 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_CLASTA_r(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00112000:
                    /* 00000101 ..110001 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:633 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_CLASTB_r(ctx, &u.f_rpr_esz)) return true;
                    break;
                }
                break;
            case 0x3:
                /* 00000101 ..1..... 11...... ........ */
                /* ../git/target/arm/tcg/sve.decode:666 */
                disas_sve_extract_rd_pg4_rn_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_SEL_zpzz(ctx, &u.f_rprr_esz)) return true;
                break;
            }
            break;
        }
        break;
    case 0x12:
        /* 0010010. ........ ........ ........ */
        switch (insn & 0x01200000) {
        case 0x00000000:
            /* 00100100 ..0..... ........ ........ */
            disas_sve_extract_pd_pg_rn_rm(ctx, &u.f_rprr_esz, insn);
            switch (insn & 0x0000e010) {
            case 0x00000000:
                /* 00100100 ..0..... 000..... ...0.... */
                /* ../git/target/arm/tcg/sve.decode:671 */
                if (trans_CMPHS_ppzz(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x00000010:
                /* 00100100 ..0..... 000..... ...1.... */
                /* ../git/target/arm/tcg/sve.decode:672 */
                if (trans_CMPHI_ppzz(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x00002000:
                /* 00100100 ..0..... 001..... ...0.... */
                /* ../git/target/arm/tcg/sve.decode:680 */
                if (trans_CMPEQ_ppzw(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x00002010:
                /* 00100100 ..0..... 001..... ...1.... */
                /* ../git/target/arm/tcg/sve.decode:681 */
                if (trans_CMPNE_ppzw(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x00004000:
                /* 00100100 ..0..... 010..... ...0.... */
                /* ../git/target/arm/tcg/sve.decode:682 */
                if (trans_CMPGE_ppzw(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x00004010:
                /* 00100100 ..0..... 010..... ...1.... */
                /* ../git/target/arm/tcg/sve.decode:683 */
                if (trans_CMPGT_ppzw(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x00006000:
                /* 00100100 ..0..... 011..... ...0.... */
                /* ../git/target/arm/tcg/sve.decode:684 */
                if (trans_CMPLT_ppzw(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x00006010:
                /* 00100100 ..0..... 011..... ...1.... */
                /* ../git/target/arm/tcg/sve.decode:685 */
                if (trans_CMPLE_ppzw(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x00008000:
                /* 00100100 ..0..... 100..... ...0.... */
                /* ../git/target/arm/tcg/sve.decode:673 */
                if (trans_CMPGE_ppzz(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x00008010:
                /* 00100100 ..0..... 100..... ...1.... */
                /* ../git/target/arm/tcg/sve.decode:674 */
                if (trans_CMPGT_ppzz(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x0000a000:
                /* 00100100 ..0..... 101..... ...0.... */
                /* ../git/target/arm/tcg/sve.decode:675 */
                if (trans_CMPEQ_ppzz(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x0000a010:
                /* 00100100 ..0..... 101..... ...1.... */
                /* ../git/target/arm/tcg/sve.decode:676 */
                if (trans_CMPNE_ppzz(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x0000c000:
                /* 00100100 ..0..... 110..... ...0.... */
                /* ../git/target/arm/tcg/sve.decode:686 */
                if (trans_CMPHS_ppzw(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x0000c010:
                /* 00100100 ..0..... 110..... ...1.... */
                /* ../git/target/arm/tcg/sve.decode:687 */
                if (trans_CMPHI_ppzw(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x0000e000:
                /* 00100100 ..0..... 111..... ...0.... */
                /* ../git/target/arm/tcg/sve.decode:688 */
                if (trans_CMPLO_ppzw(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x0000e010:
                /* 00100100 ..0..... 111..... ...1.... */
                /* ../git/target/arm/tcg/sve.decode:689 */
                if (trans_CMPLS_ppzw(ctx, &u.f_rprr_esz)) return true;
                break;
            }
            break;
        case 0x00200000:
            /* 00100100 ..1..... ........ ........ */
            disas_sve_extract_pd_pg_rn_i7(ctx, &u.f_rpri_esz, insn);
            switch (insn & 0x00002010) {
            case 0x00000000:
                /* 00100100 ..1..... ..0..... ...0.... */
                /* ../git/target/arm/tcg/sve.decode:694 */
                if (trans_CMPHS_ppzi(ctx, &u.f_rpri_esz)) return true;
                break;
            case 0x00000010:
                /* 00100100 ..1..... ..0..... ...1.... */
                /* ../git/target/arm/tcg/sve.decode:695 */
                if (trans_CMPHI_ppzi(ctx, &u.f_rpri_esz)) return true;
                break;
            case 0x00002000:
                /* 00100100 ..1..... ..1..... ...0.... */
                /* ../git/target/arm/tcg/sve.decode:696 */
                if (trans_CMPLO_ppzi(ctx, &u.f_rpri_esz)) return true;
                break;
            case 0x00002010:
                /* 00100100 ..1..... ..1..... ...1.... */
                /* ../git/target/arm/tcg/sve.decode:697 */
                if (trans_CMPLS_ppzi(ctx, &u.f_rpri_esz)) return true;
                break;
            }
            break;
        case 0x01000000:
            /* 00100101 ..0..... ........ ........ */
            switch (insn & 0x0000c010) {
            case 0x00000000:
                /* 00100101 ..0..... 00...... ...0.... */
                disas_sve_extract_pd_pg_rn_i5(ctx, &u.f_rpri_esz, insn);
                switch ((insn >> 13) & 0x1) {
                case 0x0:
                    /* 00100101 ..0..... 000..... ...0.... */
                    /* ../git/target/arm/tcg/sve.decode:702 */
                    if (trans_CMPGE_ppzi(ctx, &u.f_rpri_esz)) return true;
                    break;
                case 0x1:
                    /* 00100101 ..0..... 001..... ...0.... */
                    /* ../git/target/arm/tcg/sve.decode:704 */
                    if (trans_CMPLT_ppzi(ctx, &u.f_rpri_esz)) return true;
                    break;
                }
                break;
            case 0x00000010:
                /* 00100101 ..0..... 00...... ...1.... */
                disas_sve_extract_pd_pg_rn_i5(ctx, &u.f_rpri_esz, insn);
                switch ((insn >> 13) & 0x1) {
                case 0x0:
                    /* 00100101 ..0..... 000..... ...1.... */
                    /* ../git/target/arm/tcg/sve.decode:703 */
                    if (trans_CMPGT_ppzi(ctx, &u.f_rpri_esz)) return true;
                    break;
                case 0x1:
                    /* 00100101 ..0..... 001..... ...1.... */
                    /* ../git/target/arm/tcg/sve.decode:705 */
                    if (trans_CMPLE_ppzi(ctx, &u.f_rpri_esz)) return true;
                    break;
                }
                break;
            case 0x00004000:
                /* 00100101 ..0..... 01...... ...0.... */
                switch (insn & 0x00900200) {
                case 0x00000000:
                    /* 00100101 0.00.... 01....0. ...0.... */
                    /* ../git/target/arm/tcg/sve.decode:712 */
                    disas_sve_extract_pd_pg_pn_pm_s(ctx, &u.f_rprr_s, insn);
                    if (trans_AND_pppp(ctx, &u.f_rprr_s)) return true;
                    break;
                case 0x00000200:
                    /* 00100101 0.00.... 01....1. ...0.... */
                    /* ../git/target/arm/tcg/sve.decode:714 */
                    disas_sve_extract_pd_pg_pn_pm_s(ctx, &u.f_rprr_s, insn);
                    if (trans_EOR_pppp(ctx, &u.f_rprr_s)) return true;
                    break;
                case 0x00100000:
                    /* 00100101 0.01.... 01....0. ...0.... */
                    disas_sve_extract_pd_pg_pn_s(ctx, &u.f_rpr_s, insn);
                    switch ((insn >> 16) & 0xf) {
                    case 0x0:
                        /* 00100101 0.010000 01....0. ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:757 */
                        if (trans_BRKA_z(ctx, &u.f_rpr_s)) return true;
                        break;
                    case 0x8:
                        /* 00100101 0.011000 01....0. ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:763 */
                        if (trans_BRKN(ctx, &u.f_rpr_s)) return true;
                        break;
                    }
                    break;
                case 0x00800000:
                    /* 00100101 1.00.... 01....0. ...0.... */
                    /* ../git/target/arm/tcg/sve.decode:716 */
                    disas_sve_extract_pd_pg_pn_pm_s(ctx, &u.f_rprr_s, insn);
                    if (trans_ORR_pppp(ctx, &u.f_rprr_s)) return true;
                    break;
                case 0x00800200:
                    /* 00100101 1.00.... 01....1. ...0.... */
                    /* ../git/target/arm/tcg/sve.decode:718 */
                    disas_sve_extract_pd_pg_pn_pm_s(ctx, &u.f_rprr_s, insn);
                    if (trans_NOR_pppp(ctx, &u.f_rprr_s)) return true;
                    break;
                case 0x00900000:
                    /* 00100101 1.01.... 01....0. ...0.... */
                    disas_sve_extract_pd_pg_pn_s(ctx, &u.f_rpr_s, insn);
                    switch ((insn >> 16) & 0xf) {
                    case 0x0:
                        /* 00100101 1.010000 01....0. ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:758 */
                        if (trans_BRKB_z(ctx, &u.f_rpr_s)) return true;
                        break;
                    }
                    break;
                }
                break;
            case 0x00004010:
                /* 00100101 ..0..... 01...... ...1.... */
                switch (insn & 0x00900200) {
                case 0x00000000:
                    /* 00100101 0.00.... 01....0. ...1.... */
                    /* ../git/target/arm/tcg/sve.decode:713 */
                    disas_sve_extract_pd_pg_pn_pm_s(ctx, &u.f_rprr_s, insn);
                    if (trans_BIC_pppp(ctx, &u.f_rprr_s)) return true;
                    break;
                case 0x00000200:
                    /* 00100101 0.00.... 01....1. ...1.... */
                    /* ../git/target/arm/tcg/sve.decode:715 */
                    disas_sve_extract_pd_pg_pn_pm_s(ctx, &u.f_rprr_s, insn);
                    if (trans_SEL_pppp(ctx, &u.f_rprr_s)) return true;
                    break;
                case 0x00100000:
                    /* 00100101 0.01.... 01....0. ...1.... */
                    disas_sve_extract_pd_pg_pn_s0(ctx, &u.f_rpr_s, insn);
                    switch (insn & 0x004f0000) {
                    case 0x00000000:
                        /* 00100101 00010000 01....0. ...1.... */
                        /* ../git/target/arm/tcg/sve.decode:759 */
                        if (trans_BRKA_m(ctx, &u.f_rpr_s)) return true;
                        break;
                    }
                    break;
                case 0x00800000:
                    /* 00100101 1.00.... 01....0. ...1.... */
                    /* ../git/target/arm/tcg/sve.decode:717 */
                    disas_sve_extract_pd_pg_pn_pm_s(ctx, &u.f_rprr_s, insn);
                    if (trans_ORN_pppp(ctx, &u.f_rprr_s)) return true;
                    break;
                case 0x00800200:
                    /* 00100101 1.00.... 01....1. ...1.... */
                    /* ../git/target/arm/tcg/sve.decode:719 */
                    disas_sve_extract_pd_pg_pn_pm_s(ctx, &u.f_rprr_s, insn);
                    if (trans_NAND_pppp(ctx, &u.f_rprr_s)) return true;
                    break;
                case 0x00900000:
                    /* 00100101 1.01.... 01....0. ...1.... */
                    disas_sve_extract_pd_pg_pn_s0(ctx, &u.f_rpr_s, insn);
                    switch (insn & 0x004f0000) {
                    case 0x00000000:
                        /* 00100101 10010000 01....0. ...1.... */
                        /* ../git/target/arm/tcg/sve.decode:760 */
                        if (trans_BRKB_m(ctx, &u.f_rpr_s)) return true;
                        break;
                    }
                    break;
                }
                break;
            case 0x00008000:
                /* 00100101 ..0..... 10...... ...0.... */
                disas_sve_extract_pd_pg_rn_i5(ctx, &u.f_rpri_esz, insn);
                switch ((insn >> 13) & 0x1) {
                case 0x0:
                    /* 00100101 ..0..... 100..... ...0.... */
                    /* ../git/target/arm/tcg/sve.decode:706 */
                    if (trans_CMPEQ_ppzi(ctx, &u.f_rpri_esz)) return true;
                    break;
                }
                break;
            case 0x00008010:
                /* 00100101 ..0..... 10...... ...1.... */
                disas_sve_extract_pd_pg_rn_i5(ctx, &u.f_rpri_esz, insn);
                switch ((insn >> 13) & 0x1) {
                case 0x0:
                    /* 00100101 ..0..... 100..... ...1.... */
                    /* ../git/target/arm/tcg/sve.decode:707 */
                    if (trans_CMPNE_ppzi(ctx, &u.f_rpri_esz)) return true;
                    break;
                }
                break;
            case 0x0000c000:
                /* 00100101 ..0..... 11...... ...0.... */
                switch ((insn >> 20) & 0x1) {
                case 0x0:
                    /* 00100101 ..00.... 11...... ...0.... */
                    disas_sve_extract_pd_pg_pn_pm_s(ctx, &u.f_rprr_s, insn);
                    switch (insn & 0x00800200) {
                    case 0x00000000:
                        /* 00100101 0.00.... 11....0. ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:753 */
                        if (trans_BRKPA(ctx, &u.f_rprr_s)) return true;
                        break;
                    }
                    break;
                case 0x1:
                    /* 00100101 ..01.... 11...... ...0.... */
                    switch ((insn >> 17) & 0x7) {
                    case 0x0:
                        /* 00100101 ..01000. 11...... ...0.... */
                        disas_sve_extract_disas_sve_Fmt_84(ctx, &u.f_disas_sve36, insn);
                        switch (insn & 0x00c1020f) {
                        case 0x00400000:
                            /* 00100101 01010000 11....0. ...00000 */
                            /* ../git/target/arm/tcg/sve.decode:724 */
                            if (trans_PTEST(ctx, &u.f_disas_sve36)) return true;
                            break;
                        }
                        break;
                    case 0x4:
                        /* 00100101 ..01100. 11...... ...0.... */
                        switch ((insn >> 10) & 0xf) {
                        case 0x0:
                            /* 00100101 ..01100. 110000.. ...0.... */
                            disas_sve_extract_pd_pn_e0(ctx, &u.f_rr_esz, insn);
                            switch (insn & 0x00c10200) {
                            case 0x00400000:
                                /* 00100101 01011000 1100000. ...0.... */
                                /* ../git/target/arm/tcg/sve.decode:745 */
                                if (trans_PFIRST(ctx, &u.f_rr_esz)) return true;
                                break;
                            }
                            break;
                        case 0x1:
                            /* 00100101 ..01100. 110001.. ...0.... */
                            disas_sve_extract_pd_pn(ctx, &u.f_rr_esz, insn);
                            switch (insn & 0x00010200) {
                            case 0x00010000:
                                /* 00100101 ..011001 1100010. ...0.... */
                                /* ../git/target/arm/tcg/sve.decode:748 */
                                if (trans_PNEXT(ctx, &u.f_rr_esz)) return true;
                                break;
                            }
                            break;
                        case 0x8:
                            /* 00100101 ..01100. 111000.. ...0.... */
                            /* ../git/target/arm/tcg/sve.decode:727 */
                            disas_sve_extract_disas_sve_Fmt_85(ctx, &u.f_ptrue, insn);
                            if (trans_PTRUE(ctx, &u.f_ptrue)) return true;
                            break;
                        case 0x9:
                            /* 00100101 ..01100. 111001.. ...0.... */
                            disas_sve_extract_disas_sve_Fmt_86(ctx, &u.f_disas_sve37, insn);
                            switch (insn & 0x00c103e0) {
                            case 0x00000000:
                                /* 00100101 00011000 11100100 0000.... */
                                /* ../git/target/arm/tcg/sve.decode:733 */
                                if (trans_PFALSE(ctx, &u.f_disas_sve37)) return true;
                                break;
                            }
                            break;
                        case 0xc:
                            /* 00100101 ..01100. 111100.. ...0.... */
                            switch (insn & 0x00810200) {
                            case 0x00000000:
                                /* 00100101 0.011000 1111000. ...0.... */
                                /* ../git/target/arm/tcg/sve.decode:736 */
                                disas_sve_extract_disas_sve_Fmt_87(ctx, &u.f_disas_sve38, insn);
                                if (trans_RDFFR_p(ctx, &u.f_disas_sve38)) return true;
                                break;
                            case 0x00010000:
                                /* 00100101 0.011001 1111000. ...0.... */
                                disas_sve_extract_disas_sve_Fmt_86(ctx, &u.f_disas_sve37, insn);
                                switch (insn & 0x004001e0) {
                                case 0x00000000:
                                    /* 00100101 00011001 11110000 0000.... */
                                    /* ../git/target/arm/tcg/sve.decode:739 */
                                    if (trans_RDFFR(ctx, &u.f_disas_sve37)) return true;
                                    break;
                                }
                                break;
                            }
                            break;
                        }
                        break;
                    }
                    break;
                }
                break;
            case 0x0000c010:
                /* 00100101 ..0..... 11...... ...1.... */
                disas_sve_extract_pd_pg_pn_pm_s(ctx, &u.f_rprr_s, insn);
                switch (insn & 0x00900200) {
                case 0x00000000:
                    /* 00100101 0.00.... 11....0. ...1.... */
                    /* ../git/target/arm/tcg/sve.decode:754 */
                    if (trans_BRKPB(ctx, &u.f_rprr_s)) return true;
                    break;
                }
                break;
            }
            break;
        case 0x01200000:
            /* 00100101 ..1..... ........ ........ */
            switch ((insn >> 14) & 0x3) {
            case 0x0:
                /* 00100101 ..1..... 00...... ........ */
                switch ((insn >> 13) & 0x1) {
                case 0x0:
                    /* 00100101 ..1..... 000..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:789 */
                    disas_sve_extract_disas_sve_Fmt_90(ctx, &u.f_disas_sve41, insn);
                    if (trans_WHILE(ctx, &u.f_disas_sve41)) return true;
                    break;
                case 0x1:
                    /* 00100101 ..1..... 001..... ........ */
                    switch ((insn >> 10) & 0x7) {
                    case 0x0:
                        /* 00100101 ..1..... 001000.. ........ */
                        disas_sve_extract_disas_sve_Fmt_89(ctx, &u.f_disas_sve40, insn);
                        switch (insn & 0x0080000f) {
                        case 0x00800000:
                            /* 00100101 1.1..... 001000.. ....0000 */
                            /* ../git/target/arm/tcg/sve.decode:786 */
                            if (trans_CTERM(ctx, &u.f_disas_sve40)) return true;
                            break;
                        }
                        break;
                    case 0x4:
                        /* 00100101 ..1..... 001100.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:792 */
                        disas_sve_extract_disas_sve_Fmt_91(ctx, &u.f_disas_sve42, insn);
                        if (trans_WHILE_ptr(ctx, &u.f_disas_sve42)) return true;
                        break;
                    }
                    break;
                }
                break;
            case 0x1:
                /* 00100101 ..1..... 01...... ........ */
                disas_sve_extract_psel(ctx, &u.f_psel, insn);
                switch (insn & 0x00040210) {
                case 0x00000000:
                    /* 00100101 ..1..0.. 01....0. ...0.... */
                    switch ((insn >> 19) & 0x1) {
                    case 0x0:
                        /* 00100101 ..1.00.. 01....0. ...0.... */
                        switch ((insn >> 20) & 0x1) {
                        case 0x0:
                            /* 00100101 ..1000.. 01....0. ...0.... */
                            switch ((insn >> 22) & 0x1) {
                            case 0x1:
                                /* 00100101 .11000.. 01....0. ...0.... */
                                /* ../git/target/arm/tcg/sve.decode:1696 */
                                u.f_psel.esz = 3;
                                u.f_psel.imm = extract32(insn, 23, 1);
                                if (trans_PSEL(ctx, &u.f_psel)) return true;
                                break;
                            }
                            break;
                        case 0x1:
                            /* 00100101 ..1100.. 01....0. ...0.... */
                            /* ../git/target/arm/tcg/sve.decode:1694 */
                            u.f_psel.esz = 2;
                            u.f_psel.imm = extract32(insn, 22, 2);
                            if (trans_PSEL(ctx, &u.f_psel)) return true;
                            break;
                        }
                        break;
                    case 0x1:
                        /* 00100101 ..1.10.. 01....0. ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:1692 */
                        u.f_psel.esz = 1;
                        u.f_psel.imm = deposit32(extract32(insn, 20, 1), 1, 31, extract32(insn, 22, 2));
                        if (trans_PSEL(ctx, &u.f_psel)) return true;
                        break;
                    }
                    break;
                case 0x00040000:
                    /* 00100101 ..1..1.. 01....0. ...0.... */
                    /* ../git/target/arm/tcg/sve.decode:1690 */
                    u.f_psel.esz = 0;
                    u.f_psel.imm = deposit32(extract32(insn, 19, 2), 2, 30, extract32(insn, 22, 2));
                    if (trans_PSEL(ctx, &u.f_psel)) return true;
                    break;
                }
                break;
            case 0x2:
                /* 00100101 ..1..... 10...... ........ */
                switch (insn & 0x001c0200) {
                case 0x00000000:
                    /* 00100101 ..1000.. 10....0. ........ */
                    disas_sve_extract_rd_pg4_pn(ctx, &u.f_rpr_esz, insn);
                    switch ((insn >> 16) & 0x3) {
                    case 0x0:
                        /* 00100101 ..100000 10....0. ........ */
                        /* ../git/target/arm/tcg/sve.decode:768 */
                        if (trans_CNTP(ctx, &u.f_rpr_esz)) return true;
                        break;
                    }
                    break;
                case 0x00080000:
                    /* 00100101 ..1010.. 10....0. ........ */
                    switch ((insn >> 10) & 0xf) {
                    case 0x0:
                        /* 00100101 ..1010.. 1000000. ........ */
                        /* ../git/target/arm/tcg/sve.decode:781 */
                        disas_sve_extract_incdec2_pred(ctx, &u.f_incdec2_pred, insn);
                        u.f_incdec2_pred.d = extract32(insn, 17, 1);
                        u.f_incdec2_pred.u = extract32(insn, 16, 1);
                        if (trans_SINCDECP_z(ctx, &u.f_incdec2_pred)) return true;
                        break;
                    case 0x2:
                        /* 00100101 ..1010.. 1000100. ........ */
                        /* ../git/target/arm/tcg/sve.decode:777 */
                        disas_sve_extract_incdec_pred(ctx, &u.f_incdec_pred, insn);
                        u.f_incdec_pred.d = extract32(insn, 17, 1);
                        u.f_incdec_pred.u = extract32(insn, 16, 1);
                        if (trans_SINCDECP_r_32(ctx, &u.f_incdec_pred)) return true;
                        break;
                    case 0x3:
                        /* 00100101 ..1010.. 1000110. ........ */
                        /* ../git/target/arm/tcg/sve.decode:778 */
                        disas_sve_extract_incdec_pred(ctx, &u.f_incdec_pred, insn);
                        u.f_incdec_pred.d = extract32(insn, 17, 1);
                        u.f_incdec_pred.u = extract32(insn, 16, 1);
                        if (trans_SINCDECP_r_64(ctx, &u.f_incdec_pred)) return true;
                        break;
                    case 0x4:
                        /* 00100101 ..1010.. 1001000. ........ */
                        disas_sve_extract_disas_sve_Fmt_88(ctx, &u.f_disas_sve39, insn);
                        switch (insn & 0x00c3001f) {
                        case 0x00000000:
                            /* 00100101 00101000 1001000. ...00000 */
                            /* ../git/target/arm/tcg/sve.decode:742 */
                            if (trans_WRFFR(ctx, &u.f_disas_sve39)) return true;
                            break;
                        }
                        break;
                    }
                    break;
                case 0x000c0000:
                    /* 00100101 ..1011.. 10....0. ........ */
                    switch (insn & 0x00023c00) {
                    case 0x00000000:
                        /* 00100101 ..10110. 1000000. ........ */
                        /* ../git/target/arm/tcg/sve.decode:774 */
                        disas_sve_extract_incdec2_pred(ctx, &u.f_incdec2_pred, insn);
                        u.f_incdec2_pred.d = extract32(insn, 16, 1);
                        u.f_incdec2_pred.u = 1;
                        if (trans_INCDECP_z(ctx, &u.f_incdec2_pred)) return true;
                        break;
                    case 0x00000800:
                        /* 00100101 ..10110. 1000100. ........ */
                        /* ../git/target/arm/tcg/sve.decode:771 */
                        disas_sve_extract_incdec_pred(ctx, &u.f_incdec_pred, insn);
                        u.f_incdec_pred.d = extract32(insn, 16, 1);
                        u.f_incdec_pred.u = 1;
                        if (trans_INCDECP_r(ctx, &u.f_incdec_pred)) return true;
                        break;
                    case 0x00001000:
                        /* 00100101 ..10110. 1001000. ........ */
                        disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                        switch (insn & 0x00c101ff) {
                        case 0x00000000:
                            /* 00100101 00101100 10010000 00000000 */
                            /* ../git/target/arm/tcg/sve.decode:730 */
                            if (trans_SETFFR(ctx, &u.f_disas_sve34)) return true;
                            break;
                        }
                        break;
                    }
                    break;
                }
                break;
            case 0x3:
                /* 00100101 ..1..... 11...... ........ */
                switch ((insn >> 16) & 0x1f) {
                case 0x0:
                    /* 00100101 ..100000 11...... ........ */
                    if ((insn & 0x00c02000) == 0x00002000) {
                        /* 00100101 00100000 111..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:807 */
                        disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                        if (trans_INVALID(ctx, &u.f_disas_sve34)) return true;
                    }
                    /* ../git/target/arm/tcg/sve.decode:808 */
                    disas_sve_extract_rdn_sh_i8u(ctx, &u.f_rri_esz, insn);
                    if (trans_ADD_zzi(ctx, &u.f_rri_esz)) return true;
                    break;
                case 0x1:
                    /* 00100101 ..100001 11...... ........ */
                    if ((insn & 0x00c02000) == 0x00002000) {
                        /* 00100101 00100001 111..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:811 */
                        disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                        if (trans_INVALID(ctx, &u.f_disas_sve34)) return true;
                    }
                    /* ../git/target/arm/tcg/sve.decode:812 */
                    disas_sve_extract_rdn_sh_i8u(ctx, &u.f_rri_esz, insn);
                    if (trans_SUB_zzi(ctx, &u.f_rri_esz)) return true;
                    break;
                case 0x3:
                    /* 00100101 ..100011 11...... ........ */
                    if ((insn & 0x00c02000) == 0x00002000) {
                        /* 00100101 00100011 111..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:815 */
                        disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                        if (trans_INVALID(ctx, &u.f_disas_sve34)) return true;
                    }
                    /* ../git/target/arm/tcg/sve.decode:816 */
                    disas_sve_extract_rdn_sh_i8u(ctx, &u.f_rri_esz, insn);
                    if (trans_SUBR_zzi(ctx, &u.f_rri_esz)) return true;
                    break;
                case 0x4:
                    /* 00100101 ..100100 11...... ........ */
                    if ((insn & 0x00c02000) == 0x00002000) {
                        /* 00100101 00100100 111..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:819 */
                        disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                        if (trans_INVALID(ctx, &u.f_disas_sve34)) return true;
                    }
                    /* ../git/target/arm/tcg/sve.decode:820 */
                    disas_sve_extract_rdn_sh_i8u(ctx, &u.f_rri_esz, insn);
                    if (trans_SQADD_zzi(ctx, &u.f_rri_esz)) return true;
                    break;
                case 0x5:
                    /* 00100101 ..100101 11...... ........ */
                    if ((insn & 0x00c02000) == 0x00002000) {
                        /* 00100101 00100101 111..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:823 */
                        disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                        if (trans_INVALID(ctx, &u.f_disas_sve34)) return true;
                    }
                    /* ../git/target/arm/tcg/sve.decode:824 */
                    disas_sve_extract_rdn_sh_i8u(ctx, &u.f_rri_esz, insn);
                    if (trans_UQADD_zzi(ctx, &u.f_rri_esz)) return true;
                    break;
                case 0x6:
                    /* 00100101 ..100110 11...... ........ */
                    if ((insn & 0x00c02000) == 0x00002000) {
                        /* 00100101 00100110 111..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:827 */
                        disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                        if (trans_INVALID(ctx, &u.f_disas_sve34)) return true;
                    }
                    /* ../git/target/arm/tcg/sve.decode:828 */
                    disas_sve_extract_rdn_sh_i8u(ctx, &u.f_rri_esz, insn);
                    if (trans_SQSUB_zzi(ctx, &u.f_rri_esz)) return true;
                    break;
                case 0x7:
                    /* 00100101 ..100111 11...... ........ */
                    if ((insn & 0x00c02000) == 0x00002000) {
                        /* 00100101 00100111 111..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:831 */
                        disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                        if (trans_INVALID(ctx, &u.f_disas_sve34)) return true;
                    }
                    /* ../git/target/arm/tcg/sve.decode:832 */
                    disas_sve_extract_rdn_sh_i8u(ctx, &u.f_rri_esz, insn);
                    if (trans_UQSUB_zzi(ctx, &u.f_rri_esz)) return true;
                    break;
                case 0x8:
                    /* 00100101 ..101000 11...... ........ */
                    disas_sve_extract_rdn_i8s(ctx, &u.f_rri_esz, insn);
                    switch ((insn >> 13) & 0x1) {
                    case 0x0:
                        /* 00100101 ..101000 110..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:836 */
                        if (trans_SMAX_zzi(ctx, &u.f_rri_esz)) return true;
                        break;
                    }
                    break;
                case 0x9:
                    /* 00100101 ..101001 11...... ........ */
                    disas_sve_extract_rdn_i8u(ctx, &u.f_rri_esz, insn);
                    switch ((insn >> 13) & 0x1) {
                    case 0x0:
                        /* 00100101 ..101001 110..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:837 */
                        if (trans_UMAX_zzi(ctx, &u.f_rri_esz)) return true;
                        break;
                    }
                    break;
                case 0xa:
                    /* 00100101 ..101010 11...... ........ */
                    disas_sve_extract_rdn_i8s(ctx, &u.f_rri_esz, insn);
                    switch ((insn >> 13) & 0x1) {
                    case 0x0:
                        /* 00100101 ..101010 110..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:838 */
                        if (trans_SMIN_zzi(ctx, &u.f_rri_esz)) return true;
                        break;
                    }
                    break;
                case 0xb:
                    /* 00100101 ..101011 11...... ........ */
                    disas_sve_extract_rdn_i8u(ctx, &u.f_rri_esz, insn);
                    switch ((insn >> 13) & 0x1) {
                    case 0x0:
                        /* 00100101 ..101011 110..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:839 */
                        if (trans_UMIN_zzi(ctx, &u.f_rri_esz)) return true;
                        break;
                    }
                    break;
                case 0x10:
                    /* 00100101 ..110000 11...... ........ */
                    disas_sve_extract_rdn_i8s(ctx, &u.f_rri_esz, insn);
                    switch ((insn >> 13) & 0x1) {
                    case 0x0:
                        /* 00100101 ..110000 110..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:842 */
                        if (trans_MUL_zzi(ctx, &u.f_rri_esz)) return true;
                        break;
                    }
                    break;
                case 0x18:
                    /* 00100101 ..111000 11...... ........ */
                    if ((insn & 0x00c02000) == 0x00002000) {
                        /* 00100101 00111000 111..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:801 */
                        disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                        if (trans_INVALID(ctx, &u.f_disas_sve34)) return true;
                    }
                    /* ../git/target/arm/tcg/sve.decode:802 */
                    disas_sve_extract_disas_sve_Fmt_93(ctx, &u.f_disas_sve43, insn);
                    if (trans_DUP_i(ctx, &u.f_disas_sve43)) return true;
                    break;
                case 0x19:
                    /* 00100101 ..111001 11...... ........ */
                    disas_sve_extract_disas_sve_Fmt_92(ctx, &u.f_disas_sve43, insn);
                    switch ((insn >> 13) & 0x1) {
                    case 0x0:
                        /* 00100101 ..111001 110..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:797 */
                        if (trans_FDUP(ctx, &u.f_disas_sve43)) return true;
                        break;
                    }
                    break;
                }
                break;
            }
            break;
        }
        break;
    case 0x22:
        /* 0100010. ........ ........ ........ */
        switch (insn & 0x0120e000) {
        case 0x00000000:
            /* 01000100 ..0..... 000..... ........ */
            switch ((insn >> 12) & 0x1) {
            case 0x0:
                /* 01000100 ..0..... 0000.... ........ */
                switch ((insn >> 11) & 0x1) {
                case 0x0:
                    /* 01000100 ..0..... 00000... ........ */
                    disas_sve_extract_disas_sve_Fmt_94(ctx, &u.f_disas_sve44, insn);
                    switch ((insn >> 23) & 0x1) {
                    case 0x1:
                        /* 01000100 1.0..... 00000... ........ */
                        /* ../git/target/arm/tcg/sve.decode:845 */
                        if (trans_DOT_zzzz(ctx, &u.f_disas_sve44)) return true;
                        break;
                    }
                    break;
                case 0x1:
                    /* 01000100 ..0..... 00001... ........ */
                    disas_sve_extract_rda_rn_rm(ctx, &u.f_rrrr_esz, insn);
                    switch ((insn >> 10) & 0x1) {
                    case 0x0:
                        /* 01000100 ..0..... 000010.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:1576 */
                        if (trans_SQDMLALBT(ctx, &u.f_rrrr_esz)) return true;
                        break;
                    case 0x1:
                        /* 01000100 ..0..... 000011.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:1577 */
                        if (trans_SQDMLSLBT(ctx, &u.f_rrrr_esz)) return true;
                        break;
                    }
                    break;
                }
                break;
            case 0x1:
                /* 01000100 ..0..... 0001.... ........ */
                /* ../git/target/arm/tcg/sve.decode:849 */
                disas_sve_extract_disas_sve_Fmt_95(ctx, &u.f_disas_sve45, insn);
                if (trans_CDOT_zzzz(ctx, &u.f_disas_sve45)) return true;
                break;
            }
            break;
        case 0x00002000:
            /* 01000100 ..0..... 001..... ........ */
            disas_sve_extract_disas_sve_Fmt_95(ctx, &u.f_disas_sve45, insn);
            switch ((insn >> 12) & 0x1) {
            case 0x0:
                /* 01000100 ..0..... 0010.... ........ */
                /* ../git/target/arm/tcg/sve.decode:1597 */
                if (trans_CMLA_zzzz(ctx, &u.f_disas_sve45)) return true;
                break;
            case 0x1:
                /* 01000100 ..0..... 0011.... ........ */
                /* ../git/target/arm/tcg/sve.decode:1598 */
                if (trans_SQRDCMLAH_zzzz(ctx, &u.f_disas_sve45)) return true;
                break;
            }
            break;
        case 0x00004000:
            /* 01000100 ..0..... 010..... ........ */
            disas_sve_extract_rda_rn_rm(ctx, &u.f_rrrr_esz, insn);
            switch ((insn >> 10) & 0x7) {
            case 0x0:
                /* 01000100 ..0..... 010000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1586 */
                if (trans_SMLALB_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x1:
                /* 01000100 ..0..... 010001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1587 */
                if (trans_SMLALT_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x2:
                /* 01000100 ..0..... 010010.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1588 */
                if (trans_UMLALB_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x3:
                /* 01000100 ..0..... 010011.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1589 */
                if (trans_UMLALT_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x4:
                /* 01000100 ..0..... 010100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1590 */
                if (trans_SMLSLB_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x5:
                /* 01000100 ..0..... 010101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1591 */
                if (trans_SMLSLT_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x6:
                /* 01000100 ..0..... 010110.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1592 */
                if (trans_UMLSLB_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x7:
                /* 01000100 ..0..... 010111.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1593 */
                if (trans_UMLSLT_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            }
            break;
        case 0x00006000:
            /* 01000100 ..0..... 011..... ........ */
            disas_sve_extract_rda_rn_rm(ctx, &u.f_rrrr_esz, insn);
            switch ((insn >> 10) & 0x7) {
            case 0x0:
                /* 01000100 ..0..... 011000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1569 */
                if (trans_SQDMLALB_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x1:
                /* 01000100 ..0..... 011001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1570 */
                if (trans_SQDMLALT_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x2:
                /* 01000100 ..0..... 011010.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1571 */
                if (trans_SQDMLSLB_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x3:
                /* 01000100 ..0..... 011011.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1572 */
                if (trans_SQDMLSLT_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x4:
                /* 01000100 ..0..... 011100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1581 */
                if (trans_SQRDMLAH_zzzz(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x5:
                /* 01000100 ..0..... 011101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1582 */
                if (trans_SQRDMLSH_zzzz(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x6:
                /* 01000100 ..0..... 011110.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1602 */
                if (trans_USDOT_zzzz(ctx, &u.f_rrrr_esz)) return true;
                break;
            }
            break;
        case 0x00008000:
            /* 01000100 ..0..... 100..... ........ */
            switch ((insn >> 16) & 0x1f) {
            case 0x2:
                /* 01000100 ..000010 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1345 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_SRSHL(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x3:
                /* 01000100 ..000011 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1346 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_URSHL(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x6:
                /* 01000100 ..000110 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1347 */
                disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                if (trans_SRSHL(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x7:
                /* 01000100 ..000111 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1348 */
                disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                if (trans_URSHL(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x8:
                /* 01000100 ..001000 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1350 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_SQSHL(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x9:
                /* 01000100 ..001001 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1351 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_UQSHL(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0xa:
                /* 01000100 ..001010 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1355 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_SQRSHL(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0xb:
                /* 01000100 ..001011 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1356 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_UQRSHL(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0xc:
                /* 01000100 ..001100 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1352 */
                disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                if (trans_SQSHL(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0xd:
                /* 01000100 ..001101 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1353 */
                disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                if (trans_UQSHL(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0xe:
                /* 01000100 ..001110 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1357 */
                disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                if (trans_SQRSHL(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0xf:
                /* 01000100 ..001111 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1358 */
                disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                if (trans_UQRSHL(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x10:
                /* 01000100 ..010000 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1362 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_SHADD(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x11:
                /* 01000100 ..010001 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1363 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_UHADD(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x12:
                /* 01000100 ..010010 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1364 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_SHSUB(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x13:
                /* 01000100 ..010011 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1365 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_UHSUB(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x14:
                /* 01000100 ..010100 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1366 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_SRHADD(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x15:
                /* 01000100 ..010101 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1367 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_URHADD(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x16:
                /* 01000100 ..010110 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1368 */
                disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                if (trans_SHSUB(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x17:
                /* 01000100 ..010111 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1369 */
                disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                if (trans_UHSUB(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x18:
                /* 01000100 ..011000 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1381 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_SQADD_zpzz(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x19:
                /* 01000100 ..011001 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1382 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_UQADD_zpzz(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x1a:
                /* 01000100 ..011010 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1383 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_SQSUB_zpzz(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x1b:
                /* 01000100 ..011011 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1384 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_UQSUB_zpzz(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x1c:
                /* 01000100 ..011100 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1385 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_SUQADD(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x1d:
                /* 01000100 ..011101 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1386 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_USQADD(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x1e:
                /* 01000100 ..011110 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1387 */
                disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                if (trans_SQSUB_zpzz(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x1f:
                /* 01000100 ..011111 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1388 */
                disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                if (trans_UQSUB_zpzz(ctx, &u.f_rprr_esz)) return true;
                break;
            }
            break;
        case 0x0000a000:
            /* 01000100 ..0..... 101..... ........ */
            switch ((insn >> 16) & 0x1f) {
            case 0x0:
                /* 01000100 ..000000 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1338 */
                disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                if (trans_URECPE(ctx, &u.f_rpr_esz)) return true;
                break;
            case 0x1:
                /* 01000100 ..000001 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1339 */
                disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                if (trans_URSQRTE(ctx, &u.f_rpr_esz)) return true;
                break;
            case 0x4:
                /* 01000100 ..000100 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1333 */
                disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                if (trans_SADALP_zpzz(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x5:
                /* 01000100 ..000101 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1334 */
                disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                if (trans_UADALP_zpzz(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x8:
                /* 01000100 ..001000 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1340 */
                disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                if (trans_SQABS(ctx, &u.f_rpr_esz)) return true;
                break;
            case 0x9:
                /* 01000100 ..001001 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1341 */
                disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                if (trans_SQNEG(ctx, &u.f_rpr_esz)) return true;
                break;
            case 0x11:
                /* 01000100 ..010001 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1373 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_ADDP(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x14:
                /* 01000100 ..010100 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1374 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_SMAXP(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x15:
                /* 01000100 ..010101 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1375 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_UMAXP(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x16:
                /* 01000100 ..010110 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1376 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_SMINP(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x17:
                /* 01000100 ..010111 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1377 */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                if (trans_UMINP(ctx, &u.f_rprr_esz)) return true;
                break;
            }
            break;
        case 0x0000c000:
            /* 01000100 ..0..... 110..... ........ */
            disas_sve_extract_rda_rn_rm(ctx, &u.f_rrrr_esz, insn);
            switch ((insn >> 10) & 0x7) {
            case 0x0:
                /* 01000100 ..0..... 110000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1701 */
                if (trans_SCLAMP(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x1:
                /* 01000100 ..0..... 110001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1702 */
                if (trans_UCLAMP(ctx, &u.f_rrrr_esz)) return true;
                break;
            }
            break;
        case 0x00200000:
            /* 01000100 ..1..... 000..... ........ */
            switch (insn & 0x00801c00) {
            case 0x00000800:
                /* 01000100 0.1..... 000010.. ........ */
                /* ../git/target/arm/tcg/sve.decode:860 */
                disas_sve_extract_rrxr_3(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 1;
                if (trans_MLA_zzxz_h(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00000c00:
                /* 01000100 0.1..... 000011.. ........ */
                /* ../git/target/arm/tcg/sve.decode:863 */
                disas_sve_extract_rrxr_3(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 1;
                if (trans_MLS_zzxz_h(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00001000:
                /* 01000100 0.1..... 000100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:868 */
                disas_sve_extract_rrxr_3(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 1;
                if (trans_SQRDMLAH_zzxz_h(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00001400:
                /* 01000100 0.1..... 000101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:871 */
                disas_sve_extract_rrxr_3(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 1;
                if (trans_SQRDMLSH_zzxz_h(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00800000:
                /* 01000100 1.1..... 000000.. ........ */
                switch ((insn >> 22) & 0x1) {
                case 0x0:
                    /* 01000100 101..... 000000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:854 */
                    disas_sve_extract_rrxr_2(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 2;
                    if (trans_SDOT_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                    break;
                case 0x1:
                    /* 01000100 111..... 000000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:855 */
                    disas_sve_extract_rrxr_1(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 3;
                    if (trans_SDOT_zzxw_d(ctx, &u.f_rrxr_esz)) return true;
                    break;
                }
                break;
            case 0x00800400:
                /* 01000100 1.1..... 000001.. ........ */
                switch ((insn >> 22) & 0x1) {
                case 0x0:
                    /* 01000100 101..... 000001.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:856 */
                    disas_sve_extract_rrxr_2(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 2;
                    if (trans_UDOT_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                    break;
                case 0x1:
                    /* 01000100 111..... 000001.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:857 */
                    disas_sve_extract_rrxr_1(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 3;
                    if (trans_UDOT_zzxw_d(ctx, &u.f_rrxr_esz)) return true;
                    break;
                }
                break;
            case 0x00800800:
                /* 01000100 1.1..... 000010.. ........ */
                switch ((insn >> 22) & 0x1) {
                case 0x0:
                    /* 01000100 101..... 000010.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:861 */
                    disas_sve_extract_rrxr_2(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 2;
                    if (trans_MLA_zzxz_s(ctx, &u.f_rrxr_esz)) return true;
                    break;
                case 0x1:
                    /* 01000100 111..... 000010.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:862 */
                    disas_sve_extract_rrxr_1(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 3;
                    if (trans_MLA_zzxz_d(ctx, &u.f_rrxr_esz)) return true;
                    break;
                }
                break;
            case 0x00800c00:
                /* 01000100 1.1..... 000011.. ........ */
                switch ((insn >> 22) & 0x1) {
                case 0x0:
                    /* 01000100 101..... 000011.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:864 */
                    disas_sve_extract_rrxr_2(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 2;
                    if (trans_MLS_zzxz_s(ctx, &u.f_rrxr_esz)) return true;
                    break;
                case 0x1:
                    /* 01000100 111..... 000011.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:865 */
                    disas_sve_extract_rrxr_1(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 3;
                    if (trans_MLS_zzxz_d(ctx, &u.f_rrxr_esz)) return true;
                    break;
                }
                break;
            case 0x00801000:
                /* 01000100 1.1..... 000100.. ........ */
                switch ((insn >> 22) & 0x1) {
                case 0x0:
                    /* 01000100 101..... 000100.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:869 */
                    disas_sve_extract_rrxr_2(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 2;
                    if (trans_SQRDMLAH_zzxz_s(ctx, &u.f_rrxr_esz)) return true;
                    break;
                case 0x1:
                    /* 01000100 111..... 000100.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:870 */
                    disas_sve_extract_rrxr_1(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 3;
                    if (trans_SQRDMLAH_zzxz_d(ctx, &u.f_rrxr_esz)) return true;
                    break;
                }
                break;
            case 0x00801400:
                /* 01000100 1.1..... 000101.. ........ */
                switch ((insn >> 22) & 0x1) {
                case 0x0:
                    /* 01000100 101..... 000101.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:872 */
                    disas_sve_extract_rrxr_2(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 2;
                    if (trans_SQRDMLSH_zzxz_s(ctx, &u.f_rrxr_esz)) return true;
                    break;
                case 0x1:
                    /* 01000100 111..... 000101.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:873 */
                    disas_sve_extract_rrxr_1(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 3;
                    if (trans_SQRDMLSH_zzxz_d(ctx, &u.f_rrxr_esz)) return true;
                    break;
                }
                break;
            case 0x00801800:
                /* 01000100 1.1..... 000110.. ........ */
                disas_sve_extract_rrxr_2(ctx, &u.f_rrxr_esz, insn);
                switch ((insn >> 22) & 0x1) {
                case 0x0:
                    /* 01000100 101..... 000110.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:876 */
                    u.f_rrxr_esz.esz = 2;
                    if (trans_USDOT_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                    break;
                }
                break;
            case 0x00801c00:
                /* 01000100 1.1..... 000111.. ........ */
                disas_sve_extract_rrxr_2(ctx, &u.f_rrxr_esz, insn);
                switch ((insn >> 22) & 0x1) {
                case 0x0:
                    /* 01000100 101..... 000111.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:877 */
                    u.f_rrxr_esz.esz = 2;
                    if (trans_SUDOT_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                    break;
                }
                break;
            }
            break;
        case 0x00202000:
            /* 01000100 ..1..... 001..... ........ */
            switch (insn & 0x00c01400) {
            case 0x00800000:
                /* 01000100 101..... 0010.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:880 */
                disas_sve_extract_rrxr_3a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 2;
                if (trans_SQDMLALB_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00800400:
                /* 01000100 101..... 0010.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:882 */
                disas_sve_extract_rrxr_3a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 2;
                if (trans_SQDMLALT_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00801000:
                /* 01000100 101..... 0011.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:884 */
                disas_sve_extract_rrxr_3a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 2;
                if (trans_SQDMLSLB_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00801400:
                /* 01000100 101..... 0011.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:886 */
                disas_sve_extract_rrxr_3a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 2;
                if (trans_SQDMLSLT_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00c00000:
                /* 01000100 111..... 0010.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:881 */
                disas_sve_extract_rrxr_2a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 3;
                if (trans_SQDMLALB_zzxw_d(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00c00400:
                /* 01000100 111..... 0010.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:883 */
                disas_sve_extract_rrxr_2a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 3;
                if (trans_SQDMLALT_zzxw_d(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00c01000:
                /* 01000100 111..... 0011.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:885 */
                disas_sve_extract_rrxr_2a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 3;
                if (trans_SQDMLSLB_zzxw_d(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00c01400:
                /* 01000100 111..... 0011.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:887 */
                disas_sve_extract_rrxr_2a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 3;
                if (trans_SQDMLSLT_zzxw_d(ctx, &u.f_rrxr_esz)) return true;
                break;
            }
            break;
        case 0x00204000:
            /* 01000100 ..1..... 010..... ........ */
            switch (insn & 0x00c01000) {
            case 0x00800000:
                /* 01000100 101..... 0100.... ........ */
                /* ../git/target/arm/tcg/sve.decode:890 */
                disas_sve_extract_disas_sve_Fmt_96(ctx, &u.f_disas_sve46, insn);
                if (trans_CDOT_zzxw_s(ctx, &u.f_disas_sve46)) return true;
                break;
            case 0x00c00000:
                /* 01000100 111..... 0100.... ........ */
                /* ../git/target/arm/tcg/sve.decode:892 */
                disas_sve_extract_disas_sve_Fmt_97(ctx, &u.f_disas_sve46, insn);
                if (trans_CDOT_zzxw_d(ctx, &u.f_disas_sve46)) return true;
                break;
            }
            break;
        case 0x00206000:
            /* 01000100 ..1..... 011..... ........ */
            switch (insn & 0x00c01000) {
            case 0x00800000:
                /* 01000100 101..... 0110.... ........ */
                /* ../git/target/arm/tcg/sve.decode:896 */
                disas_sve_extract_disas_sve_Fmt_96(ctx, &u.f_disas_sve46, insn);
                if (trans_CMLA_zzxz_h(ctx, &u.f_disas_sve46)) return true;
                break;
            case 0x00801000:
                /* 01000100 101..... 0111.... ........ */
                /* ../git/target/arm/tcg/sve.decode:902 */
                disas_sve_extract_disas_sve_Fmt_96(ctx, &u.f_disas_sve46, insn);
                if (trans_SQRDCMLAH_zzxz_h(ctx, &u.f_disas_sve46)) return true;
                break;
            case 0x00c00000:
                /* 01000100 111..... 0110.... ........ */
                /* ../git/target/arm/tcg/sve.decode:898 */
                disas_sve_extract_disas_sve_Fmt_97(ctx, &u.f_disas_sve46, insn);
                if (trans_CMLA_zzxz_s(ctx, &u.f_disas_sve46)) return true;
                break;
            case 0x00c01000:
                /* 01000100 111..... 0111.... ........ */
                /* ../git/target/arm/tcg/sve.decode:904 */
                disas_sve_extract_disas_sve_Fmt_97(ctx, &u.f_disas_sve46, insn);
                if (trans_SQRDCMLAH_zzxz_s(ctx, &u.f_disas_sve46)) return true;
                break;
            }
            break;
        case 0x00208000:
            /* 01000100 ..1..... 100..... ........ */
            switch (insn & 0x00c01400) {
            case 0x00800000:
                /* 01000100 101..... 1000.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:908 */
                disas_sve_extract_rrxr_3a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 2;
                if (trans_SMLALB_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00800400:
                /* 01000100 101..... 1000.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:910 */
                disas_sve_extract_rrxr_3a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 2;
                if (trans_SMLALT_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00801000:
                /* 01000100 101..... 1001.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:912 */
                disas_sve_extract_rrxr_3a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 2;
                if (trans_UMLALB_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00801400:
                /* 01000100 101..... 1001.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:914 */
                disas_sve_extract_rrxr_3a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 2;
                if (trans_UMLALT_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00c00000:
                /* 01000100 111..... 1000.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:909 */
                disas_sve_extract_rrxr_2a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 3;
                if (trans_SMLALB_zzxw_d(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00c00400:
                /* 01000100 111..... 1000.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:911 */
                disas_sve_extract_rrxr_2a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 3;
                if (trans_SMLALT_zzxw_d(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00c01000:
                /* 01000100 111..... 1001.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:913 */
                disas_sve_extract_rrxr_2a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 3;
                if (trans_UMLALB_zzxw_d(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00c01400:
                /* 01000100 111..... 1001.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:915 */
                disas_sve_extract_rrxr_2a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 3;
                if (trans_UMLALT_zzxw_d(ctx, &u.f_rrxr_esz)) return true;
                break;
            }
            break;
        case 0x0020a000:
            /* 01000100 ..1..... 101..... ........ */
            switch (insn & 0x00c01400) {
            case 0x00800000:
                /* 01000100 101..... 1010.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:916 */
                disas_sve_extract_rrxr_3a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 2;
                if (trans_SMLSLB_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00800400:
                /* 01000100 101..... 1010.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:918 */
                disas_sve_extract_rrxr_3a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 2;
                if (trans_SMLSLT_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00801000:
                /* 01000100 101..... 1011.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:920 */
                disas_sve_extract_rrxr_3a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 2;
                if (trans_UMLSLB_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00801400:
                /* 01000100 101..... 1011.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:922 */
                disas_sve_extract_rrxr_3a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 2;
                if (trans_UMLSLT_zzxw_s(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00c00000:
                /* 01000100 111..... 1010.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:917 */
                disas_sve_extract_rrxr_2a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 3;
                if (trans_SMLSLB_zzxw_d(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00c00400:
                /* 01000100 111..... 1010.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:919 */
                disas_sve_extract_rrxr_2a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 3;
                if (trans_SMLSLT_zzxw_d(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00c01000:
                /* 01000100 111..... 1011.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:921 */
                disas_sve_extract_rrxr_2a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 3;
                if (trans_UMLSLB_zzxw_d(ctx, &u.f_rrxr_esz)) return true;
                break;
            case 0x00c01400:
                /* 01000100 111..... 1011.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:923 */
                disas_sve_extract_rrxr_2a(ctx, &u.f_rrxr_esz, insn);
                u.f_rrxr_esz.esz = 3;
                if (trans_UMLSLT_zzxw_d(ctx, &u.f_rrxr_esz)) return true;
                break;
            }
            break;
        case 0x0020c000:
            /* 01000100 ..1..... 110..... ........ */
            switch (insn & 0x00c01400) {
            case 0x00800000:
                /* 01000100 101..... 1100.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:926 */
                disas_sve_extract_rrx_3a(ctx, &u.f_rrx_esz, insn);
                u.f_rrx_esz.esz = 2;
                if (trans_SMULLB_zzx_s(ctx, &u.f_rrx_esz)) return true;
                break;
            case 0x00800400:
                /* 01000100 101..... 1100.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:928 */
                disas_sve_extract_rrx_3a(ctx, &u.f_rrx_esz, insn);
                u.f_rrx_esz.esz = 2;
                if (trans_SMULLT_zzx_s(ctx, &u.f_rrx_esz)) return true;
                break;
            case 0x00801000:
                /* 01000100 101..... 1101.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:930 */
                disas_sve_extract_rrx_3a(ctx, &u.f_rrx_esz, insn);
                u.f_rrx_esz.esz = 2;
                if (trans_UMULLB_zzx_s(ctx, &u.f_rrx_esz)) return true;
                break;
            case 0x00801400:
                /* 01000100 101..... 1101.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:932 */
                disas_sve_extract_rrx_3a(ctx, &u.f_rrx_esz, insn);
                u.f_rrx_esz.esz = 2;
                if (trans_UMULLT_zzx_s(ctx, &u.f_rrx_esz)) return true;
                break;
            case 0x00c00000:
                /* 01000100 111..... 1100.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:927 */
                disas_sve_extract_rrx_2a(ctx, &u.f_rrx_esz, insn);
                u.f_rrx_esz.esz = 3;
                if (trans_SMULLB_zzx_d(ctx, &u.f_rrx_esz)) return true;
                break;
            case 0x00c00400:
                /* 01000100 111..... 1100.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:929 */
                disas_sve_extract_rrx_2a(ctx, &u.f_rrx_esz, insn);
                u.f_rrx_esz.esz = 3;
                if (trans_SMULLT_zzx_d(ctx, &u.f_rrx_esz)) return true;
                break;
            case 0x00c01000:
                /* 01000100 111..... 1101.0.. ........ */
                /* ../git/target/arm/tcg/sve.decode:931 */
                disas_sve_extract_rrx_2a(ctx, &u.f_rrx_esz, insn);
                u.f_rrx_esz.esz = 3;
                if (trans_UMULLB_zzx_d(ctx, &u.f_rrx_esz)) return true;
                break;
            case 0x00c01400:
                /* 01000100 111..... 1101.1.. ........ */
                /* ../git/target/arm/tcg/sve.decode:933 */
                disas_sve_extract_rrx_2a(ctx, &u.f_rrx_esz, insn);
                u.f_rrx_esz.esz = 3;
                if (trans_UMULLT_zzx_d(ctx, &u.f_rrx_esz)) return true;
                break;
            }
            break;
        case 0x0020e000:
            /* 01000100 ..1..... 111..... ........ */
            switch (insn & 0x00801400) {
            case 0x00001000:
                /* 01000100 0.1..... 1111.0.. ........ */
                disas_sve_extract_rrx_3(ctx, &u.f_rrx_esz, insn);
                switch ((insn >> 11) & 0x1) {
                case 0x0:
                    /* 01000100 0.1..... 111100.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:942 */
                    u.f_rrx_esz.esz = 1;
                    if (trans_SQDMULH_zzx_h(ctx, &u.f_rrx_esz)) return true;
                    break;
                case 0x1:
                    /* 01000100 0.1..... 111110.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:950 */
                    u.f_rrx_esz.esz = 1;
                    if (trans_MUL_zzx_h(ctx, &u.f_rrx_esz)) return true;
                    break;
                }
                break;
            case 0x00001400:
                /* 01000100 0.1..... 1111.1.. ........ */
                disas_sve_extract_rrx_3(ctx, &u.f_rrx_esz, insn);
                switch ((insn >> 11) & 0x1) {
                case 0x0:
                    /* 01000100 0.1..... 111101.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:945 */
                    u.f_rrx_esz.esz = 1;
                    if (trans_SQRDMULH_zzx_h(ctx, &u.f_rrx_esz)) return true;
                    break;
                }
                break;
            case 0x00800000:
                /* 01000100 1.1..... 1110.0.. ........ */
                switch ((insn >> 22) & 0x1) {
                case 0x0:
                    /* 01000100 101..... 1110.0.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:936 */
                    disas_sve_extract_rrx_3a(ctx, &u.f_rrx_esz, insn);
                    u.f_rrx_esz.esz = 2;
                    if (trans_SQDMULLB_zzx_s(ctx, &u.f_rrx_esz)) return true;
                    break;
                case 0x1:
                    /* 01000100 111..... 1110.0.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:937 */
                    disas_sve_extract_rrx_2a(ctx, &u.f_rrx_esz, insn);
                    u.f_rrx_esz.esz = 3;
                    if (trans_SQDMULLB_zzx_d(ctx, &u.f_rrx_esz)) return true;
                    break;
                }
                break;
            case 0x00800400:
                /* 01000100 1.1..... 1110.1.. ........ */
                switch ((insn >> 22) & 0x1) {
                case 0x0:
                    /* 01000100 101..... 1110.1.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:938 */
                    disas_sve_extract_rrx_3a(ctx, &u.f_rrx_esz, insn);
                    u.f_rrx_esz.esz = 2;
                    if (trans_SQDMULLT_zzx_s(ctx, &u.f_rrx_esz)) return true;
                    break;
                case 0x1:
                    /* 01000100 111..... 1110.1.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:939 */
                    disas_sve_extract_rrx_2a(ctx, &u.f_rrx_esz, insn);
                    u.f_rrx_esz.esz = 3;
                    if (trans_SQDMULLT_zzx_d(ctx, &u.f_rrx_esz)) return true;
                    break;
                }
                break;
            case 0x00801000:
                /* 01000100 1.1..... 1111.0.. ........ */
                switch (insn & 0x00400800) {
                case 0x00000000:
                    /* 01000100 101..... 111100.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:943 */
                    disas_sve_extract_rrx_2(ctx, &u.f_rrx_esz, insn);
                    u.f_rrx_esz.esz = 2;
                    if (trans_SQDMULH_zzx_s(ctx, &u.f_rrx_esz)) return true;
                    break;
                case 0x00000800:
                    /* 01000100 101..... 111110.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:951 */
                    disas_sve_extract_rrx_2(ctx, &u.f_rrx_esz, insn);
                    u.f_rrx_esz.esz = 2;
                    if (trans_MUL_zzx_s(ctx, &u.f_rrx_esz)) return true;
                    break;
                case 0x00400000:
                    /* 01000100 111..... 111100.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:944 */
                    disas_sve_extract_rrx_1(ctx, &u.f_rrx_esz, insn);
                    u.f_rrx_esz.esz = 3;
                    if (trans_SQDMULH_zzx_d(ctx, &u.f_rrx_esz)) return true;
                    break;
                case 0x00400800:
                    /* 01000100 111..... 111110.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:952 */
                    disas_sve_extract_rrx_1(ctx, &u.f_rrx_esz, insn);
                    u.f_rrx_esz.esz = 3;
                    if (trans_MUL_zzx_d(ctx, &u.f_rrx_esz)) return true;
                    break;
                }
                break;
            case 0x00801400:
                /* 01000100 1.1..... 1111.1.. ........ */
                switch (insn & 0x00400800) {
                case 0x00000000:
                    /* 01000100 101..... 111101.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:946 */
                    disas_sve_extract_rrx_2(ctx, &u.f_rrx_esz, insn);
                    u.f_rrx_esz.esz = 2;
                    if (trans_SQRDMULH_zzx_s(ctx, &u.f_rrx_esz)) return true;
                    break;
                case 0x00400000:
                    /* 01000100 111..... 111101.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:947 */
                    disas_sve_extract_rrx_1(ctx, &u.f_rrx_esz, insn);
                    u.f_rrx_esz.esz = 3;
                    if (trans_SQRDMULH_zzx_d(ctx, &u.f_rrx_esz)) return true;
                    break;
                }
                break;
            }
            break;
        case 0x01000000:
            /* 01000101 ..0..... 000..... ........ */
            disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
            switch ((insn >> 10) & 0x7) {
            case 0x0:
                /* 01000101 ..0..... 000000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1394 */
                if (trans_SADDLB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x1:
                /* 01000101 ..0..... 000001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1395 */
                if (trans_SADDLT(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x2:
                /* 01000101 ..0..... 000010.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1396 */
                if (trans_UADDLB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x3:
                /* 01000101 ..0..... 000011.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1397 */
                if (trans_UADDLT(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x4:
                /* 01000101 ..0..... 000100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1399 */
                if (trans_SSUBLB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x5:
                /* 01000101 ..0..... 000101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1400 */
                if (trans_SSUBLT(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x6:
                /* 01000101 ..0..... 000110.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1401 */
                if (trans_USUBLB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x7:
                /* 01000101 ..0..... 000111.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1402 */
                if (trans_USUBLT(ctx, &u.f_rrr_esz)) return true;
                break;
            }
            break;
        case 0x01002000:
            /* 01000101 ..0..... 001..... ........ */
            disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
            switch ((insn >> 10) & 0x7) {
            case 0x4:
                /* 01000101 ..0..... 001100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1404 */
                if (trans_SABDLB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x5:
                /* 01000101 ..0..... 001101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1405 */
                if (trans_SABDLT(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x6:
                /* 01000101 ..0..... 001110.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1406 */
                if (trans_UABDLB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x7:
                /* 01000101 ..0..... 001111.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1407 */
                if (trans_UABDLT(ctx, &u.f_rrr_esz)) return true;
                break;
            }
            break;
        case 0x01004000:
            /* 01000101 ..0..... 010..... ........ */
            disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
            switch ((insn >> 10) & 0x7) {
            case 0x0:
                /* 01000101 ..0..... 010000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1417 */
                if (trans_SADDWB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x1:
                /* 01000101 ..0..... 010001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1418 */
                if (trans_SADDWT(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x2:
                /* 01000101 ..0..... 010010.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1419 */
                if (trans_UADDWB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x3:
                /* 01000101 ..0..... 010011.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1420 */
                if (trans_UADDWT(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x4:
                /* 01000101 ..0..... 010100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1422 */
                if (trans_SSUBWB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x5:
                /* 01000101 ..0..... 010101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1423 */
                if (trans_SSUBWT(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x6:
                /* 01000101 ..0..... 010110.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1424 */
                if (trans_USUBWB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x7:
                /* 01000101 ..0..... 010111.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1425 */
                if (trans_USUBWT(ctx, &u.f_rrr_esz)) return true;
                break;
            }
            break;
        case 0x01006000:
            /* 01000101 ..0..... 011..... ........ */
            disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
            switch ((insn >> 10) & 0x7) {
            case 0x0:
                /* 01000101 ..0..... 011000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1429 */
                if (trans_SQDMULLB_zzz(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x1:
                /* 01000101 ..0..... 011001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1430 */
                if (trans_SQDMULLT_zzz(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x2:
                /* 01000101 ..0..... 011010.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1431 */
                if (trans_PMULLB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x3:
                /* 01000101 ..0..... 011011.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1432 */
                if (trans_PMULLT(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x4:
                /* 01000101 ..0..... 011100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1433 */
                if (trans_SMULLB_zzz(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x5:
                /* 01000101 ..0..... 011101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1434 */
                if (trans_SMULLT_zzz(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x6:
                /* 01000101 ..0..... 011110.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1435 */
                if (trans_UMULLB_zzz(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x7:
                /* 01000101 ..0..... 011111.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1436 */
                if (trans_UMULLT_zzz(ctx, &u.f_rrr_esz)) return true;
                break;
            }
            break;
        case 0x01008000:
            /* 01000101 ..0..... 100..... ........ */
            switch ((insn >> 10) & 0x7) {
            case 0x0:
                /* 01000101 ..0..... 100000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1411 */
                disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                if (trans_SADDLBT(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x2:
                /* 01000101 ..0..... 100010.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1412 */
                disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                if (trans_SSUBLBT(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x3:
                /* 01000101 ..0..... 100011.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1413 */
                disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                if (trans_SSUBLTB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x4:
                /* 01000101 ..0..... 100100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1448 */
                disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                if (trans_EORBT(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x5:
                /* 01000101 ..0..... 100101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1449 */
                disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                if (trans_EORTB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x6:
                /* 01000101 ..0..... 100110.. ........ */
                disas_sve_extract_rda_rn_rm_e0(ctx, &u.f_rrrr_esz, insn);
                switch ((insn >> 22) & 0x3) {
                case 0x0:
                    /* 01000101 000..... 100110.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1453 */
                    if (trans_SMMLA(ctx, &u.f_rrrr_esz)) return true;
                    break;
                case 0x2:
                    /* 01000101 100..... 100110.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1454 */
                    if (trans_USMMLA(ctx, &u.f_rrrr_esz)) return true;
                    break;
                case 0x3:
                    /* 01000101 110..... 100110.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1455 */
                    if (trans_UMMLA(ctx, &u.f_rrrr_esz)) return true;
                    break;
                }
                break;
            }
            break;
        case 0x0100a000:
            /* 01000101 ..0..... 101..... ........ */
            switch ((insn >> 10) & 0x7) {
            case 0x0:
                /* 01000101 ..0..... 101000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1441 */
                disas_sve_extract_rd_rn_tszimm_shl(ctx, &u.f_rri_esz, insn);
                if (trans_SSHLLB(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x1:
                /* 01000101 ..0..... 101001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1442 */
                disas_sve_extract_rd_rn_tszimm_shl(ctx, &u.f_rri_esz, insn);
                if (trans_SSHLLT(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x2:
                /* 01000101 ..0..... 101010.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1443 */
                disas_sve_extract_rd_rn_tszimm_shl(ctx, &u.f_rri_esz, insn);
                if (trans_USHLLB(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x3:
                /* 01000101 ..0..... 101011.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1444 */
                disas_sve_extract_rd_rn_tszimm_shl(ctx, &u.f_rri_esz, insn);
                if (trans_USHLLT(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x4:
                /* 01000101 ..0..... 101100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1459 */
                disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                if (trans_BEXT(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x5:
                /* 01000101 ..0..... 101101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1460 */
                disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                if (trans_BDEP(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x6:
                /* 01000101 ..0..... 101110.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1461 */
                disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                if (trans_BGRP(ctx, &u.f_rrr_esz)) return true;
                break;
            }
            break;
        case 0x0100c000:
            /* 01000101 ..0..... 110..... ........ */
            switch ((insn >> 10) & 0x7) {
            case 0x0:
                /* 01000101 ..0..... 110000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1474 */
                disas_sve_extract_rda_rn_rm(ctx, &u.f_rrrr_esz, insn);
                if (trans_SABALB(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x1:
                /* 01000101 ..0..... 110001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1475 */
                disas_sve_extract_rda_rn_rm(ctx, &u.f_rrrr_esz, insn);
                if (trans_SABALT(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x2:
                /* 01000101 ..0..... 110010.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1476 */
                disas_sve_extract_rda_rn_rm(ctx, &u.f_rrrr_esz, insn);
                if (trans_UABALB(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x3:
                /* 01000101 ..0..... 110011.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1477 */
                disas_sve_extract_rda_rn_rm(ctx, &u.f_rrrr_esz, insn);
                if (trans_UABALT(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x4:
                /* 01000101 ..0..... 110100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1482 */
                disas_sve_extract_rda_rn_rm(ctx, &u.f_rrrr_esz, insn);
                if (trans_ADCLB(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x5:
                /* 01000101 ..0..... 110101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1483 */
                disas_sve_extract_rda_rn_rm(ctx, &u.f_rrrr_esz, insn);
                if (trans_ADCLT(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x6:
                /* 01000101 ..0..... 110110.. ........ */
                disas_sve_extract_rdn_rm(ctx, &u.f_rrr_esz, insn);
                switch ((insn >> 16) & 0x1f) {
                case 0x0:
                    /* 01000101 ..000000 110110.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1467 */
                    if (trans_CADD_rot90(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x1:
                    /* 01000101 ..000001 110110.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1469 */
                    if (trans_SQCADD_rot90(ctx, &u.f_rrr_esz)) return true;
                    break;
                }
                break;
            case 0x7:
                /* 01000101 ..0..... 110111.. ........ */
                disas_sve_extract_rdn_rm(ctx, &u.f_rrr_esz, insn);
                switch ((insn >> 16) & 0x1f) {
                case 0x0:
                    /* 01000101 ..000000 110111.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1468 */
                    if (trans_CADD_rot270(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x1:
                    /* 01000101 ..000001 110111.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1470 */
                    if (trans_SQCADD_rot270(ctx, &u.f_rrr_esz)) return true;
                    break;
                }
                break;
            }
            break;
        case 0x0100e000:
            /* 01000101 ..0..... 111..... ........ */
            switch ((insn >> 10) & 0x7) {
            case 0x0:
                /* 01000101 ..0..... 111000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1488 */
                disas_sve_extract_rd_rn_tszimm_shr(ctx, &u.f_rri_esz, insn);
                if (trans_SSRA(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x1:
                /* 01000101 ..0..... 111001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1489 */
                disas_sve_extract_rd_rn_tszimm_shr(ctx, &u.f_rri_esz, insn);
                if (trans_USRA(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x2:
                /* 01000101 ..0..... 111010.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1490 */
                disas_sve_extract_rd_rn_tszimm_shr(ctx, &u.f_rri_esz, insn);
                if (trans_SRSRA(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x3:
                /* 01000101 ..0..... 111011.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1491 */
                disas_sve_extract_rd_rn_tszimm_shr(ctx, &u.f_rri_esz, insn);
                if (trans_URSRA(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x4:
                /* 01000101 ..0..... 111100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1495 */
                disas_sve_extract_rd_rn_tszimm_shr(ctx, &u.f_rri_esz, insn);
                if (trans_SRI(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x5:
                /* 01000101 ..0..... 111101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1496 */
                disas_sve_extract_rd_rn_tszimm_shl(ctx, &u.f_rri_esz, insn);
                if (trans_SLI(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x6:
                /* 01000101 ..0..... 111110.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1501 */
                disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                if (trans_SABA(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x7:
                /* 01000101 ..0..... 111111.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1502 */
                disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                if (trans_UABA(ctx, &u.f_rrr_esz)) return true;
                break;
            }
            break;
        case 0x01200000:
            /* 01000101 ..1..... 000..... ........ */
            disas_sve_extract_rd_rn_tszimm_shr(ctx, &u.f_rri_esz, insn);
            switch ((insn >> 10) & 0x7) {
            case 0x0:
                /* 01000101 ..1..... 000000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1519 */
                if (trans_SQSHRUNB(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x1:
                /* 01000101 ..1..... 000001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1520 */
                if (trans_SQSHRUNT(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x2:
                /* 01000101 ..1..... 000010.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1521 */
                if (trans_SQRSHRUNB(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x3:
                /* 01000101 ..1..... 000011.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1522 */
                if (trans_SQRSHRUNT(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x4:
                /* 01000101 ..1..... 000100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1523 */
                if (trans_SHRNB(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x5:
                /* 01000101 ..1..... 000101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1524 */
                if (trans_SHRNT(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x6:
                /* 01000101 ..1..... 000110.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1525 */
                if (trans_RSHRNB(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x7:
                /* 01000101 ..1..... 000111.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1526 */
                if (trans_RSHRNT(ctx, &u.f_rri_esz)) return true;
                break;
            }
            break;
        case 0x01202000:
            /* 01000101 ..1..... 001..... ........ */
            disas_sve_extract_rd_rn_tszimm_shr(ctx, &u.f_rri_esz, insn);
            switch ((insn >> 10) & 0x7) {
            case 0x0:
                /* 01000101 ..1..... 001000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1527 */
                if (trans_SQSHRNB(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x1:
                /* 01000101 ..1..... 001001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1528 */
                if (trans_SQSHRNT(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x2:
                /* 01000101 ..1..... 001010.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1529 */
                if (trans_SQRSHRNB(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x3:
                /* 01000101 ..1..... 001011.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1530 */
                if (trans_SQRSHRNT(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x4:
                /* 01000101 ..1..... 001100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1531 */
                if (trans_UQSHRNB(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x5:
                /* 01000101 ..1..... 001101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1532 */
                if (trans_UQSHRNT(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x6:
                /* 01000101 ..1..... 001110.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1533 */
                if (trans_UQRSHRNB(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x7:
                /* 01000101 ..1..... 001111.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1534 */
                if (trans_UQRSHRNT(ctx, &u.f_rri_esz)) return true;
                break;
            }
            break;
        case 0x01204000:
            /* 01000101 ..1..... 010..... ........ */
            disas_sve_extract_rd_rn_tszimm_shl(ctx, &u.f_rri_esz, insn);
            switch ((insn >> 10) & 0x7) {
            case 0x0:
                /* 01000101 ..1..... 010000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1509 */
                if (trans_SQXTNB(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x1:
                /* 01000101 ..1..... 010001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1510 */
                if (trans_SQXTNT(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x2:
                /* 01000101 ..1..... 010010.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1511 */
                if (trans_UQXTNB(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x3:
                /* 01000101 ..1..... 010011.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1512 */
                if (trans_UQXTNT(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x4:
                /* 01000101 ..1..... 010100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1513 */
                if (trans_SQXTUNB(ctx, &u.f_rri_esz)) return true;
                break;
            case 0x5:
                /* 01000101 ..1..... 010101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1514 */
                if (trans_SQXTUNT(ctx, &u.f_rri_esz)) return true;
                break;
            }
            break;
        case 0x01206000:
            /* 01000101 ..1..... 011..... ........ */
            disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
            switch ((insn >> 10) & 0x7) {
            case 0x0:
                /* 01000101 ..1..... 011000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1538 */
                if (trans_ADDHNB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x1:
                /* 01000101 ..1..... 011001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1539 */
                if (trans_ADDHNT(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x2:
                /* 01000101 ..1..... 011010.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1540 */
                if (trans_RADDHNB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x3:
                /* 01000101 ..1..... 011011.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1541 */
                if (trans_RADDHNT(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x4:
                /* 01000101 ..1..... 011100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1542 */
                if (trans_SUBHNB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x5:
                /* 01000101 ..1..... 011101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1543 */
                if (trans_SUBHNT(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x6:
                /* 01000101 ..1..... 011110.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1544 */
                if (trans_RSUBHNB(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x7:
                /* 01000101 ..1..... 011111.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1545 */
                if (trans_RSUBHNT(ctx, &u.f_rrr_esz)) return true;
                break;
            }
            break;
        case 0x01208000:
            /* 01000101 ..1..... 100..... ........ */
            disas_sve_extract_pd_pg_rn_rm(ctx, &u.f_rprr_esz, insn);
            switch ((insn >> 4) & 0x1) {
            case 0x0:
                /* 01000101 ..1..... 100..... ...0.... */
                /* ../git/target/arm/tcg/sve.decode:1549 */
                if (trans_MATCH(ctx, &u.f_rprr_esz)) return true;
                break;
            case 0x1:
                /* 01000101 ..1..... 100..... ...1.... */
                /* ../git/target/arm/tcg/sve.decode:1550 */
                if (trans_NMATCH(ctx, &u.f_rprr_esz)) return true;
                break;
            }
            break;
        case 0x0120a000:
            /* 01000101 ..1..... 101..... ........ */
            disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
            switch ((insn >> 10) & 0x7) {
            case 0x0:
                /* 01000101 ..1..... 101000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1555 */
                if (trans_HISTSEG(ctx, &u.f_rrr_esz)) return true;
                break;
            }
            break;
        case 0x0120c000:
            /* 01000101 ..1..... 110..... ........ */
            /* ../git/target/arm/tcg/sve.decode:1554 */
            disas_sve_extract_rd_pg_rn_rm(ctx, &u.f_rprr_esz, insn);
            if (trans_HISTCNT(ctx, &u.f_rprr_esz)) return true;
            break;
        case 0x0120e000:
            /* 01000101 ..1..... 111..... ........ */
            switch (insn & 0x00c01c00) {
            case 0x00000000:
                /* 01000101 001..... 111000.. ........ */
                switch ((insn >> 16) & 0x1f) {
                case 0x0:
                    /* 01000101 00100000 111000.. ........ */
                    disas_sve_extract_disas_sve_Fmt_107(ctx, &u.f_disas_sve37, insn);
                    switch ((insn >> 5) & 0x1f) {
                    case 0x0:
                        /* 01000101 00100000 11100000 000..... */
                        /* ../git/target/arm/tcg/sve.decode:1632 */
                        if (trans_AESMC(ctx, &u.f_disas_sve37)) return true;
                        break;
                    }
                    break;
                case 0x2:
                    /* 01000101 00100010 111000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1636 */
                    disas_sve_extract_rdn_rm_e0(ctx, &u.f_rrr_esz, insn);
                    if (trans_AESE(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x3:
                    /* 01000101 00100011 111000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1638 */
                    disas_sve_extract_rdn_rm_e0(ctx, &u.f_rrr_esz, insn);
                    if (trans_SM4E(ctx, &u.f_rrr_esz)) return true;
                    break;
                }
                break;
            case 0x00000400:
                /* 01000101 001..... 111001.. ........ */
                switch ((insn >> 16) & 0x1f) {
                case 0x0:
                    /* 01000101 00100000 111001.. ........ */
                    disas_sve_extract_disas_sve_Fmt_107(ctx, &u.f_disas_sve37, insn);
                    switch ((insn >> 5) & 0x1f) {
                    case 0x0:
                        /* 01000101 00100000 11100100 000..... */
                        /* ../git/target/arm/tcg/sve.decode:1633 */
                        if (trans_AESIMC(ctx, &u.f_disas_sve37)) return true;
                        break;
                    }
                    break;
                case 0x2:
                    /* 01000101 00100010 111001.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1637 */
                    disas_sve_extract_rdn_rm_e0(ctx, &u.f_rrr_esz, insn);
                    if (trans_AESD(ctx, &u.f_rrr_esz)) return true;
                    break;
                }
                break;
            case 0x00001000:
                /* 01000101 001..... 111100.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1641 */
                disas_sve_extract_rd_rn_rm_e0(ctx, &u.f_rrr_esz, insn);
                if (trans_SM4EKEY(ctx, &u.f_rrr_esz)) return true;
                break;
            case 0x00001400:
                /* 01000101 001..... 111101.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1642 */
                disas_sve_extract_rd_rn_rm_e0(ctx, &u.f_rrr_esz, insn);
                if (trans_RAX1(ctx, &u.f_rrr_esz)) return true;
                break;
            }
            break;
        }
        break;
    case 0x32:
        /* 0110010. ........ ........ ........ */
        switch (insn & 0x01208000) {
        case 0x00000000:
            /* 01100100 ..0..... 0....... ........ */
            /* ../git/target/arm/tcg/sve.decode:959 */
            disas_sve_extract_disas_sve_Fmt_99(ctx, &u.f_disas_sve48, insn);
            if (trans_FCMLA_zpzzz(ctx, &u.f_disas_sve48)) return true;
            break;
        case 0x00008000:
            /* 01100100 ..0..... 1....... ........ */
            switch (insn & 0x001e6000) {
            case 0x00000000:
                /* 01100100 ..00000. 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:955 */
                disas_sve_extract_disas_sve_Fmt_98(ctx, &u.f_disas_sve47, insn);
                if (trans_FCADD(ctx, &u.f_disas_sve47)) return true;
                break;
            case 0x00082000:
                /* 01100100 ..00100. 101..... ........ */
                disas_sve_extract_rd_pg_rn_e0(ctx, &u.f_rpr_esz, insn);
                switch (insn & 0x00c10000) {
                case 0x00800000:
                    /* 01100100 10001000 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1647 */
                    if (trans_FCVTNT_sh(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00810000:
                    /* 01100100 10001001 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1649 */
                    if (trans_FCVTLT_hs(ctx, &u.f_rpr_esz)) return true;
                    break;
                }
                break;
            case 0x000a2000:
                /* 01100100 ..00101. 101..... ........ */
                disas_sve_extract_rd_pg_rn_e0(ctx, &u.f_rpr_esz, insn);
                switch (insn & 0x00c10000) {
                case 0x00000000:
                    /* 01100100 00001010 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1645 */
                    if (trans_FCVTXNT_ds(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00800000:
                    /* 01100100 10001010 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1648 */
                    if (trans_BFCVTNT(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00c00000:
                    /* 01100100 11001010 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1650 */
                    if (trans_FCVTNT_ds(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x00c10000:
                    /* 01100100 11001011 101..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1651 */
                    if (trans_FCVTLT_sd(ctx, &u.f_rpr_esz)) return true;
                    break;
                }
                break;
            case 0x00100000:
                /* 01100100 ..01000. 100..... ........ */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                switch ((insn >> 16) & 0x1) {
                case 0x0:
                    /* 01100100 ..010000 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1559 */
                    if (trans_FADDP(ctx, &u.f_rprr_esz)) return true;
                    break;
                }
                break;
            case 0x00140000:
                /* 01100100 ..01010. 100..... ........ */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                switch ((insn >> 16) & 0x1) {
                case 0x0:
                    /* 01100100 ..010100 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1560 */
                    if (trans_FMAXNMP(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x1:
                    /* 01100100 ..010101 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1561 */
                    if (trans_FMINNMP(ctx, &u.f_rprr_esz)) return true;
                    break;
                }
                break;
            case 0x00160000:
                /* 01100100 ..01011. 100..... ........ */
                disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                switch ((insn >> 16) & 0x1) {
                case 0x0:
                    /* 01100100 ..010110 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1562 */
                    if (trans_FMAXP(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x1:
                    /* 01100100 ..010111 100..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1563 */
                    if (trans_FMINP(ctx, &u.f_rprr_esz)) return true;
                    break;
                }
                break;
            }
            break;
        case 0x00200000:
            /* 01100100 ..1..... 0....... ........ */
            switch (insn & 0x00807000) {
            case 0x00000000:
                /* 01100100 0.1..... 0000.... ........ */
                disas_sve_extract_rrxr_3(ctx, &u.f_rrxr_esz, insn);
                switch ((insn >> 10) & 0x3) {
                case 0x0:
                    /* 01100100 0.1..... 000000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:971 */
                    u.f_rrxr_esz.esz = 1;
                    if (trans_FMLA_zzxz(ctx, &u.f_rrxr_esz)) return true;
                    break;
                case 0x1:
                    /* 01100100 0.1..... 000001.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:974 */
                    u.f_rrxr_esz.esz = 1;
                    if (trans_FMLS_zzxz(ctx, &u.f_rrxr_esz)) return true;
                    break;
                }
                break;
            case 0x00002000:
                /* 01100100 0.1..... 0010.... ........ */
                disas_sve_extract_rrx_3(ctx, &u.f_rrx_esz, insn);
                switch ((insn >> 10) & 0x3) {
                case 0x0:
                    /* 01100100 0.1..... 001000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:981 */
                    u.f_rrx_esz.esz = 1;
                    if (trans_FMUL_zzx(ctx, &u.f_rrx_esz)) return true;
                    break;
                }
                break;
            case 0x00004000:
                /* 01100100 0.1..... 0100.... ........ */
                disas_sve_extract_rrxr_2(ctx, &u.f_rrxr_esz, insn);
                switch (insn & 0x00400c00) {
                case 0x00400000:
                    /* 01100100 011..... 010000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1677 */
                    u.f_rrxr_esz.esz = 2;
                    if (trans_BFDOT_zzxz(ctx, &u.f_rrxr_esz)) return true;
                    break;
                }
                break;
            case 0x00800000:
                /* 01100100 1.1..... 0000.... ........ */
                switch (insn & 0x00400c00) {
                case 0x00000000:
                    /* 01100100 101..... 000000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:972 */
                    disas_sve_extract_rrxr_2(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 2;
                    if (trans_FMLA_zzxz(ctx, &u.f_rrxr_esz)) return true;
                    break;
                case 0x00000400:
                    /* 01100100 101..... 000001.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:975 */
                    disas_sve_extract_rrxr_2(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 2;
                    if (trans_FMLS_zzxz(ctx, &u.f_rrxr_esz)) return true;
                    break;
                case 0x00400000:
                    /* 01100100 111..... 000000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:973 */
                    disas_sve_extract_rrxr_1(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 3;
                    if (trans_FMLA_zzxz(ctx, &u.f_rrxr_esz)) return true;
                    break;
                case 0x00400400:
                    /* 01100100 111..... 000001.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:976 */
                    disas_sve_extract_rrxr_1(ctx, &u.f_rrxr_esz, insn);
                    u.f_rrxr_esz.esz = 3;
                    if (trans_FMLS_zzxz(ctx, &u.f_rrxr_esz)) return true;
                    break;
                }
                break;
            case 0x00801000:
                /* 01100100 1.1..... 0001.... ........ */
                switch ((insn >> 22) & 0x1) {
                case 0x0:
                    /* 01100100 101..... 0001.... ........ */
                    /* ../git/target/arm/tcg/sve.decode:963 */
                    disas_sve_extract_disas_sve_Fmt_100(ctx, &u.f_disas_sve49, insn);
                    if (trans_FCMLA_zzxz(ctx, &u.f_disas_sve49)) return true;
                    break;
                case 0x1:
                    /* 01100100 111..... 0001.... ........ */
                    /* ../git/target/arm/tcg/sve.decode:965 */
                    disas_sve_extract_disas_sve_Fmt_101(ctx, &u.f_disas_sve49, insn);
                    if (trans_FCMLA_zzxz(ctx, &u.f_disas_sve49)) return true;
                    break;
                }
                break;
            case 0x00802000:
                /* 01100100 1.1..... 0010.... ........ */
                switch (insn & 0x00400c00) {
                case 0x00000000:
                    /* 01100100 101..... 001000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:982 */
                    disas_sve_extract_rrx_2(ctx, &u.f_rrx_esz, insn);
                    u.f_rrx_esz.esz = 2;
                    if (trans_FMUL_zzx(ctx, &u.f_rrx_esz)) return true;
                    break;
                case 0x00400000:
                    /* 01100100 111..... 001000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:983 */
                    disas_sve_extract_rrx_1(ctx, &u.f_rrx_esz, insn);
                    u.f_rrx_esz.esz = 3;
                    if (trans_FMUL_zzx(ctx, &u.f_rrx_esz)) return true;
                    break;
                }
                break;
            case 0x00804000:
                /* 01100100 1.1..... 0100.... ........ */
                disas_sve_extract_rrxr_3a(ctx, &u.f_rrxr_esz, insn);
                switch (insn & 0x00400400) {
                case 0x00000000:
                    /* 01100100 101..... 0100.0.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1669 */
                    u.f_rrxr_esz.esz = 2;
                    if (trans_FMLALB_zzxw(ctx, &u.f_rrxr_esz)) return true;
                    break;
                case 0x00000400:
                    /* 01100100 101..... 0100.1.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1670 */
                    u.f_rrxr_esz.esz = 2;
                    if (trans_FMLALT_zzxw(ctx, &u.f_rrxr_esz)) return true;
                    break;
                case 0x00400000:
                    /* 01100100 111..... 0100.0.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1673 */
                    u.f_rrxr_esz.esz = 2;
                    if (trans_BFMLALB_zzxw(ctx, &u.f_rrxr_esz)) return true;
                    break;
                case 0x00400400:
                    /* 01100100 111..... 0100.1.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1674 */
                    u.f_rrxr_esz.esz = 2;
                    if (trans_BFMLALT_zzxw(ctx, &u.f_rrxr_esz)) return true;
                    break;
                }
                break;
            case 0x00806000:
                /* 01100100 1.1..... 0110.... ........ */
                disas_sve_extract_rrxr_3a(ctx, &u.f_rrxr_esz, insn);
                switch (insn & 0x00400400) {
                case 0x00000000:
                    /* 01100100 101..... 0110.0.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1671 */
                    u.f_rrxr_esz.esz = 2;
                    if (trans_FMLSLB_zzxw(ctx, &u.f_rrxr_esz)) return true;
                    break;
                case 0x00000400:
                    /* 01100100 101..... 0110.1.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1672 */
                    u.f_rrxr_esz.esz = 2;
                    if (trans_FMLSLT_zzxw(ctx, &u.f_rrxr_esz)) return true;
                    break;
                }
                break;
            }
            break;
        case 0x00208000:
            /* 01100100 ..1..... 1....... ........ */
            disas_sve_extract_rda_rn_rm_e0(ctx, &u.f_rrrr_esz, insn);
            switch (insn & 0x00c07c00) {
            case 0x00400000:
                /* 01100100 011..... 100000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1666 */
                if (trans_BFDOT_zzzz(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x00406400:
                /* 01100100 011..... 111001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1605 */
                if (trans_BFMMLA(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x00800000:
                /* 01100100 101..... 100000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1657 */
                if (trans_FMLALB_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x00800400:
                /* 01100100 101..... 100001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1658 */
                if (trans_FMLALT_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x00802000:
                /* 01100100 101..... 101000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1659 */
                if (trans_FMLSLB_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x00802400:
                /* 01100100 101..... 101001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1660 */
                if (trans_FMLSLT_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x00806400:
                /* 01100100 101..... 111001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1606 */
                if (trans_FMMLA_s(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x00c00000:
                /* 01100100 111..... 100000.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1662 */
                if (trans_BFMLALB_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x00c00400:
                /* 01100100 111..... 100001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1663 */
                if (trans_BFMLALT_zzzw(ctx, &u.f_rrrr_esz)) return true;
                break;
            case 0x00c06400:
                /* 01100100 111..... 111001.. ........ */
                /* ../git/target/arm/tcg/sve.decode:1607 */
                if (trans_FMMLA_d(ctx, &u.f_rrrr_esz)) return true;
                break;
            }
            break;
        case 0x01000000:
            /* 01100101 ..0..... 0....... ........ */
            switch ((insn >> 13) & 0x3) {
            case 0x0:
                /* 01100101 ..0..... 000..... ........ */
                disas_sve_extract_rd_rn_rm(ctx, &u.f_rrr_esz, insn);
                switch ((insn >> 10) & 0x7) {
                case 0x0:
                    /* 01100101 ..0..... 000000.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1015 */
                    if (trans_FADD_zzz(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x1:
                    /* 01100101 ..0..... 000001.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1016 */
                    if (trans_FSUB_zzz(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x2:
                    /* 01100101 ..0..... 000010.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1017 */
                    if (trans_FMUL_zzz(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x3:
                    /* 01100101 ..0..... 000011.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1018 */
                    if (trans_FTSMUL(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x6:
                    /* 01100101 ..0..... 000110.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1019 */
                    if (trans_FRECPS(ctx, &u.f_rrr_esz)) return true;
                    break;
                case 0x7:
                    /* 01100101 ..0..... 000111.. ........ */
                    /* ../git/target/arm/tcg/sve.decode:1020 */
                    if (trans_FRSQRTS(ctx, &u.f_rrr_esz)) return true;
                    break;
                }
                break;
            case 0x1:
                /* 01100101 ..0..... 001..... ........ */
                switch ((insn >> 16) & 0x1f) {
                case 0x0:
                    /* 01100101 ..000000 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:987 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_FADDV(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x4:
                    /* 01100101 ..000100 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:988 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_FMAXNMV(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x5:
                    /* 01100101 ..000101 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:989 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_FMINNMV(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x6:
                    /* 01100101 ..000110 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:990 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_FMAXV(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0x7:
                    /* 01100101 ..000111 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:991 */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    if (trans_FMINV(ctx, &u.f_rpr_esz)) return true;
                    break;
                case 0xe:
                    /* 01100101 ..001110 001..... ........ */
                    disas_sve_extract_rd_rn(ctx, &u.f_rr_esz, insn);
                    switch ((insn >> 10) & 0x7) {
                    case 0x4:
                        /* 01100101 ..001110 001100.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:995 */
                        if (trans_FRECPE(ctx, &u.f_rr_esz)) return true;
                        break;
                    }
                    break;
                case 0xf:
                    /* 01100101 ..001111 001..... ........ */
                    disas_sve_extract_rd_rn(ctx, &u.f_rr_esz, insn);
                    switch ((insn >> 10) & 0x7) {
                    case 0x4:
                        /* 01100101 ..001111 001100.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:996 */
                        if (trans_FRSQRTE(ctx, &u.f_rr_esz)) return true;
                        break;
                    }
                    break;
                case 0x10:
                    /* 01100101 ..010000 001..... ........ */
                    disas_sve_extract_pd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    switch ((insn >> 4) & 0x1) {
                    case 0x0:
                        /* 01100101 ..010000 001..... ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:1000 */
                        if (trans_FCMGE_ppz0(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x1:
                        /* 01100101 ..010000 001..... ...1.... */
                        /* ../git/target/arm/tcg/sve.decode:1001 */
                        if (trans_FCMGT_ppz0(ctx, &u.f_rpr_esz)) return true;
                        break;
                    }
                    break;
                case 0x11:
                    /* 01100101 ..010001 001..... ........ */
                    disas_sve_extract_pd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    switch ((insn >> 4) & 0x1) {
                    case 0x0:
                        /* 01100101 ..010001 001..... ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:1002 */
                        if (trans_FCMLT_ppz0(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x1:
                        /* 01100101 ..010001 001..... ...1.... */
                        /* ../git/target/arm/tcg/sve.decode:1003 */
                        if (trans_FCMLE_ppz0(ctx, &u.f_rpr_esz)) return true;
                        break;
                    }
                    break;
                case 0x12:
                    /* 01100101 ..010010 001..... ........ */
                    disas_sve_extract_pd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    switch ((insn >> 4) & 0x1) {
                    case 0x0:
                        /* 01100101 ..010010 001..... ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:1004 */
                        if (trans_FCMEQ_ppz0(ctx, &u.f_rpr_esz)) return true;
                        break;
                    }
                    break;
                case 0x13:
                    /* 01100101 ..010011 001..... ........ */
                    disas_sve_extract_pd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    switch ((insn >> 4) & 0x1) {
                    case 0x0:
                        /* 01100101 ..010011 001..... ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:1005 */
                        if (trans_FCMNE_ppz0(ctx, &u.f_rpr_esz)) return true;
                        break;
                    }
                    break;
                case 0x18:
                    /* 01100101 ..011000 001..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1010 */
                    disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                    if (trans_FADDA(ctx, &u.f_rprr_esz)) return true;
                    break;
                }
                break;
            case 0x2:
                /* 01100101 ..0..... 010..... ........ */
                disas_sve_extract_pd_pg_rn_rm(ctx, &u.f_rprr_esz, insn);
                switch ((insn >> 4) & 0x1) {
                case 0x0:
                    /* 01100101 ..0..... 010..... ...0.... */
                    /* ../git/target/arm/tcg/sve.decode:391 */
                    if (trans_FCMGE_ppzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x1:
                    /* 01100101 ..0..... 010..... ...1.... */
                    /* ../git/target/arm/tcg/sve.decode:392 */
                    if (trans_FCMGT_ppzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                }
                break;
            case 0x3:
                /* 01100101 ..0..... 011..... ........ */
                disas_sve_extract_pd_pg_rn_rm(ctx, &u.f_rprr_esz, insn);
                switch ((insn >> 4) & 0x1) {
                case 0x0:
                    /* 01100101 ..0..... 011..... ...0.... */
                    /* ../git/target/arm/tcg/sve.decode:393 */
                    if (trans_FCMEQ_ppzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x1:
                    /* 01100101 ..0..... 011..... ...1.... */
                    /* ../git/target/arm/tcg/sve.decode:394 */
                    if (trans_FCMNE_ppzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                }
                break;
            }
            break;
        case 0x01008000:
            /* 01100101 ..0..... 1....... ........ */
            switch ((insn >> 13) & 0x3) {
            case 0x0:
                /* 01100101 ..0..... 100..... ........ */
                switch ((insn >> 19) & 0x3) {
                case 0x0:
                    /* 01100101 ..000... 100..... ........ */
                    switch ((insn >> 16) & 0x7) {
                    case 0x0:
                        /* 01100101 ..000000 100..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1025 */
                        disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                        if (trans_FADD_zpzz(ctx, &u.f_rprr_esz)) return true;
                        break;
                    case 0x1:
                        /* 01100101 ..000001 100..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1026 */
                        disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                        if (trans_FSUB_zpzz(ctx, &u.f_rprr_esz)) return true;
                        break;
                    case 0x2:
                        /* 01100101 ..000010 100..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1027 */
                        disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                        if (trans_FMUL_zpzz(ctx, &u.f_rprr_esz)) return true;
                        break;
                    case 0x3:
                        /* 01100101 ..000011 100..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1028 */
                        disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                        if (trans_FSUB_zpzz(ctx, &u.f_rprr_esz)) return true;
                        break;
                    case 0x4:
                        /* 01100101 ..000100 100..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1029 */
                        disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                        if (trans_FMAXNM_zpzz(ctx, &u.f_rprr_esz)) return true;
                        break;
                    case 0x5:
                        /* 01100101 ..000101 100..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1030 */
                        disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                        if (trans_FMINNM_zpzz(ctx, &u.f_rprr_esz)) return true;
                        break;
                    case 0x6:
                        /* 01100101 ..000110 100..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1031 */
                        disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                        if (trans_FMAX_zpzz(ctx, &u.f_rprr_esz)) return true;
                        break;
                    case 0x7:
                        /* 01100101 ..000111 100..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1032 */
                        disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                        if (trans_FMIN_zpzz(ctx, &u.f_rprr_esz)) return true;
                        break;
                    }
                    break;
                case 0x1:
                    /* 01100101 ..001... 100..... ........ */
                    switch ((insn >> 16) & 0x7) {
                    case 0x0:
                        /* 01100101 ..001000 100..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1033 */
                        disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                        if (trans_FABD(ctx, &u.f_rprr_esz)) return true;
                        break;
                    case 0x1:
                        /* 01100101 ..001001 100..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1034 */
                        disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                        if (trans_FSCALE(ctx, &u.f_rprr_esz)) return true;
                        break;
                    case 0x2:
                        /* 01100101 ..001010 100..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1035 */
                        disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                        if (trans_FMULX(ctx, &u.f_rprr_esz)) return true;
                        break;
                    case 0x4:
                        /* 01100101 ..001100 100..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1036 */
                        disas_sve_extract_rdm_pg_rn(ctx, &u.f_rprr_esz, insn);
                        if (trans_FDIV(ctx, &u.f_rprr_esz)) return true;
                        break;
                    case 0x5:
                        /* 01100101 ..001101 100..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1037 */
                        disas_sve_extract_rdn_pg_rm(ctx, &u.f_rprr_esz, insn);
                        if (trans_FDIV(ctx, &u.f_rprr_esz)) return true;
                        break;
                    }
                    break;
                case 0x2:
                    /* 01100101 ..010... 100..... ........ */
                    disas_sve_extract_disas_sve_Fmt_102(ctx, &u.f_rrri_esz, insn);
                    switch ((insn >> 10) & 0x7) {
                    case 0x0:
                        /* 01100101 ..010... 100000.. ........ */
                        /* ../git/target/arm/tcg/sve.decode:1050 */
                        if (trans_FTMAD(ctx, &u.f_rrri_esz)) return true;
                        break;
                    }
                    break;
                case 0x3:
                    /* 01100101 ..011... 100..... ........ */
                    disas_sve_extract_rdn_i1(ctx, &u.f_rpri_esz, insn);
                    switch (insn & 0x000703c0) {
                    case 0x00000000:
                        /* 01100101 ..011000 100...00 00...... */
                        /* ../git/target/arm/tcg/sve.decode:1040 */
                        if (trans_FADD_zpzi(ctx, &u.f_rpri_esz)) return true;
                        break;
                    case 0x00010000:
                        /* 01100101 ..011001 100...00 00...... */
                        /* ../git/target/arm/tcg/sve.decode:1041 */
                        if (trans_FSUB_zpzi(ctx, &u.f_rpri_esz)) return true;
                        break;
                    case 0x00020000:
                        /* 01100101 ..011010 100...00 00...... */
                        /* ../git/target/arm/tcg/sve.decode:1042 */
                        if (trans_FMUL_zpzi(ctx, &u.f_rpri_esz)) return true;
                        break;
                    case 0x00030000:
                        /* 01100101 ..011011 100...00 00...... */
                        /* ../git/target/arm/tcg/sve.decode:1043 */
                        if (trans_FSUBR_zpzi(ctx, &u.f_rpri_esz)) return true;
                        break;
                    case 0x00040000:
                        /* 01100101 ..011100 100...00 00...... */
                        /* ../git/target/arm/tcg/sve.decode:1044 */
                        if (trans_FMAXNM_zpzi(ctx, &u.f_rpri_esz)) return true;
                        break;
                    case 0x00050000:
                        /* 01100101 ..011101 100...00 00...... */
                        /* ../git/target/arm/tcg/sve.decode:1045 */
                        if (trans_FMINNM_zpzi(ctx, &u.f_rpri_esz)) return true;
                        break;
                    case 0x00060000:
                        /* 01100101 ..011110 100...00 00...... */
                        /* ../git/target/arm/tcg/sve.decode:1046 */
                        if (trans_FMAX_zpzi(ctx, &u.f_rpri_esz)) return true;
                        break;
                    case 0x00070000:
                        /* 01100101 ..011111 100...00 00...... */
                        /* ../git/target/arm/tcg/sve.decode:1047 */
                        if (trans_FMIN_zpzi(ctx, &u.f_rpri_esz)) return true;
                        break;
                    }
                    break;
                }
                break;
            case 0x1:
                /* 01100101 ..0..... 101..... ........ */
                switch (insn & 0x00190000) {
                case 0x00000000:
                    /* 01100101 ..000..0 101..... ........ */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    switch ((insn >> 17) & 0x3) {
                    case 0x0:
                        /* 01100101 ..000000 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1096 */
                        if (trans_FRINTN(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x1:
                        /* 01100101 ..000010 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1098 */
                        if (trans_FRINTM(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x2:
                        /* 01100101 ..000100 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1100 */
                        if (trans_FRINTA(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x3:
                        /* 01100101 ..000110 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1101 */
                        if (trans_FRINTX(ctx, &u.f_rpr_esz)) return true;
                        break;
                    }
                    break;
                case 0x00010000:
                    /* 01100101 ..000..1 101..... ........ */
                    disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                    switch ((insn >> 17) & 0x3) {
                    case 0x0:
                        /* 01100101 ..000001 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1097 */
                        if (trans_FRINTP(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x1:
                        /* 01100101 ..000011 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1099 */
                        if (trans_FRINTZ(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x3:
                        /* 01100101 ..000111 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1102 */
                        if (trans_FRINTI(ctx, &u.f_rpr_esz)) return true;
                        break;
                    }
                    break;
                case 0x00080000:
                    /* 01100101 ..001..0 101..... ........ */
                    switch ((insn >> 17) & 0x3) {
                    case 0x0:
                        /* 01100101 ..001000 101..... ........ */
                        disas_sve_extract_rd_pg_rn_e0(ctx, &u.f_rpr_esz, insn);
                        switch ((insn >> 22) & 0x3) {
                        case 0x2:
                            /* 01100101 10001000 101..... ........ */
                            /* ../git/target/arm/tcg/sve.decode:1071 */
                            if (trans_FCVT_sh(ctx, &u.f_rpr_esz)) return true;
                            break;
                        case 0x3:
                            /* 01100101 11001000 101..... ........ */
                            /* ../git/target/arm/tcg/sve.decode:1074 */
                            if (trans_FCVT_dh(ctx, &u.f_rpr_esz)) return true;
                            break;
                        }
                        break;
                    case 0x1:
                        /* 01100101 ..001010 101..... ........ */
                        disas_sve_extract_rd_pg_rn_e0(ctx, &u.f_rpr_esz, insn);
                        switch ((insn >> 22) & 0x3) {
                        case 0x0:
                            /* 01100101 00001010 101..... ........ */
                            /* ../git/target/arm/tcg/sve.decode:1646 */
                            if (trans_FCVTX_ds(ctx, &u.f_rpr_esz)) return true;
                            break;
                        case 0x2:
                            /* 01100101 10001010 101..... ........ */
                            /* ../git/target/arm/tcg/sve.decode:1073 */
                            if (trans_BFCVT(ctx, &u.f_rpr_esz)) return true;
                            break;
                        case 0x3:
                            /* 01100101 11001010 101..... ........ */
                            /* ../git/target/arm/tcg/sve.decode:1076 */
                            if (trans_FCVT_ds(ctx, &u.f_rpr_esz)) return true;
                            break;
                        }
                        break;
                    case 0x2:
                        /* 01100101 ..001100 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1105 */
                        disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                        if (trans_FRECPX(ctx, &u.f_rpr_esz)) return true;
                        break;
                    }
                    break;
                case 0x00090000:
                    /* 01100101 ..001..1 101..... ........ */
                    switch ((insn >> 17) & 0x3) {
                    case 0x0:
                        /* 01100101 ..001001 101..... ........ */
                        disas_sve_extract_rd_pg_rn_e0(ctx, &u.f_rpr_esz, insn);
                        switch ((insn >> 22) & 0x3) {
                        case 0x2:
                            /* 01100101 10001001 101..... ........ */
                            /* ../git/target/arm/tcg/sve.decode:1072 */
                            if (trans_FCVT_hs(ctx, &u.f_rpr_esz)) return true;
                            break;
                        case 0x3:
                            /* 01100101 11001001 101..... ........ */
                            /* ../git/target/arm/tcg/sve.decode:1075 */
                            if (trans_FCVT_hd(ctx, &u.f_rpr_esz)) return true;
                            break;
                        }
                        break;
                    case 0x1:
                        /* 01100101 ..001011 101..... ........ */
                        disas_sve_extract_rd_pg_rn_e0(ctx, &u.f_rpr_esz, insn);
                        switch ((insn >> 22) & 0x3) {
                        case 0x3:
                            /* 01100101 11001011 101..... ........ */
                            /* ../git/target/arm/tcg/sve.decode:1077 */
                            if (trans_FCVT_sd(ctx, &u.f_rpr_esz)) return true;
                            break;
                        }
                        break;
                    case 0x2:
                        /* 01100101 ..001101 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1106 */
                        disas_sve_extract_rd_pg_rn(ctx, &u.f_rpr_esz, insn);
                        if (trans_FSQRT(ctx, &u.f_rpr_esz)) return true;
                        break;
                    }
                    break;
                case 0x00100000:
                    /* 01100101 ..010..0 101..... ........ */
                    disas_sve_extract_rd_pg_rn_e0(ctx, &u.f_rpr_esz, insn);
                    switch (insn & 0x00c60000) {
                    case 0x00420000:
                        /* 01100101 01010010 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1109 */
                        if (trans_SCVTF_hh(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00440000:
                        /* 01100101 01010100 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1110 */
                        if (trans_SCVTF_sh(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00460000:
                        /* 01100101 01010110 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1111 */
                        if (trans_SCVTF_dh(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00840000:
                        /* 01100101 10010100 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1112 */
                        if (trans_SCVTF_ss(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00c00000:
                        /* 01100101 11010000 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1113 */
                        if (trans_SCVTF_sd(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00c40000:
                        /* 01100101 11010100 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1114 */
                        if (trans_SCVTF_ds(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00c60000:
                        /* 01100101 11010110 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1115 */
                        if (trans_SCVTF_dd(ctx, &u.f_rpr_esz)) return true;
                        break;
                    }
                    break;
                case 0x00110000:
                    /* 01100101 ..010..1 101..... ........ */
                    disas_sve_extract_rd_pg_rn_e0(ctx, &u.f_rpr_esz, insn);
                    switch (insn & 0x00c60000) {
                    case 0x00420000:
                        /* 01100101 01010011 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1117 */
                        if (trans_UCVTF_hh(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00440000:
                        /* 01100101 01010101 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1118 */
                        if (trans_UCVTF_sh(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00460000:
                        /* 01100101 01010111 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1119 */
                        if (trans_UCVTF_dh(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00840000:
                        /* 01100101 10010101 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1120 */
                        if (trans_UCVTF_ss(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00c00000:
                        /* 01100101 11010001 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1121 */
                        if (trans_UCVTF_sd(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00c40000:
                        /* 01100101 11010101 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1122 */
                        if (trans_UCVTF_ds(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00c60000:
                        /* 01100101 11010111 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1123 */
                        if (trans_UCVTF_dd(ctx, &u.f_rpr_esz)) return true;
                        break;
                    }
                    break;
                case 0x00180000:
                    /* 01100101 ..011..0 101..... ........ */
                    switch ((insn >> 22) & 0x3) {
                    case 0x0:
                        /* 01100101 00011..0 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1654 */
                        disas_sve_extract_disas_sve_Fmt_108(ctx, &u.f_rpr_esz, insn);
                        if (trans_FLOGB(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x1:
                        /* 01100101 01011..0 101..... ........ */
                        disas_sve_extract_rd_pg_rn_e0(ctx, &u.f_rpr_esz, insn);
                        switch ((insn >> 17) & 0x3) {
                        case 0x1:
                            /* 01100101 01011010 101..... ........ */
                            /* ../git/target/arm/tcg/sve.decode:1080 */
                            if (trans_FCVTZS_hh(ctx, &u.f_rpr_esz)) return true;
                            break;
                        case 0x2:
                            /* 01100101 01011100 101..... ........ */
                            /* ../git/target/arm/tcg/sve.decode:1082 */
                            if (trans_FCVTZS_hs(ctx, &u.f_rpr_esz)) return true;
                            break;
                        case 0x3:
                            /* 01100101 01011110 101..... ........ */
                            /* ../git/target/arm/tcg/sve.decode:1084 */
                            if (trans_FCVTZS_hd(ctx, &u.f_rpr_esz)) return true;
                            break;
                        }
                        break;
                    case 0x2:
                        /* 01100101 10011..0 101..... ........ */
                        disas_sve_extract_rd_pg_rn_e0(ctx, &u.f_rpr_esz, insn);
                        switch ((insn >> 17) & 0x3) {
                        case 0x2:
                            /* 01100101 10011100 101..... ........ */
                            /* ../git/target/arm/tcg/sve.decode:1086 */
                            if (trans_FCVTZS_ss(ctx, &u.f_rpr_esz)) return true;
                            break;
                        }
                        break;
                    case 0x3:
                        /* 01100101 11011..0 101..... ........ */
                        disas_sve_extract_rd_pg_rn_e0(ctx, &u.f_rpr_esz, insn);
                        switch ((insn >> 17) & 0x3) {
                        case 0x0:
                            /* 01100101 11011000 101..... ........ */
                            /* ../git/target/arm/tcg/sve.decode:1088 */
                            if (trans_FCVTZS_ds(ctx, &u.f_rpr_esz)) return true;
                            break;
                        case 0x2:
                            /* 01100101 11011100 101..... ........ */
                            /* ../git/target/arm/tcg/sve.decode:1090 */
                            if (trans_FCVTZS_sd(ctx, &u.f_rpr_esz)) return true;
                            break;
                        case 0x3:
                            /* 01100101 11011110 101..... ........ */
                            /* ../git/target/arm/tcg/sve.decode:1092 */
                            if (trans_FCVTZS_dd(ctx, &u.f_rpr_esz)) return true;
                            break;
                        }
                        break;
                    }
                    break;
                case 0x00190000:
                    /* 01100101 ..011..1 101..... ........ */
                    disas_sve_extract_rd_pg_rn_e0(ctx, &u.f_rpr_esz, insn);
                    switch (insn & 0x00c60000) {
                    case 0x00420000:
                        /* 01100101 01011011 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1081 */
                        if (trans_FCVTZU_hh(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00440000:
                        /* 01100101 01011101 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1083 */
                        if (trans_FCVTZU_hs(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00460000:
                        /* 01100101 01011111 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1085 */
                        if (trans_FCVTZU_hd(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00840000:
                        /* 01100101 10011101 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1087 */
                        if (trans_FCVTZU_ss(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00c00000:
                        /* 01100101 11011001 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1089 */
                        if (trans_FCVTZU_ds(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00c40000:
                        /* 01100101 11011101 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1091 */
                        if (trans_FCVTZU_sd(ctx, &u.f_rpr_esz)) return true;
                        break;
                    case 0x00c60000:
                        /* 01100101 11011111 101..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1093 */
                        if (trans_FCVTZU_dd(ctx, &u.f_rpr_esz)) return true;
                        break;
                    }
                    break;
                }
                break;
            case 0x2:
                /* 01100101 ..0..... 110..... ........ */
                disas_sve_extract_pd_pg_rn_rm(ctx, &u.f_rprr_esz, insn);
                switch ((insn >> 4) & 0x1) {
                case 0x0:
                    /* 01100101 ..0..... 110..... ...0.... */
                    /* ../git/target/arm/tcg/sve.decode:395 */
                    if (trans_FCMUO_ppzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                case 0x1:
                    /* 01100101 ..0..... 110..... ...1.... */
                    /* ../git/target/arm/tcg/sve.decode:396 */
                    if (trans_FACGE_ppzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                }
                break;
            case 0x3:
                /* 01100101 ..0..... 111..... ........ */
                disas_sve_extract_pd_pg_rn_rm(ctx, &u.f_rprr_esz, insn);
                switch ((insn >> 4) & 0x1) {
                case 0x1:
                    /* 01100101 ..0..... 111..... ...1.... */
                    /* ../git/target/arm/tcg/sve.decode:397 */
                    if (trans_FACGT_ppzz(ctx, &u.f_rprr_esz)) return true;
                    break;
                }
                break;
            }
            break;
        case 0x01200000:
            /* 01100101 ..1..... 0....... ........ */
            disas_sve_extract_rda_pg_rn_rm(ctx, &u.f_rprrr_esz, insn);
            switch ((insn >> 13) & 0x3) {
            case 0x0:
                /* 01100101 ..1..... 000..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1055 */
                if (trans_FMLA_zpzzz(ctx, &u.f_rprrr_esz)) return true;
                break;
            case 0x1:
                /* 01100101 ..1..... 001..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1056 */
                if (trans_FMLS_zpzzz(ctx, &u.f_rprrr_esz)) return true;
                break;
            case 0x2:
                /* 01100101 ..1..... 010..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1057 */
                if (trans_FNMLA_zpzzz(ctx, &u.f_rprrr_esz)) return true;
                break;
            case 0x3:
                /* 01100101 ..1..... 011..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1058 */
                if (trans_FNMLS_zpzzz(ctx, &u.f_rprrr_esz)) return true;
                break;
            }
            break;
        case 0x01208000:
            /* 01100101 ..1..... 1....... ........ */
            disas_sve_extract_rdn_pg_rm_ra(ctx, &u.f_rprrr_esz, insn);
            switch ((insn >> 13) & 0x3) {
            case 0x0:
                /* 01100101 ..1..... 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1063 */
                if (trans_FMLA_zpzzz(ctx, &u.f_rprrr_esz)) return true;
                break;
            case 0x1:
                /* 01100101 ..1..... 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1064 */
                if (trans_FMLS_zpzzz(ctx, &u.f_rprrr_esz)) return true;
                break;
            case 0x2:
                /* 01100101 ..1..... 110..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1065 */
                if (trans_FNMLA_zpzzz(ctx, &u.f_rprrr_esz)) return true;
                break;
            case 0x3:
                /* 01100101 ..1..... 111..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1066 */
                if (trans_FNMLS_zpzzz(ctx, &u.f_rprrr_esz)) return true;
                break;
            }
            break;
        }
        break;
    case 0x42:
        /* 1000010. ........ ........ ........ */
        switch ((insn >> 15) & 0x1) {
        case 0x0:
            /* 1000010. ........ 0....... ........ */
            switch ((insn >> 23) & 0x3) {
            case 0x0:
                /* 10000100 0....... 0....... ........ */
                switch ((insn >> 21) & 0x1) {
                case 0x0:
                    /* 10000100 0.0..... 0....... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1139 */
                    disas_sve_extract_rprr_g_load_xs_u(ctx, &u.f_rprr_gather_load, insn);
                    u.f_rprr_gather_load.esz = 2;
                    u.f_rprr_gather_load.msz = 0;
                    u.f_rprr_gather_load.scale = 0;
                    if (trans_LD1_zprz(ctx, &u.f_rprr_gather_load)) return true;
                    break;
                case 0x1:
                    /* 10000100 0.1..... 0....... ........ */
                    disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                    switch ((insn >> 4) & 0x1) {
                    case 0x0:
                        /* 10000100 0.1..... 0....... ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:1190 */
                        if (trans_PRF_ns(ctx, &u.f_disas_sve34)) return true;
                        break;
                    }
                    break;
                }
                break;
            case 0x1:
                /* 10000100 1....... 0....... ........ */
                /* ../git/target/arm/tcg/sve.decode:1141 */
                disas_sve_extract_rprr_g_load_xs_u_sc(ctx, &u.f_rprr_gather_load, insn);
                u.f_rprr_gather_load.esz = 2;
                u.f_rprr_gather_load.msz = 1;
                if (trans_LD1_zprz(ctx, &u.f_rprr_gather_load)) return true;
                break;
            case 0x2:
                /* 10000101 0....... 0....... ........ */
                disas_sve_extract_rprr_g_load_xs_sc(ctx, &u.f_rprr_gather_load, insn);
                switch ((insn >> 14) & 0x1) {
                case 0x1:
                    /* 10000101 0....... 01...... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1143 */
                    u.f_rprr_gather_load.esz = 2;
                    u.f_rprr_gather_load.msz = 2;
                    u.f_rprr_gather_load.u = 1;
                    if (trans_LD1_zprz(ctx, &u.f_rprr_gather_load)) return true;
                    break;
                }
                break;
            case 0x3:
                /* 10000101 1....... 0....... ........ */
                switch ((insn >> 22) & 0x1) {
                case 0x0:
                    /* 10000101 10...... 0....... ........ */
                    switch ((insn >> 13) & 0x3) {
                    case 0x0:
                        /* 10000101 10...... 000..... ........ */
                        disas_sve_extract_pd_rn_i9(ctx, &u.f_rri, insn);
                        switch ((insn >> 4) & 0x1) {
                        case 0x0:
                            /* 10000101 10...... 000..... ...0.... */
                            /* ../git/target/arm/tcg/sve.decode:1128 */
                            if (trans_LDR_pri(ctx, &u.f_rri)) return true;
                            break;
                        }
                        break;
                    case 0x2:
                        /* 10000101 10...... 010..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1131 */
                        disas_sve_extract_rd_rn_i9(ctx, &u.f_rri, insn);
                        if (trans_LDR_zri(ctx, &u.f_rri)) return true;
                        break;
                    }
                    break;
                case 0x1:
                    /* 10000101 11...... 0....... ........ */
                    disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                    switch ((insn >> 4) & 0x1) {
                    case 0x0:
                        /* 10000101 11...... 0....... ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:1196 */
                        if (trans_PRF(ctx, &u.f_disas_sve34)) return true;
                        break;
                    }
                    break;
                }
                break;
            }
            break;
        case 0x1:
            /* 1000010. ........ 1....... ........ */
            switch ((insn >> 22) & 0x1) {
            case 0x0:
                /* 1000010. .0...... 1....... ........ */
                switch ((insn >> 21) & 0x1) {
                case 0x0:
                    /* 1000010. .00..... 1....... ........ */
                    switch ((insn >> 14) & 0x1) {
                    case 0x0:
                        /* 1000010. .00..... 10...... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1616 */
                        disas_sve_extract_disas_sve_Fmt_106(ctx, &u.f_rprr_gather_load, insn);
                        if (trans_LDNT1_zprz(ctx, &u.f_rprr_gather_load)) return true;
                        break;
                    case 0x1:
                        /* 1000010. .00..... 11...... ........ */
                        switch (insn & 0x00002010) {
                        case 0x00000000:
                            /* 1000010. .00..... 110..... ...0.... */
                            /* ../git/target/arm/tcg/sve.decode:1199 */
                            disas_sve_extract_disas_sve_Fmt_104(ctx, &u.f_disas_sve50, insn);
                            if (trans_PRF_rr(ctx, &u.f_disas_sve50)) return true;
                            break;
                        case 0x00002000:
                            /* 1000010. .00..... 111..... ...0.... */
                            /* ../git/target/arm/tcg/sve.decode:1193 */
                            disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                            if (trans_PRF_ns(ctx, &u.f_disas_sve34)) return true;
                            break;
                        }
                        break;
                    }
                    break;
                case 0x1:
                    /* 1000010. .01..... 1....... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1147 */
                    disas_sve_extract_rpri_g_load(ctx, &u.f_rpri_gather_load, insn);
                    u.f_rpri_gather_load.esz = 2;
                    if (trans_LD1_zpiz(ctx, &u.f_rpri_gather_load)) return true;
                    break;
                }
                break;
            case 0x1:
                /* 1000010. .1...... 1....... ........ */
                /* ../git/target/arm/tcg/sve.decode:1134 */
                disas_sve_extract_disas_sve_Fmt_103(ctx, &u.f_rpri_load, insn);
                if (trans_LD1R_zpri(ctx, &u.f_rpri_load)) return true;
                break;
            }
            break;
        }
        break;
    case 0x52:
        /* 1010010. ........ ........ ........ */
        switch ((insn >> 13) & 0x7) {
        case 0x0:
            /* 1010010. ........ 000..... ........ */
            disas_sve_extract_rprr_load_msz(ctx, &u.f_rprr_load, insn);
            switch ((insn >> 21) & 0x3) {
            case 0x0:
                /* 1010010. .00..... 000..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1177 */
                u.f_rprr_load.nreg = 0;
                if (trans_LD1RQ_zprr(ctx, &u.f_rprr_load)) return true;
                break;
            case 0x1:
                /* 1010010. .01..... 000..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1179 */
                u.f_rprr_load.nreg = 0;
                if (trans_LD1RO_zprr(ctx, &u.f_rprr_load)) return true;
                break;
            }
            break;
        case 0x1:
            /* 1010010. ........ 001..... ........ */
            disas_sve_extract_rpri_load_msz(ctx, &u.f_rpri_load, insn);
            switch ((insn >> 20) & 0x7) {
            case 0x0:
                /* 1010010. .000.... 001..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1184 */
                u.f_rpri_load.nreg = 0;
                if (trans_LD1RQ_zpri(ctx, &u.f_rpri_load)) return true;
                break;
            case 0x2:
                /* 1010010. .010.... 001..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1186 */
                u.f_rpri_load.nreg = 0;
                if (trans_LD1RO_zpri(ctx, &u.f_rpri_load)) return true;
                break;
            }
            break;
        case 0x2:
            /* 1010010. ........ 010..... ........ */
            /* ../git/target/arm/tcg/sve.decode:1153 */
            disas_sve_extract_rprr_load_dt(ctx, &u.f_rprr_load, insn);
            u.f_rprr_load.nreg = 0;
            if (trans_LD_zprr(ctx, &u.f_rprr_load)) return true;
            break;
        case 0x3:
            /* 1010010. ........ 011..... ........ */
            /* ../git/target/arm/tcg/sve.decode:1156 */
            disas_sve_extract_rprr_load_dt(ctx, &u.f_rprr_load, insn);
            u.f_rprr_load.nreg = 0;
            if (trans_LDFF1_zprr(ctx, &u.f_rprr_load)) return true;
            break;
        case 0x5:
            /* 1010010. ........ 101..... ........ */
            disas_sve_extract_rpri_load_dt(ctx, &u.f_rpri_load, insn);
            switch ((insn >> 20) & 0x1) {
            case 0x0:
                /* 1010010. ...0.... 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1159 */
                u.f_rpri_load.nreg = 0;
                if (trans_LD_zpri(ctx, &u.f_rpri_load)) return true;
                break;
            case 0x1:
                /* 1010010. ...1.... 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1162 */
                u.f_rpri_load.nreg = 0;
                if (trans_LDNF1_zpri(ctx, &u.f_rpri_load)) return true;
                break;
            }
            break;
        case 0x6:
            /* 1010010. ........ 110..... ........ */
            /* ../git/target/arm/tcg/sve.decode:1168 */
            disas_sve_extract_rprr_load_msz(ctx, &u.f_rprr_load, insn);
            u.f_rprr_load.nreg = extract32(insn, 21, 2);
            if (trans_LD_zprr(ctx, &u.f_rprr_load)) return true;
            break;
        case 0x7:
            /* 1010010. ........ 111..... ........ */
            disas_sve_extract_rpri_load_msz(ctx, &u.f_rpri_load, insn);
            switch ((insn >> 20) & 0x1) {
            case 0x0:
                /* 1010010. ...0.... 111..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1174 */
                u.f_rpri_load.nreg = extract32(insn, 21, 2);
                if (trans_LD_zpri(ctx, &u.f_rpri_load)) return true;
                break;
            }
            break;
        }
        break;
    case 0x62:
        /* 1100010. ........ ........ ........ */
        switch ((insn >> 15) & 0x1) {
        case 0x0:
            /* 1100010. ........ 0....... ........ */
            switch ((insn >> 23) & 0x3) {
            case 0x0:
                /* 11000100 0....... 0....... ........ */
                switch ((insn >> 21) & 0x1) {
                case 0x0:
                    /* 11000100 0.0..... 0....... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1205 */
                    disas_sve_extract_rprr_g_load_xs_u(ctx, &u.f_rprr_gather_load, insn);
                    u.f_rprr_gather_load.esz = 3;
                    u.f_rprr_gather_load.msz = 0;
                    u.f_rprr_gather_load.scale = 0;
                    if (trans_LD1_zprz(ctx, &u.f_rprr_gather_load)) return true;
                    break;
                case 0x1:
                    /* 11000100 0.1..... 0....... ........ */
                    disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                    switch ((insn >> 4) & 0x1) {
                    case 0x0:
                        /* 11000100 0.1..... 0....... ...0.... */
                        /* ../git/target/arm/tcg/sve.decode:1233 */
                        if (trans_PRF_ns(ctx, &u.f_disas_sve34)) return true;
                        break;
                    }
                    break;
                }
                break;
            case 0x1:
                /* 11000100 1....... 0....... ........ */
                /* ../git/target/arm/tcg/sve.decode:1207 */
                disas_sve_extract_rprr_g_load_xs_u_sc(ctx, &u.f_rprr_gather_load, insn);
                u.f_rprr_gather_load.esz = 3;
                u.f_rprr_gather_load.msz = 1;
                if (trans_LD1_zprz(ctx, &u.f_rprr_gather_load)) return true;
                break;
            case 0x2:
                /* 11000101 0....... 0....... ........ */
                /* ../git/target/arm/tcg/sve.decode:1209 */
                disas_sve_extract_rprr_g_load_xs_u_sc(ctx, &u.f_rprr_gather_load, insn);
                u.f_rprr_gather_load.esz = 3;
                u.f_rprr_gather_load.msz = 2;
                if (trans_LD1_zprz(ctx, &u.f_rprr_gather_load)) return true;
                break;
            case 0x3:
                /* 11000101 1....... 0....... ........ */
                disas_sve_extract_rprr_g_load_xs_sc(ctx, &u.f_rprr_gather_load, insn);
                switch ((insn >> 14) & 0x1) {
                case 0x1:
                    /* 11000101 1....... 01...... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1211 */
                    u.f_rprr_gather_load.esz = 3;
                    u.f_rprr_gather_load.msz = 3;
                    u.f_rprr_gather_load.u = 1;
                    if (trans_LD1_zprz(ctx, &u.f_rprr_gather_load)) return true;
                    break;
                }
                break;
            }
            break;
        case 0x1:
            /* 1100010. ........ 1....... ........ */
            switch ((insn >> 22) & 0x1) {
            case 0x0:
                /* 1100010. .0...... 1....... ........ */
                switch ((insn >> 21) & 0x1) {
                case 0x0:
                    /* 1100010. .00..... 1....... ........ */
                    switch ((insn >> 13) & 0x1) {
                    case 0x0:
                        /* 1100010. .00..... 1.0..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1612 */
                        disas_sve_extract_disas_sve_Fmt_105(ctx, &u.f_rprr_gather_load, insn);
                        if (trans_LDNT1_zprz(ctx, &u.f_rprr_gather_load)) return true;
                        break;
                    case 0x1:
                        /* 1100010. .00..... 1.1..... ........ */
                        disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                        switch (insn & 0x00004010) {
                        case 0x00004000:
                            /* 1100010. .00..... 111..... ...0.... */
                            /* ../git/target/arm/tcg/sve.decode:1236 */
                            if (trans_PRF_ns(ctx, &u.f_disas_sve34)) return true;
                            break;
                        }
                        break;
                    }
                    break;
                case 0x1:
                    /* 1100010. .01..... 1....... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1226 */
                    disas_sve_extract_rpri_g_load(ctx, &u.f_rpri_gather_load, insn);
                    u.f_rpri_gather_load.esz = 3;
                    if (trans_LD1_zpiz(ctx, &u.f_rpri_gather_load)) return true;
                    break;
                }
                break;
            case 0x1:
                /* 1100010. .1...... 1....... ........ */
                switch ((insn >> 23) & 0x3) {
                case 0x0:
                    /* 11000100 01...... 1....... ........ */
                    switch ((insn >> 21) & 0x1) {
                    case 0x0:
                        /* 11000100 010..... 1....... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1216 */
                        disas_sve_extract_rprr_g_load_u(ctx, &u.f_rprr_gather_load, insn);
                        u.f_rprr_gather_load.esz = 3;
                        u.f_rprr_gather_load.msz = 0;
                        u.f_rprr_gather_load.scale = 0;
                        if (trans_LD1_zprz(ctx, &u.f_rprr_gather_load)) return true;
                        break;
                    case 0x1:
                        /* 11000100 011..... 1....... ........ */
                        disas_sve_extract_disas_sve_Fmt_79(ctx, &u.f_disas_sve34, insn);
                        switch ((insn >> 4) & 0x1) {
                        case 0x0:
                            /* 11000100 011..... 1....... ...0.... */
                            /* ../git/target/arm/tcg/sve.decode:1230 */
                            if (trans_PRF_ns(ctx, &u.f_disas_sve34)) return true;
                            break;
                        }
                        break;
                    }
                    break;
                case 0x1:
                    /* 11000100 11...... 1....... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1218 */
                    disas_sve_extract_rprr_g_load_u_sc(ctx, &u.f_rprr_gather_load, insn);
                    u.f_rprr_gather_load.esz = 3;
                    u.f_rprr_gather_load.msz = 1;
                    if (trans_LD1_zprz(ctx, &u.f_rprr_gather_load)) return true;
                    break;
                case 0x2:
                    /* 11000101 01...... 1....... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1220 */
                    disas_sve_extract_rprr_g_load_u_sc(ctx, &u.f_rprr_gather_load, insn);
                    u.f_rprr_gather_load.esz = 3;
                    u.f_rprr_gather_load.msz = 2;
                    if (trans_LD1_zprz(ctx, &u.f_rprr_gather_load)) return true;
                    break;
                case 0x3:
                    /* 11000101 11...... 1....... ........ */
                    disas_sve_extract_rprr_g_load_sc(ctx, &u.f_rprr_gather_load, insn);
                    switch ((insn >> 14) & 0x1) {
                    case 0x1:
                        /* 11000101 11...... 11...... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1222 */
                        u.f_rprr_gather_load.esz = 3;
                        u.f_rprr_gather_load.msz = 3;
                        u.f_rprr_gather_load.u = 1;
                        if (trans_LD1_zprz(ctx, &u.f_rprr_gather_load)) return true;
                        break;
                    }
                    break;
                }
                break;
            }
            break;
        }
        break;
    case 0x72:
        /* 1110010. ........ ........ ........ */
        switch ((insn >> 13) & 0x7) {
        case 0x0:
            /* 1110010. ........ 000..... ........ */
            disas_sve_extract_pd_rn_i9(ctx, &u.f_rri, insn);
            switch (insn & 0x01c00010) {
            case 0x01800000:
                /* 11100101 10...... 000..... ...0.... */
                /* ../git/target/arm/tcg/sve.decode:1241 */
                if (trans_STR_pri(ctx, &u.f_rri)) return true;
                break;
            }
            break;
        case 0x1:
            /* 1110010. ........ 001..... ........ */
            disas_sve_extract_rprr_scatter_store(ctx, &u.f_rprr_scatter_store, insn);
            switch ((insn >> 21) & 0x3) {
            case 0x0:
                /* 1110010. .00..... 001..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1622 */
                u.f_rprr_scatter_store.xs = 2;
                u.f_rprr_scatter_store.esz = 3;
                u.f_rprr_scatter_store.scale = 0;
                if (trans_STNT1_zprz(ctx, &u.f_rprr_scatter_store)) return true;
                break;
            case 0x2:
                /* 1110010. .10..... 001..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1626 */
                u.f_rprr_scatter_store.xs = 0;
                u.f_rprr_scatter_store.esz = 2;
                u.f_rprr_scatter_store.scale = 0;
                if (trans_STNT1_zprz(ctx, &u.f_rprr_scatter_store)) return true;
                break;
            }
            break;
        case 0x2:
            /* 1110010. ........ 010..... ........ */
            switch ((insn >> 23) & 0x3) {
            case 0x0:
                /* 11100100 0....... 010..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1254 */
                disas_sve_extract_rprr_store_esz_n0(ctx, &u.f_rprr_store, insn);
                u.f_rprr_store.msz = 0;
                if (trans_ST_zprr(ctx, &u.f_rprr_store)) return true;
                break;
            case 0x1:
                /* 11100100 1....... 010..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1256 */
                disas_sve_extract_rprr_store_esz_n0(ctx, &u.f_rprr_store, insn);
                u.f_rprr_store.msz = 1;
                if (trans_ST_zprr(ctx, &u.f_rprr_store)) return true;
                break;
            case 0x2:
                /* 11100101 0....... 010..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1258 */
                disas_sve_extract_rprr_store_esz_n0(ctx, &u.f_rprr_store, insn);
                u.f_rprr_store.msz = 2;
                if (trans_ST_zprr(ctx, &u.f_rprr_store)) return true;
                break;
            case 0x3:
                /* 11100101 1....... 010..... ........ */
                switch ((insn >> 22) & 0x1) {
                case 0x0:
                    /* 11100101 10...... 010..... ........ */
                    /* ../git/target/arm/tcg/sve.decode:1244 */
                    disas_sve_extract_rd_rn_i9(ctx, &u.f_rri, insn);
                    if (trans_STR_zri(ctx, &u.f_rri)) return true;
                    break;
                case 0x1:
                    /* 11100101 11...... 010..... ........ */
                    disas_sve_extract_rprr_store(ctx, &u.f_rprr_store, insn);
                    switch ((insn >> 21) & 0x1) {
                    case 0x1:
                        /* 11100101 111..... 010..... ........ */
                        /* ../git/target/arm/tcg/sve.decode:1260 */
                        u.f_rprr_store.esz = 3;
                        u.f_rprr_store.msz = 3;
                        u.f_rprr_store.nreg = 0;
                        if (trans_ST_zprr(ctx, &u.f_rprr_store)) return true;
                        break;
                    }
                    break;
                }
                break;
            }
            break;
        case 0x3:
            /* 1110010. ........ 011..... ........ */
            /* ../git/target/arm/tcg/sve.decode:1270 */
            disas_sve_extract_rprr_store(ctx, &u.f_rprr_store, insn);
            u.f_rprr_store.esz = extract32(insn, 23, 2);
            u.f_rprr_store.msz = extract32(insn, 23, 2);
            u.f_rprr_store.nreg = extract32(insn, 21, 2);
            if (trans_ST_zprr(ctx, &u.f_rprr_store)) return true;
            break;
        case 0x4:
            /* 1110010. ........ 100..... ........ */
            disas_sve_extract_rprr_scatter_store(ctx, &u.f_rprr_scatter_store, insn);
            switch ((insn >> 21) & 0x3) {
            case 0x0:
                /* 1110010. .00..... 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1312 */
                u.f_rprr_scatter_store.xs = 0;
                u.f_rprr_scatter_store.esz = 3;
                u.f_rprr_scatter_store.scale = 0;
                if (trans_ST1_zprz(ctx, &u.f_rprr_scatter_store)) return true;
                break;
            case 0x1:
                /* 1110010. .01..... 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1306 */
                u.f_rprr_scatter_store.xs = 0;
                u.f_rprr_scatter_store.esz = 3;
                u.f_rprr_scatter_store.scale = 1;
                if (trans_ST1_zprz(ctx, &u.f_rprr_scatter_store)) return true;
                break;
            case 0x2:
                /* 1110010. .10..... 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1282 */
                u.f_rprr_scatter_store.xs = 0;
                u.f_rprr_scatter_store.esz = 2;
                u.f_rprr_scatter_store.scale = 0;
                if (trans_ST1_zprz(ctx, &u.f_rprr_scatter_store)) return true;
                break;
            case 0x3:
                /* 1110010. .11..... 100..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1275 */
                u.f_rprr_scatter_store.xs = 0;
                u.f_rprr_scatter_store.esz = 2;
                u.f_rprr_scatter_store.scale = 1;
                if (trans_ST1_zprz(ctx, &u.f_rprr_scatter_store)) return true;
                break;
            }
            break;
        case 0x5:
            /* 1110010. ........ 101..... ........ */
            switch ((insn >> 21) & 0x3) {
            case 0x0:
                /* 1110010. .00..... 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1293 */
                disas_sve_extract_rprr_scatter_store(ctx, &u.f_rprr_scatter_store, insn);
                u.f_rprr_scatter_store.xs = 2;
                u.f_rprr_scatter_store.esz = 3;
                u.f_rprr_scatter_store.scale = 0;
                if (trans_ST1_zprz(ctx, &u.f_rprr_scatter_store)) return true;
                break;
            case 0x1:
                /* 1110010. .01..... 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1289 */
                disas_sve_extract_rprr_scatter_store(ctx, &u.f_rprr_scatter_store, insn);
                u.f_rprr_scatter_store.xs = 2;
                u.f_rprr_scatter_store.esz = 3;
                u.f_rprr_scatter_store.scale = 1;
                if (trans_ST1_zprz(ctx, &u.f_rprr_scatter_store)) return true;
                break;
            case 0x2:
                /* 1110010. .10..... 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1297 */
                disas_sve_extract_rpri_scatter_store(ctx, &u.f_rpri_scatter_store, insn);
                u.f_rpri_scatter_store.esz = 3;
                if (trans_ST1_zpiz(ctx, &u.f_rpri_scatter_store)) return true;
                break;
            case 0x3:
                /* 1110010. .11..... 101..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1301 */
                disas_sve_extract_rpri_scatter_store(ctx, &u.f_rpri_scatter_store, insn);
                u.f_rpri_scatter_store.esz = 2;
                if (trans_ST1_zpiz(ctx, &u.f_rpri_scatter_store)) return true;
                break;
            }
            break;
        case 0x6:
            /* 1110010. ........ 110..... ........ */
            disas_sve_extract_rprr_scatter_store(ctx, &u.f_rprr_scatter_store, insn);
            switch ((insn >> 21) & 0x3) {
            case 0x0:
                /* 1110010. .00..... 110..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1314 */
                u.f_rprr_scatter_store.xs = 1;
                u.f_rprr_scatter_store.esz = 3;
                u.f_rprr_scatter_store.scale = 0;
                if (trans_ST1_zprz(ctx, &u.f_rprr_scatter_store)) return true;
                break;
            case 0x1:
                /* 1110010. .01..... 110..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1308 */
                u.f_rprr_scatter_store.xs = 1;
                u.f_rprr_scatter_store.esz = 3;
                u.f_rprr_scatter_store.scale = 1;
                if (trans_ST1_zprz(ctx, &u.f_rprr_scatter_store)) return true;
                break;
            case 0x2:
                /* 1110010. .10..... 110..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1284 */
                u.f_rprr_scatter_store.xs = 1;
                u.f_rprr_scatter_store.esz = 2;
                u.f_rprr_scatter_store.scale = 0;
                if (trans_ST1_zprz(ctx, &u.f_rprr_scatter_store)) return true;
                break;
            case 0x3:
                /* 1110010. .11..... 110..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1277 */
                u.f_rprr_scatter_store.xs = 1;
                u.f_rprr_scatter_store.esz = 2;
                u.f_rprr_scatter_store.scale = 1;
                if (trans_ST1_zprz(ctx, &u.f_rprr_scatter_store)) return true;
                break;
            }
            break;
        case 0x7:
            /* 1110010. ........ 111..... ........ */
            disas_sve_extract_rpri_store_msz(ctx, &u.f_rpri_store, insn);
            switch ((insn >> 20) & 0x1) {
            case 0x0:
                /* 1110010. ...0.... 111..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1248 */
                u.f_rpri_store.esz = extract32(insn, 21, 2);
                u.f_rpri_store.nreg = 0;
                if (trans_ST_zpri(ctx, &u.f_rpri_store)) return true;
                break;
            case 0x1:
                /* 1110010. ...1.... 111..... ........ */
                /* ../git/target/arm/tcg/sve.decode:1265 */
                u.f_rpri_store.esz = extract32(insn, 23, 2);
                u.f_rpri_store.nreg = extract32(insn, 21, 2);
                if (trans_ST_zpri(ctx, &u.f_rpri_store)) return true;
                break;
            }
            break;
        }
        break;
    }
    return false;
}
